[llvm] [LoopVectorize][X86] Rewrite guaranteed-safe masked stores as load-blend-store] (PR #206654)

[via llvm-commits]

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@@ -6851,6 +6851,14 @@ bool X86TTIImpl::enableInterleavedAccessVectorization() const {
   return !(ST->isAtom());
 }
 
+bool X86TTIImpl::shouldRewriteMaskedStoreAsLoadBlendStore() const {
+  // Driven by the X86 tuning feature `slow-masked-store`, which is set on
+  // znver1/znver2/znver3 (the AMD Zen generations whose variable-mask vector
+  // store path is microcoded). znver4 and later have first-class AVX-512
+  // masked stores and therefore opt out via X86.td.
+  return ST->hasSlowMaskedStore();
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Andarwinux wrote:

hasSlowMaskedStore looks strange – this should directly depend on hasAVX512

https://github.com/llvm/llvm-project/pull/206654