[llvm] 925378c - [RISCV][NFC] Use true/false for boolean fields in RISCV.td (#206399)

[via llvm-commits]

Author: Mark Zhuang
Date: 2026-06-30T09:28:03+08:00
New Revision: 925378c69722825f47afc170fe280d8af788c6c1

URL: https://github.com/llvm/llvm-project/commit/925378c69722825f47afc170fe280d8af788c6c1
DIFF: https://github.com/llvm/llvm-project/commit/925378c69722825f47afc170fe280d8af788c6c1.diff

LOG: [RISCV][NFC] Use true/false for boolean fields in RISCV.td (#206399)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCV.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td
index 7a4d8a6fd55d5..9de000eb1772a 100644
--- a/llvm/lib/Target/RISCV/RISCV.td
+++ b/llvm/lib/Target/RISCV/RISCV.td
@@ -85,12 +85,12 @@ include "RISCVPfmCounters.td"
 //===----------------------------------------------------------------------===//
 
 def RISCVInstrInfo : InstrInfo {
-  let guessInstructionProperties = 0;
+  let guessInstructionProperties = false;
 }
 
 def RISCVAsmParser : AsmParser {
-  let ShouldEmitMatchRegisterAltName = 1;
-  let AllowDuplicateRegisterNames = 1;
+  let ShouldEmitMatchRegisterAltName = true;
+  let AllowDuplicateRegisterNames = true;
 }
 
 def RISCVAsmWriter : AsmWriter {
@@ -103,5 +103,5 @@ def RISCV : Target {
   let InstructionSet = RISCVInstrInfo;
   let AssemblyParsers = [RISCVAsmParser];
   let AssemblyWriters = [RISCVAsmWriter];
-  let AllowRegisterRenaming = 1;
+  let AllowRegisterRenaming = true;
 }