[llvm] [AMDGPU] Use alias analysis for SMEM/VMEM WAR waitcnts (PR #206569)

[Matt Arsenault via llvm-commits]

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@@ -2377,15 +2377,27 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
       // 2) If a destination operand that was used by a recent export/store ins,
       // add s_waitcnt on exp_cnt to guarantee the WAR order.
 
-      for (const MachineMemOperand *Memop : MI.memoperands()) {
-        const Value *Ptr = Memop->getValue();
-        if (Memop->isStore()) {
-          if (auto It = SLoadAddresses.find(Ptr); It != SLoadAddresses.end()) {
-            Wait.add(SmemAccessCounter, 0);
-            if (PDT.dominates(MI.getParent(), It->second))
-              SLoadAddresses.erase(It);
+      if (any_of(MI.memoperands(), [](const MachineMemOperand *Memop) {
+            return Memop->isStore();
+          })) {
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arsenm wrote:

This is a weird condition, can't you just check MI.mayStore

https://github.com/llvm/llvm-project/pull/206569