[llvm] [Hexagon] Fix PostRA QFP pass crash on pre-v79 targets (PR #206529)

Fateme Hosseini via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 29 10:55:08 PDT 2026


https://github.com/fhossein-quic updated https://github.com/llvm/llvm-project/pull/206529

>From 818717cf92f9f5787be685453b97c12a2aa0bc0a Mon Sep 17 00:00:00 2001
From: Fateme Hosseini <fhossein at qti.qualcomm.com>
Date: Mon, 29 Jun 2026 08:49:50 -0700
Subject: [PATCH] [Hexagon] Fix PostRA QFP pass crash on pre-v79 targets

Gate the HexagonPostRAHandleQFP pass to only
run for v79+.

Fixes: https://github.com/llvm/llvm-project/issues/206301
---
 .../Target/Hexagon/HexagonTargetMachine.cpp   |  5 ++++-
 .../autohvx/postRA-qfp-v69-no-crash.ll        | 21 +++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/postRA-qfp-v69-no-crash.ll

diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 174d796034992..6171a60f33366 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -495,7 +495,10 @@ void HexagonPassConfig::addPreRegAlloc() {
 }
 
 void HexagonPassConfig::addPostRegAlloc() {
-  if (EnablePostRAHandleQFP)
+  HexagonTargetMachine &HTM = getHexagonTargetMachine();
+  const HexagonSubtarget *HST = HTM.getHexagonSubtarget();
+  // Run PostRAQFP on v79 and above.
+  if (EnablePostRAHandleQFP && HST->useHVXV79Ops())
     addPass(createHexagonPostRAHandleQFP());
 
   if (getOptLevel() != CodeGenOptLevel::None) {
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/postRA-qfp-v69-no-crash.ll b/llvm/test/CodeGen/Hexagon/autohvx/postRA-qfp-v69-no-crash.ll
new file mode 100644
index 0000000000000..1f975b7f6adc8
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/autohvx/postRA-qfp-v69-no-crash.ll
@@ -0,0 +1,21 @@
+; Test that the PostRA QFP handle pass does not crash
+; on <v79 with qfloat intrinsics.
+;
+; REQUIRES: asserts
+; RUN: llc -mtriple=hexagon-unknown-linux-musl -mcpu=hexagonv69 \
+; RUN:   -mattr=+hvx-length128b,+hvxv69 -O2 -filetype=obj \
+; RUN:   < %s -o /dev/null
+
+define <32 x i32> @main() {
+entry:
+  %0 = tail call <32 x i32> @llvm.hexagon.V6.vadd.qf32.mix.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer)
+  %puts = call i32 @puts()
+  %1 = tail call <32 x i32> @llvm.hexagon.V6.vconv.sf.qf32.128B(<32 x i32> %0)
+  ret <32 x i32> %1
+}
+
+declare <32 x i32> @llvm.hexagon.V6.vadd.qf32.mix.128B(<32 x i32>, <32 x i32>) #0
+declare <32 x i32> @llvm.hexagon.V6.vconv.sf.qf32.128B(<32 x i32>) #0
+declare i32 @puts()
+
+attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }



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