[llvm] [SelectionDAG][AMDGPU] Preserve known bits for demoted sret pointers (PR #203468)
Keshav Vinayak Jha via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 29 06:53:22 PDT 2026
https://github.com/keshavvinayak01 updated https://github.com/llvm/llvm-project/pull/203468
>From dcad8efce9c0cb3964d69f05dc2723eb22f816e3 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Fri, 12 Jun 2026 12:17:10 +0530
Subject: [PATCH 01/11] Preserve known bits for demoted sret pointers
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
.../SelectionDAG/SelectionDAGBuilder.cpp | 45 +
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 29073 ++++++++--------
.../CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll | 1831 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll | 7665 ++--
llvm/test/CodeGen/AMDGPU/bf16.ll | 1530 +-
llvm/test/CodeGen/AMDGPU/function-returns.ll | 598 +-
6 files changed, 19382 insertions(+), 21360 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 0608a95e09278..8c897333587ec 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -96,6 +96,7 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/InstructionCost.h"
+#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
@@ -2219,6 +2220,34 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
+
+ // The CopyToReg/CopyFromReg pair used to pass the hidden sret pointer to
+ // the return is opaque to value tracking, so re-materialize any known-bits
+ // assertion recorded for DemoteReg (e.g. a target AssertZext on the high
+ // address bits). This mirrors RegsForValue::getCopyFromRegs and lets the
+ // return stores fold the pointer into a base+offset addressing mode.
+ if (PtrValueVT.isInteger()) {
+ if (const FunctionLoweringInfo::LiveOutInfo *LOI =
+ FuncInfo.GetLiveOutRegInfo(DemoteReg)) {
+ unsigned RegSize = PtrValueVT.getScalarSizeInBits();
+ unsigned NumSignBits = LOI->NumSignBits;
+ unsigned NumZeroBits = LOI->Known.countMinLeadingZeros();
+ EVT FromVT(MVT::Other);
+ bool IsSExt = false;
+ if (NumZeroBits && NumZeroBits != RegSize) {
+ FromVT = EVT::getIntegerVT(*DAG.getContext(), RegSize - NumZeroBits);
+ } else if (NumSignBits > 1) {
+ FromVT =
+ EVT::getIntegerVT(*DAG.getContext(), RegSize - NumSignBits + 1);
+ IsSExt = true;
+ }
+ if (FromVT != MVT::Other)
+ RetPtr = DAG.getNode(IsSExt ? ISD::AssertSext : ISD::AssertZext,
+ getCurSDLoc(), PtrValueVT, RetPtr,
+ DAG.getValueType(FromVT));
+ }
+ }
+
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
@@ -12156,6 +12185,22 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
SDB->DAG.getCopyToReg(NewRoot, SDB->getCurSDLoc(), SRetReg, ArgValue);
DAG.setRoot(NewRoot);
+ // The hidden sret pointer is shuttled to the return through SRetReg via a
+ // CopyToReg/CopyFromReg pair, which is opaque to value tracking. That would
+ // discard any known-bits assertion the target attached to the incoming
+ // sret argument (e.g. AMDGPU's AssertZext marking the high address bits
+ // zero so the return stores can fold into a base+offset addressing mode).
+ // Record the argument's known bits for SRetReg so visitRet can
+ // re-materialize the assertion after reading the register back. This
+ // mirrors ComputeLiveOutVRegInfo, which only runs at -O>0, so gate on the
+ // opt level to keep -O0 codegen unchanged.
+ if (TM.getOptLevel() != CodeGenOptLevel::None &&
+ ArgValue.getValueType().isInteger()) {
+ unsigned NumSignBits = DAG.ComputeNumSignBits(ArgValue);
+ KnownBits Known = DAG.computeKnownBits(ArgValue);
+ FuncInfo->AddLiveOutRegInfo(SRetReg, NumSignBits, Known);
+ }
+
// i indexes lowered arguments. Bump it past the hidden sret argument.
++i;
}
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 8fb907a94fb4a..ba19fb46a45bd 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -4090,20 +4090,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
@@ -4111,14 +4110,15 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -4183,53 +4183,50 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v33, v22, v21, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
@@ -4238,64 +4235,70 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -4304,7 +4307,7 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -4313,34 +4316,31 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v53, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -4428,63 +4428,60 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v33, v22, v21, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
; SI-NEXT: v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT: v_add_i32_e32 v17, vcc, 3, v17
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
; SI-NEXT: v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
; SI-NEXT: v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
; SI-NEXT: v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
; SI-NEXT: v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: v_add_i32_e32 v8, vcc, 3, v8
@@ -4495,64 +4492,72 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
+; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
+; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -4561,7 +4566,7 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -4570,40 +4575,35 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; SI-NEXT: v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
-; SI-NEXT: v_add_i32_e32 v6, vcc, 3, v6
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v53, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -4621,12 +4621,12 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: .LBB12_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v45
-; SI-NEXT: v_and_b32_e32 v43, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v1, v1, v45
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v43
+; SI-NEXT: v_and_b32_e32 v42, 0xff, v42
+; SI-NEXT: v_or_b32_e32 v1, v1, v43
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v41
-; SI-NEXT: v_or_b32_e32 v41, v41, v43
+; SI-NEXT: v_or_b32_e32 v41, v41, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v41
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
@@ -4640,20 +4640,18 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v63
@@ -4664,20 +4662,20 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v38
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v37
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v60
@@ -4688,12 +4686,11 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -4706,8 +4703,7 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
@@ -4718,12 +4714,11 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -4736,28 +4731,26 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v45
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v44
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -4766,28 +4759,26 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v54
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v54
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -4796,75 +4787,68 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v49
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v39
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
@@ -4872,35 +4856,31 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v36
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
@@ -4908,16 +4888,15 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
@@ -4926,34 +4905,32 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
@@ -4962,34 +4939,32 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
@@ -4998,34 +4973,32 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
@@ -5034,34 +5007,32 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
@@ -5070,34 +5041,32 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
@@ -5114,24 +5083,24 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -5254,66 +5223,61 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr55
@@ -5349,182 +5313,185 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB12_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
; VI-NEXT: .LBB12_2: ; %Flow
@@ -5584,341 +5551,318 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
-; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3
+; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
+; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1
-; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: .LBB12_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v57, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v48
+; VI-NEXT: v_perm_b32 v7, v7, v38, s4
+; VI-NEXT: v_perm_b32 v10, v10, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v35, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v8, v8, v33, s4
+; VI-NEXT: v_perm_b32 v33, v49, v53, s4
+; VI-NEXT: v_perm_b32 v11, v11, v48, s4
+; VI-NEXT: v_perm_b32 v3, v3, v34, s4
+; VI-NEXT: v_perm_b32 v34, v47, v39, s4
+; VI-NEXT: v_perm_b32 v39, v50, v54, s4
+; VI-NEXT: v_perm_b32 v55, v59, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v52, s4
+; VI-NEXT: v_perm_b32 v2, v2, v58, s4
+; VI-NEXT: v_perm_b32 v51, v51, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v57, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v6, v6, v46, s4
+; VI-NEXT: v_perm_b32 v9, v9, v45, s4
+; VI-NEXT: v_perm_b32 v12, v12, v63, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v36, v36, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v38, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v35, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v35, v48, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v38, v38, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
+; VI-NEXT: v_or_b32_e32 v1, v1, v49
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v34, v56, s4
-; VI-NEXT: v_perm_b32 v2, v2, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v47, v40, s4
-; VI-NEXT: v_perm_b32 v2, v3, v38, s4
+; VI-NEXT: v_perm_b32 v1, v44, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v4, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v33, v39, s4
-; VI-NEXT: v_perm_b32 v2, v5, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v44, v43, s4
-; VI-NEXT: v_perm_b32 v1, v6, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v50, v54, s4
-; VI-NEXT: v_perm_b32 v2, v7, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v62, v61, s4
-; VI-NEXT: v_perm_b32 v1, v8, v36, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v9, v49, s4
-; VI-NEXT: v_perm_b32 v1, v60, v1, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v62, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v10, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v11, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -5926,21 +5870,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v21, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -5948,21 +5890,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v24, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -5970,21 +5910,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -5992,21 +5930,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -6014,21 +5950,19 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v29, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -6036,18 +5970,16 @@ define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v32, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -7968,156 +7900,156 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshr_b32 s46, s5, 24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s46, 42
+; SI-NEXT: v_writelane_b32 v22, s46, 38
; SI-NEXT: s_lshr_b32 s46, s5, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 43
+; SI-NEXT: v_writelane_b32 v22, s46, 39
; SI-NEXT: s_lshr_b32 s46, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 44
+; SI-NEXT: v_writelane_b32 v22, s46, 40
; SI-NEXT: s_lshr_b32 s46, s7, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 45
+; SI-NEXT: v_writelane_b32 v22, s46, 41
; SI-NEXT: s_lshr_b32 s46, s7, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 46
+; SI-NEXT: v_writelane_b32 v22, s46, 42
; SI-NEXT: s_lshr_b32 s46, s7, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 47
+; SI-NEXT: v_writelane_b32 v22, s46, 43
; SI-NEXT: s_lshr_b32 s46, s9, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 48
+; SI-NEXT: v_writelane_b32 v22, s46, 44
; SI-NEXT: s_lshr_b32 s46, s9, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 49
+; SI-NEXT: v_writelane_b32 v22, s46, 45
; SI-NEXT: s_lshr_b32 s46, s11, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 50
+; SI-NEXT: v_writelane_b32 v22, s46, 46
; SI-NEXT: s_lshr_b32 s46, s11, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 51
+; SI-NEXT: v_writelane_b32 v22, s46, 47
; SI-NEXT: s_lshr_b32 s46, s11, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 52
+; SI-NEXT: v_writelane_b32 v22, s46, 48
; SI-NEXT: s_lshr_b32 s46, s13, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 53
+; SI-NEXT: v_writelane_b32 v22, s46, 49
; SI-NEXT: s_lshr_b32 s46, s13, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 54
+; SI-NEXT: v_writelane_b32 v22, s46, 50
; SI-NEXT: s_lshr_b32 s46, s13, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 55
+; SI-NEXT: v_writelane_b32 v22, s46, 51
; SI-NEXT: s_lshr_b32 s46, s15, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 56
+; SI-NEXT: v_writelane_b32 v22, s46, 52
; SI-NEXT: s_lshr_b32 s46, s15, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 57
+; SI-NEXT: v_writelane_b32 v22, s46, 53
; SI-NEXT: s_lshr_b32 s46, s15, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s46, 54
; SI-NEXT: s_lshr_b32 s46, s41, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 59
+; SI-NEXT: v_writelane_b32 v22, s46, 55
; SI-NEXT: s_lshr_b32 s46, s41, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 60
+; SI-NEXT: v_writelane_b32 v22, s46, 56
; SI-NEXT: s_lshr_b32 s46, s41, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 61
+; SI-NEXT: v_writelane_b32 v22, s46, 57
; SI-NEXT: s_lshr_b32 s46, s43, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 62
+; SI-NEXT: v_writelane_b32 v22, s46, 58
; SI-NEXT: s_lshr_b32 s46, s43, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 63
+; SI-NEXT: v_writelane_b32 v22, s46, 59
; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 0
+; SI-NEXT: v_writelane_b32 v22, s46, 60
; SI-NEXT: s_lshr_b32 s46, s45, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 1
+; SI-NEXT: v_writelane_b32 v22, s46, 61
; SI-NEXT: s_lshr_b32 s46, s45, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 2
+; SI-NEXT: v_writelane_b32 v22, s46, 62
; SI-NEXT: s_lshr_b32 s46, s45, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 3
+; SI-NEXT: v_writelane_b32 v22, s46, 63
; SI-NEXT: s_lshr_b32 s46, s29, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 4
+; SI-NEXT: v_writelane_b32 v21, s46, 0
; SI-NEXT: s_lshr_b32 s46, s29, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 5
+; SI-NEXT: v_writelane_b32 v21, s46, 1
; SI-NEXT: s_lshr_b32 s46, s29, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 6
+; SI-NEXT: v_writelane_b32 v21, s46, 2
; SI-NEXT: s_lshr_b32 s46, s27, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 7
+; SI-NEXT: v_writelane_b32 v21, s46, 3
; SI-NEXT: s_lshr_b32 s46, s27, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 4
; SI-NEXT: s_lshr_b32 s46, s27, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 9
+; SI-NEXT: v_writelane_b32 v21, s46, 5
; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 10
+; SI-NEXT: v_writelane_b32 v21, s46, 6
; SI-NEXT: s_lshr_b32 s46, s25, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 11
+; SI-NEXT: v_writelane_b32 v21, s46, 7
; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 12
+; SI-NEXT: v_writelane_b32 v21, s46, 8
; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: v_writelane_b32 v21, s46, 9
; SI-NEXT: s_lshr_b32 s46, s23, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: v_writelane_b32 v21, s46, 10
; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: v_writelane_b32 v21, s46, 11
; SI-NEXT: s_lshr_b32 s46, s21, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 12
; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 17
+; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s21, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s19, 24
+; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 16
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 40
-; SI-NEXT: v_writelane_b32 v22, s47, 41
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s46, 36
; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s46, 34
; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 32
; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 30
; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
; SI-NEXT: v_writelane_b32 v22, s46, 28
; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; SI-NEXT: v_writelane_b32 v22, s46, 26
; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: v_writelane_b32 v22, s46, 24
; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
; SI-NEXT: v_writelane_b32 v22, s46, 22
; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; SI-NEXT: v_writelane_b32 v22, s46, 20
; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: v_writelane_b32 v22, s46, 18
; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: v_writelane_b32 v22, s46, 16
; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; SI-NEXT: v_writelane_b32 v22, s46, 14
; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: v_writelane_b32 v22, s46, 12
; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
; SI-NEXT: v_writelane_b32 v22, s46, 10
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; SI-NEXT: v_writelane_b32 v22, s46, 8
; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
; SI-NEXT: v_writelane_b32 v22, s46, 2
; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b32 s56, s9, 24
+; SI-NEXT: s_lshr_b64 s[52:53], s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, s46, 0
-; SI-NEXT: s_lshr_b32 s50, s9, 24
-; SI-NEXT: s_lshr_b32 s51, s21, 8
-; SI-NEXT: s_lshr_b32 s48, s19, 24
-; SI-NEXT: s_lshr_b32 s52, s19, 16
-; SI-NEXT: s_lshr_b32 s53, s19, 8
-; SI-NEXT: s_lshr_b32 s54, s17, 24
-; SI-NEXT: s_lshr_b32 s55, s17, 16
-; SI-NEXT: s_lshr_b32 s49, s17, 8
+; SI-NEXT: s_lshr_b32 s48, s19, 8
+; SI-NEXT: s_lshr_b32 s49, s17, 24
+; SI-NEXT: s_lshr_b32 s50, s17, 16
+; SI-NEXT: s_lshr_b32 s51, s17, 8
+; SI-NEXT: s_mov_b32 s53, s56
; SI-NEXT: v_writelane_b32 v22, s47, 1
+; SI-NEXT: s_lshr_b64 s[54:55], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[64:65], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8
@@ -8150,168 +8082,168 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s5, s5, 3
; SI-NEXT: s_add_i32 s4, s4, 3
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 40
-; SI-NEXT: v_writelane_b32 v22, s47, 41
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s46, 36
; SI-NEXT: v_writelane_b32 v22, s47, 37
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v22, s46, 34
+; SI-NEXT: v_writelane_b32 v22, s47, 35
; SI-NEXT: s_lshr_b32 s46, s5, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 42
+; SI-NEXT: v_writelane_b32 v22, s46, 38
; SI-NEXT: s_lshr_b32 s46, s5, 16
; SI-NEXT: s_add_i32 s7, s7, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 43
+; SI-NEXT: v_writelane_b32 v22, s46, 39
; SI-NEXT: s_lshr_b32 s46, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 44
+; SI-NEXT: v_writelane_b32 v22, s46, 40
; SI-NEXT: s_lshr_b32 s46, s7, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 45
+; SI-NEXT: v_writelane_b32 v22, s46, 41
; SI-NEXT: s_lshr_b32 s46, s7, 16
; SI-NEXT: s_add_i32 s9, s9, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 46
+; SI-NEXT: v_writelane_b32 v22, s46, 42
; SI-NEXT: s_lshr_b32 s46, s7, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 47
+; SI-NEXT: v_writelane_b32 v22, s46, 43
; SI-NEXT: s_lshr_b32 s46, s9, 16
; SI-NEXT: s_add_i32 s11, s11, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 48
+; SI-NEXT: v_writelane_b32 v22, s46, 44
; SI-NEXT: s_lshr_b32 s46, s9, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 49
+; SI-NEXT: v_writelane_b32 v22, s46, 45
; SI-NEXT: s_lshr_b32 s46, s11, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 50
+; SI-NEXT: v_writelane_b32 v22, s46, 46
; SI-NEXT: s_lshr_b32 s46, s11, 16
; SI-NEXT: s_add_i32 s13, s13, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 51
+; SI-NEXT: v_writelane_b32 v22, s46, 47
; SI-NEXT: s_lshr_b32 s46, s11, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 52
+; SI-NEXT: v_writelane_b32 v22, s46, 48
; SI-NEXT: s_lshr_b32 s46, s13, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 53
+; SI-NEXT: v_writelane_b32 v22, s46, 49
; SI-NEXT: s_lshr_b32 s46, s13, 16
; SI-NEXT: s_add_i32 s15, s15, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 54
+; SI-NEXT: v_writelane_b32 v22, s46, 50
; SI-NEXT: s_lshr_b32 s46, s13, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 55
+; SI-NEXT: v_writelane_b32 v22, s46, 51
; SI-NEXT: s_lshr_b32 s46, s15, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 56
+; SI-NEXT: v_writelane_b32 v22, s46, 52
; SI-NEXT: s_lshr_b32 s46, s15, 16
; SI-NEXT: s_add_i32 s41, s41, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 57
+; SI-NEXT: v_writelane_b32 v22, s46, 53
; SI-NEXT: s_lshr_b32 s46, s15, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s46, 54
; SI-NEXT: s_lshr_b32 s46, s41, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 59
+; SI-NEXT: v_writelane_b32 v22, s46, 55
; SI-NEXT: s_lshr_b32 s46, s41, 16
; SI-NEXT: s_add_i32 s43, s43, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 60
+; SI-NEXT: v_writelane_b32 v22, s46, 56
; SI-NEXT: s_lshr_b32 s46, s41, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 61
+; SI-NEXT: v_writelane_b32 v22, s46, 57
; SI-NEXT: s_lshr_b32 s46, s43, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 62
+; SI-NEXT: v_writelane_b32 v22, s46, 58
; SI-NEXT: s_lshr_b32 s46, s43, 16
; SI-NEXT: s_add_i32 s45, s45, 3
-; SI-NEXT: v_writelane_b32 v22, s46, 63
+; SI-NEXT: v_writelane_b32 v22, s46, 59
; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 0
+; SI-NEXT: v_writelane_b32 v22, s46, 60
; SI-NEXT: s_lshr_b32 s46, s45, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 1
+; SI-NEXT: v_writelane_b32 v22, s46, 61
; SI-NEXT: s_lshr_b32 s46, s45, 16
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: v_writelane_b32 v21, s46, 2
+; SI-NEXT: v_writelane_b32 v22, s46, 62
; SI-NEXT: s_lshr_b32 s46, s45, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 3
+; SI-NEXT: v_writelane_b32 v22, s46, 63
; SI-NEXT: s_lshr_b32 s46, s29, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 4
+; SI-NEXT: v_writelane_b32 v21, s46, 0
; SI-NEXT: s_lshr_b32 s46, s29, 16
; SI-NEXT: s_add_i32 s27, s27, 3
-; SI-NEXT: v_writelane_b32 v21, s46, 5
+; SI-NEXT: v_writelane_b32 v21, s46, 1
; SI-NEXT: s_lshr_b32 s46, s29, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 6
+; SI-NEXT: v_writelane_b32 v21, s46, 2
; SI-NEXT: s_lshr_b32 s46, s27, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 7
+; SI-NEXT: v_writelane_b32 v21, s46, 3
; SI-NEXT: s_lshr_b32 s46, s27, 16
; SI-NEXT: s_add_i32 s25, s25, 3
-; SI-NEXT: v_writelane_b32 v21, s46, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 4
; SI-NEXT: s_lshr_b32 s46, s27, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 9
+; SI-NEXT: v_writelane_b32 v21, s46, 5
; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 10
+; SI-NEXT: v_writelane_b32 v21, s46, 6
; SI-NEXT: s_lshr_b32 s46, s25, 16
; SI-NEXT: s_add_i32 s23, s23, 3
-; SI-NEXT: v_writelane_b32 v21, s46, 11
+; SI-NEXT: v_writelane_b32 v21, s46, 7
; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 12
+; SI-NEXT: v_writelane_b32 v21, s46, 8
; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: v_writelane_b32 v21, s46, 9
; SI-NEXT: s_lshr_b32 s46, s23, 16
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: v_writelane_b32 v21, s46, 10
; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: v_writelane_b32 v21, s46, 11
; SI-NEXT: s_lshr_b32 s46, s21, 24
+; SI-NEXT: v_writelane_b32 v21, s46, 12
+; SI-NEXT: s_lshr_b32 s46, s21, 16
+; SI-NEXT: s_add_i32 s19, s19, 3
+; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s21, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s19, 24
; SI-NEXT: s_add_i32 s6, s6, 3
+; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: s_lshr_b32 s46, s19, 16
; SI-NEXT: v_writelane_b32 v21, s46, 16
-; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 17
; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 34
-; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 32
; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
-; SI-NEXT: s_add_i32 s8, s8, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 30
; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: s_add_i32 s8, s8, 3
; SI-NEXT: v_writelane_b32 v22, s46, 28
; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; SI-NEXT: v_writelane_b32 v22, s46, 26
; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
-; SI-NEXT: s_add_i32 s10, s10, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: v_writelane_b32 v22, s46, 24
; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: s_add_i32 s10, s10, 3
; SI-NEXT: v_writelane_b32 v22, s46, 22
; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; SI-NEXT: v_writelane_b32 v22, s46, 20
; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
-; SI-NEXT: s_add_i32 s12, s12, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: v_writelane_b32 v22, s46, 18
; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_add_i32 s12, s12, 3
; SI-NEXT: v_writelane_b32 v22, s46, 16
; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; SI-NEXT: v_writelane_b32 v22, s46, 14
; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
-; SI-NEXT: s_add_i32 s14, s14, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: v_writelane_b32 v22, s46, 12
; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: s_add_i32 s14, s14, 3
; SI-NEXT: v_writelane_b32 v22, s46, 10
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; SI-NEXT: v_writelane_b32 v22, s46, 8
; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
-; SI-NEXT: s_add_i32 s40, s40, 3
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: s_add_i32 s40, s40, 3
; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
; SI-NEXT: v_writelane_b32 v22, s46, 2
; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
; SI-NEXT: s_add_i32 s17, s17, 3
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_add_i32 s19, s19, 3
; SI-NEXT: s_add_i32 s18, s18, 3
; SI-NEXT: s_add_i32 s20, s20, 3
; SI-NEXT: s_add_i32 s22, s22, 3
@@ -8320,16 +8252,15 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_add_i32 s28, s28, 3
; SI-NEXT: s_add_i32 s44, s44, 3
; SI-NEXT: s_add_i32 s42, s42, 3
+; SI-NEXT: s_lshr_b64 s[52:53], s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, s46, 0
-; SI-NEXT: s_lshr_b32 s50, s9, 24
-; SI-NEXT: s_lshr_b32 s51, s21, 8
-; SI-NEXT: s_lshr_b32 s48, s19, 24
-; SI-NEXT: s_lshr_b32 s52, s19, 16
-; SI-NEXT: s_lshr_b32 s53, s19, 8
-; SI-NEXT: s_lshr_b32 s54, s17, 24
-; SI-NEXT: s_lshr_b32 s55, s17, 16
-; SI-NEXT: s_lshr_b32 s49, s17, 8
+; SI-NEXT: s_lshr_b32 s53, s9, 24
+; SI-NEXT: s_lshr_b32 s48, s19, 8
+; SI-NEXT: s_lshr_b32 s49, s17, 24
+; SI-NEXT: s_lshr_b32 s50, s17, 16
+; SI-NEXT: s_lshr_b32 s51, s17, 8
; SI-NEXT: v_writelane_b32 v22, s47, 1
+; SI-NEXT: s_lshr_b64 s[54:55], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[64:65], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8
@@ -8369,11 +8300,11 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s47
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s17, 0xff
-; SI-NEXT: s_lshl_b32 s17, s49, 8
+; SI-NEXT: s_lshl_b32 s17, s51, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s55, 0xff
+; SI-NEXT: s_and_b32 s17, s50, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s47, s54, 24
+; SI-NEXT: s_lshl_b32 s47, s49, 24
; SI-NEXT: s_or_b32 s17, s47, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8389,11 +8320,13 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v3, s16
; SI-NEXT: s_and_b32 s16, s19, 0xff
-; SI-NEXT: s_lshl_b32 s17, s53, 8
+; SI-NEXT: s_lshl_b32 s17, s48, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s52, 0xff
+; SI-NEXT: v_readlane_b32 s17, v21, 16
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 15
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s48, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -8407,13 +8340,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v21, 14
; SI-NEXT: v_mov_b32_e32 v5, s16
; SI-NEXT: s_and_b32 s16, s21, 0xff
-; SI-NEXT: s_lshl_b32 s17, s51, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 17
+; SI-NEXT: v_readlane_b32 s17, v21, 13
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 16
+; SI-NEXT: v_readlane_b32 s18, v21, 12
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -8429,14 +8363,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 15
+; SI-NEXT: v_readlane_b32 s17, v21, 11
; SI-NEXT: v_mov_b32_e32 v7, s16
; SI-NEXT: s_and_b32 s16, s23, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 14
+; SI-NEXT: v_readlane_b32 s17, v21, 10
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 13
+; SI-NEXT: v_readlane_b32 s18, v21, 9
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -8452,14 +8386,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 12
+; SI-NEXT: v_readlane_b32 s17, v21, 8
; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s25, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 11
+; SI-NEXT: v_readlane_b32 s17, v21, 7
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 10
+; SI-NEXT: v_readlane_b32 s18, v21, 6
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -8475,14 +8409,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 9
+; SI-NEXT: v_readlane_b32 s17, v21, 5
; SI-NEXT: v_mov_b32_e32 v11, s16
; SI-NEXT: s_and_b32 s16, s27, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 8
+; SI-NEXT: v_readlane_b32 s17, v21, 4
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 7
+; SI-NEXT: v_readlane_b32 s18, v21, 3
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -8498,14 +8432,14 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 6
+; SI-NEXT: v_readlane_b32 s17, v21, 2
; SI-NEXT: v_mov_b32_e32 v13, s16
; SI-NEXT: s_and_b32 s16, s29, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 5
+; SI-NEXT: v_readlane_b32 s17, v21, 1
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 4
+; SI-NEXT: v_readlane_b32 s18, v21, 0
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -8521,324 +8455,289 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 3
+; SI-NEXT: v_readlane_b32 s17, v22, 63
; SI-NEXT: v_mov_b32_e32 v15, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 2
+; SI-NEXT: v_readlane_b32 s17, v22, 62
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
+; SI-NEXT: v_readlane_b32 s18, v22, 61
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: v_mov_b32_e32 v16, s16
; SI-NEXT: s_lshl_b32 s16, s68, 8
; SI-NEXT: s_and_b32 s17, s42, 0xff
-; SI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s66, 0xff
-; SI-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_lshl_b32 s18, s64, 24
-; SI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 0
-; SI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_readlane_b32 s17, v22, 60
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 63
-; SI-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
+; SI-NEXT: v_readlane_b32 s17, v22, 59
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 62
-; SI-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
+; SI-NEXT: v_readlane_b32 s18, v22, 58
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 0
-; SI-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 60, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 1
-; SI-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0
+; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 2
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s18, v22, 0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 3
+; SI-NEXT: s_lshl_b32 s17, s54, 8
+; SI-NEXT: v_readlane_b32 s19, v22, 1
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 4
+; SI-NEXT: v_readlane_b32 s18, v22, 2
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 61
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s17, v22, 57
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 60
+; SI-NEXT: v_readlane_b32 s17, v22, 56
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 59
+; SI-NEXT: v_readlane_b32 s18, v22, 55
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 6
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: v_readlane_b32 s16, v22, 4
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 7
+; SI-NEXT: v_readlane_b32 s17, v22, 5
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 5
+; SI-NEXT: v_readlane_b32 s19, v22, 3
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 8
-; SI-NEXT: v_readlane_b32 s17, v22, 9
+; SI-NEXT: v_readlane_b32 s16, v22, 6
+; SI-NEXT: v_readlane_b32 s17, v22, 7
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 10
+; SI-NEXT: v_readlane_b32 s18, v22, 8
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x4c, v0
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
+; SI-NEXT: v_mov_b32_e32 v1, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 58
+; SI-NEXT: v_readlane_b32 s15, v22, 54
; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: v_readlane_b32 s15, v22, 57
+; SI-NEXT: v_readlane_b32 s15, v22, 53
; SI-NEXT: s_and_b32 s15, s15, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 56
+; SI-NEXT: v_readlane_b32 s16, v22, 52
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 12
+; SI-NEXT: v_mov_b32_e32 v1, s14
+; SI-NEXT: v_readlane_b32 s14, v22, 10
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 13
+; SI-NEXT: v_readlane_b32 s15, v22, 11
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 14
-; SI-NEXT: v_readlane_b32 s15, v22, 15
+; SI-NEXT: v_readlane_b32 s14, v22, 12
+; SI-NEXT: v_readlane_b32 s15, v22, 13
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 16
+; SI-NEXT: v_readlane_b32 s16, v22, 14
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 55
+; SI-NEXT: v_readlane_b32 s13, v22, 51
; SI-NEXT: s_lshl_b32 s13, s13, 8
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: v_readlane_b32 s13, v22, 54
+; SI-NEXT: v_readlane_b32 s13, v22, 50
; SI-NEXT: s_and_b32 s13, s13, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 53
+; SI-NEXT: v_readlane_b32 s14, v22, 49
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 18
+; SI-NEXT: v_mov_b32_e32 v1, s12
+; SI-NEXT: v_readlane_b32 s12, v22, 16
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 19
+; SI-NEXT: v_readlane_b32 s13, v22, 17
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 20
-; SI-NEXT: v_readlane_b32 s13, v22, 21
+; SI-NEXT: v_readlane_b32 s12, v22, 18
+; SI-NEXT: v_readlane_b32 s13, v22, 19
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 22
+; SI-NEXT: v_readlane_b32 s14, v22, 20
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x5c, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 52
+; SI-NEXT: v_readlane_b32 s11, v22, 48
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: v_readlane_b32 s11, v22, 51
+; SI-NEXT: v_readlane_b32 s11, v22, 47
; SI-NEXT: s_and_b32 s11, s11, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 50
+; SI-NEXT: v_readlane_b32 s12, v22, 46
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 24
+; SI-NEXT: v_mov_b32_e32 v1, s10
+; SI-NEXT: v_readlane_b32 s10, v22, 22
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 25
+; SI-NEXT: v_readlane_b32 s11, v22, 23
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 26
-; SI-NEXT: v_readlane_b32 s11, v22, 27
+; SI-NEXT: v_readlane_b32 s10, v22, 24
+; SI-NEXT: v_readlane_b32 s11, v22, 25
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 28
+; SI-NEXT: v_readlane_b32 s12, v22, 26
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x64, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: v_readlane_b32 s9, v22, 49
+; SI-NEXT: v_readlane_b32 s9, v22, 45
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: v_readlane_b32 s9, v22, 48
+; SI-NEXT: v_readlane_b32 s9, v22, 44
; SI-NEXT: s_and_b32 s9, s9, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s50, 24
+; SI-NEXT: s_lshl_b32 s10, s53, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 30
+; SI-NEXT: v_mov_b32_e32 v1, s8
+; SI-NEXT: v_readlane_b32 s8, v22, 28
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v22, 31
+; SI-NEXT: v_readlane_b32 s9, v22, 29
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 32
-; SI-NEXT: v_readlane_b32 s9, v22, 33
+; SI-NEXT: v_readlane_b32 s8, v22, 30
+; SI-NEXT: v_readlane_b32 s9, v22, 31
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v22, 34
+; SI-NEXT: v_readlane_b32 s10, v22, 32
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 47
+; SI-NEXT: v_readlane_b32 s7, v22, 43
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: v_readlane_b32 s7, v22, 46
+; SI-NEXT: v_readlane_b32 s7, v22, 42
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 45
+; SI-NEXT: v_readlane_b32 s8, v22, 41
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 36
+; SI-NEXT: v_mov_b32_e32 v1, s6
+; SI-NEXT: v_readlane_b32 s6, v22, 34
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 37
; SI-NEXT: s_lshl_b32 s6, s6, 8
+; SI-NEXT: v_readlane_b32 s7, v22, 35
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 38
-; SI-NEXT: v_readlane_b32 s7, v22, 39
-; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 40
+; SI-NEXT: s_and_b32 s6, s52, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 36
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x74, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: v_readlane_b32 s5, v22, 44
+; SI-NEXT: v_readlane_b32 s5, v22, 40
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_readlane_b32 s5, v22, 43
+; SI-NEXT: v_readlane_b32 s5, v22, 39
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s6, v22, 42
+; SI-NEXT: v_readlane_b32 s6, v22, 38
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v22, 11
-; SI-NEXT: v_readlane_b32 s17, v22, 17
-; SI-NEXT: v_readlane_b32 s15, v22, 23
-; SI-NEXT: v_readlane_b32 s13, v22, 29
-; SI-NEXT: v_readlane_b32 s11, v22, 35
-; SI-NEXT: v_readlane_b32 s9, v22, 41
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s19, v22, 9
+; SI-NEXT: v_readlane_b32 s17, v22, 15
+; SI-NEXT: v_readlane_b32 s15, v22, 21
+; SI-NEXT: v_readlane_b32 s13, v22, 27
+; SI-NEXT: v_readlane_b32 s11, v22, 33
+; SI-NEXT: v_readlane_b32 s9, v22, 37
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
; SI-NEXT: v_readlane_b32 s98, v20, 32
@@ -8882,185 +8781,184 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
; SI-NEXT: .LBB13_4:
-; SI-NEXT: ; implicit-def: $sgpr51
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s50, 0
-; SI-NEXT: v_writelane_b32 v22, s51, 1
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: v_writelane_b32 v22, s52, 0
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 1
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 2
-; SI-NEXT: v_writelane_b32 v22, s51, 3
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr38
+; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr30
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr88
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr80
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr68
+; SI-NEXT: ; implicit-def: $sgpr66
+; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 2
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 3
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 4
-; SI-NEXT: v_writelane_b32 v22, s51, 5
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 4
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 6
-; SI-NEXT: v_writelane_b32 v22, s51, 7
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 5
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 8
-; SI-NEXT: v_writelane_b32 v22, s51, 9
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 6
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 7
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 10
-; SI-NEXT: v_writelane_b32 v22, s51, 11
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 8
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 12
-; SI-NEXT: v_writelane_b32 v22, s51, 13
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 9
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 14
-; SI-NEXT: v_writelane_b32 v22, s51, 15
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: v_writelane_b32 v22, s52, 10
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s53, 11
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 16
-; SI-NEXT: v_writelane_b32 v22, s51, 17
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 12
+; SI-NEXT: v_writelane_b32 v22, s53, 13
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 18
-; SI-NEXT: v_writelane_b32 v22, s51, 19
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 14
+; SI-NEXT: v_writelane_b32 v22, s53, 15
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 20
-; SI-NEXT: v_writelane_b32 v22, s51, 21
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 16
+; SI-NEXT: v_writelane_b32 v22, s53, 17
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 22
-; SI-NEXT: v_writelane_b32 v22, s51, 23
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 18
+; SI-NEXT: v_writelane_b32 v22, s53, 19
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 24
-; SI-NEXT: v_writelane_b32 v22, s51, 25
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 20
+; SI-NEXT: v_writelane_b32 v22, s53, 21
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 26
-; SI-NEXT: v_writelane_b32 v22, s51, 27
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 22
+; SI-NEXT: v_writelane_b32 v22, s53, 23
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 28
-; SI-NEXT: v_writelane_b32 v22, s51, 29
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 24
+; SI-NEXT: v_writelane_b32 v22, s53, 25
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 30
-; SI-NEXT: v_writelane_b32 v22, s51, 31
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 26
+; SI-NEXT: v_writelane_b32 v22, s53, 27
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 32
-; SI-NEXT: v_writelane_b32 v22, s51, 33
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 28
+; SI-NEXT: v_writelane_b32 v22, s53, 29
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 34
-; SI-NEXT: v_writelane_b32 v22, s51, 35
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 30
+; SI-NEXT: v_writelane_b32 v22, s53, 31
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 36
-; SI-NEXT: v_writelane_b32 v22, s51, 37
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 32
+; SI-NEXT: v_writelane_b32 v22, s53, 33
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 38
-; SI-NEXT: v_writelane_b32 v22, s51, 39
-; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr49
-; SI-NEXT: ; implicit-def: $sgpr55
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr53
+; SI-NEXT: v_writelane_b32 v22, s52, 34
+; SI-NEXT: v_writelane_b32 v22, s53, 35
; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr38
-; SI-NEXT: ; implicit-def: $sgpr36
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr92
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s50, 40
-; SI-NEXT: ; implicit-def: $sgpr98
-; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr86
-; SI-NEXT: ; implicit-def: $sgpr84
-; SI-NEXT: ; implicit-def: $sgpr82
-; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr70
-; SI-NEXT: ; implicit-def: $sgpr68
-; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: v_writelane_b32 v22, s51, 41
-; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s52, 36
+; SI-NEXT: v_writelane_b32 v22, s53, 37
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: s_branch .LBB13_2
;
; VI-LABEL: bitcast_v32i32_to_v128i8_scalar:
@@ -9126,144 +9024,144 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB13_4
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 1
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 6
+; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 7
+; VI-NEXT: v_writelane_b32 v33, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 9
+; VI-NEXT: v_writelane_b32 v33, s46, 7
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 10
+; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: v_writelane_b32 v33, s46, 9
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: v_writelane_b32 v33, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: v_writelane_b32 v33, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: v_writelane_b32 v33, s46, 17
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s22, 16
; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s56, 0
-; VI-NEXT: s_lshr_b32 s64, s29, 8
+; VI-NEXT: s_lshr_b32 s53, s29, 8
; VI-NEXT: s_lshr_b32 s50, s28, 8
; VI-NEXT: s_lshr_b32 s86, s27, 8
; VI-NEXT: s_lshr_b32 s51, s26, 8
-; VI-NEXT: s_lshr_b32 s66, s25, 8
+; VI-NEXT: s_lshr_b32 s52, s25, 8
; VI-NEXT: s_lshr_b32 s54, s24, 8
-; VI-NEXT: s_lshr_b32 s71, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s52, s23, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 8
; VI-NEXT: s_lshr_b32 s55, s22, 8
; VI-NEXT: s_lshr_b32 s68, s21, 24
-; VI-NEXT: s_lshr_b32 s65, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s71, s21, 8
; VI-NEXT: s_lshr_b32 s84, s20, 16
; VI-NEXT: s_lshr_b32 s69, s20, 8
; VI-NEXT: s_lshr_b32 s80, s19, 24
; VI-NEXT: s_lshr_b32 s87, s19, 16
-; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: s_lshr_b32 s67, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 16
-; VI-NEXT: s_lshr_b32 s47, s18, 8
+; VI-NEXT: s_lshr_b32 s82, s18, 8
; VI-NEXT: s_lshr_b32 s83, s17, 24
; VI-NEXT: s_lshr_b32 s85, s17, 16
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s53, s16, 16
-; VI-NEXT: s_lshr_b32 s82, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s57, 1
+; VI-NEXT: s_lshr_b32 s65, s17, 8
+; VI-NEXT: s_lshr_b32 s64, s16, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 8
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -9283,175 +9181,175 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: .LBB13_2: ; %cmp.true
; VI-NEXT: s_add_i32 s5, s5, 3
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b32 s46, s5, 16
; VI-NEXT: s_add_i32 s4, s4, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 1
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: s_add_i32 s7, s7, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 6
+; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 7
+; VI-NEXT: v_writelane_b32 v33, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 9
+; VI-NEXT: v_writelane_b32 v33, s46, 7
; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 10
+; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: v_writelane_b32 v33, s46, 9
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: s_add_i32 s8, s8, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: v_writelane_b32 v33, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: s_add_i32 s11, s11, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: v_writelane_b32 v33, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 16
; VI-NEXT: s_add_i32 s10, s10, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: v_writelane_b32 v33, s46, 17
; VI-NEXT: s_lshr_b32 s46, s10, 16
; VI-NEXT: s_add_i32 s13, s13, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: s_add_i32 s12, s12, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s12, 16
; VI-NEXT: s_add_i32 s15, s15, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 16
; VI-NEXT: s_add_i32 s14, s14, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s14, 16
; VI-NEXT: s_add_i32 s41, s41, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 16
; VI-NEXT: s_add_i32 s40, s40, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s40, 16
; VI-NEXT: s_add_i32 s43, s43, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
; VI-NEXT: s_add_i32 s42, s42, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
; VI-NEXT: s_add_i32 s45, s45, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s45, 16
; VI-NEXT: s_add_i32 s44, s44, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s44, 16
; VI-NEXT: s_add_i32 s29, s29, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s29, 24
; VI-NEXT: s_add_i32 s28, s28, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s29, 16
; VI-NEXT: s_add_i32 s27, s27, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s27, 24
; VI-NEXT: s_add_i32 s26, s26, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s27, 16
; VI-NEXT: s_add_i32 s25, s25, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s25, 24
; VI-NEXT: s_add_i32 s24, s24, 3
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s25, 16
+; VI-NEXT: s_add_i32 s23, s23, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: s_add_i32 s22, s22, 3
; VI-NEXT: v_writelane_b32 v33, s46, 54
-; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: s_add_i32 s21, s21, 3
; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 56
-; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24
; VI-NEXT: s_add_i32 s17, s17, 3
; VI-NEXT: s_add_i32 s16, s16, 3
; VI-NEXT: s_add_i32 s19, s19, 3
; VI-NEXT: s_add_i32 s18, s18, 3
; VI-NEXT: s_add_i32 s20, s20, 3
-; VI-NEXT: s_add_i32 s23, s23, 3
-; VI-NEXT: v_writelane_b32 v33, s56, 0
-; VI-NEXT: s_lshr_b32 s64, s29, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 56
+; VI-NEXT: s_lshr_b32 s46, s21, 16
+; VI-NEXT: s_lshr_b32 s53, s29, 8
; VI-NEXT: s_lshr_b32 s50, s28, 8
; VI-NEXT: s_lshr_b32 s86, s27, 8
; VI-NEXT: s_lshr_b32 s51, s26, 8
-; VI-NEXT: s_lshr_b32 s66, s25, 8
+; VI-NEXT: s_lshr_b32 s52, s25, 8
; VI-NEXT: s_lshr_b32 s54, s24, 8
-; VI-NEXT: s_lshr_b32 s71, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s52, s23, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 8
; VI-NEXT: s_lshr_b32 s55, s22, 8
; VI-NEXT: s_lshr_b32 s68, s21, 24
-; VI-NEXT: s_lshr_b32 s65, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s71, s21, 8
; VI-NEXT: s_lshr_b32 s84, s20, 16
; VI-NEXT: s_lshr_b32 s69, s20, 8
; VI-NEXT: s_lshr_b32 s80, s19, 24
; VI-NEXT: s_lshr_b32 s87, s19, 16
-; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: s_lshr_b32 s67, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 16
-; VI-NEXT: s_lshr_b32 s47, s18, 8
+; VI-NEXT: s_lshr_b32 s82, s18, 8
; VI-NEXT: s_lshr_b32 s83, s17, 24
; VI-NEXT: s_lshr_b32 s85, s17, 16
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s53, s16, 16
-; VI-NEXT: s_lshr_b32 s82, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s57, 1
+; VI-NEXT: s_lshr_b32 s65, s17, 8
+; VI-NEXT: s_lshr_b32 s64, s16, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 8
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -9468,321 +9366,290 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24
; VI-NEXT: .LBB13_3: ; %end
-; VI-NEXT: v_mov_b32_e32 v9, s48
+; VI-NEXT: v_mov_b32_e32 v10, s48
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s82
-; VI-NEXT: v_perm_b32 v9, s53, v9, v1
+; VI-NEXT: v_mov_b32_e32 v2, s70
+; VI-NEXT: v_perm_b32 v10, s64, v10, v1
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
; VI-NEXT: v_mov_b32_e32 v24, s83
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_mov_b32_e32 v4, s67
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_mov_b32_e32 v4, s65
; VI-NEXT: v_perm_b32 v24, s85, v24, v1
-; VI-NEXT: v_or_b32_e32 v3, v3, v9
+; VI-NEXT: v_or_b32_e32 v3, v3, v10
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
; VI-NEXT: v_mov_b32_e32 v13, s38
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, s47
+; VI-NEXT: v_mov_b32_e32 v4, s82
; VI-NEXT: v_perm_b32 v13, s81, v13, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
; VI-NEXT: v_mov_b32_e32 v25, s80
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_mov_b32_e32 v6, s46
+; VI-NEXT: v_mov_b32_e32 v6, s67
; VI-NEXT: v_perm_b32 v25, s87, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
; VI-NEXT: v_perm_b32 v4, s19, v6, v1
-; VI-NEXT: v_mov_b32_e32 v17, s36
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_mov_b32_e32 v16, s36
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; VI-NEXT: v_mov_b32_e32 v6, s69
-; VI-NEXT: v_perm_b32 v17, s84, v17, v1
+; VI-NEXT: v_perm_b32 v16, s84, v16, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 12, v0
; VI-NEXT: v_perm_b32 v7, s20, v6, v1
; VI-NEXT: v_mov_b32_e32 v26, s68
; VI-NEXT: v_readlane_b32 s16, v33, 57
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_mov_b32_e32 v8, s65
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; VI-NEXT: v_mov_b32_e32 v8, s71
; VI-NEXT: v_perm_b32 v26, s16, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 16, v0
; VI-NEXT: v_perm_b32 v6, s21, v8, v1
; VI-NEXT: v_mov_b32_e32 v19, s34
; VI-NEXT: v_readlane_b32 s16, v33, 56
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
; VI-NEXT: v_mov_b32_e32 v8, s55
; VI-NEXT: v_perm_b32 v19, s16, v19, v1
+; VI-NEXT: v_readlane_b32 s16, v33, 54
; VI-NEXT: v_or_b32_e32 v2, v6, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 20, v0
-; VI-NEXT: v_perm_b32 v10, s22, v8, v1
-; VI-NEXT: v_mov_b32_e32 v27, s71
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v9, s22, v8, v1
+; VI-NEXT: v_mov_b32_e32 v27, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 55
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; VI-NEXT: v_mov_b32_e32 v11, s52
-; VI-NEXT: v_perm_b32 v27, s70, v27, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 24, v0
+; VI-NEXT: v_mov_b32_e32 v11, s66
+; VI-NEXT: v_perm_b32 v27, s16, v27, v1
+; VI-NEXT: v_or_b32_e32 v2, v9, v2
; VI-NEXT: v_perm_b32 v8, s23, v11, v1
; VI-NEXT: v_mov_b32_e32 v20, s30
-; VI-NEXT: v_readlane_b32 s16, v33, 55
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 53
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
; VI-NEXT: v_mov_b32_e32 v11, s54
; VI-NEXT: v_perm_b32 v20, s16, v20, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 53
+; VI-NEXT: v_readlane_b32 s16, v33, 51
; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
; VI-NEXT: v_perm_b32 v12, s24, v11, v1
; VI-NEXT: v_mov_b32_e32 v28, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 54
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 52
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v14, s66
+; VI-NEXT: v_mov_b32_e32 v14, s52
; VI-NEXT: v_perm_b32 v28, s16, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 32, v0
; VI-NEXT: v_perm_b32 v11, s25, v14, v1
; VI-NEXT: v_mov_b32_e32 v21, s90
-; VI-NEXT: v_readlane_b32 s16, v33, 52
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
; VI-NEXT: v_mov_b32_e32 v14, s51
; VI-NEXT: v_perm_b32 v21, s16, v21, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: v_readlane_b32 s16, v33, 48
; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 36, v0
; VI-NEXT: v_perm_b32 v15, s26, v14, v1
; VI-NEXT: v_mov_b32_e32 v29, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 51
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 49
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v16, s86
+; VI-NEXT: v_mov_b32_e32 v17, s86
; VI-NEXT: v_perm_b32 v29, s16, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v0
-; VI-NEXT: v_perm_b32 v14, s27, v16, v1
+; VI-NEXT: v_perm_b32 v14, s27, v17, v1
; VI-NEXT: v_mov_b32_e32 v22, s88
-; VI-NEXT: v_readlane_b32 s16, v33, 49
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 47
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v16, s50
+; VI-NEXT: v_mov_b32_e32 v17, s50
; VI-NEXT: v_perm_b32 v22, s16, v22, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 47
+; VI-NEXT: v_readlane_b32 s16, v33, 45
; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 44, v0
-; VI-NEXT: v_perm_b32 v18, s28, v16, v1
+; VI-NEXT: v_perm_b32 v18, s28, v17, v1
; VI-NEXT: v_mov_b32_e32 v30, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 48
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s64
+; VI-NEXT: v_mov_b32_e32 v23, s53
; VI-NEXT: v_perm_b32 v30, s16, v30, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: v_readlane_b32 s16, v33, 44
; VI-NEXT: v_or_b32_e32 v2, v18, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 48, v0
-; VI-NEXT: v_perm_b32 v16, s29, v23, v1
+; VI-NEXT: v_perm_b32 v17, s29, v23, v1
; VI-NEXT: v_mov_b32_e32 v23, s78
; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 45
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
; VI-NEXT: v_perm_b32 v3, s16, v23, v1
-; VI-NEXT: v_or_b32_e32 v2, v16, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_or_b32_e32 v2, v17, v2
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 44
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 42
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 40
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: v_readlane_b32 s16, v33, 41
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 41
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 39
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v3, s76
-; VI-NEXT: v_readlane_b32 s16, v33, 40
+; VI-NEXT: v_readlane_b32 s16, v33, 38
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 39
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 37
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 35
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 38
+; VI-NEXT: v_readlane_b32 s16, v33, 36
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 36
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 34
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v3, s74
-; VI-NEXT: v_readlane_b32 s16, v33, 35
+; VI-NEXT: v_readlane_b32 s16, v33, 33
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 34
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 32
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 30
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 33
+; VI-NEXT: v_readlane_b32 s16, v33, 31
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 31
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 29
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s72
-; VI-NEXT: v_readlane_b32 s14, v33, 30
+; VI-NEXT: v_readlane_b32 s14, v33, 28
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 29
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_readlane_b32 s14, v33, 27
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v33, 25
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 28
+; VI-NEXT: v_readlane_b32 s14, v33, 26
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 26
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s14, v33, 24
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s62
-; VI-NEXT: v_readlane_b32 s12, v33, 25
+; VI-NEXT: v_readlane_b32 s12, v33, 23
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 24
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s12
; VI-NEXT: v_readlane_b32 s12, v33, 22
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v33, 20
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 23
+; VI-NEXT: v_readlane_b32 s12, v33, 21
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 21
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s12, v33, 19
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s60
-; VI-NEXT: v_readlane_b32 s10, v33, 20
+; VI-NEXT: v_readlane_b32 s10, v33, 18
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 19
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_readlane_b32 s10, v33, 17
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 15
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 18
+; VI-NEXT: v_readlane_b32 s10, v33, 16
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 16
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s10, v33, 14
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s58
-; VI-NEXT: v_readlane_b32 s8, v33, 15
+; VI-NEXT: v_readlane_b32 s8, v33, 13
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 14
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s8
; VI-NEXT: v_readlane_b32 s8, v33, 12
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v33, 10
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 13
+; VI-NEXT: v_readlane_b32 s8, v33, 11
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 11
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s8, v33, 9
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s56
-; VI-NEXT: v_readlane_b32 s6, v33, 10
+; VI-NEXT: v_readlane_b32 s6, v33, 8
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 9
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v33, 7
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v33, 5
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 8
+; VI-NEXT: v_readlane_b32 s6, v33, 6
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 6
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s6, v33, 4
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 0
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s4, v33, 5
+; VI-NEXT: v_mov_b32_e32 v3, s46
+; VI-NEXT: v_readlane_b32 s4, v33, 3
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0
-; VI-NEXT: v_readlane_b32 s4, v33, 4
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_readlane_b32 s4, v33, 2
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_readlane_b32 s4, v33, 0
; VI-NEXT: v_mov_b32_e32 v3, s4
-; VI-NEXT: v_readlane_b32 s4, v33, 3
+; VI-NEXT: v_readlane_b32 s4, v33, 1
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
; VI-NEXT: v_perm_b32 v1, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s7, v33, 1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
; VI-NEXT: v_readlane_b32 s86, v32, 28
@@ -9821,37 +9688,32 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
; VI-NEXT: .LBB13_4:
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: v_writelane_b32 v33, s70, 0
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr65
; VI-NEXT: ; implicit-def: $sgpr85
; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr67
; VI-NEXT: ; implicit-def: $sgpr87
; VI-NEXT: ; implicit-def: $sgpr80
; VI-NEXT: ; implicit-def: $sgpr69
; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr68
; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr66
+; VI-NEXT: ; implicit-def: $sgpr54
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr51
; VI-NEXT: ; implicit-def: $sgpr86
; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr53
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
@@ -9866,115 +9728,120 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr62
; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: v_writelane_b32 v33, s71, 1
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: s_branch .LBB13_2
;
; GFX9-LABEL: bitcast_v32i32_to_v128i8_scalar:
@@ -39082,20 +38949,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
@@ -39103,14 +38969,15 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -39175,53 +39042,50 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v33, v22, v21, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
@@ -39230,64 +39094,70 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -39296,7 +39166,7 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -39305,34 +39175,31 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v53, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -39420,63 +39287,60 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v33, v22, v21, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
; SI-NEXT: v_add_f32_e32 v18, 1.0, v18
; SI-NEXT: v_add_f32_e32 v17, 1.0, v17
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
; SI-NEXT: v_add_f32_e32 v16, 1.0, v16
; SI-NEXT: v_add_f32_e32 v15, 1.0, v15
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
; SI-NEXT: v_add_f32_e32 v14, 1.0, v14
; SI-NEXT: v_add_f32_e32 v13, 1.0, v13
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
; SI-NEXT: v_add_f32_e32 v12, 1.0, v12
; SI-NEXT: v_add_f32_e32 v11, 1.0, v11
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
; SI-NEXT: v_add_f32_e32 v10, 1.0, v10
; SI-NEXT: v_add_f32_e32 v9, 1.0, v9
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: v_add_f32_e32 v8, 1.0, v8
@@ -39487,64 +39351,72 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
+; SI-NEXT: v_add_f32_e32 v6, 1.0, v6
+; SI-NEXT: v_add_f32_e32 v5, 1.0, v5
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -39553,7 +39425,7 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -39562,40 +39434,35 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; SI-NEXT: v_add_f32_e32 v2, 1.0, v2
; SI-NEXT: v_add_f32_e32 v1, 1.0, v1
; SI-NEXT: v_add_f32_e32 v4, 1.0, v4
; SI-NEXT: v_add_f32_e32 v3, 1.0, v3
-; SI-NEXT: v_add_f32_e32 v6, 1.0, v6
-; SI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v53, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -39613,12 +39480,12 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: .LBB36_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v45
-; SI-NEXT: v_and_b32_e32 v43, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v1, v1, v45
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v43
+; SI-NEXT: v_and_b32_e32 v42, 0xff, v42
+; SI-NEXT: v_or_b32_e32 v1, v1, v43
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v41
-; SI-NEXT: v_or_b32_e32 v41, v41, v43
+; SI-NEXT: v_or_b32_e32 v41, v41, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v41
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
@@ -39632,20 +39499,18 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v63
@@ -39656,20 +39521,20 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v38
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v37
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v60
@@ -39680,12 +39545,11 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -39698,8 +39562,7 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
@@ -39710,12 +39573,11 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -39728,28 +39590,26 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v45
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v44
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -39758,28 +39618,26 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v54
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v54
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -39788,75 +39646,68 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v49
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v39
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
@@ -39864,35 +39715,31 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v36
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
@@ -39900,16 +39747,15 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
@@ -39918,34 +39764,32 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
@@ -39954,34 +39798,32 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
@@ -39990,34 +39832,32 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
@@ -40026,34 +39866,32 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
@@ -40062,34 +39900,32 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
@@ -40106,24 +39942,24 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -40246,66 +40082,61 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr55
@@ -40341,182 +40172,185 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB36_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
; VI-NEXT: .LBB36_2: ; %Flow
@@ -40576,341 +40410,318 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
-; VI-NEXT: v_add_f32_e32 v9, 1.0, v9
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
+; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
; VI-NEXT: v_add_f32_e32 v6, 1.0, v6
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; VI-NEXT: v_add_f32_e32 v4, 1.0, v4
; VI-NEXT: v_add_f32_e32 v3, 1.0, v3
+; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
+; VI-NEXT: v_add_f32_e32 v9, 1.0, v9
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: v_add_f32_e32 v2, 1.0, v2
; VI-NEXT: v_add_f32_e32 v1, 1.0, v1
-; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
; VI-NEXT: v_add_f32_e32 v7, 1.0, v7
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: .LBB36_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v57, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v48
+; VI-NEXT: v_perm_b32 v7, v7, v38, s4
+; VI-NEXT: v_perm_b32 v10, v10, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v35, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v8, v8, v33, s4
+; VI-NEXT: v_perm_b32 v33, v49, v53, s4
+; VI-NEXT: v_perm_b32 v11, v11, v48, s4
+; VI-NEXT: v_perm_b32 v3, v3, v34, s4
+; VI-NEXT: v_perm_b32 v34, v47, v39, s4
+; VI-NEXT: v_perm_b32 v39, v50, v54, s4
+; VI-NEXT: v_perm_b32 v55, v59, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v52, s4
+; VI-NEXT: v_perm_b32 v2, v2, v58, s4
+; VI-NEXT: v_perm_b32 v51, v51, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v57, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v6, v6, v46, s4
+; VI-NEXT: v_perm_b32 v9, v9, v45, s4
+; VI-NEXT: v_perm_b32 v12, v12, v63, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v36, v36, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v38, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v35, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v35, v48, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v38, v38, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
+; VI-NEXT: v_or_b32_e32 v1, v1, v49
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v34, v56, s4
-; VI-NEXT: v_perm_b32 v2, v2, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v47, v40, s4
-; VI-NEXT: v_perm_b32 v2, v3, v38, s4
+; VI-NEXT: v_perm_b32 v1, v44, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v4, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v33, v39, s4
-; VI-NEXT: v_perm_b32 v2, v5, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v44, v43, s4
-; VI-NEXT: v_perm_b32 v1, v6, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v50, v54, s4
-; VI-NEXT: v_perm_b32 v2, v7, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v62, v61, s4
-; VI-NEXT: v_perm_b32 v1, v8, v36, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v9, v49, s4
-; VI-NEXT: v_perm_b32 v1, v60, v1, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v62, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v10, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v11, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -40918,21 +40729,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v21, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -40940,21 +40749,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v24, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -40962,21 +40769,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -40984,21 +40789,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -41006,21 +40809,19 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v29, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -41028,18 +40829,16 @@ define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v32, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -42938,180 +42737,180 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshr_b32 s4, s45, 24
; SI-NEXT: v_writelane_b32 v62, s4, 17
-; SI-NEXT: s_lshr_b32 s4, s47, 24
+; SI-NEXT: s_lshr_b32 s4, s45, 8
; SI-NEXT: v_writelane_b32 v62, s4, 16
-; SI-NEXT: s_lshr_b32 s4, s57, 24
+; SI-NEXT: s_lshr_b32 s4, s47, 24
; SI-NEXT: v_writelane_b32 v62, s4, 15
-; SI-NEXT: s_lshr_b32 s4, s57, 16
+; SI-NEXT: s_lshr_b32 s4, s47, 16
; SI-NEXT: v_writelane_b32 v62, s4, 14
-; SI-NEXT: s_lshr_b32 s4, s59, 24
+; SI-NEXT: s_lshr_b32 s4, s47, 8
; SI-NEXT: v_writelane_b32 v62, s4, 13
-; SI-NEXT: s_lshr_b32 s4, s59, 16
+; SI-NEXT: s_lshr_b32 s4, s57, 24
; SI-NEXT: v_writelane_b32 v62, s4, 12
-; SI-NEXT: s_lshr_b32 s4, s59, 8
+; SI-NEXT: s_lshr_b32 s4, s57, 16
; SI-NEXT: v_writelane_b32 v62, s4, 11
-; SI-NEXT: s_lshr_b32 s4, s61, 24
+; SI-NEXT: s_lshr_b32 s4, s57, 8
; SI-NEXT: v_writelane_b32 v62, s4, 10
-; SI-NEXT: s_lshr_b32 s4, s61, 16
+; SI-NEXT: s_lshr_b32 s4, s59, 24
; SI-NEXT: v_writelane_b32 v62, s4, 9
-; SI-NEXT: s_lshr_b32 s4, s61, 8
+; SI-NEXT: s_lshr_b32 s4, s59, 16
; SI-NEXT: v_writelane_b32 v62, s4, 8
-; SI-NEXT: s_lshr_b32 s4, s63, 24
+; SI-NEXT: s_lshr_b32 s4, s59, 8
; SI-NEXT: v_writelane_b32 v62, s4, 7
-; SI-NEXT: s_lshr_b32 s4, s63, 16
+; SI-NEXT: s_lshr_b32 s4, s61, 24
; SI-NEXT: v_writelane_b32 v62, s4, 6
-; SI-NEXT: s_lshr_b32 s4, s63, 8
+; SI-NEXT: s_lshr_b32 s4, s61, 16
; SI-NEXT: v_writelane_b32 v62, s4, 5
-; SI-NEXT: s_lshr_b32 s4, s73, 24
+; SI-NEXT: s_lshr_b32 s4, s61, 8
; SI-NEXT: v_writelane_b32 v62, s4, 4
-; SI-NEXT: s_lshr_b32 s4, s73, 16
+; SI-NEXT: s_lshr_b32 s4, s63, 24
; SI-NEXT: v_writelane_b32 v62, s4, 3
-; SI-NEXT: s_lshr_b32 s4, s73, 8
+; SI-NEXT: s_lshr_b32 s4, s63, 16
; SI-NEXT: v_writelane_b32 v62, s4, 2
-; SI-NEXT: s_lshr_b32 s4, s75, 24
+; SI-NEXT: s_lshr_b32 s4, s63, 8
; SI-NEXT: v_writelane_b32 v62, s4, 1
-; SI-NEXT: s_lshr_b32 s4, s75, 16
+; SI-NEXT: s_lshr_b32 s4, s73, 24
; SI-NEXT: v_writelane_b32 v62, s4, 0
-; SI-NEXT: s_lshr_b32 s4, s75, 8
+; SI-NEXT: s_lshr_b32 s4, s73, 16
; SI-NEXT: v_writelane_b32 v61, s4, 63
-; SI-NEXT: s_lshr_b32 s4, s77, 24
+; SI-NEXT: s_lshr_b32 s4, s73, 8
; SI-NEXT: v_writelane_b32 v61, s4, 62
-; SI-NEXT: s_lshr_b32 s4, s77, 16
+; SI-NEXT: s_lshr_b32 s4, s75, 24
; SI-NEXT: v_writelane_b32 v61, s4, 61
-; SI-NEXT: s_lshr_b32 s4, s77, 8
+; SI-NEXT: s_lshr_b32 s4, s75, 16
; SI-NEXT: v_writelane_b32 v61, s4, 60
-; SI-NEXT: s_lshr_b32 s4, s29, 24
+; SI-NEXT: s_lshr_b32 s4, s75, 8
; SI-NEXT: v_writelane_b32 v61, s4, 59
-; SI-NEXT: s_lshr_b32 s4, s29, 16
+; SI-NEXT: s_lshr_b32 s4, s77, 24
; SI-NEXT: v_writelane_b32 v61, s4, 58
-; SI-NEXT: s_lshr_b32 s4, s29, 8
+; SI-NEXT: s_lshr_b32 s4, s77, 16
; SI-NEXT: v_writelane_b32 v61, s4, 57
-; SI-NEXT: s_lshr_b32 s4, s27, 24
+; SI-NEXT: s_lshr_b32 s4, s77, 8
; SI-NEXT: v_writelane_b32 v61, s4, 56
-; SI-NEXT: s_lshr_b32 s4, s27, 16
+; SI-NEXT: s_lshr_b32 s4, s29, 24
; SI-NEXT: v_writelane_b32 v61, s4, 55
-; SI-NEXT: s_lshr_b32 s4, s27, 8
+; SI-NEXT: s_lshr_b32 s4, s29, 16
; SI-NEXT: v_writelane_b32 v61, s4, 54
-; SI-NEXT: s_lshr_b32 s4, s25, 24
+; SI-NEXT: s_lshr_b32 s4, s29, 8
; SI-NEXT: v_writelane_b32 v61, s4, 53
-; SI-NEXT: s_lshr_b32 s4, s25, 16
+; SI-NEXT: s_lshr_b32 s4, s27, 24
; SI-NEXT: v_writelane_b32 v61, s4, 52
-; SI-NEXT: s_lshr_b32 s4, s25, 8
+; SI-NEXT: s_lshr_b32 s4, s27, 16
; SI-NEXT: v_writelane_b32 v61, s4, 51
-; SI-NEXT: s_lshr_b32 s4, s23, 24
+; SI-NEXT: s_lshr_b32 s4, s27, 8
; SI-NEXT: v_writelane_b32 v61, s4, 50
-; SI-NEXT: s_lshr_b32 s4, s23, 16
+; SI-NEXT: s_lshr_b32 s4, s25, 24
; SI-NEXT: v_writelane_b32 v61, s4, 49
-; SI-NEXT: s_lshr_b32 s4, s23, 8
+; SI-NEXT: s_lshr_b32 s4, s25, 16
; SI-NEXT: v_writelane_b32 v61, s4, 48
-; SI-NEXT: s_lshr_b32 s4, s21, 24
+; SI-NEXT: s_lshr_b32 s4, s25, 8
; SI-NEXT: v_writelane_b32 v61, s4, 47
-; SI-NEXT: s_lshr_b32 s4, s21, 16
+; SI-NEXT: s_lshr_b32 s4, s23, 24
; SI-NEXT: v_writelane_b32 v61, s4, 46
-; SI-NEXT: s_lshr_b32 s4, s21, 8
+; SI-NEXT: s_lshr_b32 s4, s23, 16
; SI-NEXT: v_writelane_b32 v61, s4, 45
-; SI-NEXT: s_lshr_b32 s4, s19, 24
+; SI-NEXT: s_lshr_b32 s4, s23, 8
; SI-NEXT: v_writelane_b32 v61, s4, 44
-; SI-NEXT: s_lshr_b32 s4, s19, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 24
; SI-NEXT: v_writelane_b32 v61, s4, 43
-; SI-NEXT: s_lshr_b32 s4, s19, 8
+; SI-NEXT: s_lshr_b32 s4, s21, 16
; SI-NEXT: v_writelane_b32 v61, s4, 42
-; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: s_lshr_b32 s4, s21, 8
; SI-NEXT: v_writelane_b32 v61, s4, 41
-; SI-NEXT: s_lshr_b32 s4, s17, 8
+; SI-NEXT: s_lshr_b32 s4, s19, 24
; SI-NEXT: v_writelane_b32 v61, s4, 40
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 24
+; SI-NEXT: s_lshr_b32 s4, s19, 16
+; SI-NEXT: v_writelane_b32 v61, s4, 39
+; SI-NEXT: s_lshr_b32 s4, s19, 8
; SI-NEXT: v_writelane_b32 v61, s4, 38
-; SI-NEXT: v_writelane_b32 v61, s5, 39
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16
+; SI-NEXT: s_lshr_b32 s4, s17, 16
+; SI-NEXT: v_writelane_b32 v61, s4, 37
+; SI-NEXT: s_lshr_b32 s4, s17, 8
; SI-NEXT: v_writelane_b32 v61, s4, 36
-; SI-NEXT: v_writelane_b32 v61, s5, 37
-; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 24
; SI-NEXT: v_writelane_b32 v61, s4, 34
; SI-NEXT: v_writelane_b32 v61, s5, 35
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24
+; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 16
; SI-NEXT: v_writelane_b32 v61, s4, 32
; SI-NEXT: v_writelane_b32 v61, s5, 33
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[4:5], s[44:45], 8
; SI-NEXT: v_writelane_b32 v61, s4, 30
; SI-NEXT: v_writelane_b32 v61, s5, 31
-; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 24
; SI-NEXT: v_writelane_b32 v61, s4, 28
; SI-NEXT: v_writelane_b32 v61, s5, 29
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 24
+; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 16
; SI-NEXT: v_writelane_b32 v61, s4, 26
; SI-NEXT: v_writelane_b32 v61, s5, 27
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16
+; SI-NEXT: s_lshr_b64 s[4:5], s[46:47], 8
; SI-NEXT: v_writelane_b32 v61, s4, 24
; SI-NEXT: v_writelane_b32 v61, s5, 25
-; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 24
; SI-NEXT: v_writelane_b32 v61, s4, 22
; SI-NEXT: v_writelane_b32 v61, s5, 23
-; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 16
; SI-NEXT: v_writelane_b32 v61, s4, 20
; SI-NEXT: v_writelane_b32 v61, s5, 21
-; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[4:5], s[56:57], 8
; SI-NEXT: v_writelane_b32 v61, s4, 18
; SI-NEXT: v_writelane_b32 v61, s5, 19
-; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 24
; SI-NEXT: v_writelane_b32 v61, s4, 16
; SI-NEXT: v_writelane_b32 v61, s5, 17
-; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 24
+; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 16
; SI-NEXT: v_writelane_b32 v61, s4, 14
; SI-NEXT: v_writelane_b32 v61, s5, 15
-; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[58:59], 8
; SI-NEXT: v_writelane_b32 v61, s4, 12
; SI-NEXT: v_writelane_b32 v61, s5, 13
-; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[60:61], 8
; SI-NEXT: v_writelane_b32 v61, s4, 10
; SI-NEXT: v_writelane_b32 v61, s5, 11
-; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 24
; SI-NEXT: v_writelane_b32 v61, s4, 8
; SI-NEXT: v_writelane_b32 v61, s5, 9
-; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[62:63], 8
; SI-NEXT: v_writelane_b32 v61, s4, 6
; SI-NEXT: v_writelane_b32 v61, s5, 7
-; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[72:73], 8
; SI-NEXT: v_writelane_b32 v61, s4, 4
; SI-NEXT: v_writelane_b32 v61, s5, 5
-; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[74:75], 8
; SI-NEXT: v_writelane_b32 v61, s4, 2
; SI-NEXT: v_writelane_b32 v61, s5, 3
-; SI-NEXT: s_lshr_b64 s[4:5], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[4:5], s[76:77], 8
; SI-NEXT: v_writelane_b32 v61, s4, 0
; SI-NEXT: s_lshr_b32 s79, s45, 16
-; SI-NEXT: s_lshr_b32 s89, s45, 8
-; SI-NEXT: s_lshr_b32 s91, s47, 16
-; SI-NEXT: s_lshr_b32 s78, s47, 8
-; SI-NEXT: s_lshr_b32 s88, s57, 8
-; SI-NEXT: s_lshr_b32 s90, s17, 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[48:49], s[76:77], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[76:77], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[28:29], 24
-; SI-NEXT: s_lshr_b64 s[54:55], s[28:29], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[28:29], 8
-; SI-NEXT: s_lshr_b64 s[66:67], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[80:81], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[82:83], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[86:87], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[96:97], s[22:23], 16
-; SI-NEXT: s_lshr_b64 s[98:99], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[42:43], s[20:21], 16
+; SI-NEXT: s_lshr_b32 s78, s17, 24
+; SI-NEXT: s_lshr_b64 s[88:89], s[60:61], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[74:75], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[76:77], 24
+; SI-NEXT: s_lshr_b64 s[48:49], s[76:77], 16
; SI-NEXT: v_writelane_b32 v61, s5, 1
+; SI-NEXT: s_lshr_b64 s[50:51], s[28:29], 24
+; SI-NEXT: s_lshr_b64 s[52:53], s[28:29], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[28:29], 8
+; SI-NEXT: s_lshr_b64 s[64:65], s[26:27], 24
+; SI-NEXT: s_lshr_b64 s[66:67], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[26:27], 8
+; SI-NEXT: s_lshr_b64 s[70:71], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[80:81], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[84:85], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[86:87], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[96:97], s[22:23], 8
+; SI-NEXT: s_lshr_b64 s[98:99], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[42:43], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[20:21], 8
; SI-NEXT: s_lshr_b64 s[8:9], s[18:19], 24
; SI-NEXT: s_lshr_b64 s[10:11], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24
+; SI-NEXT: s_lshr_b64 s[12:13], s[18:19], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 8
; SI-NEXT: s_cbranch_execnz .LBB37_4
@@ -43182,12 +42981,12 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
-; SI-NEXT: v_add_f32_e64 v37, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v38, s16, 1.0
-; SI-NEXT: v_add_f32_e64 v32, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v35, s18, 1.0
-; SI-NEXT: v_add_f32_e64 v28, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v31, s20, 1.0
+; SI-NEXT: v_add_f32_e64 v31, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v35, s16, 1.0
+; SI-NEXT: v_add_f32_e64 v29, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v30, s18, 1.0
+; SI-NEXT: v_add_f32_e64 v27, s21, 1.0
+; SI-NEXT: v_add_f32_e64 v28, s20, 1.0
; SI-NEXT: v_add_f32_e64 v25, s23, 1.0
; SI-NEXT: v_add_f32_e64 v26, s22, 1.0
; SI-NEXT: v_add_f32_e64 v23, s25, 1.0
@@ -43201,16 +43000,18 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_add_f32_e64 v7, s59, 1.0
; SI-NEXT: v_add_f32_e64 v5, s57, 1.0
; SI-NEXT: v_add_f32_e64 v3, s47, 1.0
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 8
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
-; SI-NEXT: v_readfirstlane_b32 s16, v38
-; SI-NEXT: v_readfirstlane_b32 s17, v37
-; SI-NEXT: v_readfirstlane_b32 s12, v35
-; SI-NEXT: v_readfirstlane_b32 s13, v32
-; SI-NEXT: v_readfirstlane_b32 s6, v31
-; SI-NEXT: v_readfirstlane_b32 s7, v28
+; SI-NEXT: v_readfirstlane_b32 s16, v35
+; SI-NEXT: v_readfirstlane_b32 s17, v31
+; SI-NEXT: v_readfirstlane_b32 s12, v30
+; SI-NEXT: v_readfirstlane_b32 s13, v29
+; SI-NEXT: v_readfirstlane_b32 s6, v28
+; SI-NEXT: v_readfirstlane_b32 s7, v27
; SI-NEXT: v_readfirstlane_b32 s4, v26
; SI-NEXT: v_readfirstlane_b32 s5, v25
; SI-NEXT: v_readfirstlane_b32 s8, v24
@@ -43231,59 +43032,57 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s29, v7
; SI-NEXT: v_readfirstlane_b32 s41, v5
; SI-NEXT: v_readfirstlane_b32 s43, v3
-; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24
-; SI-NEXT: v_writelane_b32 v61, s46, 36
+; SI-NEXT: v_writelane_b32 v61, s44, 30
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 24, v23
-; SI-NEXT: v_writelane_b32 v61, s47, 37
-; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 8
-; SI-NEXT: s_lshr_b64 s[58:59], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v61, s45, 31
+; SI-NEXT: s_lshr_b64 s[44:45], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[28:29], 24
-; SI-NEXT: s_lshr_b64 s[88:89], s[28:29], 16
+; SI-NEXT: s_lshr_b64 vcc, s[28:29], 16
; SI-NEXT: s_lshr_b64 s[28:29], s[28:29], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[88:89], s[26:27], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[26:27], 16
; SI-NEXT: s_lshr_b64 s[26:27], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[94:95], s[24:25], 24
-; SI-NEXT: s_lshr_b64 s[30:31], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[92:93], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[24:25], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[34:35], s[22:23], 24
-; SI-NEXT: s_lshr_b64 s[46:47], s[22:23], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[30:31], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[22:23], s[22:23], 8
-; SI-NEXT: s_lshr_b64 s[36:37], s[20:21], 24
-; SI-NEXT: s_lshr_b64 s[38:39], s[20:21], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[20:21], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[20:21], s[20:21], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[18:19], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[18:19], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
+; SI-NEXT: s_lshr_b64 s[48:49], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[18:19], s[18:19], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[70:71], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[86:87], s[4:5], 24
-; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[98:99], s[4:5], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[52:53], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[68:69], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[70:71], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[84:85], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[86:87], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[96:97], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[98:99], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[8:9], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[56:57], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[40:41], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[8:9], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[10:11], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[12:13], s[16:17], 24
+; SI-NEXT: s_lshr_b64 s[12:13], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[4:5], s[16:17], 8
-; SI-NEXT: s_mov_b32 s16, vcc_lo
+; SI-NEXT: s_mov_b32 s16, s58
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v1
; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v1
; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v3
@@ -43297,61 +43096,50 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v7
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v9
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; SI-NEXT: v_lshrrev_b32_e32 v27, 8, v9
-; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v32, 8, v9
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v11
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v11
+; SI-NEXT: v_lshrrev_b32_e32 v37, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v13
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
-; SI-NEXT: v_lshrrev_b32_e32 v39, 8, v23
-; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v25
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v25
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v28
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v28
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v32
-; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v32
-; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v32
-; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v37
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v37
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v37
+; SI-NEXT: v_lshrrev_b32_e32 v4, 8, v23
+; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v25
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v25
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v27
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v27
+; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v29
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v10, 8, v29
+; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v31
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v31
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v31
; SI-NEXT: s_branch .LBB37_5
; SI-NEXT: .LBB37_3:
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s8, 0
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s9, 1
+; SI-NEXT: ; implicit-def: $sgpr79
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 2
+; SI-NEXT: v_writelane_b32 v61, s78, 0
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s91, 3
+; SI-NEXT: v_writelane_b32 v61, s79, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr86
@@ -43372,256 +43160,275 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 2
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s91, 5
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 6
-; SI-NEXT: v_writelane_b32 v61, s91, 7
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 8
-; SI-NEXT: v_writelane_b32 v61, s91, 9
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 6
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 10
-; SI-NEXT: v_writelane_b32 v61, s91, 11
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 7
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 12
-; SI-NEXT: v_writelane_b32 v61, s91, 13
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 8
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 14
-; SI-NEXT: v_writelane_b32 v61, s91, 15
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 10
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 16
-; SI-NEXT: v_writelane_b32 v61, s91, 17
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 11
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 18
-; SI-NEXT: v_writelane_b32 v61, s91, 19
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 12
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 20
-; SI-NEXT: v_writelane_b32 v61, s91, 21
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 14
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 22
-; SI-NEXT: v_writelane_b32 v61, s91, 23
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 15
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 24
-; SI-NEXT: v_writelane_b32 v61, s91, 25
-; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 16
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s79, 17
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 26
-; SI-NEXT: v_writelane_b32 v61, s91, 27
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 18
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 28
-; SI-NEXT: v_writelane_b32 v61, s91, 29
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: v_writelane_b32 v61, s79, 19
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 30
-; SI-NEXT: v_writelane_b32 v61, s91, 31
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: v_writelane_b32 v61, s78, 20
+; SI-NEXT: v_writelane_b32 v61, s79, 21
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 32
-; SI-NEXT: v_writelane_b32 v61, s91, 33
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: v_writelane_b32 v61, s78, 22
+; SI-NEXT: v_writelane_b32 v61, s79, 23
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 34
-; SI-NEXT: v_writelane_b32 v61, s91, 35
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: v_writelane_b32 v61, s78, 24
+; SI-NEXT: v_writelane_b32 v61, s79, 25
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 36
-; SI-NEXT: v_writelane_b32 v61, s91, 37
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: v_writelane_b32 v61, s78, 26
+; SI-NEXT: v_writelane_b32 v61, s79, 27
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v61, s90, 38
-; SI-NEXT: v_writelane_b32 v61, s91, 39
+; SI-NEXT: v_writelane_b32 v61, s78, 28
+; SI-NEXT: v_writelane_b32 v61, s79, 29
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 30
+; SI-NEXT: v_writelane_b32 v61, s79, 31
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 32
+; SI-NEXT: v_writelane_b32 v61, s79, 33
+; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_writelane_b32 v61, s78, 34
+; SI-NEXT: v_writelane_b32 v61, s79, 35
+; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: s_branch .LBB37_2
; SI-NEXT: .LBB37_4:
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_readlane_b32 s5, v61, 40
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: v_readlane_b32 s5, v61, 36
; SI-NEXT: v_mov_b32_e32 v55, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 41
+; SI-NEXT: v_readlane_b32 s5, v61, 37
; SI-NEXT: v_mov_b32_e32 v54, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 42
-; SI-NEXT: v_mov_b32_e32 v53, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 43
-; SI-NEXT: v_mov_b32_e32 v8, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 44
+; SI-NEXT: v_readlane_b32 s5, v61, 38
+; SI-NEXT: v_mov_b32_e32 v10, s5
+; SI-NEXT: v_readlane_b32 s5, v61, 39
; SI-NEXT: v_mov_b32_e32 v52, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 45
+; SI-NEXT: v_readlane_b32 s5, v61, 40
+; SI-NEXT: v_mov_b32_e32 v8, s5
+; SI-NEXT: v_readlane_b32 s5, v61, 41
; SI-NEXT: v_mov_b32_e32 v51, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 46
+; SI-NEXT: v_readlane_b32 s5, v61, 42
; SI-NEXT: v_mov_b32_e32 v50, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 47
+; SI-NEXT: v_readlane_b32 s5, v61, 43
; SI-NEXT: v_mov_b32_e32 v6, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 48
-; SI-NEXT: v_mov_b32_e32 v4, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 49
+; SI-NEXT: v_readlane_b32 s5, v61, 44
; SI-NEXT: v_mov_b32_e32 v49, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 50
+; SI-NEXT: v_readlane_b32 s5, v61, 45
; SI-NEXT: v_mov_b32_e32 v48, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 51
+; SI-NEXT: v_readlane_b32 s5, v61, 46
; SI-NEXT: v_mov_b32_e32 v39, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 52
+; SI-NEXT: v_readlane_b32 s5, v61, 47
+; SI-NEXT: v_mov_b32_e32 v4, s5
+; SI-NEXT: v_readlane_b32 s5, v61, 48
; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 53
+; SI-NEXT: v_readlane_b32 s5, v61, 49
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 54
+; SI-NEXT: v_readlane_b32 s5, v61, 50
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 55
+; SI-NEXT: v_readlane_b32 s5, v61, 51
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 56
+; SI-NEXT: v_readlane_b32 s5, v61, 52
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 57
+; SI-NEXT: v_readlane_b32 s5, v61, 53
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 58
+; SI-NEXT: v_readlane_b32 s5, v61, 54
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 59
+; SI-NEXT: v_readlane_b32 s5, v61, 55
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 60
+; SI-NEXT: v_readlane_b32 s5, v61, 56
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 61
+; SI-NEXT: v_readlane_b32 s5, v61, 57
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 62
+; SI-NEXT: v_readlane_b32 s5, v61, 58
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v61, 63
+; SI-NEXT: v_readlane_b32 s5, v61, 59
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 0
+; SI-NEXT: v_readlane_b32 s5, v61, 60
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 1
+; SI-NEXT: v_readlane_b32 s5, v61, 61
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 2
+; SI-NEXT: v_readlane_b32 s5, v61, 62
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 3
+; SI-NEXT: v_readlane_b32 s5, v61, 63
+; SI-NEXT: v_mov_b32_e32 v38, s5
+; SI-NEXT: v_readlane_b32 s5, v62, 0
+; SI-NEXT: v_mov_b32_e32 v37, s5
+; SI-NEXT: v_readlane_b32 s5, v62, 1
; SI-NEXT: v_mov_b32_e32 v36, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 4
+; SI-NEXT: v_readlane_b32 s5, v62, 2
; SI-NEXT: v_mov_b32_e32 v34, s5
-; SI-NEXT: v_readlane_b32 s5, v62, 5
+; SI-NEXT: v_readlane_b32 s5, v62, 3
; SI-NEXT: v_mov_b32_e32 v33, s5
+; SI-NEXT: v_readlane_b32 s5, v62, 4
+; SI-NEXT: v_mov_b32_e32 v32, s5
+; SI-NEXT: v_readlane_b32 s5, v62, 5
+; SI-NEXT: v_mov_b32_e32 v60, s5
; SI-NEXT: v_readlane_b32 s5, v62, 6
-; SI-NEXT: v_mov_b32_e32 v30, s5
+; SI-NEXT: v_mov_b32_e32 v59, s5
; SI-NEXT: v_readlane_b32 s5, v62, 7
-; SI-NEXT: v_mov_b32_e32 v29, s5
+; SI-NEXT: v_mov_b32_e32 v58, s5
; SI-NEXT: v_readlane_b32 s5, v62, 8
-; SI-NEXT: v_mov_b32_e32 v27, s5
+; SI-NEXT: v_mov_b32_e32 v57, s5
; SI-NEXT: v_readlane_b32 s5, v62, 9
-; SI-NEXT: v_mov_b32_e32 v60, s5
+; SI-NEXT: v_mov_b32_e32 v56, s5
; SI-NEXT: v_readlane_b32 s5, v62, 10
-; SI-NEXT: v_mov_b32_e32 v59, s5
+; SI-NEXT: v_mov_b32_e32 v47, s5
; SI-NEXT: v_readlane_b32 s5, v62, 11
-; SI-NEXT: v_mov_b32_e32 v58, s5
+; SI-NEXT: v_mov_b32_e32 v46, s5
; SI-NEXT: v_readlane_b32 s5, v62, 12
-; SI-NEXT: v_mov_b32_e32 v57, s5
+; SI-NEXT: v_mov_b32_e32 v45, s5
; SI-NEXT: v_readlane_b32 s5, v62, 13
; SI-NEXT: v_mov_b32_e32 v1, s60
-; SI-NEXT: v_mov_b32_e32 v56, s5
+; SI-NEXT: v_mov_b32_e32 v44, s5
; SI-NEXT: v_readlane_b32 s5, v62, 14
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s58
-; SI-NEXT: v_mov_b32_e32 v46, s5
+; SI-NEXT: v_mov_b32_e32 v43, s5
; SI-NEXT: v_readlane_b32 s5, v62, 15
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s56
-; SI-NEXT: v_mov_b32_e32 v45, s5
+; SI-NEXT: v_mov_b32_e32 v42, s5
; SI-NEXT: v_readlane_b32 s5, v62, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s46
-; SI-NEXT: v_mov_b32_e32 v42, s5
+; SI-NEXT: v_mov_b32_e32 v41, s5
; SI-NEXT: v_readlane_b32 s5, v62, 17
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: v_mov_b32_e32 v3, s47
@@ -43630,9 +43437,9 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v12, s5
-; SI-NEXT: v_readlane_b32 s46, v61, 38
-; SI-NEXT: v_mov_b32_e32 v32, s19
-; SI-NEXT: v_mov_b32_e32 v28, s21
+; SI-NEXT: v_readlane_b32 s46, v61, 34
+; SI-NEXT: v_mov_b32_e32 v29, s19
+; SI-NEXT: v_mov_b32_e32 v27, s21
; SI-NEXT: v_mov_b32_e32 v25, s23
; SI-NEXT: v_mov_b32_e32 v23, s25
; SI-NEXT: v_mov_b32_e32 v21, s27
@@ -43642,15 +43449,11 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v13, s73
; SI-NEXT: v_mov_b32_e32 v11, s63
; SI-NEXT: v_mov_b32_e32 v9, s61
-; SI-NEXT: v_mov_b32_e32 v7, s59
+; SI-NEXT: v_mov_b32_e32 v5, s57
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s45
-; SI-NEXT: v_mov_b32_e32 v10, s90
-; SI-NEXT: v_mov_b32_e32 v47, s88
-; SI-NEXT: v_mov_b32_e32 v44, s78
-; SI-NEXT: v_mov_b32_e32 v43, s91
-; SI-NEXT: v_mov_b32_e32 v41, s89
+; SI-NEXT: v_mov_b32_e32 v53, s78
; SI-NEXT: v_mov_b32_e32 v40, s79
; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -43662,112 +43465,88 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_mov_b32_e32 v22, s26
; SI-NEXT: v_mov_b32_e32 v24, s24
; SI-NEXT: v_mov_b32_e32 v26, s22
-; SI-NEXT: v_mov_b32_e32 v31, s20
-; SI-NEXT: v_mov_b32_e32 v35, s18
+; SI-NEXT: v_mov_b32_e32 v28, s20
+; SI-NEXT: v_mov_b32_e32 v30, s18
; SI-NEXT: s_mov_b32 s16, s46
-; SI-NEXT: v_readlane_b32 s44, v61, 34
-; SI-NEXT: v_readlane_b32 s58, v61, 32
-; SI-NEXT: v_readlane_b32 s60, v61, 30
-; SI-NEXT: v_readlane_b32 s62, v61, 28
-; SI-NEXT: v_readlane_b32 s72, v61, 26
-; SI-NEXT: v_readlane_b32 s74, v61, 24
-; SI-NEXT: v_readlane_b32 s76, v61, 22
-; SI-NEXT: v_readlane_b32 s78, v61, 20
-; SI-NEXT: v_readlane_b32 s88, v61, 18
-; SI-NEXT: v_readlane_b32 s28, v61, 16
-; SI-NEXT: v_readlane_b32 s90, v61, 14
-; SI-NEXT: v_readlane_b32 s26, v61, 12
-; SI-NEXT: v_readlane_b32 s24, v61, 10
-; SI-NEXT: v_readlane_b32 s22, v61, 6
-; SI-NEXT: s_mov_b32 s46, s34
-; SI-NEXT: v_readlane_b32 s34, v61, 8
-; SI-NEXT: v_readlane_b32 s20, v61, 4
-; SI-NEXT: v_readlane_b32 s18, v61, 2
-; SI-NEXT: s_mov_b32 s56, s8
-; SI-NEXT: v_readlane_b32 s8, v61, 0
-; SI-NEXT: v_mov_b32_e32 v37, s17
-; SI-NEXT: v_mov_b32_e32 v5, s57
-; SI-NEXT: v_readlane_b32 s47, v61, 39
-; SI-NEXT: v_readlane_b32 s45, v61, 35
-; SI-NEXT: v_readlane_b32 s59, v61, 33
-; SI-NEXT: v_readlane_b32 s61, v61, 31
-; SI-NEXT: v_readlane_b32 s63, v61, 29
-; SI-NEXT: v_readlane_b32 s73, v61, 27
-; SI-NEXT: v_readlane_b32 s75, v61, 25
-; SI-NEXT: v_readlane_b32 s77, v61, 23
-; SI-NEXT: v_readlane_b32 s79, v61, 21
-; SI-NEXT: v_readlane_b32 s89, v61, 19
-; SI-NEXT: v_readlane_b32 s29, v61, 17
-; SI-NEXT: v_readlane_b32 s91, v61, 15
-; SI-NEXT: v_readlane_b32 s27, v61, 13
-; SI-NEXT: v_readlane_b32 s25, v61, 11
-; SI-NEXT: v_readlane_b32 s23, v61, 7
-; SI-NEXT: v_readlane_b32 s35, v61, 9
-; SI-NEXT: v_readlane_b32 s21, v61, 5
-; SI-NEXT: v_readlane_b32 s19, v61, 3
-; SI-NEXT: v_readlane_b32 s9, v61, 1
+; SI-NEXT: v_readlane_b32 s56, v61, 32
+; SI-NEXT: v_readlane_b32 s44, v61, 28
+; SI-NEXT: v_readlane_b32 s60, v61, 26
+; SI-NEXT: v_readlane_b32 s62, v61, 24
+; SI-NEXT: v_readlane_b32 s72, v61, 22
+; SI-NEXT: v_readlane_b32 s74, v61, 20
+; SI-NEXT: v_readlane_b32 s76, v61, 18
+; SI-NEXT: v_readlane_b32 s78, v61, 16
+; SI-NEXT: v_readlane_b32 vcc_lo, v61, 14
+; SI-NEXT: v_readlane_b32 s28, v61, 12
+; SI-NEXT: v_readlane_b32 s26, v61, 10
+; SI-NEXT: s_mov_b32 s46, s92
+; SI-NEXT: v_readlane_b32 s92, v61, 8
+; SI-NEXT: v_readlane_b32 s24, v61, 6
+; SI-NEXT: v_readlane_b32 s22, v61, 4
+; SI-NEXT: v_readlane_b32 s20, v61, 2
+; SI-NEXT: v_readlane_b32 s18, v61, 0
+; SI-NEXT: v_mov_b32_e32 v31, s17
+; SI-NEXT: v_mov_b32_e32 v7, s59
+; SI-NEXT: v_readlane_b32 s47, v61, 35
+; SI-NEXT: v_readlane_b32 s57, v61, 33
+; SI-NEXT: v_readlane_b32 s45, v61, 29
+; SI-NEXT: v_readlane_b32 s61, v61, 27
+; SI-NEXT: v_readlane_b32 s63, v61, 25
+; SI-NEXT: v_readlane_b32 s73, v61, 23
+; SI-NEXT: v_readlane_b32 s75, v61, 21
+; SI-NEXT: v_readlane_b32 s77, v61, 19
+; SI-NEXT: v_readlane_b32 s79, v61, 17
+; SI-NEXT: v_readlane_b32 vcc_hi, v61, 15
+; SI-NEXT: v_readlane_b32 s29, v61, 13
+; SI-NEXT: v_readlane_b32 s27, v61, 11
+; SI-NEXT: v_readlane_b32 s93, v61, 9
+; SI-NEXT: v_readlane_b32 s25, v61, 7
+; SI-NEXT: v_readlane_b32 s23, v61, 5
+; SI-NEXT: v_readlane_b32 s21, v61, 3
+; SI-NEXT: v_readlane_b32 s19, v61, 1
; SI-NEXT: .LBB37_5: ; %end
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v38, 0xff, v38
+; SI-NEXT: v_and_b32_e32 v35, 0xff, v35
; SI-NEXT: s_lshl_b32 s5, s4, 8
-; SI-NEXT: v_or_b32_e32 v38, s5, v38
+; SI-NEXT: v_or_b32_e32 v35, s5, v35
; SI-NEXT: s_and_b32 s5, s6, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s12, 24
-; SI-NEXT: v_and_b32_e32 v38, 0xffff, v38
+; SI-NEXT: s_lshl_b32 s7, s14, 24
+; SI-NEXT: v_and_b32_e32 v35, 0xffff, v35
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v38, s5, v38
-; SI-NEXT: buffer_store_dword v38, v0, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v37, 0xff, v37
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v38, 8, v55
-; SI-NEXT: v_or_b32_e32 v37, v37, v38
-; SI-NEXT: v_and_b32_e32 v38, 0xff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
-; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10
-; SI-NEXT: v_or_b32_e32 v10, v10, v38
-; SI-NEXT: v_and_b32_e32 v37, 0xffff, v37
-; SI-NEXT: v_or_b32_e32 v10, v37, v10
-; SI-NEXT: v_add_i32_e32 v37, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v10, v37, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v35
-; SI-NEXT: s_lshl_b32 s5, s14, 8
-; SI-NEXT: v_or_b32_e32 v10, s5, v10
+; SI-NEXT: v_and_b32_e32 v29, 0xff, v29
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v35, s5, v35
+; SI-NEXT: v_and_b32_e32 v30, 0xff, v30
+; SI-NEXT: s_lshl_b32 s5, s12, 8
+; SI-NEXT: v_or_b32_e32 v10, v29, v10
+; SI-NEXT: v_and_b32_e32 v29, 0xff, v52
+; SI-NEXT: v_or_b32_e32 v30, s5, v30
; SI-NEXT: s_and_b32 s5, s10, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s56, 24
+; SI-NEXT: s_lshl_b32 s7, s8, 24
+; SI-NEXT: v_or_b32_e32 v8, v8, v29
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_and_b32_e32 v30, 0xffff, v30
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v10, s5, v10
-; SI-NEXT: v_add_i32_e32 v35, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v10, v35, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 8, v53
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: v_or_b32_e32 v10, v10, v32
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v52
-; SI-NEXT: v_or_b32_e32 v8, v32, v8
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: v_or_b32_e32 v8, v10, v8
-; SI-NEXT: v_add_i32_e32 v10, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v30, s5, v30
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v31
-; SI-NEXT: s_lshl_b32 s5, s8, 8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v28
+; SI-NEXT: s_lshl_b32 s5, s40, 8
; SI-NEXT: s_and_b32 s4, s42, 0xff
; SI-NEXT: v_or_b32_e32 v8, s5, v8
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s40, 24
+; SI-NEXT: s_lshl_b32 s5, s98, 24
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v8, s4, v8
-; SI-NEXT: v_add_i32_e32 v10, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v28
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v51
; SI-NEXT: v_or_b32_e32 v8, v8, v10
; SI-NEXT: v_and_b32_e32 v10, 0xff, v50
@@ -43776,54 +43555,63 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_add_i32_e32 v8, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v6, v8, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v26
-; SI-NEXT: s_lshl_b32 s4, s98, 8
+; SI-NEXT: s_lshl_b32 s4, s96, 8
; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: s_and_b32 s4, s96, 0xff
+; SI-NEXT: s_and_b32 s4, s86, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s86, 24
+; SI-NEXT: s_lshl_b32 s5, s84, 24
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v6, s4, v6
-; SI-NEXT: v_add_i32_e32 v8, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v6, v8, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v49
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v48
-; SI-NEXT: v_or_b32_e32 v6, v8, v6
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v4, v6, s[0:3], 0 offen
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v49
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v48
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v39
+; SI-NEXT: v_or_b32_e32 v8, v10, v8
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; SI-NEXT: v_or_b32_e32 v6, v6, v8
+; SI-NEXT: buffer_store_dword v35, v0, s[0:3], 0 offen
+; SI-NEXT: v_and_b32_e32 v31, 0xff, v31
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v35, 8, v55
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v24
-; SI-NEXT: s_lshl_b32 s4, s84, 8
-; SI-NEXT: v_or_b32_e32 v4, s4, v4
-; SI-NEXT: s_and_b32 s4, s82, 0xff
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v24
+; SI-NEXT: s_lshl_b32 s4, s82, 8
+; SI-NEXT: v_or_b32_e32 v31, v31, v35
+; SI-NEXT: v_and_b32_e32 v35, 0xff, v54
+; SI-NEXT: v_or_b32_e32 v6, s4, v6
+; SI-NEXT: s_and_b32 s4, s80, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
+; SI-NEXT: v_lshlrev_b32_e32 v53, 24, v53
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s80, 24
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; SI-NEXT: s_lshl_b32 s5, s70, 24
+; SI-NEXT: v_or_b32_e32 v35, v53, v35
+; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
+; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: v_or_b32_e32 v4, s4, v4
-; SI-NEXT: v_add_i32_e32 v6, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v4, v6, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v31, v31, v35
+; SI-NEXT: v_or_b32_e32 v6, s4, v6
+; SI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v23
-; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v39
-; SI-NEXT: v_or_b32_e32 v4, v4, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
-; SI-NEXT: s_lshl_b32 s4, s70, 8
-; SI-NEXT: s_lshl_b32 s5, s66, 24
+; SI-NEXT: s_lshl_b32 s4, s68, 8
+; SI-NEXT: s_lshl_b32 s5, s64, 24
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_readlane_b32 s99, v63, 33
; SI-NEXT: v_readlane_b32 s98, v63, 32
@@ -43840,9 +43628,10 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_readlane_b32 s71, v63, 21
; SI-NEXT: v_readlane_b32 s70, v63, 20
; SI-NEXT: v_readlane_b32 s69, v63, 19
+; SI-NEXT: v_readlane_b32 s68, v63, 18
; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_readlane_b32 s64, v63, 14
; SI-NEXT: v_readlane_b32 s55, v63, 13
; SI-NEXT: v_readlane_b32 s53, v63, 11
; SI-NEXT: v_readlane_b32 s51, v63, 9
@@ -43854,26 +43643,24 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; SI-NEXT: v_or_b32_e32 v2, v6, v2
; SI-NEXT: v_or_b32_e32 v2, v4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v22
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s68, 0xff
+; SI-NEXT: s_and_b32 s4, s66, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
-; SI-NEXT: s_lshl_b32 s4, s64, 8
-; SI-NEXT: s_lshl_b32 s5, s52, 24
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s64, v63, 14
-; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: s_lshl_b32 s4, s54, 8
+; SI-NEXT: s_lshl_b32 s5, s50, 24
+; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s54, v63, 12
+; SI-NEXT: v_readlane_b32 s50, v63, 8
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
@@ -43887,211 +43674,195 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v20
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s54, 0xff
+; SI-NEXT: s_and_b32 s4, s52, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s18, 8
-; SI-NEXT: s_lshl_b32 s5, s48, 24
-; SI-NEXT: v_readlane_b32 s54, v63, 12
-; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: s_lshl_b32 s5, s38, 24
+; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: v_readlane_b32 s38, v63, 4
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s50, 0xff
+; SI-NEXT: s_and_b32 s4, s48, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v17
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s20, 8
-; SI-NEXT: s_lshl_b32 s5, s36, 24
-; SI-NEXT: v_readlane_b32 s50, v63, 8
-; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: s_lshl_b32 s5, s34, 24
+; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v16
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s38, 0xff
+; SI-NEXT: s_and_b32 s4, s36, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s22, 8
-; SI-NEXT: s_lshl_b32 s5, s34, 24
-; SI-NEXT: v_readlane_b32 s38, v63, 4
-; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: s_lshl_b32 s5, s94, 24
+; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v14
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s46, 0xff
+; SI-NEXT: s_and_b32 s4, s30, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v37
; SI-NEXT: s_lshl_b32 s4, s24, 8
-; SI-NEXT: s_lshl_b32 s5, s94, 24
+; SI-NEXT: s_lshl_b32 s5, s92, 24
+; SI-NEXT: v_readlane_b32 s30, v63, 34
+; SI-NEXT: v_readlane_b32 s31, v63, 35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v38
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v12
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s30, 0xff
+; SI-NEXT: s_and_b32 s4, s46, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v33
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v36
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v34
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v33
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s26, 8
-; SI-NEXT: s_lshl_b32 s5, s90, 24
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x58, v0
+; SI-NEXT: s_lshl_b32 s5, s88, 24
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v32
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v59
-; SI-NEXT: v_readlane_b32 s30, v63, 34
-; SI-NEXT: v_readlane_b32 s31, v63, 35
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s92, 0xff
+; SI-NEXT: s_and_b32 s4, s90, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v27
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v60
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s28, 8
; SI-NEXT: s_lshl_b32 s5, s78, 24
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x60, v0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v58
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v56
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: s_and_b32 s4, s88, 0xff
+; SI-NEXT: s_and_b32 s4, vcc_lo, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v58
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v57
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s76, 8
; SI-NEXT: s_lshl_b32 s5, s72, 24
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x68, v0
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v47
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_or_b32_e32 v2, s4, v2
@@ -44100,10 +43871,9 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v47
; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: v_and_b32_e32 v4, 0xff, v46
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -44111,13 +43881,12 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT: s_lshl_b32 s4, s62, 8
-; SI-NEXT: s_lshl_b32 s5, s58, 24
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x70, v0
+; SI-NEXT: s_lshl_b32 s5, s44, 24
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v42
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_or_b32_e32 v2, s4, v2
@@ -44126,36 +43895,32 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v44
; SI-NEXT: v_or_b32_e32 v2, v2, v3
; SI-NEXT: v_and_b32_e32 v3, 0xff, v43
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v42
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: s_lshl_b32 s4, s44, 8
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x78, v0
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: v_readlane_b32 s4, v61, 30
+; SI-NEXT: s_lshl_b32 s4, s4, 8
+; SI-NEXT: v_readlane_b32 s5, v61, 31
+; SI-NEXT: s_lshl_b32 s5, s16, 24
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: v_readlane_b32 s4, v61, 36
-; SI-NEXT: v_readlane_b32 s5, v61, 37
-; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: s_and_b32 s4, s56, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: s_lshl_b32 s5, s16, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_or_b32_e32 v2, s4, v2
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
@@ -44167,7 +43932,7 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -44193,8 +43958,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -44423,210 +44188,209 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: .LBB37_2: ; %cmp.true
; VI-NEXT: v_add_f32_e64 v2, s5, 1.0
; VI-NEXT: v_add_f32_e64 v1, s4, 1.0
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
; VI-NEXT: v_add_f32_e64 v4, s7, 1.0
; VI-NEXT: v_add_f32_e64 v3, s6, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
; VI-NEXT: v_add_f32_e64 v6, s9, 1.0
; VI-NEXT: v_add_f32_e64 v5, s8, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[5:6]
; VI-NEXT: v_add_f32_e64 v8, s11, 1.0
; VI-NEXT: v_add_f32_e64 v7, s10, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[7:8]
; VI-NEXT: v_add_f32_e64 v10, s13, 1.0
; VI-NEXT: v_add_f32_e64 v9, s12, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
; VI-NEXT: v_add_f32_e64 v12, s15, 1.0
; VI-NEXT: v_add_f32_e64 v11, s14, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[11:12]
; VI-NEXT: v_add_f32_e64 v14, s41, 1.0
; VI-NEXT: v_add_f32_e64 v13, s40, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_add_f32_e64 v16, s43, 1.0
-; VI-NEXT: v_add_f32_e64 v15, s42, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: v_add_f32_e64 v18, s45, 1.0
-; VI-NEXT: v_add_f32_e64 v17, s44, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
-; VI-NEXT: v_add_f32_e64 v20, s29, 1.0
-; VI-NEXT: v_add_f32_e64 v19, s28, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; VI-NEXT: v_add_f32_e64 v22, s27, 1.0
-; VI-NEXT: v_add_f32_e64 v21, s26, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: v_add_f32_e64 v28, s21, 1.0
-; VI-NEXT: v_add_f32_e64 v27, s20, 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: v_add_f32_e64 v30, s19, 1.0
-; VI-NEXT: v_add_f32_e64 v29, s18, 1.0
-; VI-NEXT: v_add_f32_e64 v24, s25, 1.0
-; VI-NEXT: v_add_f32_e64 v23, s24, 1.0
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: v_add_f32_e64 v32, s17, 1.0
-; VI-NEXT: v_add_f32_e64 v31, s16, 1.0
-; VI-NEXT: v_add_f32_e64 v26, s23, 1.0
-; VI-NEXT: v_add_f32_e64 v25, s22, 1.0
-; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v24
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v26
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v26
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v28
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v28
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v27
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v30
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v30
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v29
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v32
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v31
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[13:14]
+; VI-NEXT: v_add_f32_e64 v22, s43, 1.0
+; VI-NEXT: v_add_f32_e64 v21, s42, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[21:22]
+; VI-NEXT: v_add_f32_e64 v24, s45, 1.0
+; VI-NEXT: v_add_f32_e64 v23, s44, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[23:24]
+; VI-NEXT: v_add_f32_e64 v26, s29, 1.0
+; VI-NEXT: v_add_f32_e64 v25, s28, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v2
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v2
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v2
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v1
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v3
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v6
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v6
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v5
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v5
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v8
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v8
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v8
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v7
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v7
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v10
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v10
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v10
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v9
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v9
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v12
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v12
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v12
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v11
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v11
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v14
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v14
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v13
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v22
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v22
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v22
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v21
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v21
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v24
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v24
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v24
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v26
+; VI-NEXT: v_add_f32_e64 v34, s21, 1.0
+; VI-NEXT: v_add_f32_e64 v32, s23, 1.0
+; VI-NEXT: v_add_f32_e64 v31, s22, 1.0
+; VI-NEXT: v_add_f32_e64 v28, s27, 1.0
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v26
+; VI-NEXT: v_add_f32_e64 v33, s20, 1.0
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v28
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v34
+; VI-NEXT: v_add_f32_e64 v38, s17, 1.0
+; VI-NEXT: v_add_f32_e64 v36, s19, 1.0
+; VI-NEXT: v_add_f32_e64 v35, s18, 1.0
+; VI-NEXT: v_add_f32_e64 v30, s25, 1.0
+; VI-NEXT: v_add_f32_e64 v27, s26, 1.0
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v28
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v34
+; VI-NEXT: v_add_f32_e64 v37, s16, 1.0
+; VI-NEXT: v_add_f32_e64 v29, s24, 1.0
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[35:36]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v30
+; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v36
+; VI-NEXT: v_lshrrev_b32_e32 v19, 24, v38
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[37:38]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v30
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v36
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v38
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v23
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v25
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v27
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v30
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v29
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v31
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v34
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v33
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v33
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v36
+; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v35
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v37
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v37
; VI-NEXT: s_branch .LBB37_5
; VI-NEXT: .LBB37_3:
; VI-NEXT: ; implicit-def: $sgpr46
@@ -44789,203 +44553,211 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s56
+; VI-NEXT: v_mov_b32_e32 v15, s68
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s67
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s55
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s54
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s50
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s87
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s83
; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s82
; VI-NEXT: v_readlane_b32 s4, v62, 0
-; VI-NEXT: v_mov_b32_e32 v37, s4
-; VI-NEXT: v_mov_b32_e32 v34, s80
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 1
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 2
-; VI-NEXT: v_mov_b32_e32 v35, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 3
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 3
+; VI-NEXT: v_mov_b32_e32 v57, s4
; VI-NEXT: v_readlane_b32 s4, v62, 4
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v58, s4
; VI-NEXT: v_readlane_b32 s4, v62, 5
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v56, s4
; VI-NEXT: v_readlane_b32 s4, v62, 6
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 7
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 8
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v46, s4
; VI-NEXT: v_readlane_b32 s4, v62, 9
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v47, s4
; VI-NEXT: v_readlane_b32 s4, v62, 10
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v45, s4
; VI-NEXT: v_readlane_b32 s4, v62, 11
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 12
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 13
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 14
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v44, s4
; VI-NEXT: v_readlane_b32 s4, v62, 15
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 22
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v53, s58
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s58
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 47
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v53, s60
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s60
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v39, s4
-; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_mov_b32_e32 v32, s17
-; VI-NEXT: v_mov_b32_e32 v29, s18
-; VI-NEXT: v_mov_b32_e32 v30, s19
-; VI-NEXT: v_mov_b32_e32 v27, s20
-; VI-NEXT: v_mov_b32_e32 v28, s21
-; VI-NEXT: v_mov_b32_e32 v25, s22
-; VI-NEXT: v_mov_b32_e32 v26, s23
-; VI-NEXT: v_mov_b32_e32 v23, s24
-; VI-NEXT: v_mov_b32_e32 v24, s25
-; VI-NEXT: v_mov_b32_e32 v21, s26
-; VI-NEXT: v_mov_b32_e32 v22, s27
-; VI-NEXT: v_mov_b32_e32 v19, s28
-; VI-NEXT: v_mov_b32_e32 v20, s29
-; VI-NEXT: v_mov_b32_e32 v17, s44
-; VI-NEXT: v_mov_b32_e32 v18, s45
-; VI-NEXT: v_mov_b32_e32 v15, s42
-; VI-NEXT: v_mov_b32_e32 v16, s43
+; VI-NEXT: v_mov_b32_e32 v37, s16
+; VI-NEXT: v_mov_b32_e32 v38, s17
+; VI-NEXT: v_mov_b32_e32 v35, s18
+; VI-NEXT: v_mov_b32_e32 v36, s19
+; VI-NEXT: v_mov_b32_e32 v33, s20
+; VI-NEXT: v_mov_b32_e32 v34, s21
+; VI-NEXT: v_mov_b32_e32 v31, s22
+; VI-NEXT: v_mov_b32_e32 v32, s23
+; VI-NEXT: v_mov_b32_e32 v29, s24
+; VI-NEXT: v_mov_b32_e32 v30, s25
+; VI-NEXT: v_mov_b32_e32 v27, s26
+; VI-NEXT: v_mov_b32_e32 v28, s27
+; VI-NEXT: v_mov_b32_e32 v25, s28
+; VI-NEXT: v_mov_b32_e32 v26, s29
+; VI-NEXT: v_mov_b32_e32 v23, s44
+; VI-NEXT: v_mov_b32_e32 v24, s45
+; VI-NEXT: v_mov_b32_e32 v21, s42
+; VI-NEXT: v_mov_b32_e32 v22, s43
; VI-NEXT: v_mov_b32_e32 v13, s40
; VI-NEXT: v_mov_b32_e32 v14, s41
; VI-NEXT: v_mov_b32_e32 v11, s14
@@ -44999,112 +44771,75 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_mov_b32_e32 v3, s6
; VI-NEXT: v_mov_b32_e32 v4, s7
; VI-NEXT: v_mov_b32_e32 v2, s5
-; VI-NEXT: v_mov_b32_e32 v61, s71
-; VI-NEXT: v_mov_b32_e32 v33, s69
-; VI-NEXT: v_mov_b32_e32 v60, s70
-; VI-NEXT: v_mov_b32_e32 v50, s68
-; VI-NEXT: v_mov_b32_e32 v59, s67
-; VI-NEXT: v_mov_b32_e32 v58, s66
-; VI-NEXT: v_mov_b32_e32 v48, s64
-; VI-NEXT: v_mov_b32_e32 v52, s65
-; VI-NEXT: v_mov_b32_e32 v56, s55
-; VI-NEXT: v_mov_b32_e32 v57, s54
-; VI-NEXT: v_mov_b32_e32 v46, s53
-; VI-NEXT: v_mov_b32_e32 v47, s51
-; VI-NEXT: v_mov_b32_e32 v45, s52
-; VI-NEXT: v_mov_b32_e32 v43, s50
-; VI-NEXT: v_mov_b32_e32 v44, s87
-; VI-NEXT: v_mov_b32_e32 v49, s86
-; VI-NEXT: v_mov_b32_e32 v42, s84
-; VI-NEXT: v_mov_b32_e32 v51, s85
-; VI-NEXT: v_mov_b32_e32 v38, s83
-; VI-NEXT: v_mov_b32_e32 v55, s82
-; VI-NEXT: v_mov_b32_e32 v36, s81
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, s36
-; VI-NEXT: v_mov_b32_e32 v40, s38
-; VI-NEXT: v_mov_b32_e32 v41, s48
+; VI-NEXT: v_mov_b32_e32 v20, s71
+; VI-NEXT: v_mov_b32_e32 v55, s69
+; VI-NEXT: v_mov_b32_e32 v19, s70
+; VI-NEXT: v_mov_b32_e32 v18, s66
+; VI-NEXT: v_mov_b32_e32 v52, s64
+; VI-NEXT: v_mov_b32_e32 v17, s65
+; VI-NEXT: v_mov_b32_e32 v50, s53
+; VI-NEXT: v_mov_b32_e32 v51, s51
+; VI-NEXT: v_mov_b32_e32 v61, s52
+; VI-NEXT: v_mov_b32_e32 v60, s86
+; VI-NEXT: v_mov_b32_e32 v16, s84
+; VI-NEXT: v_mov_b32_e32 v49, s85
+; VI-NEXT: v_mov_b32_e32 v59, s81
+; VI-NEXT: v_mov_b32_e32 v48, s80
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v39, s34
+; VI-NEXT: v_mov_b32_e32 v40, s36
+; VI-NEXT: v_mov_b32_e32 v41, s38
+; VI-NEXT: v_mov_b32_e32 v42, s48
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s62
; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s72
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s74
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s76
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s78
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s88
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v53, s90
-; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v53, s30
-; VI-NEXT: v_mov_b32_e32 v54, s34
+; VI-NEXT: v_mov_b32_e32 v54, s30
; VI-NEXT: .LBB37_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v33, v33, v41, s4
-; VI-NEXT: v_perm_b32 v31, v31, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; VI-NEXT: v_or_b32_e32 v31, v31, v33
-; VI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v31, v50, v59, s4
-; VI-NEXT: v_perm_b32 v32, v32, v60, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_e32 v31, v32, v31
-; VI-NEXT: v_add_u32_e32 v32, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v31, v32, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v31, v48, v40, s4
-; VI-NEXT: v_perm_b32 v29, v29, v58, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_e32 v29, v29, v31
-; VI-NEXT: v_add_u32_e32 v31, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v29, v31, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v29, v30, v52, s4
-; VI-NEXT: v_perm_b32 v30, v56, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_e32 v29, v29, v30
-; VI-NEXT: v_add_u32_e32 v30, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v29, v30, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v29, v47, v39, s4
-; VI-NEXT: v_perm_b32 v27, v27, v46, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_e32 v27, v27, v29
-; VI-NEXT: v_add_u32_e32 v29, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v27, v29, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v27, v28, v45, s4
-; VI-NEXT: v_perm_b32 v28, v43, v44, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_e32 v27, v27, v28
-; VI-NEXT: v_add_u32_e32 v28, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v27, v28, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v27, v42, v54, s4
-; VI-NEXT: v_perm_b32 v25, v25, v49, s4
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
-; VI-NEXT: v_or_b32_e32 v25, v25, v27
-; VI-NEXT: v_add_u32_e32 v27, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v25, v27, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v25, v26, v51, s4
-; VI-NEXT: v_perm_b32 v26, v38, v55, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_e32 v25, v25, v26
-; VI-NEXT: v_add_u32_e32 v26, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v25, v26, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v25, v37, v53, s4
-; VI-NEXT: v_perm_b32 v23, v23, v36, s4
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
-; VI-NEXT: v_or_b32_e32 v23, v23, v25
-; VI-NEXT: v_add_u32_e32 v25, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v23, v25, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v36, v17, s4
+; VI-NEXT: v_perm_b32 v32, v32, v49, s4
+; VI-NEXT: v_perm_b32 v36, v15, v54, s4
+; VI-NEXT: v_perm_b32 v30, v30, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v16, v39, s4
+; VI-NEXT: v_perm_b32 v33, v33, v50, s4
+; VI-NEXT: v_perm_b32 v18, v35, v18, s4
+; VI-NEXT: v_perm_b32 v35, v51, v40, s4
+; VI-NEXT: v_perm_b32 v55, v55, v42, s4
+; VI-NEXT: v_perm_b32 v20, v37, v20, s4
+; VI-NEXT: v_perm_b32 v19, v38, v19, s4
+; VI-NEXT: v_perm_b32 v37, v52, v41, s4
+; VI-NEXT: v_perm_b32 v34, v34, v61, s4
+; VI-NEXT: v_perm_b32 v31, v31, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v31, v16
+; VI-NEXT: v_perm_b32 v29, v29, v59, s4
+; VI-NEXT: v_perm_b32 v38, v58, v53, s4
+; VI-NEXT: v_perm_b32 v27, v27, v57, s4
+; VI-NEXT: v_perm_b32 v28, v28, v56, s4
+; VI-NEXT: v_perm_b32 v25, v25, v46, s4
+; VI-NEXT: v_perm_b32 v26, v26, v45, s4
+; VI-NEXT: v_perm_b32 v23, v23, v43, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -45137,266 +44872,260 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v39, v47, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v24, v24, v15, s4
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v48, v44, v48, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v24, v23, s4
-; VI-NEXT: v_perm_b32 v24, v34, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_e32 v23, v23, v24
-; VI-NEXT: v_add_u32_e32 v24, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v24, v23, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_perm_b32 v49, v15, v49, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v24, s4
-; VI-NEXT: v_or_b32_e32 v21, v21, v23
-; VI-NEXT: v_add_u32_e32 v23, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v21, v23, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v21, v21, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v22, v21, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v22, v15, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v22, v22, v23, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v21, v21, v22
-; VI-NEXT: v_add_u32_e32 v22, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v22, v21, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v19, v22, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v21
-; VI-NEXT: v_add_u32_e32 v21, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v19, v21, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v20, v19, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v15, v15, v50, s4
+; VI-NEXT: v_lshlrev_b32_e32 v50, 16, v55
+; VI-NEXT: v_or_b32_e32 v20, v20, v50
+; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v20, v21, s4
+; VI-NEXT: v_perm_b32 v20, v20, v50, s4
; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; VI-NEXT: v_or_b32_e32 v19, v19, v20
-; VI-NEXT: v_add_u32_e32 v20, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v20, v19, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v20, s4
-; VI-NEXT: v_or_b32_e32 v17, v17, v19
-; VI-NEXT: v_add_u32_e32 v19, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v18, v17, s4
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v37
+; VI-NEXT: v_or_b32_e32 v18, v18, v19
+; VI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v18, v18, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; VI-NEXT: v_or_b32_e32 v17, v17, v18
-; VI-NEXT: v_add_u32_e32 v18, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v18, v17, s4
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v35
+; VI-NEXT: v_or_b32_e32 v17, v33, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v17, v17, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v34, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v18, s4
-; VI-NEXT: v_or_b32_e32 v15, v15, v17
-; VI-NEXT: v_add_u32_e32 v17, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v16, v15, s4
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v32, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v36
+; VI-NEXT: v_or_b32_e32 v16, v29, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v16, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v15, v15, v16
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v16, v30, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v38
+; VI-NEXT: v_or_b32_e32 v16, v27, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:40
; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v16, v15, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v28, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v39
+; VI-NEXT: v_or_b32_e32 v16, v25, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v26, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v48
+; VI-NEXT: v_or_b32_e32 v16, v23, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v24, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v49
+; VI-NEXT: v_or_b32_e32 v16, v21, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v16, v22, v16
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v13, v16, s4
; VI-NEXT: v_or_b32_e32 v13, v13, v15
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v14, v13, s4
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v14, v14, v15, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v11, v13, s4
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v13, v14, v13, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; VI-NEXT: v_or_b32_e32 v11, v11, v13
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v12, v11, s4
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v12, v12, v13, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_add_u32_e32 v12, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v9, v11, s4
; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v11, v12, v11, s4
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; VI-NEXT: v_or_b32_e32 v9, v9, v11
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v10, v9, s4
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v10, v10, v11, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v7, v9, s4
; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v10, v9, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v8, v7, s4
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v8, v8, v9, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v5, v7, s4
; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v8, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v6, v5, s4
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v6, v6, v7, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v3, v5, s4
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v6, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v4, v4, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -45412,8 +45141,8 @@ define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a,
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -73832,20 +73561,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr58
@@ -73853,14 +73581,15 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -73875,7 +73604,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v31, v32, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v31, v32, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -73926,82 +73655,85 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
@@ -74010,79 +73742,76 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -74138,7 +73867,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v31, v32, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v31, v32, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -74189,82 +73918,85 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v33, v6, v5, 24
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
@@ -74273,79 +74005,76 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v48, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v55, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v43, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v45, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v43, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v31
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v14
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v53, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
@@ -74363,12 +74092,12 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: .LBB56_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v45, 8, v45
-; SI-NEXT: v_and_b32_e32 v43, 0xff, v43
-; SI-NEXT: v_or_b32_e32 v1, v1, v45
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v43
+; SI-NEXT: v_lshlrev_b32_e32 v43, 8, v43
+; SI-NEXT: v_and_b32_e32 v42, 0xff, v42
+; SI-NEXT: v_or_b32_e32 v1, v1, v43
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v41
-; SI-NEXT: v_or_b32_e32 v41, v41, v43
+; SI-NEXT: v_or_b32_e32 v41, v41, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v41
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
@@ -74382,11 +74111,10 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -74394,8 +74122,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v63
@@ -74406,20 +74133,20 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v38
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v37
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v60
@@ -74430,16 +74157,15 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -74448,8 +74174,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
@@ -74460,16 +74185,15 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -74478,28 +74202,26 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v45
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v44
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -74508,28 +74230,26 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v54
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v53
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v54
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -74538,128 +74258,118 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v49
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v39
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
@@ -74668,34 +74378,32 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
@@ -74704,34 +74412,32 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
@@ -74740,34 +74446,32 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
@@ -74776,17 +74480,16 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
@@ -74794,16 +74497,15 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
@@ -74812,34 +74514,32 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
@@ -74847,7 +74547,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -74856,13 +74556,11 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -74873,7 +74571,7 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -74996,66 +74694,61 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; kill: killed $vgpr35
; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr55
@@ -75091,182 +74784,185 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
+; VI-NEXT: ; kill: killed $vgpr33
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB56_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
; VI-NEXT: .LBB56_2: ; %Flow
@@ -75338,329 +75034,306 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v6
; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v7
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v43, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v1
; VI-NEXT: .LBB56_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v57, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
-; VI-NEXT: v_lshlrev_b32_e32 v48, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v48
+; VI-NEXT: v_perm_b32 v7, v7, v38, s4
+; VI-NEXT: v_perm_b32 v10, v10, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v35, s4
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v8, v8, v33, s4
+; VI-NEXT: v_perm_b32 v33, v49, v53, s4
+; VI-NEXT: v_perm_b32 v11, v11, v48, s4
+; VI-NEXT: v_perm_b32 v3, v3, v34, s4
+; VI-NEXT: v_perm_b32 v34, v47, v39, s4
+; VI-NEXT: v_perm_b32 v39, v50, v54, s4
+; VI-NEXT: v_perm_b32 v55, v59, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v52, s4
+; VI-NEXT: v_perm_b32 v2, v2, v58, s4
+; VI-NEXT: v_perm_b32 v51, v51, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v57, s4
+; VI-NEXT: v_perm_b32 v5, v5, v56, s4
+; VI-NEXT: v_perm_b32 v6, v6, v46, s4
+; VI-NEXT: v_perm_b32 v9, v9, v45, s4
+; VI-NEXT: v_perm_b32 v12, v12, v63, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v36, v36, v37, s4
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v37, v60, v37, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v38, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v35, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v16, v16, v38, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v35, v35, v48, s4
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v38, v38, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v48, s4
+; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v48, v48, v49, s4
+; VI-NEXT: v_lshlrev_b32_e32 v49, 16, v55
+; VI-NEXT: v_or_b32_e32 v1, v1, v49
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v34, v56, s4
-; VI-NEXT: v_perm_b32 v2, v2, v53, s4
+; VI-NEXT: v_perm_b32 v1, v44, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v47, v40, s4
-; VI-NEXT: v_perm_b32 v2, v3, v38, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v4, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v33, v39, s4
-; VI-NEXT: v_perm_b32 v2, v5, v37, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v44, v43, s4
-; VI-NEXT: v_perm_b32 v1, v6, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v50, v54, s4
-; VI-NEXT: v_perm_b32 v2, v7, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v62, v61, s4
-; VI-NEXT: v_perm_b32 v1, v8, v36, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v9, v49, s4
-; VI-NEXT: v_perm_b32 v1, v60, v1, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v62, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v10, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v11, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75668,21 +75341,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v21, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75690,21 +75361,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v24, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75712,21 +75381,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75734,21 +75401,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75756,21 +75421,19 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v29, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -75778,18 +75441,16 @@ define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v32, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -77726,156 +77387,156 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: s_lshr_b32 s46, s5, 24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s46, 40
+; SI-NEXT: v_writelane_b32 v22, s46, 36
; SI-NEXT: s_lshr_b32 s46, s5, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 41
+; SI-NEXT: v_writelane_b32 v22, s46, 37
; SI-NEXT: s_lshr_b32 s46, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 42
+; SI-NEXT: v_writelane_b32 v22, s46, 38
; SI-NEXT: s_lshr_b32 s46, s7, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 43
+; SI-NEXT: v_writelane_b32 v22, s46, 39
; SI-NEXT: s_lshr_b32 s46, s7, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 44
+; SI-NEXT: v_writelane_b32 v22, s46, 40
; SI-NEXT: s_lshr_b32 s46, s7, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 45
+; SI-NEXT: v_writelane_b32 v22, s46, 41
; SI-NEXT: s_lshr_b32 s46, s9, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 46
+; SI-NEXT: v_writelane_b32 v22, s46, 42
; SI-NEXT: s_lshr_b32 s46, s9, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 47
+; SI-NEXT: v_writelane_b32 v22, s46, 43
; SI-NEXT: s_lshr_b32 s46, s9, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 48
+; SI-NEXT: v_writelane_b32 v22, s46, 44
; SI-NEXT: s_lshr_b32 s46, s11, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 49
+; SI-NEXT: v_writelane_b32 v22, s46, 45
; SI-NEXT: s_lshr_b32 s46, s11, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 50
+; SI-NEXT: v_writelane_b32 v22, s46, 46
; SI-NEXT: s_lshr_b32 s46, s11, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 51
+; SI-NEXT: v_writelane_b32 v22, s46, 47
; SI-NEXT: s_lshr_b32 s46, s13, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 52
+; SI-NEXT: v_writelane_b32 v22, s46, 48
; SI-NEXT: s_lshr_b32 s46, s13, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 53
+; SI-NEXT: v_writelane_b32 v22, s46, 49
; SI-NEXT: s_lshr_b32 s46, s13, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 54
+; SI-NEXT: v_writelane_b32 v22, s46, 50
; SI-NEXT: s_lshr_b32 s46, s15, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 55
+; SI-NEXT: v_writelane_b32 v22, s46, 51
; SI-NEXT: s_lshr_b32 s46, s15, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 56
+; SI-NEXT: v_writelane_b32 v22, s46, 52
; SI-NEXT: s_lshr_b32 s46, s15, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 57
+; SI-NEXT: v_writelane_b32 v22, s46, 53
; SI-NEXT: s_lshr_b32 s46, s41, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s46, 54
; SI-NEXT: s_lshr_b32 s46, s41, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 59
+; SI-NEXT: v_writelane_b32 v22, s46, 55
; SI-NEXT: s_lshr_b32 s46, s41, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 60
+; SI-NEXT: v_writelane_b32 v22, s46, 56
; SI-NEXT: s_lshr_b32 s46, s43, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 61
+; SI-NEXT: v_writelane_b32 v22, s46, 57
; SI-NEXT: s_lshr_b32 s46, s43, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 62
+; SI-NEXT: v_writelane_b32 v22, s46, 58
; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 63
+; SI-NEXT: v_writelane_b32 v22, s46, 59
; SI-NEXT: s_lshr_b32 s46, s45, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 0
+; SI-NEXT: v_writelane_b32 v22, s46, 60
; SI-NEXT: s_lshr_b32 s46, s45, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 1
+; SI-NEXT: v_writelane_b32 v22, s46, 61
; SI-NEXT: s_lshr_b32 s46, s45, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 2
+; SI-NEXT: v_writelane_b32 v22, s46, 62
; SI-NEXT: s_lshr_b32 s46, s29, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 3
+; SI-NEXT: v_writelane_b32 v22, s46, 63
; SI-NEXT: s_lshr_b32 s46, s29, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 4
+; SI-NEXT: v_writelane_b32 v21, s46, 0
; SI-NEXT: s_lshr_b32 s46, s29, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 5
+; SI-NEXT: v_writelane_b32 v21, s46, 1
; SI-NEXT: s_lshr_b32 s46, s27, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 6
+; SI-NEXT: v_writelane_b32 v21, s46, 2
; SI-NEXT: s_lshr_b32 s46, s27, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 7
+; SI-NEXT: v_writelane_b32 v21, s46, 3
; SI-NEXT: s_lshr_b32 s46, s27, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 4
; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 9
+; SI-NEXT: v_writelane_b32 v21, s46, 5
; SI-NEXT: s_lshr_b32 s46, s25, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 10
+; SI-NEXT: v_writelane_b32 v21, s46, 6
; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 11
+; SI-NEXT: v_writelane_b32 v21, s46, 7
; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 12
+; SI-NEXT: v_writelane_b32 v21, s46, 8
; SI-NEXT: s_lshr_b32 s46, s23, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: v_writelane_b32 v21, s46, 9
; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: v_writelane_b32 v21, s46, 10
; SI-NEXT: s_lshr_b32 s46, s21, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: v_writelane_b32 v21, s46, 11
; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 12
; SI-NEXT: s_lshr_b32 s46, s21, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s19, 24
+; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: s_lshr_b32 s46, s19, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 16
+; SI-NEXT: s_lshr_b32 s46, s17, 24
; SI-NEXT: v_writelane_b32 v21, s46, 17
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 36
-; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 34
; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s46, 32
; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 30
; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 28
; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
; SI-NEXT: v_writelane_b32 v22, s46, 26
; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; SI-NEXT: v_writelane_b32 v22, s46, 24
; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: v_writelane_b32 v22, s46, 22
; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
; SI-NEXT: v_writelane_b32 v22, s46, 20
; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; SI-NEXT: v_writelane_b32 v22, s46, 18
; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: v_writelane_b32 v22, s46, 16
; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: v_writelane_b32 v22, s46, 14
; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; SI-NEXT: v_writelane_b32 v22, s46, 12
; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: v_writelane_b32 v22, s46, 10
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
; SI-NEXT: v_writelane_b32 v22, s46, 8
; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
; SI-NEXT: v_writelane_b32 v22, s46, 2
; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
; SI-NEXT: v_writelane_b32 v22, s46, 0
-; SI-NEXT: s_lshr_b32 s49, s19, 24
-; SI-NEXT: s_lshr_b32 s48, s19, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 8
-; SI-NEXT: s_lshr_b32 s51, s17, 24
-; SI-NEXT: s_lshr_b32 s52, s17, 16
-; SI-NEXT: s_lshr_b32 s53, s17, 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s49, s17, 16
+; SI-NEXT: s_lshr_b32 s48, s17, 8
+; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, s47, 1
+; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[64:65], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8
@@ -77938,156 +77599,156 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_add_u32 s16, s16, 3
; SI-NEXT: s_addc_u32 s17, s17, 0
; SI-NEXT: s_lshr_b32 s46, s5, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 40
+; SI-NEXT: v_writelane_b32 v22, s46, 36
; SI-NEXT: s_lshr_b32 s46, s5, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 41
+; SI-NEXT: v_writelane_b32 v22, s46, 37
; SI-NEXT: s_lshr_b32 s46, s5, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 42
+; SI-NEXT: v_writelane_b32 v22, s46, 38
; SI-NEXT: s_lshr_b32 s46, s7, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 43
+; SI-NEXT: v_writelane_b32 v22, s46, 39
; SI-NEXT: s_lshr_b32 s46, s7, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 44
+; SI-NEXT: v_writelane_b32 v22, s46, 40
; SI-NEXT: s_lshr_b32 s46, s7, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 45
+; SI-NEXT: v_writelane_b32 v22, s46, 41
; SI-NEXT: s_lshr_b32 s46, s9, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 46
+; SI-NEXT: v_writelane_b32 v22, s46, 42
; SI-NEXT: s_lshr_b32 s46, s9, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 47
+; SI-NEXT: v_writelane_b32 v22, s46, 43
; SI-NEXT: s_lshr_b32 s46, s9, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 48
+; SI-NEXT: v_writelane_b32 v22, s46, 44
; SI-NEXT: s_lshr_b32 s46, s11, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 49
+; SI-NEXT: v_writelane_b32 v22, s46, 45
; SI-NEXT: s_lshr_b32 s46, s11, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 50
+; SI-NEXT: v_writelane_b32 v22, s46, 46
; SI-NEXT: s_lshr_b32 s46, s11, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 51
+; SI-NEXT: v_writelane_b32 v22, s46, 47
; SI-NEXT: s_lshr_b32 s46, s13, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 52
+; SI-NEXT: v_writelane_b32 v22, s46, 48
; SI-NEXT: s_lshr_b32 s46, s13, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 53
+; SI-NEXT: v_writelane_b32 v22, s46, 49
; SI-NEXT: s_lshr_b32 s46, s13, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 54
+; SI-NEXT: v_writelane_b32 v22, s46, 50
; SI-NEXT: s_lshr_b32 s46, s15, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 55
+; SI-NEXT: v_writelane_b32 v22, s46, 51
; SI-NEXT: s_lshr_b32 s46, s15, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 56
+; SI-NEXT: v_writelane_b32 v22, s46, 52
; SI-NEXT: s_lshr_b32 s46, s15, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 57
+; SI-NEXT: v_writelane_b32 v22, s46, 53
; SI-NEXT: s_lshr_b32 s46, s41, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 58
+; SI-NEXT: v_writelane_b32 v22, s46, 54
; SI-NEXT: s_lshr_b32 s46, s41, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 59
+; SI-NEXT: v_writelane_b32 v22, s46, 55
; SI-NEXT: s_lshr_b32 s46, s41, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 60
+; SI-NEXT: v_writelane_b32 v22, s46, 56
; SI-NEXT: s_lshr_b32 s46, s43, 24
-; SI-NEXT: v_writelane_b32 v22, s46, 61
+; SI-NEXT: v_writelane_b32 v22, s46, 57
; SI-NEXT: s_lshr_b32 s46, s43, 16
-; SI-NEXT: v_writelane_b32 v22, s46, 62
+; SI-NEXT: v_writelane_b32 v22, s46, 58
; SI-NEXT: s_lshr_b32 s46, s43, 8
-; SI-NEXT: v_writelane_b32 v22, s46, 63
+; SI-NEXT: v_writelane_b32 v22, s46, 59
; SI-NEXT: s_lshr_b32 s46, s45, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 0
+; SI-NEXT: v_writelane_b32 v22, s46, 60
; SI-NEXT: s_lshr_b32 s46, s45, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 1
+; SI-NEXT: v_writelane_b32 v22, s46, 61
; SI-NEXT: s_lshr_b32 s46, s45, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 2
+; SI-NEXT: v_writelane_b32 v22, s46, 62
; SI-NEXT: s_lshr_b32 s46, s29, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 3
+; SI-NEXT: v_writelane_b32 v22, s46, 63
; SI-NEXT: s_lshr_b32 s46, s29, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 4
+; SI-NEXT: v_writelane_b32 v21, s46, 0
; SI-NEXT: s_lshr_b32 s46, s29, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 5
+; SI-NEXT: v_writelane_b32 v21, s46, 1
; SI-NEXT: s_lshr_b32 s46, s27, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 6
+; SI-NEXT: v_writelane_b32 v21, s46, 2
; SI-NEXT: s_lshr_b32 s46, s27, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 7
+; SI-NEXT: v_writelane_b32 v21, s46, 3
; SI-NEXT: s_lshr_b32 s46, s27, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 4
; SI-NEXT: s_lshr_b32 s46, s25, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 9
+; SI-NEXT: v_writelane_b32 v21, s46, 5
; SI-NEXT: s_lshr_b32 s46, s25, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 10
+; SI-NEXT: v_writelane_b32 v21, s46, 6
; SI-NEXT: s_lshr_b32 s46, s25, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 11
+; SI-NEXT: v_writelane_b32 v21, s46, 7
; SI-NEXT: s_lshr_b32 s46, s23, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 12
+; SI-NEXT: v_writelane_b32 v21, s46, 8
; SI-NEXT: s_lshr_b32 s46, s23, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: v_writelane_b32 v21, s46, 9
; SI-NEXT: s_lshr_b32 s46, s23, 8
-; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: v_writelane_b32 v21, s46, 10
; SI-NEXT: s_lshr_b32 s46, s21, 24
-; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: v_writelane_b32 v21, s46, 11
; SI-NEXT: s_lshr_b32 s46, s21, 16
-; SI-NEXT: v_writelane_b32 v21, s46, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 12
; SI-NEXT: s_lshr_b32 s46, s21, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 13
+; SI-NEXT: s_lshr_b32 s46, s19, 24
+; SI-NEXT: v_writelane_b32 v21, s46, 14
+; SI-NEXT: s_lshr_b32 s46, s19, 16
+; SI-NEXT: v_writelane_b32 v21, s46, 15
+; SI-NEXT: s_lshr_b32 s46, s19, 8
+; SI-NEXT: v_writelane_b32 v21, s46, 16
+; SI-NEXT: s_lshr_b32 s46, s17, 24
; SI-NEXT: v_writelane_b32 v21, s46, 17
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v22, s46, 38
-; SI-NEXT: v_writelane_b32 v22, s47, 39
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
-; SI-NEXT: v_writelane_b32 v22, s46, 36
-; SI-NEXT: v_writelane_b32 v22, s47, 37
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 34
; SI-NEXT: v_writelane_b32 v22, s47, 35
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, s46, 32
; SI-NEXT: v_writelane_b32 v22, s47, 33
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
; SI-NEXT: v_writelane_b32 v22, s46, 30
; SI-NEXT: v_writelane_b32 v22, s47, 31
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 16
; SI-NEXT: v_writelane_b32 v22, s46, 28
; SI-NEXT: v_writelane_b32 v22, s47, 29
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 8
; SI-NEXT: v_writelane_b32 v22, s46, 26
; SI-NEXT: v_writelane_b32 v22, s47, 27
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 24
; SI-NEXT: v_writelane_b32 v22, s46, 24
; SI-NEXT: v_writelane_b32 v22, s47, 25
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT: v_writelane_b32 v22, s46, 22
; SI-NEXT: v_writelane_b32 v22, s47, 23
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 8
; SI-NEXT: v_writelane_b32 v22, s46, 20
; SI-NEXT: v_writelane_b32 v22, s47, 21
-; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 24
; SI-NEXT: v_writelane_b32 v22, s46, 18
; SI-NEXT: v_writelane_b32 v22, s47, 19
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 16
; SI-NEXT: v_writelane_b32 v22, s46, 16
; SI-NEXT: v_writelane_b32 v22, s47, 17
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: v_writelane_b32 v22, s46, 14
; SI-NEXT: v_writelane_b32 v22, s47, 15
-; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 24
; SI-NEXT: v_writelane_b32 v22, s46, 12
; SI-NEXT: v_writelane_b32 v22, s47, 13
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT: v_writelane_b32 v22, s46, 10
; SI-NEXT: v_writelane_b32 v22, s47, 11
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[12:13], 8
; SI-NEXT: v_writelane_b32 v22, s46, 8
; SI-NEXT: v_writelane_b32 v22, s47, 9
-; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 24
; SI-NEXT: v_writelane_b32 v22, s46, 6
; SI-NEXT: v_writelane_b32 v22, s47, 7
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 16
; SI-NEXT: v_writelane_b32 v22, s46, 4
; SI-NEXT: v_writelane_b32 v22, s47, 5
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[46:47], s[14:15], 8
; SI-NEXT: v_writelane_b32 v22, s46, 2
; SI-NEXT: v_writelane_b32 v22, s47, 3
-; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[40:41], 24
; SI-NEXT: v_writelane_b32 v22, s46, 0
-; SI-NEXT: s_lshr_b32 s49, s19, 24
-; SI-NEXT: s_lshr_b32 s48, s19, 16
-; SI-NEXT: s_lshr_b32 s50, s19, 8
-; SI-NEXT: s_lshr_b32 s51, s17, 24
-; SI-NEXT: s_lshr_b32 s52, s17, 16
-; SI-NEXT: s_lshr_b32 s53, s17, 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[4:5], 16
+; SI-NEXT: s_lshr_b32 s49, s17, 16
+; SI-NEXT: s_lshr_b32 s48, s17, 8
+; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, s47, 1
+; SI-NEXT: s_lshr_b64 s[52:53], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[54:55], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[64:65], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[66:67], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[68:69], s[42:43], 8
@@ -78127,11 +77788,12 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s16, s16, s47
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s17, 0xff
-; SI-NEXT: s_lshl_b32 s17, s53, 8
+; SI-NEXT: s_lshl_b32 s17, s48, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s52, 0xff
+; SI-NEXT: s_and_b32 s17, s49, 0xff
+; SI-NEXT: v_readlane_b32 s47, v21, 17
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s47, s51, 24
+; SI-NEXT: s_lshl_b32 s47, s47, 24
; SI-NEXT: s_or_b32 s17, s47, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -78145,13 +77807,16 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v21, 16
; SI-NEXT: v_mov_b32_e32 v3, s16
; SI-NEXT: s_and_b32 s16, s19, 0xff
-; SI-NEXT: s_lshl_b32 s17, s50, 8
+; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s48, 0xff
+; SI-NEXT: v_readlane_b32 s17, v21, 15
+; SI-NEXT: s_and_b32 s17, s17, 0xff
+; SI-NEXT: v_readlane_b32 s18, v21, 14
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s49, 24
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -78165,14 +77830,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 17
+; SI-NEXT: v_readlane_b32 s17, v21, 13
; SI-NEXT: v_mov_b32_e32 v5, s16
; SI-NEXT: s_and_b32 s16, s21, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 16
+; SI-NEXT: v_readlane_b32 s17, v21, 12
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 15
+; SI-NEXT: v_readlane_b32 s18, v21, 11
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -78188,14 +77853,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 14
+; SI-NEXT: v_readlane_b32 s17, v21, 10
; SI-NEXT: v_mov_b32_e32 v7, s16
; SI-NEXT: s_and_b32 s16, s23, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 13
+; SI-NEXT: v_readlane_b32 s17, v21, 9
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 12
+; SI-NEXT: v_readlane_b32 s18, v21, 8
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -78211,14 +77876,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 11
+; SI-NEXT: v_readlane_b32 s17, v21, 7
; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s25, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 10
+; SI-NEXT: v_readlane_b32 s17, v21, 6
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 9
+; SI-NEXT: v_readlane_b32 s18, v21, 5
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -78234,14 +77899,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 8
+; SI-NEXT: v_readlane_b32 s17, v21, 4
; SI-NEXT: v_mov_b32_e32 v11, s16
; SI-NEXT: s_and_b32 s16, s27, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 7
+; SI-NEXT: v_readlane_b32 s17, v21, 3
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 6
+; SI-NEXT: v_readlane_b32 s18, v21, 2
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -78257,14 +77922,14 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 5
+; SI-NEXT: v_readlane_b32 s17, v21, 1
; SI-NEXT: v_mov_b32_e32 v13, s16
; SI-NEXT: s_and_b32 s16, s29, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 4
+; SI-NEXT: v_readlane_b32 s17, v21, 0
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 3
+; SI-NEXT: v_readlane_b32 s18, v22, 63
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -78280,323 +77945,288 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 2
+; SI-NEXT: v_readlane_b32 s17, v22, 62
; SI-NEXT: v_mov_b32_e32 v15, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v21, 1
+; SI-NEXT: v_readlane_b32 s17, v22, 61
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v21, 0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
+; SI-NEXT: v_readlane_b32 s18, v22, 60
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: v_mov_b32_e32 v16, s16
; SI-NEXT: s_lshl_b32 s16, s68, 8
; SI-NEXT: s_and_b32 s17, s42, 0xff
-; SI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s66, 0xff
-; SI-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_lshl_b32 s18, s64, 24
-; SI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 63
-; SI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_readlane_b32 s17, v22, 59
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 62
-; SI-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
+; SI-NEXT: v_readlane_b32 s17, v22, 58
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 61
-; SI-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
+; SI-NEXT: v_readlane_b32 s18, v22, 57
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
-; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_readlane_b32 s18, v22, 0
-; SI-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 60, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_readlane_b32 s19, v22, 1
-; SI-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0
+; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_lshl_b32 s17, s18, 8
-; SI-NEXT: v_readlane_b32 s18, v22, 2
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: v_readlane_b32 s19, v22, 3
+; SI-NEXT: s_lshl_b32 s17, s54, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 4
+; SI-NEXT: s_and_b32 s17, s52, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 0
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 60
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s17, v22, 56
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 59
+; SI-NEXT: v_readlane_b32 s17, v22, 55
; SI-NEXT: s_and_b32 s17, s17, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 58
+; SI-NEXT: v_readlane_b32 s18, v22, 54
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 6
+; SI-NEXT: v_mov_b32_e32 v1, s16
+; SI-NEXT: v_readlane_b32 s16, v22, 2
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s17, v22, 7
+; SI-NEXT: v_readlane_b32 s17, v22, 3
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: v_readlane_b32 s19, v22, 5
+; SI-NEXT: v_readlane_b32 s19, v22, 1
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: v_readlane_b32 s16, v22, 8
-; SI-NEXT: v_readlane_b32 s17, v22, 9
+; SI-NEXT: v_readlane_b32 s16, v22, 4
+; SI-NEXT: v_readlane_b32 s17, v22, 5
; SI-NEXT: s_and_b32 s16, s16, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 10
+; SI-NEXT: v_readlane_b32 s18, v22, 6
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x4c, v0
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
+; SI-NEXT: v_mov_b32_e32 v1, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 57
+; SI-NEXT: v_readlane_b32 s15, v22, 53
; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: v_readlane_b32 s15, v22, 56
+; SI-NEXT: v_readlane_b32 s15, v22, 52
; SI-NEXT: s_and_b32 s15, s15, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 55
+; SI-NEXT: v_readlane_b32 s16, v22, 51
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 12
+; SI-NEXT: v_mov_b32_e32 v1, s14
+; SI-NEXT: v_readlane_b32 s14, v22, 8
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 13
+; SI-NEXT: v_readlane_b32 s15, v22, 9
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v22, 14
-; SI-NEXT: v_readlane_b32 s15, v22, 15
+; SI-NEXT: v_readlane_b32 s14, v22, 10
+; SI-NEXT: v_readlane_b32 s15, v22, 11
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 16
+; SI-NEXT: v_readlane_b32 s16, v22, 12
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 54
+; SI-NEXT: v_readlane_b32 s13, v22, 50
; SI-NEXT: s_lshl_b32 s13, s13, 8
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: v_readlane_b32 s13, v22, 53
+; SI-NEXT: v_readlane_b32 s13, v22, 49
; SI-NEXT: s_and_b32 s13, s13, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 52
+; SI-NEXT: v_readlane_b32 s14, v22, 48
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 18
+; SI-NEXT: v_mov_b32_e32 v1, s12
+; SI-NEXT: v_readlane_b32 s12, v22, 14
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 19
+; SI-NEXT: v_readlane_b32 s13, v22, 15
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v22, 20
-; SI-NEXT: v_readlane_b32 s13, v22, 21
+; SI-NEXT: v_readlane_b32 s12, v22, 16
+; SI-NEXT: v_readlane_b32 s13, v22, 17
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 22
+; SI-NEXT: v_readlane_b32 s14, v22, 18
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x5c, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 51
+; SI-NEXT: v_readlane_b32 s11, v22, 47
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: v_readlane_b32 s11, v22, 50
+; SI-NEXT: v_readlane_b32 s11, v22, 46
; SI-NEXT: s_and_b32 s11, s11, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 49
+; SI-NEXT: v_readlane_b32 s12, v22, 45
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 24
+; SI-NEXT: v_mov_b32_e32 v1, s10
+; SI-NEXT: v_readlane_b32 s10, v22, 20
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 25
+; SI-NEXT: v_readlane_b32 s11, v22, 21
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v22, 26
-; SI-NEXT: v_readlane_b32 s11, v22, 27
+; SI-NEXT: v_readlane_b32 s10, v22, 22
+; SI-NEXT: v_readlane_b32 s11, v22, 23
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 28
+; SI-NEXT: v_readlane_b32 s12, v22, 24
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x64, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: v_readlane_b32 s9, v22, 48
+; SI-NEXT: v_readlane_b32 s9, v22, 44
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: v_readlane_b32 s9, v22, 47
+; SI-NEXT: v_readlane_b32 s9, v22, 43
; SI-NEXT: s_and_b32 s9, s9, 0xff
-; SI-NEXT: v_readlane_b32 s10, v22, 46
+; SI-NEXT: v_readlane_b32 s10, v22, 42
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 30
+; SI-NEXT: v_mov_b32_e32 v1, s8
+; SI-NEXT: v_readlane_b32 s8, v22, 26
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v22, 31
+; SI-NEXT: v_readlane_b32 s9, v22, 27
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v22, 32
-; SI-NEXT: v_readlane_b32 s9, v22, 33
+; SI-NEXT: v_readlane_b32 s8, v22, 28
+; SI-NEXT: v_readlane_b32 s9, v22, 29
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v22, 34
+; SI-NEXT: v_readlane_b32 s10, v22, 30
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 45
+; SI-NEXT: v_readlane_b32 s7, v22, 41
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: v_readlane_b32 s7, v22, 44
+; SI-NEXT: v_readlane_b32 s7, v22, 40
; SI-NEXT: s_and_b32 s7, s7, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 43
+; SI-NEXT: v_readlane_b32 s8, v22, 39
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
-; SI-NEXT: v_readlane_b32 s6, v22, 36
+; SI-NEXT: v_mov_b32_e32 v1, s6
+; SI-NEXT: v_readlane_b32 s6, v22, 32
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
-; SI-NEXT: v_readlane_b32 s7, v22, 37
+; SI-NEXT: v_readlane_b32 s7, v22, 33
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s54, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 38
+; SI-NEXT: s_and_b32 s6, s50, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 34
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x74, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: v_readlane_b32 s5, v22, 42
+; SI-NEXT: v_readlane_b32 s5, v22, 38
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: v_readlane_b32 s5, v22, 41
+; SI-NEXT: v_readlane_b32 s5, v22, 37
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: v_readlane_b32 s6, v22, 40
+; SI-NEXT: v_readlane_b32 s6, v22, 36
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
-; SI-NEXT: v_readlane_b32 s19, v22, 11
-; SI-NEXT: v_readlane_b32 s17, v22, 17
-; SI-NEXT: v_readlane_b32 s15, v22, 23
-; SI-NEXT: v_readlane_b32 s13, v22, 29
-; SI-NEXT: v_readlane_b32 s11, v22, 35
-; SI-NEXT: v_readlane_b32 s9, v22, 39
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s19, v22, 7
+; SI-NEXT: v_readlane_b32 s17, v22, 13
+; SI-NEXT: v_readlane_b32 s15, v22, 19
+; SI-NEXT: v_readlane_b32 s13, v22, 25
+; SI-NEXT: v_readlane_b32 s11, v22, 31
+; SI-NEXT: v_readlane_b32 s9, v22, 35
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
; SI-NEXT: v_readlane_b32 s98, v20, 32
@@ -78642,20 +78272,16 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: .LBB57_4:
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, s54, 0
+; SI-NEXT: v_writelane_b32 v22, s50, 0
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s55, 1
+; SI-NEXT: v_writelane_b32 v22, s51, 1
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr53
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr51
; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr49
@@ -78685,140 +78311,144 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr68
; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr64
+; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 2
+; SI-NEXT: v_writelane_b32 v22, s50, 2
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s55, 3
+; SI-NEXT: v_writelane_b32 v22, s51, 3
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 4
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 4
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s55, 5
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 5
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 6
-; SI-NEXT: v_writelane_b32 v22, s55, 7
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 6
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 7
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 8
-; SI-NEXT: v_writelane_b32 v22, s55, 9
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 8
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 10
-; SI-NEXT: v_writelane_b32 v22, s55, 11
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 9
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 12
-; SI-NEXT: v_writelane_b32 v22, s55, 13
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 10
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 11
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 14
-; SI-NEXT: v_writelane_b32 v22, s55, 15
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 12
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 16
-; SI-NEXT: v_writelane_b32 v22, s55, 17
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 13
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 18
-; SI-NEXT: v_writelane_b32 v22, s55, 19
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 14
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 15
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 20
-; SI-NEXT: v_writelane_b32 v22, s55, 21
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 16
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 22
-; SI-NEXT: v_writelane_b32 v22, s55, 23
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 17
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 24
-; SI-NEXT: v_writelane_b32 v22, s55, 25
-; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 18
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s51, 19
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 26
-; SI-NEXT: v_writelane_b32 v22, s55, 27
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 20
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 28
-; SI-NEXT: v_writelane_b32 v22, s55, 29
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s51, 21
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 30
-; SI-NEXT: v_writelane_b32 v22, s55, 31
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s50, 22
+; SI-NEXT: v_writelane_b32 v22, s51, 23
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 32
-; SI-NEXT: v_writelane_b32 v22, s55, 33
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s50, 24
+; SI-NEXT: v_writelane_b32 v22, s51, 25
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 34
-; SI-NEXT: v_writelane_b32 v22, s55, 35
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s50, 26
+; SI-NEXT: v_writelane_b32 v22, s51, 27
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 36
-; SI-NEXT: v_writelane_b32 v22, s55, 37
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s50, 28
+; SI-NEXT: v_writelane_b32 v22, s51, 29
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; kill: killed $sgpr46
; SI-NEXT: ; implicit-def: $sgpr46
-; SI-NEXT: v_writelane_b32 v22, s54, 38
-; SI-NEXT: v_writelane_b32 v22, s55, 39
-; SI-NEXT: ; implicit-def: $sgpr54
+; SI-NEXT: v_writelane_b32 v22, s50, 30
+; SI-NEXT: v_writelane_b32 v22, s51, 31
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 32
+; SI-NEXT: v_writelane_b32 v22, s51, 33
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; kill: killed $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: v_writelane_b32 v22, s50, 34
+; SI-NEXT: v_writelane_b32 v22, s51, 35
+; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: s_branch .LBB57_2
;
; VI-LABEL: bitcast_v16i64_to_v128i8_scalar:
@@ -78884,144 +78514,144 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_cbranch_scc0 .LBB57_4
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 1
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 6
+; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 7
+; VI-NEXT: v_writelane_b32 v33, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 9
+; VI-NEXT: v_writelane_b32 v33, s46, 7
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 10
+; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: v_writelane_b32 v33, s46, 9
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: v_writelane_b32 v33, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: v_writelane_b32 v33, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: v_writelane_b32 v33, s46, 17
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s22, 16
; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s56, 0
-; VI-NEXT: s_lshr_b32 s64, s29, 8
+; VI-NEXT: s_lshr_b32 s53, s29, 8
; VI-NEXT: s_lshr_b32 s50, s28, 8
; VI-NEXT: s_lshr_b32 s86, s27, 8
; VI-NEXT: s_lshr_b32 s51, s26, 8
-; VI-NEXT: s_lshr_b32 s66, s25, 8
+; VI-NEXT: s_lshr_b32 s52, s25, 8
; VI-NEXT: s_lshr_b32 s54, s24, 8
-; VI-NEXT: s_lshr_b32 s71, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s52, s23, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 8
; VI-NEXT: s_lshr_b32 s55, s22, 8
; VI-NEXT: s_lshr_b32 s68, s21, 24
-; VI-NEXT: s_lshr_b32 s65, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s71, s21, 8
; VI-NEXT: s_lshr_b32 s84, s20, 16
; VI-NEXT: s_lshr_b32 s69, s20, 8
; VI-NEXT: s_lshr_b32 s80, s19, 24
; VI-NEXT: s_lshr_b32 s87, s19, 16
-; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: s_lshr_b32 s67, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 16
-; VI-NEXT: s_lshr_b32 s47, s18, 8
+; VI-NEXT: s_lshr_b32 s82, s18, 8
; VI-NEXT: s_lshr_b32 s83, s17, 24
; VI-NEXT: s_lshr_b32 s85, s17, 16
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s53, s16, 16
-; VI-NEXT: s_lshr_b32 s82, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s57, 1
+; VI-NEXT: s_lshr_b32 s65, s17, 8
+; VI-NEXT: s_lshr_b32 s64, s16, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 8
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -79072,144 +78702,144 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_add_u32 s4, s4, 3
; VI-NEXT: s_addc_u32 s5, s5, 0
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 2
+; VI-NEXT: v_writelane_b32 v33, s46, 0
; VI-NEXT: s_lshr_b32 s46, s5, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 3
+; VI-NEXT: v_writelane_b32 v33, s46, 1
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 4
+; VI-NEXT: v_writelane_b32 v33, s46, 2
; VI-NEXT: s_lshr_b32 s46, s4, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 5
+; VI-NEXT: v_writelane_b32 v33, s46, 3
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 6
+; VI-NEXT: v_writelane_b32 v33, s46, 4
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 7
+; VI-NEXT: v_writelane_b32 v33, s46, 5
; VI-NEXT: s_lshr_b32 s46, s7, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 6
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 9
+; VI-NEXT: v_writelane_b32 v33, s46, 7
; VI-NEXT: s_lshr_b32 s46, s6, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 10
+; VI-NEXT: v_writelane_b32 v33, s46, 8
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 11
+; VI-NEXT: v_writelane_b32 v33, s46, 9
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 12
+; VI-NEXT: v_writelane_b32 v33, s46, 10
; VI-NEXT: s_lshr_b32 s46, s9, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 13
+; VI-NEXT: v_writelane_b32 v33, s46, 11
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 14
+; VI-NEXT: v_writelane_b32 v33, s46, 12
; VI-NEXT: s_lshr_b32 s46, s8, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 15
+; VI-NEXT: v_writelane_b32 v33, s46, 13
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s11, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s46, 16
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: v_writelane_b32 v33, s46, 17
; VI-NEXT: s_lshr_b32 s46, s10, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 18
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s13, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s12, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s15, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s15, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s14, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s41, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s41, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s41, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s40, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s40, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s43, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s43, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s43, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s42, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s42, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s45, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s45, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s44, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s44, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s29, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s29, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s28, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s27, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s27, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s26, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: v_writelane_b32 v33, s46, 53
+; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 54
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 55
; VI-NEXT: s_lshr_b32 s46, s22, 16
; VI-NEXT: v_writelane_b32 v33, s46, 56
; VI-NEXT: s_lshr_b32 s46, s21, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b64 s[56:57], s[4:5], 24
-; VI-NEXT: v_writelane_b32 v33, s56, 0
-; VI-NEXT: s_lshr_b32 s64, s29, 8
+; VI-NEXT: s_lshr_b32 s53, s29, 8
; VI-NEXT: s_lshr_b32 s50, s28, 8
; VI-NEXT: s_lshr_b32 s86, s27, 8
; VI-NEXT: s_lshr_b32 s51, s26, 8
-; VI-NEXT: s_lshr_b32 s66, s25, 8
+; VI-NEXT: s_lshr_b32 s52, s25, 8
; VI-NEXT: s_lshr_b32 s54, s24, 8
-; VI-NEXT: s_lshr_b32 s71, s23, 24
-; VI-NEXT: s_lshr_b32 s70, s23, 16
-; VI-NEXT: s_lshr_b32 s52, s23, 8
+; VI-NEXT: s_lshr_b32 s66, s23, 8
; VI-NEXT: s_lshr_b32 s55, s22, 8
; VI-NEXT: s_lshr_b32 s68, s21, 24
-; VI-NEXT: s_lshr_b32 s65, s21, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 57
+; VI-NEXT: s_lshr_b32 s71, s21, 8
; VI-NEXT: s_lshr_b32 s84, s20, 16
; VI-NEXT: s_lshr_b32 s69, s20, 8
; VI-NEXT: s_lshr_b32 s80, s19, 24
; VI-NEXT: s_lshr_b32 s87, s19, 16
-; VI-NEXT: s_lshr_b32 s46, s19, 8
+; VI-NEXT: s_lshr_b32 s67, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 16
-; VI-NEXT: s_lshr_b32 s47, s18, 8
+; VI-NEXT: s_lshr_b32 s82, s18, 8
; VI-NEXT: s_lshr_b32 s83, s17, 24
; VI-NEXT: s_lshr_b32 s85, s17, 16
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s53, s16, 16
-; VI-NEXT: s_lshr_b32 s82, s16, 8
-; VI-NEXT: v_writelane_b32 v33, s57, 1
+; VI-NEXT: s_lshr_b32 s65, s17, 8
+; VI-NEXT: s_lshr_b32 s64, s16, 16
+; VI-NEXT: s_lshr_b32 s70, s16, 8
+; VI-NEXT: s_lshr_b64 s[46:47], s[4:5], 24
; VI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
; VI-NEXT: s_lshr_b64 s[58:59], s[8:9], 24
; VI-NEXT: s_lshr_b64 s[60:61], s[10:11], 24
@@ -79226,321 +78856,290 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_lshr_b64 s[38:39], s[18:19], 24
; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24
; VI-NEXT: .LBB57_3: ; %end
-; VI-NEXT: v_mov_b32_e32 v9, s48
+; VI-NEXT: v_mov_b32_e32 v10, s48
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
-; VI-NEXT: v_mov_b32_e32 v2, s82
-; VI-NEXT: v_perm_b32 v9, s53, v9, v1
+; VI-NEXT: v_mov_b32_e32 v2, s70
+; VI-NEXT: v_perm_b32 v10, s64, v10, v1
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
; VI-NEXT: v_mov_b32_e32 v24, s83
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_mov_b32_e32 v4, s67
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_mov_b32_e32 v4, s65
; VI-NEXT: v_perm_b32 v24, s85, v24, v1
-; VI-NEXT: v_or_b32_e32 v3, v3, v9
+; VI-NEXT: v_or_b32_e32 v3, v3, v10
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
; VI-NEXT: v_mov_b32_e32 v13, s38
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
-; VI-NEXT: v_mov_b32_e32 v4, s47
+; VI-NEXT: v_mov_b32_e32 v4, s82
; VI-NEXT: v_perm_b32 v13, s81, v13, v1
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
; VI-NEXT: v_mov_b32_e32 v25, s80
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_mov_b32_e32 v6, s46
+; VI-NEXT: v_mov_b32_e32 v6, s67
; VI-NEXT: v_perm_b32 v25, s87, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
; VI-NEXT: v_perm_b32 v4, s19, v6, v1
-; VI-NEXT: v_mov_b32_e32 v17, s36
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_mov_b32_e32 v16, s36
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; VI-NEXT: v_mov_b32_e32 v6, s69
-; VI-NEXT: v_perm_b32 v17, s84, v17, v1
+; VI-NEXT: v_perm_b32 v16, s84, v16, v1
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 12, v0
; VI-NEXT: v_perm_b32 v7, s20, v6, v1
; VI-NEXT: v_mov_b32_e32 v26, s68
; VI-NEXT: v_readlane_b32 s16, v33, 57
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_mov_b32_e32 v8, s65
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; VI-NEXT: v_mov_b32_e32 v8, s71
; VI-NEXT: v_perm_b32 v26, s16, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 16, v0
; VI-NEXT: v_perm_b32 v6, s21, v8, v1
; VI-NEXT: v_mov_b32_e32 v19, s34
; VI-NEXT: v_readlane_b32 s16, v33, 56
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
; VI-NEXT: v_mov_b32_e32 v8, s55
; VI-NEXT: v_perm_b32 v19, s16, v19, v1
+; VI-NEXT: v_readlane_b32 s16, v33, 54
; VI-NEXT: v_or_b32_e32 v2, v6, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 20, v0
-; VI-NEXT: v_perm_b32 v10, s22, v8, v1
-; VI-NEXT: v_mov_b32_e32 v27, s71
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v9, s22, v8, v1
+; VI-NEXT: v_mov_b32_e32 v27, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 55
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; VI-NEXT: v_mov_b32_e32 v11, s52
-; VI-NEXT: v_perm_b32 v27, s70, v27, v1
-; VI-NEXT: v_or_b32_e32 v2, v10, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 24, v0
+; VI-NEXT: v_mov_b32_e32 v11, s66
+; VI-NEXT: v_perm_b32 v27, s16, v27, v1
+; VI-NEXT: v_or_b32_e32 v2, v9, v2
; VI-NEXT: v_perm_b32 v8, s23, v11, v1
; VI-NEXT: v_mov_b32_e32 v20, s30
-; VI-NEXT: v_readlane_b32 s16, v33, 55
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 53
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
; VI-NEXT: v_mov_b32_e32 v11, s54
; VI-NEXT: v_perm_b32 v20, s16, v20, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 53
+; VI-NEXT: v_readlane_b32 s16, v33, 51
; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
; VI-NEXT: v_perm_b32 v12, s24, v11, v1
; VI-NEXT: v_mov_b32_e32 v28, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 54
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 52
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_mov_b32_e32 v14, s66
+; VI-NEXT: v_mov_b32_e32 v14, s52
; VI-NEXT: v_perm_b32 v28, s16, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 32, v0
; VI-NEXT: v_perm_b32 v11, s25, v14, v1
; VI-NEXT: v_mov_b32_e32 v21, s90
-; VI-NEXT: v_readlane_b32 s16, v33, 52
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
; VI-NEXT: v_mov_b32_e32 v14, s51
; VI-NEXT: v_perm_b32 v21, s16, v21, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 50
+; VI-NEXT: v_readlane_b32 s16, v33, 48
; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 36, v0
; VI-NEXT: v_perm_b32 v15, s26, v14, v1
; VI-NEXT: v_mov_b32_e32 v29, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 51
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 49
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_mov_b32_e32 v16, s86
+; VI-NEXT: v_mov_b32_e32 v17, s86
; VI-NEXT: v_perm_b32 v29, s16, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v0
-; VI-NEXT: v_perm_b32 v14, s27, v16, v1
+; VI-NEXT: v_perm_b32 v14, s27, v17, v1
; VI-NEXT: v_mov_b32_e32 v22, s88
-; VI-NEXT: v_readlane_b32 s16, v33, 49
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 47
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_mov_b32_e32 v16, s50
+; VI-NEXT: v_mov_b32_e32 v17, s50
; VI-NEXT: v_perm_b32 v22, s16, v22, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 47
+; VI-NEXT: v_readlane_b32 s16, v33, 45
; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 44, v0
-; VI-NEXT: v_perm_b32 v18, s28, v16, v1
+; VI-NEXT: v_perm_b32 v18, s28, v17, v1
; VI-NEXT: v_mov_b32_e32 v30, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 48
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_mov_b32_e32 v23, s64
+; VI-NEXT: v_mov_b32_e32 v23, s53
; VI-NEXT: v_perm_b32 v30, s16, v30, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 46
+; VI-NEXT: v_readlane_b32 s16, v33, 44
; VI-NEXT: v_or_b32_e32 v2, v18, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 48, v0
-; VI-NEXT: v_perm_b32 v16, s29, v23, v1
+; VI-NEXT: v_perm_b32 v17, s29, v23, v1
; VI-NEXT: v_mov_b32_e32 v23, s78
; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 45
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
; VI-NEXT: v_perm_b32 v3, s16, v23, v1
-; VI-NEXT: v_or_b32_e32 v2, v16, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_or_b32_e32 v2, v17, v2
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 44
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 42
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 40
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 43
+; VI-NEXT: v_readlane_b32 s16, v33, 41
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 41
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 39
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v3, s76
-; VI-NEXT: v_readlane_b32 s16, v33, 40
+; VI-NEXT: v_readlane_b32 s16, v33, 38
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 39
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 37
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 35
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 38
+; VI-NEXT: v_readlane_b32 s16, v33, 36
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 36
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 34
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v3, s74
-; VI-NEXT: v_readlane_b32 s16, v33, 35
+; VI-NEXT: v_readlane_b32 s16, v33, 33
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 34
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 32
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_mov_b32_e32 v2, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 30
; VI-NEXT: v_mov_b32_e32 v3, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 33
+; VI-NEXT: v_readlane_b32 s16, v33, 31
; VI-NEXT: v_perm_b32 v3, s16, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0
-; VI-NEXT: v_readlane_b32 s16, v33, 31
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 29
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s72
-; VI-NEXT: v_readlane_b32 s14, v33, 30
+; VI-NEXT: v_readlane_b32 s14, v33, 28
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 29
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_readlane_b32 s14, v33, 27
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: v_mov_b32_e32 v2, s14
+; VI-NEXT: v_readlane_b32 s14, v33, 25
; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 28
+; VI-NEXT: v_readlane_b32 s14, v33, 26
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 26
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s14, v33, 24
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s62
-; VI-NEXT: v_readlane_b32 s12, v33, 25
+; VI-NEXT: v_readlane_b32 s12, v33, 23
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 24
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s12
; VI-NEXT: v_readlane_b32 s12, v33, 22
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: v_mov_b32_e32 v2, s12
+; VI-NEXT: v_readlane_b32 s12, v33, 20
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 23
+; VI-NEXT: v_readlane_b32 s12, v33, 21
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 21
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s12, v33, 19
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s60
-; VI-NEXT: v_readlane_b32 s10, v33, 20
+; VI-NEXT: v_readlane_b32 s10, v33, 18
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 19
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_readlane_b32 s10, v33, 17
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: v_mov_b32_e32 v2, s10
+; VI-NEXT: v_readlane_b32 s10, v33, 15
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 18
+; VI-NEXT: v_readlane_b32 s10, v33, 16
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 16
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s10, v33, 14
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s58
-; VI-NEXT: v_readlane_b32 s8, v33, 15
+; VI-NEXT: v_readlane_b32 s8, v33, 13
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 14
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s8
; VI-NEXT: v_readlane_b32 s8, v33, 12
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: v_mov_b32_e32 v2, s8
+; VI-NEXT: v_readlane_b32 s8, v33, 10
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 13
+; VI-NEXT: v_readlane_b32 s8, v33, 11
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 11
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s8, v33, 9
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s56
-; VI-NEXT: v_readlane_b32 s6, v33, 10
+; VI-NEXT: v_readlane_b32 s6, v33, 8
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 9
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_readlane_b32 s6, v33, 7
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: v_mov_b32_e32 v2, s6
+; VI-NEXT: v_readlane_b32 s6, v33, 5
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 8
+; VI-NEXT: v_readlane_b32 s6, v33, 6
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 6
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s6, v33, 4
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 0
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
-; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s4, v33, 5
+; VI-NEXT: v_mov_b32_e32 v3, s46
+; VI-NEXT: v_readlane_b32 s4, v33, 3
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0
-; VI-NEXT: v_readlane_b32 s4, v33, 4
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_readlane_b32 s4, v33, 2
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: v_mov_b32_e32 v2, s4
+; VI-NEXT: v_readlane_b32 s4, v33, 0
; VI-NEXT: v_mov_b32_e32 v3, s4
-; VI-NEXT: v_readlane_b32 s4, v33, 3
+; VI-NEXT: v_readlane_b32 s4, v33, 1
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
; VI-NEXT: v_perm_b32 v1, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: v_readlane_b32 s7, v33, 1
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
; VI-NEXT: v_readlane_b32 s86, v32, 28
@@ -79579,37 +79178,32 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
; VI-NEXT: .LBB57_4:
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: v_writelane_b32 v33, s70, 0
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr65
; VI-NEXT: ; implicit-def: $sgpr85
; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr47
+; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr67
; VI-NEXT: ; implicit-def: $sgpr87
; VI-NEXT: ; implicit-def: $sgpr80
; VI-NEXT: ; implicit-def: $sgpr69
; VI-NEXT: ; implicit-def: $sgpr84
-; VI-NEXT: ; implicit-def: $sgpr65
+; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr68
; VI-NEXT: ; implicit-def: $sgpr55
-; VI-NEXT: ; implicit-def: $sgpr52
-; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr66
+; VI-NEXT: ; implicit-def: $sgpr54
+; VI-NEXT: ; implicit-def: $sgpr52
; VI-NEXT: ; implicit-def: $sgpr51
; VI-NEXT: ; implicit-def: $sgpr86
; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr53
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
@@ -79624,115 +79218,120 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr62
; VI-NEXT: ; implicit-def: $sgpr60
; VI-NEXT: ; implicit-def: $sgpr58
-; VI-NEXT: v_writelane_b32 v33, s71, 1
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
-; VI-NEXT: ; implicit-def: $sgpr56
-; VI-NEXT: ; kill: killed $sgpr56
; VI-NEXT: ; implicit-def: $sgpr56
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
+; VI-NEXT: ; kill: killed $sgpr46
+; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: s_branch .LBB57_2
;
; GFX9-LABEL: bitcast_v16i64_to_v128i8_scalar:
@@ -105905,19 +105504,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
@@ -105925,15 +105524,15 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; kill: killed $vgpr36
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -105948,7 +105547,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v32, v31, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v32, v31, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -105999,118 +105598,118 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -106119,44 +105718,44 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 8
; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
-; SI-NEXT: v_alignbit_b32 v39, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 8
-; SI-NEXT: v_alignbit_b32 v52, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v54, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v40, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v42, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v44, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v32
+; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v44, v2, v1, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v8
@@ -106181,7 +105780,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v32, v31, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v32, v31, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -106234,127 +105833,127 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v22, v21, 8
+; SI-NEXT: v_add_f64 v[17:18], v[17:18], 1.0
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 24
-; SI-NEXT: v_add_f64 v[17:18], v[17:18], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v20, v19, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v33, v20, v19, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 24
; SI-NEXT: v_add_f64 v[15:16], v[15:16], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v18, v17, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 24
; SI-NEXT: v_add_f64 v[13:14], v[13:14], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v16, v15, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 24
; SI-NEXT: v_add_f64 v[11:12], v[11:12], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v14, v13, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 24
; SI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 16
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v12, v11, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 24
; SI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v10, v9, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v33, v8, v7, 8
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
@@ -106363,47 +105962,47 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
; SI-NEXT: v_add_f64 v[1:2], v[1:2], 1.0
; SI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
; SI-NEXT: v_add_f64 v[5:6], v[5:6], 1.0
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
+; SI-NEXT: v_alignbit_b32 v36, v20, v19, 8
; SI-NEXT: v_alignbit_b32 v37, v6, v5, 24
-; SI-NEXT: v_alignbit_b32 v39, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 8
-; SI-NEXT: v_alignbit_b32 v52, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v54, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v40, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v42, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v44, v2, v1, 16
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v32
+; SI-NEXT: v_alignbit_b32 v38, v6, v5, 16
+; SI-NEXT: v_alignbit_b32 v39, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v4, v3, 24
+; SI-NEXT: v_alignbit_b32 v52, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v53, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v41, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v42, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v44, v2, v1, 8
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v14
; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v14
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v40, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v8
@@ -106419,15 +106018,15 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v2
; SI-NEXT: .LBB72_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_lshlrev_b32_e32 v46, 8, v46
+; SI-NEXT: v_lshlrev_b32_e32 v44, 8, v44
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_and_b32_e32 v44, 0xff, v44
-; SI-NEXT: v_or_b32_e32 v1, v1, v46
-; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v44
-; SI-NEXT: v_lshlrev_b32_e32 v42, 24, v42
-; SI-NEXT: v_or_b32_e32 v42, v42, v44
+; SI-NEXT: v_and_b32_e32 v42, 0xff, v42
+; SI-NEXT: v_or_b32_e32 v1, v1, v44
+; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v42
+; SI-NEXT: v_lshlrev_b32_e32 v41, 24, v41
+; SI-NEXT: v_or_b32_e32 v41, v41, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v42
+; SI-NEXT: v_or_b32_e32 v1, v1, v41
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
@@ -106439,20 +106038,18 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v33, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v40
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v53
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v54
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v63
@@ -106463,20 +106060,18 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v49
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v39
; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v39
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v38
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v37
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v60
@@ -106487,12 +106082,11 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -106505,8 +106099,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
@@ -106517,12 +106110,11 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
@@ -106535,28 +106127,26 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v45
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v43
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v45
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v43
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v11
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -106565,28 +106155,26 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v54
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -106595,111 +106183,102 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v48
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v49
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v38
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xff, v17
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
@@ -106707,16 +106286,15 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
@@ -106725,34 +106303,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
@@ -106761,34 +106337,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
@@ -106797,34 +106371,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
@@ -106833,34 +106405,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
@@ -106869,34 +106439,32 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
@@ -106904,7 +106472,7 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -106913,24 +106481,24 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -107049,102 +106617,101 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; kill: killed $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; kill: killed $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr47
; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr51
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr63
-; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr62
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; kill: killed $vgpr36
; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr58
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; kill: killed $vgpr39
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
@@ -107153,178 +106720,177 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: s_cbranch_execz .LBB72_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v1
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
; VI-NEXT: .LBB72_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -107375,357 +106941,332 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[53:54], 24, v[9:10]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[3:4]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v32
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v1
; VI-NEXT: .LBB72_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v55, v55, v41, s4
-; VI-NEXT: v_perm_b32 v1, v1, v47, s4
-; VI-NEXT: v_perm_b32 v2, v2, v54, s4
-; VI-NEXT: v_lshlrev_b32_e32 v54, 16, v55
-; VI-NEXT: v_or_b32_e32 v1, v1, v54
+; VI-NEXT: v_perm_b32 v7, v7, v51, s4
+; VI-NEXT: v_perm_b32 v10, v10, v50, s4
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v36, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v52, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v11, v11, v37, s4
+; VI-NEXT: v_perm_b32 v8, v8, v38, s4
+; VI-NEXT: v_perm_b32 v38, v63, v53, s4
+; VI-NEXT: v_perm_b32 v55, v57, v41, s4
+; VI-NEXT: v_perm_b32 v1, v1, v58, s4
+; VI-NEXT: v_perm_b32 v2, v2, v56, s4
+; VI-NEXT: v_perm_b32 v35, v35, v40, s4
+; VI-NEXT: v_perm_b32 v4, v4, v47, s4
+; VI-NEXT: v_perm_b32 v39, v45, v39, s4
+; VI-NEXT: v_perm_b32 v5, v5, v46, s4
+; VI-NEXT: v_perm_b32 v6, v6, v34, s4
+; VI-NEXT: v_perm_b32 v34, v44, v54, s4
+; VI-NEXT: v_perm_b32 v9, v9, v43, s4
+; VI-NEXT: v_perm_b32 v12, v12, v61, s4
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v50, v62, v50, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v14, v14, v36, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v37, v59, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v36, v36, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v16, v16, v51, s4
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v51, v52, v51, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v17, v17, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v18, v18, v52, s4
+; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v52, v53, v52, s4
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v55
+; VI-NEXT: v_or_b32_e32 v1, v1, v53
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v48, v46, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v53, v40, s4
-; VI-NEXT: v_perm_b32 v2, v3, v45, s4
+; VI-NEXT: v_perm_b32 v1, v33, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v44, v38, s4
-; VI-NEXT: v_perm_b32 v1, v4, v34, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v52, v39, s4
-; VI-NEXT: v_perm_b32 v2, v5, v43, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v35
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v48, v60, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v62, v37, s4
-; VI-NEXT: v_perm_b32 v1, v6, v63, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v7, v51, s4
-; VI-NEXT: v_perm_b32 v1, v33, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v60, v59, s4
-; VI-NEXT: v_perm_b32 v1, v8, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v34
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v9, v50, s4
-; VI-NEXT: v_perm_b32 v1, v36, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v35, v49, s4
-; VI-NEXT: v_perm_b32 v1, v10, v58, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v38
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: v_perm_b32 v2, v11, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v21, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -107733,21 +107274,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v24, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -107755,21 +107294,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -107777,20 +107314,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v28, v1, s4
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v56, v2, s4
+; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -107798,21 +107334,19 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v29, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
@@ -107820,18 +107354,16 @@ define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v32, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -109637,9 +109169,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
@@ -109894,167 +109426,167 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_lshr_b64 s[38:39], s[16:17], 8
; SI-NEXT: s_cbranch_execnz .LBB73_4
; SI-NEXT: .LBB73_2: ; %cmp.true
-; SI-NEXT: v_add_f64 v[33:34], s[4:5], 1.0
-; SI-NEXT: v_add_f64 v[3:4], s[8:9], 1.0
-; SI-NEXT: v_lshr_b64 v[9:10], v[33:34], 24
-; SI-NEXT: v_add_f64 v[5:6], s[10:11], 1.0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[33:34], 16
-; SI-NEXT: v_add_f64 v[1:2], s[6:7], 1.0
-; SI-NEXT: v_add_f64 v[17:18], s[12:13], 1.0
-; SI-NEXT: v_add_f64 v[7:8], s[40:41], 1.0
-; SI-NEXT: v_lshr_b64 v[53:54], v[3:4], 16
-; SI-NEXT: v_add_f64 v[40:41], s[42:43], 1.0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[54:55], v[3:4], 8
-; SI-NEXT: v_lshr_b64 v[44:45], v[5:6], 8
-; SI-NEXT: v_add_f64 v[21:22], s[44:45], 1.0
-; SI-NEXT: v_readfirstlane_b32 s11, v6
-; SI-NEXT: v_readfirstlane_b32 s5, v34
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[33:34], 8
-; SI-NEXT: v_lshr_b64 v[34:35], v[1:2], 16
-; SI-NEXT: v_lshr_b64 v[11:12], v[5:6], 24
-; SI-NEXT: v_lshr_b64 v[49:50], v[5:6], 16
-; SI-NEXT: v_mov_b32_e32 v55, v5
-; SI-NEXT: v_lshr_b64 v[45:46], v[17:18], 24
-; SI-NEXT: v_lshr_b64 v[58:59], v[17:18], 16
-; SI-NEXT: v_lshr_b64 v[5:6], v[7:8], 24
-; SI-NEXT: v_readfirstlane_b32 s13, v18
-; SI-NEXT: v_lshr_b64 v[59:60], v[17:18], 8
-; SI-NEXT: v_mov_b32_e32 v35, v17
-; SI-NEXT: v_lshr_b64 v[17:18], v[7:8], 16
-; SI-NEXT: v_lshr_b64 v[15:16], v[7:8], 8
-; SI-NEXT: v_mov_b32_e32 v46, v7
-; SI-NEXT: v_lshr_b64 v[6:7], v[40:41], 8
-; SI-NEXT: v_readfirstlane_b32 s41, v8
-; SI-NEXT: v_lshr_b64 v[7:8], v[21:22], 8
-; SI-NEXT: v_add_f64 v[28:29], s[28:29], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0
+; SI-NEXT: v_add_f64 v[3:4], s[6:7], 1.0
+; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 24
+; SI-NEXT: v_add_f64 v[5:6], s[8:9], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 16
+; SI-NEXT: v_add_f64 v[7:8], s[10:11], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[19:20], v[1:2], 8
+; SI-NEXT: v_add_f64 v[9:10], s[12:13], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 24
+; SI-NEXT: v_add_f64 v[11:12], s[14:15], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 16
+; SI-NEXT: v_add_f64 v[13:14], s[40:41], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[28:29], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[3:4], 8
+; SI-NEXT: v_add_f64 v[15:16], s[42:43], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[28:29], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 24
+; SI-NEXT: v_add_f64 v[17:18], s[44:45], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[28:29], 8
-; SI-NEXT: v_add_f64 v[47:48], s[26:27], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 16
+; SI-NEXT: v_add_f64 v[32:33], s[26:27], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[47:48], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[5:6], 8
+; SI-NEXT: v_readfirstlane_b32 s45, v18
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[47:48], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 24
+; SI-NEXT: v_add_f64 v[59:60], s[18:19], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[47:48], 8
-; SI-NEXT: v_add_f64 v[51:52], s[24:25], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 16
+; SI-NEXT: v_add_f64 v[25:26], s[28:29], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[51:52], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[7:8], 8
+; SI-NEXT: v_add_f64 v[45:46], s[20:21], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[51:52], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 24
+; SI-NEXT: v_add_f64 v[23:24], s[16:17], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[51:52], 8
-; SI-NEXT: v_add_f64 v[42:43], s[22:23], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 16
+; SI-NEXT: v_lshr_b64 v[53:54], v[32:33], 24
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[42:43], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[9:10], 8
+; SI-NEXT: v_add_f64 v[48:49], s[24:25], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[42:43], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 24
+; SI-NEXT: v_add_f64 v[40:41], s[22:23], 1.0
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[42:43], 8
-; SI-NEXT: v_add_f64 v[56:57], s[20:21], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 16
+; SI-NEXT: v_lshr_b64 v[54:55], v[32:33], 16
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[56:57], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[11:12], 8
+; SI-NEXT: v_lshr_b64 v[34:35], v[25:26], 8
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[56:57], 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 24
+; SI-NEXT: v_lshr_b64 v[55:56], v[45:46], 16
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[56:57], 8
-; SI-NEXT: v_add_f64 v[19:20], s[18:19], 1.0
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 16
+; SI-NEXT: v_lshr_b64 v[27:28], v[25:26], 24
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[19:20], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[13:14], 8
+; SI-NEXT: v_lshr_b64 v[42:43], v[48:49], 8
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[19:20], 16
-; SI-NEXT: v_add_f64 v[24:25], s[16:17], 1.0
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 24
+; SI-NEXT: v_lshr_b64 v[35:36], v[40:41], 24
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 16
+; SI-NEXT: v_lshr_b64 v[56:57], v[59:60], 24
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 24
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[15:16], 8
+; SI-NEXT: v_readfirstlane_b32 s17, v24
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 8
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_lshr_b64 v[19:20], v[17:18], 24
+; SI-NEXT: v_readfirstlane_b32 s19, v60
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[7:8], v[24:25], 8
-; SI-NEXT: v_mov_b32_e32 v8, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; SI-NEXT: v_lshr_b64 v[26:27], v[21:22], 16
-; SI-NEXT: v_add_f64 v[38:39], s[14:15], 1.0
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: v_lshr_b64 v[12:13], v[38:39], 8
-; SI-NEXT: v_lshr_b64 v[13:14], v[40:41], 24
-; SI-NEXT: v_mov_b32_e32 v14, v34
+; SI-NEXT: v_lshr_b64 v[19:20], v[17:18], 16
+; SI-NEXT: v_readfirstlane_b32 s21, v46
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshr_b64 v[16:17], v[40:41], 16
-; SI-NEXT: v_readfirstlane_b32 s17, v25
-; SI-NEXT: v_readfirstlane_b32 s45, v22
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshr_b64 v[17:18], v[21:22], 24
-; SI-NEXT: v_lshr_b64 v[22:23], v[24:25], 16
-; SI-NEXT: v_lshr_b64 v[30:31], v[38:39], 24
-; SI-NEXT: v_readfirstlane_b32 s19, v20
-; SI-NEXT: v_readfirstlane_b32 s21, v57
-; SI-NEXT: v_readfirstlane_b32 s23, v43
-; SI-NEXT: v_readfirstlane_b32 s25, v52
-; SI-NEXT: v_readfirstlane_b32 s27, v48
-; SI-NEXT: v_readfirstlane_b32 s29, v29
-; SI-NEXT: v_readfirstlane_b32 s43, v41
-; SI-NEXT: v_readfirstlane_b32 s15, v39
-; SI-NEXT: v_readfirstlane_b32 s9, v4
-; SI-NEXT: v_readfirstlane_b32 s7, v2
-; SI-NEXT: v_lshr_b64 v[36:37], v[3:4], 24
-; SI-NEXT: v_lshr_b64 v[31:32], v[38:39], 16
-; SI-NEXT: v_mov_b32_e32 v50, v38
-; SI-NEXT: v_lshr_b64 v[38:39], v[19:20], 8
+; SI-NEXT: v_lshr_b64 v[18:19], v[17:18], 8
+; SI-NEXT: v_readfirstlane_b32 s23, v41
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshr_b64 v[18:19], v[59:60], 8
+; SI-NEXT: v_lshr_b64 v[19:20], v[23:24], 24
+; SI-NEXT: v_lshr_b64 v[20:21], v[23:24], 16
+; SI-NEXT: v_readfirstlane_b32 s25, v49
+; SI-NEXT: v_readfirstlane_b32 s27, v33
+; SI-NEXT: v_readfirstlane_b32 s29, v26
+; SI-NEXT: v_readfirstlane_b32 s43, v16
+; SI-NEXT: v_readfirstlane_b32 s41, v14
+; SI-NEXT: v_readfirstlane_b32 s15, v12
+; SI-NEXT: v_readfirstlane_b32 s13, v10
+; SI-NEXT: v_readfirstlane_b32 s11, v8
+; SI-NEXT: v_readfirstlane_b32 s9, v6
+; SI-NEXT: v_readfirstlane_b32 s7, v4
+; SI-NEXT: v_readfirstlane_b32 s5, v2
+; SI-NEXT: v_lshr_b64 v[30:31], v[25:26], 16
+; SI-NEXT: v_lshr_b64 v[28:29], v[32:33], 8
+; SI-NEXT: v_lshr_b64 v[38:39], v[48:49], 24
+; SI-NEXT: v_lshr_b64 v[51:52], v[48:49], 16
+; SI-NEXT: v_lshr_b64 v[36:37], v[40:41], 16
+; SI-NEXT: v_lshr_b64 v[49:50], v[40:41], 8
+; SI-NEXT: v_lshr_b64 v[43:44], v[45:46], 24
+; SI-NEXT: v_lshr_b64 v[46:47], v[45:46], 8
+; SI-NEXT: v_lshr_b64 v[57:58], v[59:60], 16
+; SI-NEXT: v_lshr_b64 v[21:22], v[23:24], 8
; SI-NEXT: s_lshr_b32 s10, s5, 24
; SI-NEXT: s_lshr_b32 s12, s5, 16
; SI-NEXT: s_lshr_b32 s14, s5, 8
@@ -110094,29 +109626,15 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: s_lshr_b32 s93, s23, 24
; SI-NEXT: s_lshr_b32 s94, s23, 16
; SI-NEXT: s_lshr_b32 s95, s23, 8
-; SI-NEXT: s_lshr_b32 s30, s21, 24
-; SI-NEXT: s_lshr_b32 s31, s21, 16
-; SI-NEXT: s_lshr_b32 s34, s21, 8
-; SI-NEXT: s_lshr_b32 s35, s19, 24
-; SI-NEXT: s_lshr_b32 s36, s19, 16
-; SI-NEXT: s_lshr_b32 s37, s19, 8
+; SI-NEXT: s_lshr_b32 vcc_lo, s21, 24
+; SI-NEXT: s_lshr_b32 vcc_hi, s21, 16
+; SI-NEXT: s_lshr_b32 s30, s21, 8
+; SI-NEXT: s_lshr_b32 s31, s19, 24
+; SI-NEXT: s_lshr_b32 s34, s19, 16
+; SI-NEXT: s_lshr_b32 s35, s19, 8
; SI-NEXT: s_lshr_b32 s8, s17, 24
-; SI-NEXT: s_lshr_b32 vcc_lo, s17, 16
+; SI-NEXT: s_lshr_b32 s36, s17, 16
; SI-NEXT: s_lshr_b32 s6, s17, 8
-; SI-NEXT: v_mov_b32_e32 v37, v12
-; SI-NEXT: v_mov_b32_e32 v18, v6
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_mov_b32_e32 v27, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v34, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_mov_b32_e32 v25, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_branch .LBB73_5
; SI-NEXT: .LBB73_3:
; SI-NEXT: ; implicit-def: $sgpr46
@@ -110299,37 +109817,50 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: s_branch .LBB73_2
; SI-NEXT: .LBB73_4:
-; SI-NEXT: v_mov_b32_e32 v1, s34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v3, s6
+; SI-NEXT: v_mov_b32_e32 v2, s82
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s94
-; SI-NEXT: v_mov_b32_e32 v3, s8
-; SI-NEXT: v_mov_b32_e32 v7, s38
-; SI-NEXT: v_mov_b32_e32 v22, s36
-; SI-NEXT: v_mov_b32_e32 v38, s30
-; SI-NEXT: v_mov_b32_e32 v24, s16
-; SI-NEXT: v_mov_b32_e32 v19, s18
-; SI-NEXT: v_mov_b32_e32 v56, s20
-; SI-NEXT: v_mov_b32_e32 v42, s22
-; SI-NEXT: v_mov_b32_e32 v51, s24
-; SI-NEXT: v_mov_b32_e32 v47, s26
-; SI-NEXT: v_mov_b32_e32 v28, s28
-; SI-NEXT: v_mov_b32_e32 v21, s44
-; SI-NEXT: v_mov_b32_e32 v40, s42
-; SI-NEXT: v_mov_b32_e32 v46, s40
-; SI-NEXT: v_mov_b32_e32 v50, s14
-; SI-NEXT: v_mov_b32_e32 v35, s12
-; SI-NEXT: v_mov_b32_e32 v55, s10
-; SI-NEXT: v_mov_b32_e32 v33, s4
-; SI-NEXT: v_mov_b32_e32 v26, s80
-; SI-NEXT: v_mov_b32_e32 v17, s70
-; SI-NEXT: v_mov_b32_e32 v18, s68
-; SI-NEXT: v_mov_b32_e32 v16, s66
-; SI-NEXT: v_mov_b32_e32 v13, s64
-; SI-NEXT: v_mov_b32_e32 v15, s54
-; SI-NEXT: v_mov_b32_e32 v5, s50
-; SI-NEXT: v_mov_b32_e32 v34, s48
+; SI-NEXT: v_mov_b32_e32 v2, s80
+; SI-NEXT: v_mov_b32_e32 v54, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 0
+; SI-NEXT: v_readlane_b32 s47, v62, 1
+; SI-NEXT: v_mov_b32_e32 v21, s38
+; SI-NEXT: v_mov_b32_e32 v20, s36
+; SI-NEXT: v_mov_b32_e32 v19, s34
+; SI-NEXT: v_mov_b32_e32 v18, s30
+; SI-NEXT: v_mov_b32_e32 v57, s94
+; SI-NEXT: v_mov_b32_e32 v56, s92
+; SI-NEXT: v_mov_b32_e32 v46, s90
+; SI-NEXT: v_mov_b32_e32 v55, s88
+; SI-NEXT: v_mov_b32_e32 v43, s78
+; SI-NEXT: v_mov_b32_e32 v49, s76
+; SI-NEXT: v_mov_b32_e32 v36, s74
+; SI-NEXT: v_mov_b32_e32 v35, s72
+; SI-NEXT: v_mov_b32_e32 v42, s62
+; SI-NEXT: v_mov_b32_e32 v51, s60
+; SI-NEXT: v_mov_b32_e32 v38, s58
+; SI-NEXT: v_mov_b32_e32 v28, s56
+; SI-NEXT: v_mov_b32_e32 v23, s16
+; SI-NEXT: v_mov_b32_e32 v59, s18
+; SI-NEXT: v_mov_b32_e32 v45, s20
+; SI-NEXT: v_mov_b32_e32 v40, s22
+; SI-NEXT: v_mov_b32_e32 v48, s24
+; SI-NEXT: v_mov_b32_e32 v32, s26
+; SI-NEXT: v_mov_b32_e32 v25, s28
+; SI-NEXT: v_mov_b32_e32 v17, s44
+; SI-NEXT: v_mov_b32_e32 v15, s42
+; SI-NEXT: v_mov_b32_e32 v13, s40
+; SI-NEXT: v_mov_b32_e32 v11, s14
+; SI-NEXT: v_mov_b32_e32 v9, s12
+; SI-NEXT: v_mov_b32_e32 v7, s10
+; SI-NEXT: v_mov_b32_e32 v5, s8
+; SI-NEXT: v_mov_b32_e32 v1, s4
+; SI-NEXT: v_mov_b32_e32 v53, s98
+; SI-NEXT: v_mov_b32_e32 v34, s96
+; SI-NEXT: v_mov_b32_e32 v30, s86
+; SI-NEXT: v_mov_b32_e32 v27, s84
; SI-NEXT: v_readlane_b32 s10, v62, 34
; SI-NEXT: v_readlane_b32 s12, v62, 35
; SI-NEXT: v_readlane_b32 s14, v62, 36
@@ -110343,657 +109874,661 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: v_readlane_b32 s40, v62, 44
; SI-NEXT: v_readlane_b32 s42, v62, 45
; SI-NEXT: v_readlane_b32 s44, v62, 46
+; SI-NEXT: v_readlane_b32 s56, v62, 49
; SI-NEXT: v_readlane_b32 s57, v62, 50
+; SI-NEXT: v_readlane_b32 s58, v62, 51
; SI-NEXT: v_readlane_b32 s59, v62, 52
+; SI-NEXT: v_readlane_b32 s60, v62, 53
; SI-NEXT: v_readlane_b32 s61, v62, 54
+; SI-NEXT: v_readlane_b32 s62, v62, 55
; SI-NEXT: v_readlane_b32 s63, v62, 56
+; SI-NEXT: v_readlane_b32 s72, v62, 57
; SI-NEXT: v_readlane_b32 s73, v62, 58
+; SI-NEXT: v_readlane_b32 s74, v62, 59
; SI-NEXT: v_readlane_b32 s75, v62, 60
+; SI-NEXT: v_readlane_b32 s76, v62, 61
; SI-NEXT: v_readlane_b32 s77, v62, 62
+; SI-NEXT: v_readlane_b32 s78, v62, 63
; SI-NEXT: v_readlane_b32 s79, v61, 0
+; SI-NEXT: v_readlane_b32 s88, v61, 1
; SI-NEXT: v_readlane_b32 s89, v61, 2
+; SI-NEXT: v_readlane_b32 s90, v61, 3
; SI-NEXT: v_readlane_b32 s91, v61, 4
+; SI-NEXT: v_readlane_b32 s92, v61, 5
; SI-NEXT: v_readlane_b32 s93, v61, 6
; SI-NEXT: v_readlane_b32 s94, v61, 7
; SI-NEXT: v_readlane_b32 s95, v61, 8
-; SI-NEXT: v_readlane_b32 s30, v61, 9
-; SI-NEXT: v_readlane_b32 s31, v61, 10
-; SI-NEXT: v_readlane_b32 s34, v61, 11
-; SI-NEXT: v_readlane_b32 s35, v61, 12
-; SI-NEXT: v_readlane_b32 s36, v61, 13
-; SI-NEXT: v_readlane_b32 s37, v61, 14
-; SI-NEXT: v_readlane_b32 s8, v61, 15
-; SI-NEXT: v_readlane_b32 vcc_lo, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s92
-; SI-NEXT: v_readlane_b32 s92, v61, 5
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s90
-; SI-NEXT: v_readlane_b32 s90, v61, 3
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s88
-; SI-NEXT: v_readlane_b32 s88, v61, 1
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_readlane_b32 vcc_lo, v61, 9
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s78
-; SI-NEXT: v_readlane_b32 s78, v62, 63
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s70
+; SI-NEXT: v_readlane_b32 vcc_hi, v61, 10
+; SI-NEXT: v_readlane_b32 s30, v61, 11
+; SI-NEXT: v_readlane_b32 s31, v61, 12
+; SI-NEXT: v_readlane_b32 s34, v61, 13
+; SI-NEXT: v_readlane_b32 s35, v61, 14
+; SI-NEXT: v_readlane_b32 s8, v61, 15
+; SI-NEXT: v_readlane_b32 s36, v61, 16
+; SI-NEXT: v_readlane_b32 s6, v61, 17
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s76
-; SI-NEXT: v_readlane_b32 s76, v62, 61
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s68
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s74
-; SI-NEXT: v_readlane_b32 s74, v62, 59
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s66
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s72
-; SI-NEXT: v_readlane_b32 s72, v62, 57
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s64
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s62
-; SI-NEXT: v_readlane_b32 s62, v62, 55
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s54
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s60
-; SI-NEXT: v_readlane_b32 s60, v62, 53
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s52
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s58
-; SI-NEXT: v_readlane_b32 s58, v62, 51
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_mov_b32_e32 v2, s50
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, s56
-; SI-NEXT: v_readlane_b32 s56, v62, 49
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v2, s46
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s98
-; SI-NEXT: v_readlane_b32 s46, v62, 0
-; SI-NEXT: v_readlane_b32 s47, v62, 1
-; SI-NEXT: v_mov_b32_e32 v37, s46
; SI-NEXT: v_readlane_b32 s46, v62, 2
; SI-NEXT: v_readlane_b32 s47, v62, 3
-; SI-NEXT: v_mov_b32_e32 v31, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 4
; SI-NEXT: v_readlane_b32 s47, v62, 5
-; SI-NEXT: v_mov_b32_e32 v30, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 6
; SI-NEXT: v_readlane_b32 s47, v62, 7
-; SI-NEXT: v_mov_b32_e32 v59, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 8
; SI-NEXT: v_readlane_b32 s47, v62, 9
-; SI-NEXT: v_mov_b32_e32 v58, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 10
; SI-NEXT: v_readlane_b32 s47, v62, 11
-; SI-NEXT: v_mov_b32_e32 v45, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 12
; SI-NEXT: v_readlane_b32 s47, v62, 13
-; SI-NEXT: v_mov_b32_e32 v44, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 14
; SI-NEXT: v_readlane_b32 s47, v62, 15
-; SI-NEXT: v_mov_b32_e32 v49, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 16
; SI-NEXT: v_readlane_b32 s47, v62, 17
-; SI-NEXT: v_mov_b32_e32 v11, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 18
; SI-NEXT: v_readlane_b32 s47, v62, 19
-; SI-NEXT: v_mov_b32_e32 v54, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 20
; SI-NEXT: v_readlane_b32 s47, v62, 21
-; SI-NEXT: v_mov_b32_e32 v53, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 22
; SI-NEXT: v_readlane_b32 s47, v62, 23
-; SI-NEXT: v_mov_b32_e32 v36, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 24
; SI-NEXT: v_readlane_b32 s47, v62, 25
-; SI-NEXT: v_mov_b32_e32 v8, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 26
; SI-NEXT: v_readlane_b32 s47, v62, 27
-; SI-NEXT: v_mov_b32_e32 v14, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 28
; SI-NEXT: v_readlane_b32 s47, v62, 29
-; SI-NEXT: v_mov_b32_e32 v27, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 30
; SI-NEXT: v_readlane_b32 s47, v62, 31
-; SI-NEXT: v_mov_b32_e32 v9, s46
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v2, s46
; SI-NEXT: v_readlane_b32 s46, v62, 32
; SI-NEXT: v_readlane_b32 s47, v62, 33
-; SI-NEXT: v_mov_b32_e32 v1, s6
-; SI-NEXT: v_mov_b32_e32 v25, s46
-; SI-NEXT: v_readlane_b32 s46, v62, 47
; SI-NEXT: v_readlane_b32 s47, v62, 48
-; SI-NEXT: v_readlane_b32 s6, v61, 17
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s96
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s86
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s84
+; SI-NEXT: v_mov_b32_e32 v2, s48
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s82
+; SI-NEXT: v_mov_b32_e32 v2, s46
+; SI-NEXT: v_readlane_b32 s46, v62, 47
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v2, s52
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT: .LBB73_5: ; %end
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v7
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v24
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v23
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v21
; SI-NEXT: s_and_b32 s4, s17, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v20
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, vcc_lo, 0xff
+; SI-NEXT: s_and_b32 s6, s36, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v19
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s37, 8
-; SI-NEXT: s_lshl_b32 s8, s35, 24
-; SI-NEXT: v_readlane_b32 s99, v63, 33
-; SI-NEXT: v_readlane_b32 s98, v63, 32
-; SI-NEXT: v_readlane_b32 s97, v63, 31
-; SI-NEXT: v_readlane_b32 s96, v63, 30
-; SI-NEXT: v_readlane_b32 s87, v63, 29
-; SI-NEXT: v_readlane_b32 s86, v63, 28
-; SI-NEXT: v_readlane_b32 s85, v63, 27
-; SI-NEXT: v_readlane_b32 s84, v63, 26
-; SI-NEXT: v_readlane_b32 s83, v63, 25
-; SI-NEXT: v_readlane_b32 s82, v63, 24
-; SI-NEXT: v_readlane_b32 s81, v63, 23
-; SI-NEXT: v_readlane_b32 s80, v63, 22
-; SI-NEXT: v_readlane_b32 s71, v63, 21
-; SI-NEXT: v_readlane_b32 s70, v63, 20
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
-; SI-NEXT: v_readlane_b32 s65, v63, 15
-; SI-NEXT: v_readlane_b32 s64, v63, 14
-; SI-NEXT: v_readlane_b32 s55, v63, 13
-; SI-NEXT: v_readlane_b32 s54, v63, 12
-; SI-NEXT: v_readlane_b32 s53, v63, 11
-; SI-NEXT: v_readlane_b32 s52, v63, 10
-; SI-NEXT: v_readlane_b32 s51, v63, 9
-; SI-NEXT: v_readlane_b32 s50, v63, 8
-; SI-NEXT: v_readlane_b32 s49, v63, 7
-; SI-NEXT: v_readlane_b32 s48, v63, 6
-; SI-NEXT: v_readlane_b32 s39, v63, 5
-; SI-NEXT: v_readlane_b32 s38, v63, 4
-; SI-NEXT: v_readlane_b32 s37, v63, 3
-; SI-NEXT: v_readlane_b32 s35, v63, 1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v38
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v59
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v18
; SI-NEXT: s_and_b32 s4, s19, 0xff
+; SI-NEXT: s_lshl_b32 s6, s35, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v57
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s36, 0xff
+; SI-NEXT: s_and_b32 s6, s34, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v56
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s31, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s34, 8
-; SI-NEXT: s_lshl_b32 s8, s30, 24
-; SI-NEXT: v_readlane_b32 s36, v63, 2
-; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v56
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v46
; SI-NEXT: s_and_b32 s4, s21, 0xff
+; SI-NEXT: s_lshl_b32 s6, s30, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v55
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s31, 0xff
+; SI-NEXT: s_and_b32 s6, vcc_hi, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v43
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, vcc_lo, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s95, 8
-; SI-NEXT: s_lshl_b32 s8, s93, 24
-; SI-NEXT: v_readlane_b32 s30, v63, 34
-; SI-NEXT: v_readlane_b32 s31, v63, 35
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v42
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v49
; SI-NEXT: s_and_b32 s4, s23, 0xff
+; SI-NEXT: s_lshl_b32 s6, s95, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v36
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s94, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s93, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s92, 8
-; SI-NEXT: s_lshl_b32 s8, s90, 24
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v51
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v48
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v42
; SI-NEXT: s_and_b32 s4, s25, 0xff
+; SI-NEXT: s_lshl_b32 s6, s92, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v51
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s91, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v38
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s90, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s89, 8
-; SI-NEXT: s_lshl_b32 s8, s79, 24
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v32
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v28
; SI-NEXT: s_and_b32 s4, s27, 0xff
+; SI-NEXT: s_lshl_b32 s6, s89, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v54
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s88, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v53
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s79, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s78, 8
-; SI-NEXT: s_lshl_b32 s8, s76, 24
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v34
; SI-NEXT: s_and_b32 s4, s29, 0xff
+; SI-NEXT: s_lshl_b32 s6, s78, 8
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v30
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s77, 0xff
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v27
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s76, 24
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_lshl_b32 s6, s75, 8
-; SI-NEXT: s_lshl_b32 s8, s73, 24
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s4, s4, s6
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v17
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s45, 0xff
+; SI-NEXT: s_lshl_b32 s6, s75, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s74, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
+; SI-NEXT: s_lshl_b32 s8, s73, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_lshl_b32 s6, s72, 8
; SI-NEXT: s_lshl_b32 s8, s62, 24
-; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_readlane_b32 s30, v63, 34
+; SI-NEXT: v_readlane_b32 s31, v63, 35
+; SI-NEXT: v_readlane_b32 s99, v63, 33
+; SI-NEXT: v_readlane_b32 s98, v63, 32
+; SI-NEXT: v_readlane_b32 s97, v63, 31
+; SI-NEXT: v_readlane_b32 s96, v63, 30
+; SI-NEXT: v_readlane_b32 s87, v63, 29
+; SI-NEXT: v_readlane_b32 s86, v63, 28
+; SI-NEXT: v_readlane_b32 s85, v63, 27
+; SI-NEXT: v_readlane_b32 s84, v63, 26
+; SI-NEXT: v_readlane_b32 s83, v63, 25
+; SI-NEXT: v_readlane_b32 s82, v63, 24
+; SI-NEXT: v_readlane_b32 s81, v63, 23
+; SI-NEXT: v_readlane_b32 s80, v63, 22
+; SI-NEXT: v_readlane_b32 s71, v63, 21
+; SI-NEXT: v_readlane_b32 s70, v63, 20
+; SI-NEXT: v_readlane_b32 s69, v63, 19
+; SI-NEXT: v_readlane_b32 s68, v63, 18
+; SI-NEXT: v_readlane_b32 s67, v63, 17
+; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_readlane_b32 s64, v63, 14
+; SI-NEXT: v_readlane_b32 s55, v63, 13
+; SI-NEXT: v_readlane_b32 s54, v63, 12
+; SI-NEXT: v_readlane_b32 s53, v63, 11
+; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: v_readlane_b32 s51, v63, 9
+; SI-NEXT: v_readlane_b32 s50, v63, 8
+; SI-NEXT: v_readlane_b32 s49, v63, 7
+; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: v_readlane_b32 s39, v63, 5
+; SI-NEXT: v_readlane_b32 s38, v63, 4
+; SI-NEXT: v_readlane_b32 s37, v63, 3
+; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: v_readlane_b32 s35, v63, 1
+; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v17
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v16
; SI-NEXT: v_or_b32_e32 v4, v6, v4
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v18
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s43, 0xff
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v16
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s63, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v13
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 64, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s61, 8
+; SI-NEXT: s_lshl_b32 s8, s59, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v14
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v46
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v15
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s41, 0xff
-; SI-NEXT: s_lshl_b32 s6, s61, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s60, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v5
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s59, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_lshl_b32 s6, s58, 8
; SI-NEXT: s_lshl_b32 s8, s56, 24
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v36
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v4, 0xff, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v12
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v37
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v11
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s15, 0xff
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v31
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s57, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v30
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s47, 8
+; SI-NEXT: s_lshl_b32 s8, s44, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v10
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v59
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s13, 0xff
-; SI-NEXT: s_lshl_b32 s6, s47, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v58
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s46, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v45
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s44, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x58, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s42, 8
+; SI-NEXT: s_lshl_b32 s8, s28, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v8
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v8
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s11, 0xff
-; SI-NEXT: s_lshl_b32 s6, s42, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v49
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s40, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v11
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s28, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x60, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s26, 8
+; SI-NEXT: s_lshl_b32 s8, s22, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v6
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v6
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v54
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s9, 0xff
-; SI-NEXT: s_lshl_b32 s6, s26, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v53
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s24, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s8, s22, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s8, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x68, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s20, 8
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_or_b32_e32 v2, v2, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v8
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s7, 0xff
-; SI-NEXT: s_lshl_b32 s6, s20, 8
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v14
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s18, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v27
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s16, 24
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x70, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: s_lshl_b32 s6, s10, 24
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; SI-NEXT: v_or_b32_e32 v2, v2, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_or_b32_e32 v2, v2, v3
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v9
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s14, 8
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v34
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s12, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v25
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s6, s10, 24
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -111008,9 +110543,9 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -111247,201 +110782,201 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: s_lshr_b64 s[48:49], s[16:17], 24
; VI-NEXT: s_cbranch_execnz .LBB73_4
; VI-NEXT: .LBB73_2: ; %cmp.true
-; VI-NEXT: v_add_f64 v[13:14], s[4:5], 1.0
+; VI-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
; VI-NEXT: v_add_f64 v[1:2], s[6:7], 1.0
; VI-NEXT: v_add_f64 v[3:4], s[8:9], 1.0
; VI-NEXT: v_add_f64 v[5:6], s[10:11], 1.0
; VI-NEXT: v_add_f64 v[7:8], s[12:13], 1.0
; VI-NEXT: v_add_f64 v[9:10], s[14:15], 1.0
-; VI-NEXT: v_add_f64 v[11:12], s[40:41], 1.0
+; VI-NEXT: v_add_f64 v[13:14], s[40:41], 1.0
; VI-NEXT: v_add_f64 v[15:16], s[42:43], 1.0
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: v_add_f64 v[17:18], s[44:45], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; VI-NEXT: v_add_f64 v[19:20], s[28:29], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
-; VI-NEXT: v_add_f64 v[21:22], s[26:27], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; VI-NEXT: v_add_f64 v[23:24], s[24:25], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; VI-NEXT: v_add_f64 v[25:26], s[22:23], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: v_add_f64 v[27:28], s[20:21], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: v_add_f64 v[29:30], s[18:19], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
-; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v2
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v1
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v4
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v3
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v3
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v24
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v24
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v26
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v28
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v28
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v30
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v30
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v29
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v32
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v32
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v31
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v31
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; VI-NEXT: v_add_f64 v[19:20], s[44:45], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
+; VI-NEXT: v_add_f64 v[23:24], s[28:29], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
+; VI-NEXT: v_add_f64 v[27:28], s[26:27], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[5:6]
+; VI-NEXT: v_add_f64 v[31:32], s[24:25], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[7:8]
+; VI-NEXT: v_add_f64 v[35:36], s[22:23], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
+; VI-NEXT: v_add_f64 v[37:38], s[20:21], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
+; VI-NEXT: v_add_f64 v[48:49], s[18:19], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
+; VI-NEXT: v_add_f64 v[50:51], s[16:17], 1.0
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[23:24]
+; VI-NEXT: v_lshrrev_b32_e32 v25, 8, v24
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[27:28]
+; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[50:51]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[31:32]
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v20
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[35:36]
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v28
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[37:38]
+; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[48:49]
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v12
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v12
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v11
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v2
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v1
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v3
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v3
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v6
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v6
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v5
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v5
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v8
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v8
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v7
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v7
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v10
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v9
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v14
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v13
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v20
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v20
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v19
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v19
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v24
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v24
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v23
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v23
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v28
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v28
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v27
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v27
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v31
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v32
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v36
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v36
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v36
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v35
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v38
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v38
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v37
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v49
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v49
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v49
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v48
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v48
+; VI-NEXT: v_lshrrev_b32_e32 v29, 24, v51
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v51
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v51
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v50
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v50
; VI-NEXT: s_branch .LBB73_5
; VI-NEXT: .LBB73_3:
; VI-NEXT: ; implicit-def: $sgpr46
@@ -111600,203 +111135,201 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: s_branch .LBB73_2
; VI-NEXT: .LBB73_4:
-; VI-NEXT: v_mov_b32_e32 v42, s48
-; VI-NEXT: v_mov_b32_e32 v41, s38
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s36
-; VI-NEXT: v_mov_b32_e32 v34, s65
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s64
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s55
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s54
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s87
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s53
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s52
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s86
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s51
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s50
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s85
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s84
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s83
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s82
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s81
-; VI-NEXT: v_mov_b32_e32 v13, s4
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s80
+; VI-NEXT: v_mov_b32_e32 v56, s66
+; VI-NEXT: v_mov_b32_e32 v55, s38
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s36
+; VI-NEXT: v_mov_b32_e32 v17, s55
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s54
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s87
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s53
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s52
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s86
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s51
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s50
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s85
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s84
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s83
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s82
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s81
+; VI-NEXT: v_mov_b32_e32 v11, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s80
; VI-NEXT: v_readlane_b32 s4, v62, 0
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 1
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 2
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 3
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 4
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 5
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 6
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 7
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 8
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 9
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 10
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 11
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 12
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 13
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 14
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s34
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 15
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s34
; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 22
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: v_mov_b32_e32 v53, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: v_mov_b32_e32 v47, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: v_mov_b32_e32 v51, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: v_mov_b32_e32 v37, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: v_mov_b32_e32 v52, s4
+; VI-NEXT: v_mov_b32_e32 v25, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: v_mov_b32_e32 v53, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s30
-; VI-NEXT: v_mov_b32_e32 v38, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: v_mov_b32_e32 v47, s4
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s30
+; VI-NEXT: v_mov_b32_e32 v52, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: v_mov_b32_e32 v30, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: v_mov_b32_e32 v56, s4
+; VI-NEXT: v_mov_b32_e32 v34, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
-; VI-NEXT: v_mov_b32_e32 v48, s4
+; VI-NEXT: v_mov_b32_e32 v18, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: v_mov_b32_e32 v54, s4
+; VI-NEXT: v_mov_b32_e32 v21, s4
; VI-NEXT: v_readlane_b32 s4, v62, 47
-; VI-NEXT: v_mov_b32_e32 v57, s4
+; VI-NEXT: v_mov_b32_e32 v41, s4
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: v_mov_b32_e32 v35, s4
+; VI-NEXT: v_mov_b32_e32 v22, s4
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: v_mov_b32_e32 v39, s4
+; VI-NEXT: v_mov_b32_e32 v42, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: v_mov_b32_e32 v58, s4
+; VI-NEXT: v_mov_b32_e32 v60, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: v_mov_b32_e32 v49, s4
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v17, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
-; VI-NEXT: v_mov_b32_e32 v59, s4
+; VI-NEXT: v_mov_b32_e32 v61, s4
; VI-NEXT: v_readlane_b32 s4, v62, 53
-; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: v_mov_b32_e32 v43, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: v_mov_b32_e32 v60, s4
+; VI-NEXT: v_mov_b32_e32 v45, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: v_mov_b32_e32 v61, s4
+; VI-NEXT: v_mov_b32_e32 v29, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: v_mov_b32_e32 v55, s4
+; VI-NEXT: v_mov_b32_e32 v44, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
-; VI-NEXT: v_mov_b32_e32 v14, s5
+; VI-NEXT: v_mov_b32_e32 v12, s5
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_mov_b32_e32 v2, s7
; VI-NEXT: v_mov_b32_e32 v3, s8
@@ -111807,85 +111340,95 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_mov_b32_e32 v8, s13
; VI-NEXT: v_mov_b32_e32 v9, s14
; VI-NEXT: v_mov_b32_e32 v10, s15
-; VI-NEXT: v_mov_b32_e32 v11, s40
-; VI-NEXT: v_mov_b32_e32 v12, s41
+; VI-NEXT: v_mov_b32_e32 v13, s40
+; VI-NEXT: v_mov_b32_e32 v14, s41
; VI-NEXT: v_mov_b32_e32 v15, s42
; VI-NEXT: v_mov_b32_e32 v16, s43
-; VI-NEXT: v_mov_b32_e32 v17, s44
-; VI-NEXT: v_mov_b32_e32 v18, s45
-; VI-NEXT: v_mov_b32_e32 v19, s28
-; VI-NEXT: v_mov_b32_e32 v20, s29
-; VI-NEXT: v_mov_b32_e32 v21, s26
-; VI-NEXT: v_mov_b32_e32 v22, s27
-; VI-NEXT: v_mov_b32_e32 v23, s24
-; VI-NEXT: v_mov_b32_e32 v24, s25
-; VI-NEXT: v_mov_b32_e32 v25, s22
-; VI-NEXT: v_mov_b32_e32 v26, s23
-; VI-NEXT: v_mov_b32_e32 v27, s20
-; VI-NEXT: v_mov_b32_e32 v28, s21
-; VI-NEXT: v_mov_b32_e32 v29, s18
-; VI-NEXT: v_mov_b32_e32 v30, s19
-; VI-NEXT: v_mov_b32_e32 v31, s16
-; VI-NEXT: v_mov_b32_e32 v32, s17
-; VI-NEXT: v_mov_b32_e32 v45, s71
-; VI-NEXT: v_mov_b32_e32 v46, s70
-; VI-NEXT: v_mov_b32_e32 v43, s69
-; VI-NEXT: v_mov_b32_e32 v44, s68
-; VI-NEXT: v_mov_b32_e32 v50, s67
-; VI-NEXT: v_mov_b32_e32 v33, s66
-; VI-NEXT: v_mov_b32_e32 v36, s4
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s90
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s88
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s78
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s76
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s74
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s72
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s62
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s60
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s58
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s56
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v41, s46
-; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v19, s44
+; VI-NEXT: v_mov_b32_e32 v20, s45
+; VI-NEXT: v_mov_b32_e32 v23, s28
+; VI-NEXT: v_mov_b32_e32 v24, s29
+; VI-NEXT: v_mov_b32_e32 v27, s26
+; VI-NEXT: v_mov_b32_e32 v28, s27
+; VI-NEXT: v_mov_b32_e32 v31, s24
+; VI-NEXT: v_mov_b32_e32 v32, s25
+; VI-NEXT: v_mov_b32_e32 v35, s22
+; VI-NEXT: v_mov_b32_e32 v36, s23
+; VI-NEXT: v_mov_b32_e32 v37, s20
+; VI-NEXT: v_mov_b32_e32 v38, s21
+; VI-NEXT: v_mov_b32_e32 v48, s18
+; VI-NEXT: v_mov_b32_e32 v49, s19
+; VI-NEXT: v_mov_b32_e32 v50, s16
+; VI-NEXT: v_mov_b32_e32 v51, s17
+; VI-NEXT: v_mov_b32_e32 v58, s71
+; VI-NEXT: v_mov_b32_e32 v59, s70
+; VI-NEXT: v_mov_b32_e32 v40, s69
+; VI-NEXT: v_mov_b32_e32 v57, s68
+; VI-NEXT: v_mov_b32_e32 v39, s67
+; VI-NEXT: v_mov_b32_e32 v26, s65
+; VI-NEXT: v_mov_b32_e32 v54, s64
+; VI-NEXT: v_mov_b32_e32 v33, s4
+; VI-NEXT: v_mov_b32_e32 v46, s48
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s90
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s88
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s78
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s76
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s74
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s72
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s62
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s60
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s58
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s56
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v55, s46
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: .LBB73_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v41, v45, v42, s4
-; VI-NEXT: v_perm_b32 v31, v31, v46, s4
-; VI-NEXT: v_perm_b32 v32, v32, v36, s4
-; VI-NEXT: v_lshlrev_b32_e32 v36, 16, v41
-; VI-NEXT: v_or_b32_e32 v31, v31, v36
-; VI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v31, v55, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_e32 v31, v32, v31
-; VI-NEXT: v_add_u32_e32 v32, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v31, v32, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v29, v29, v44, s4
-; VI-NEXT: v_perm_b32 v27, v27, v33, s4
+; VI-NEXT: v_perm_b32 v55, v58, v46, s4
+; VI-NEXT: v_perm_b32 v49, v49, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v36, v36, v22, s4
+; VI-NEXT: v_perm_b32 v17, v38, v17, s4
+; VI-NEXT: v_perm_b32 v18, v32, v18, s4
+; VI-NEXT: v_perm_b32 v28, v28, v52, s4
+; VI-NEXT: v_perm_b32 v35, v35, v54, s4
+; VI-NEXT: v_perm_b32 v24, v24, v25, s4
+; VI-NEXT: v_perm_b32 v50, v50, v59, s4
+; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v29, v44, v29, s4
+; VI-NEXT: v_perm_b32 v33, v51, v33, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_e32 v29, v33, v29
+; VI-NEXT: v_perm_b32 v48, v48, v57, s4
+; VI-NEXT: v_perm_b32 v37, v37, v56, s4
+; VI-NEXT: v_perm_b32 v16, v16, v53, s4
+; VI-NEXT: v_lshlrev_b32_e32 v53, 16, v55
+; VI-NEXT: v_or_b32_e32 v50, v50, v53
+; VI-NEXT: v_perm_b32 v20, v20, v47, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -111918,310 +111461,270 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
+; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v39, v39, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(4)
+; VI-NEXT: v_perm_b32 v51, v40, v58, s4
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v25, v15, v25, s4
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v31, v43, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
-; VI-NEXT: v_or_b32_e32 v29, v29, v31
-; VI-NEXT: v_add_u32_e32 v31, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v29, v31, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v29, v30, v60, s4
-; VI-NEXT: v_perm_b32 v30, v40, v59, s4
-; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_or_b32_e32 v29, v29, v30
-; VI-NEXT: v_add_u32_e32 v30, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v29, v30, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v29, v50, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: v_or_b32_e32 v27, v27, v29
-; VI-NEXT: v_add_u32_e32 v29, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v27, v29, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v27, v28, v49, s4
-; VI-NEXT: v_perm_b32 v28, v58, v39, s4
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v28
-; VI-NEXT: v_or_b32_e32 v27, v27, v28
-; VI-NEXT: v_add_u32_e32 v28, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v27, v28, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v26, v26, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v27, v28, v27, s4
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_perm_b32 v38, v22, v45, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v25, v28, s4
-; VI-NEXT: v_or_b32_e32 v25, v25, v27
-; VI-NEXT: v_add_u32_e32 v27, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v25, v27, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v25, v26, v35, s4
-; VI-NEXT: v_perm_b32 v26, v57, v54, s4
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
-; VI-NEXT: v_or_b32_e32 v25, v25, v26
-; VI-NEXT: v_add_u32_e32 v26, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v25, v26, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v31, v22, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v25, v26, v25, s4
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v25
+; VI-NEXT: v_perm_b32 v32, v22, v45, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v23, v26, s4
-; VI-NEXT: v_or_b32_e32 v23, v23, v25
-; VI-NEXT: v_add_u32_e32 v25, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v23, v25, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v23, v24, v48, s4
-; VI-NEXT: v_perm_b32 v24, v56, v34, s4
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_or_b32_e32 v23, v23, v24
-; VI-NEXT: v_add_u32_e32 v24, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v23, v24, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v23, v24, v23, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_perm_b32 v27, v27, v22, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v21, v24, s4
-; VI-NEXT: v_or_b32_e32 v21, v21, v23
-; VI-NEXT: v_add_u32_e32 v23, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v21, v23, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v21, v22, v47, s4
-; VI-NEXT: v_perm_b32 v22, v38, v53, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v21, v21, v22
-; VI-NEXT: v_add_u32_e32 v22, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v21, v22, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v21, v22, v21, s4
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_perm_b32 v52, v22, v45, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v19, v22, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v21
-; VI-NEXT: v_add_u32_e32 v21, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v19, v21, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v19, v20, v52, s4
-; VI-NEXT: v_perm_b32 v20, v37, v51, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_or_b32_e32 v19, v19, v20
-; VI-NEXT: v_add_u32_e32 v20, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v20, v19, s4
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_perm_b32 v54, v23, v22, s4
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v20, s4
-; VI-NEXT: v_or_b32_e32 v17, v17, v19
-; VI-NEXT: v_add_u32_e32 v19, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v22, v23, v22, s4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v18, v17, s4
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v19, v23, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v19, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_or_b32_e32 v17, v17, v18
-; VI-NEXT: v_add_u32_e32 v18, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v23, v23, v45, s4
+; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v51
+; VI-NEXT: v_or_b32_e32 v29, v48, v29
+; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v29, v43, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_e32 v29, v49, v29
+; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v39
+; VI-NEXT: v_or_b32_e32 v29, v37, v29
+; VI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v29, v60, v42, s4
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_or_b32_e32 v17, v17, v29
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v26
+; VI-NEXT: v_or_b32_e32 v17, v35, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v17, v41, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v36, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v38
+; VI-NEXT: v_or_b32_e32 v17, v31, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v17, v34, v30, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v18, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v32
+; VI-NEXT: v_or_b32_e32 v17, v27, v17
+; VI-NEXT: buffer_store_dword v50, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: v_perm_b32 v15, v15, v45, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v17, v18, v17, s4
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v28, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v52
+; VI-NEXT: v_or_b32_e32 v17, v54, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v18, s4
-; VI-NEXT: v_or_b32_e32 v15, v15, v17
-; VI-NEXT: v_add_u32_e32 v17, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v18, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v24, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v22
+; VI-NEXT: v_or_b32_e32 v17, v19, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v16, v15, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v17, v18, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v17, v20, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v23
+; VI-NEXT: v_or_b32_e32 v17, v25, v17
+; VI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v16, v17, v16, s4
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
-; VI-NEXT: v_or_b32_e32 v15, v15, v16
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v16, v15, s4
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_perm_b32 v17, v18, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_or_b32_e32 v16, v16, v17
+; VI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v11, v16, s4
-; VI-NEXT: v_or_b32_e32 v11, v11, v15
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v11, v15, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v16, s4
+; VI-NEXT: v_or_b32_e32 v13, v13, v15
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v11, v12, v11, s4
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v14, v13, s4
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v15, v12, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_add_u32_e32 v12, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v15, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; VI-NEXT: v_or_b32_e32 v13, v13, v14
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v11, s4
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v9, v9, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v11, v11, v15, s4
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_or_b32_e32 v9, v9, v11
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v13, v14, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v9, v9, v13
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v9, v10, v9, s4
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v11, v10, s4
+; VI-NEXT: v_perm_b32 v10, v13, v10, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v7, v9, s4
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v9, v9, v10, s4
+; VI-NEXT: v_perm_b32 v9, v9, v13, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v7, v8, v7, s4
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v8, v9, v8, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v5, v7, s4
; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v7, v7, v8, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v5, v6, v5, s4
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v6, v7, v6, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v3, v5, s4
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v5, v5, v6, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v3, v4, v3, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v4, v5, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v3, v3, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v13, v1, s4
+; VI-NEXT: v_perm_b32 v1, v11, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
+; VI-NEXT: v_perm_b32 v1, v12, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -149701,7 +149204,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:8
; SI-NEXT: v_mov_b32_e32 v31, v0
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
@@ -149710,70 +149213,72 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
-; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v2
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v62
-; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v63
+; SI-NEXT: v_and_b32_e32 v62, 0xffff0000, v3
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61
-; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v4
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v62
+; SI-NEXT: v_and_b32_e32 v61, 0xffff0000, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v3
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v57
-; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v61
+; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v5
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v4
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v56
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v60
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v5
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v58, 0xffff0000, v7
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v56, 0xffff0000, v8
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: v_and_b32_e32 v47, 0xffff0000, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_and_b32_e32 v46, 0xffff0000, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_and_b32_e32 v45, 0xffff0000, v11
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v12
+; SI-NEXT: v_and_b32_e32 v42, 0xffff0000, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v24
; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v24
; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v14
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v27
+; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v27
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v27
; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v15
-; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v19
-; SI-NEXT: v_lshlrev_b32_e32 v42, 16, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v53, 0xffff0000, v16
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_and_b32_e32 v43, 0xffff0000, v18
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_and_b32_e32 v41, 0xffff0000, v20
+; SI-NEXT: v_and_b32_e32 v44, 0xffff0000, v20
; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v22
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v26
+; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v26
; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
@@ -149806,38 +149311,28 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_and_b32_e32 v63, 0xffff0000, v33
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_and_b32_e32 v60, 0xffff0000, v36
; SI-NEXT: s_waitcnt vmcnt(11)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v39
; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v39
-; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v36
-; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v6
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v36
-; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v33
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v8
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v58
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v7
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v33
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v56
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v8
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v47
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
@@ -149846,7 +149341,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v46
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v10
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
@@ -149857,8 +149352,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v11
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v44
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v42
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v12
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
@@ -149869,8 +149364,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v13
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v41
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v14
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
@@ -149878,7 +149373,7 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v27
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e32 v0, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v0, 1.0, v53
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v16
@@ -149946,13 +149441,14 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_and_b32_e32 v59, 0xffff0000, v33
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_mul_f32_e32 v51, 1.0, v63
-; SI-NEXT: v_mul_f32_e32 v63, 1.0, v58
+; SI-NEXT: v_mul_f32_e32 v51, 1.0, v59
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v29
; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
@@ -149964,45 +149460,52 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v21
; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; SI-NEXT: v_and_b32_e32 v55, 0xffff0000, v19
+; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v17
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
+; SI-NEXT: v_and_b32_e32 v57, 0xffff0000, v38
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: v_mul_f32_e32 v27, 1.0, v15
+; SI-NEXT: ; kill: killed $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: v_mul_f32_e32 v41, 1.0, v15
; SI-NEXT: v_mul_f32_e32 v49, 1.0, v49
; SI-NEXT: v_mul_f32_e32 v53, 1.0, v17
-; SI-NEXT: v_mul_f32_e32 v43, 1.0, v43
+; SI-NEXT: v_mul_f32_e32 v47, 1.0, v43
; SI-NEXT: v_mul_f32_e32 v55, 1.0, v55
-; SI-NEXT: v_mul_f32_e32 v19, 1.0, v42
-; SI-NEXT: v_mul_f32_e32 v9, 1.0, v41
-; SI-NEXT: v_mul_f32_e32 v62, 1.0, v40
-; SI-NEXT: v_mul_f32_e32 v21, 1.0, v21
-; SI-NEXT: v_mul_f32_e32 v56, 1.0, v54
-; SI-NEXT: v_mul_f32_e32 v42, 1.0, v52
-; SI-NEXT: v_mul_f32_e32 v41, 1.0, v23
-; SI-NEXT: v_mul_f32_e32 v33, 1.0, v50
-; SI-NEXT: v_mul_f32_e32 v57, 1.0, v48
-; SI-NEXT: v_mul_f32_e32 v36, 1.0, v25
-; SI-NEXT: v_mul_f32_e32 v16, 1.0, v38
-; SI-NEXT: v_mul_f32_e32 v45, 1.0, v37
-; SI-NEXT: v_mul_f32_e32 v61, 1.0, v35
-; SI-NEXT: v_mul_f32_e32 v12, 1.0, v34
-; SI-NEXT: v_mul_f32_e32 v24, 1.0, v28
-; SI-NEXT: v_mul_f32_e32 v44, 1.0, v32
-; SI-NEXT: v_mul_f32_e32 v47, 1.0, v29
+; SI-NEXT: v_mul_f32_e32 v43, 1.0, v19
+; SI-NEXT: v_mul_f32_e32 v6, 1.0, v44
+; SI-NEXT: v_mul_f32_e32 v24, 1.0, v40
+; SI-NEXT: v_mul_f32_e32 v42, 1.0, v21
+; SI-NEXT: v_mul_f32_e32 v61, 1.0, v54
+; SI-NEXT: v_mul_f32_e32 v19, 1.0, v52
+; SI-NEXT: v_mul_f32_e32 v63, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v45, 1.0, v50
+; SI-NEXT: v_mul_f32_e32 v56, 1.0, v48
+; SI-NEXT: v_mul_f32_e32 v22, 1.0, v25
+; SI-NEXT: v_mul_f32_e32 v46, 1.0, v37
+; SI-NEXT: v_mul_f32_e32 v58, 1.0, v36
+; SI-NEXT: v_mul_f32_e32 v36, 1.0, v35
+; SI-NEXT: v_mul_f32_e32 v16, 1.0, v34
+; SI-NEXT: v_mul_f32_e32 v39, 1.0, v28
+; SI-NEXT: v_mul_f32_e32 v60, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v13, 1.0, v29
; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
-; SI-NEXT: v_mul_f32_e32 v46, 1.0, v60
-; SI-NEXT: v_mul_f32_e32 v60, 1.0, v59
+; SI-NEXT: v_mul_f32_e32 v57, 1.0, v57
+; SI-NEXT: v_mul_f32_e32 v62, 1.0, v38
+; SI-NEXT: v_mul_f32_e32 v44, 1.0, v33
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; kill: killed $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr35
@@ -150011,39 +149514,37 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr23
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr15
-; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr8
-; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr4
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr3
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; kill: killed $vgpr7
; SI-NEXT: ; implicit-def: $vgpr7
-; SI-NEXT: ; kill: killed $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; kill: killed $vgpr59
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_mul_f32_e32 v6, 1.0, v0
-; SI-NEXT: ; implicit-def: $vgpr0
-; SI-NEXT: ; kill: killed $vgpr0
+; SI-NEXT: v_mul_f32_e32 v10, 1.0, v0
; SI-NEXT: ; implicit-def: $vgpr0
; SI-NEXT: ; kill: killed $vgpr0
; SI-NEXT: ; implicit-def: $vgpr0
@@ -150139,12 +149640,12 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(6)
@@ -150172,8 +149673,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v26, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v25, v0, v1, 16
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v59
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -150184,9 +149685,9 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_alignbit_b32 v23, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v58
+; SI-NEXT: v_alignbit_b32 v21, v0, v1, 16
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v33
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v54, v0, v1, 16
@@ -150197,28 +149698,28 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_alignbit_b32 v18, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v39
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_alignbit_b32 v52, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
-; SI-NEXT: v_alignbit_b32 v15, v0, v27, 16
-; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v15, v0, v41, 16
+; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v50, v0, v1, 16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v13, v0, v53, 16
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v12, v0, v53, 16
+; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -150227,115 +149728,131 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: v_alignbit_b32 v11, v0, v19, 16
+; SI-NEXT: v_alignbit_b32 v9, v0, v43, 16
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v53
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_alignbit_b32 v37, v0, v1, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v8, v0, v42, 16
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v24
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_alignbit_b32 v34, v0, v1, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v19
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v5, v0, v63, 16
+; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v19
+; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1) expcnt(0)
+; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
+; SI-NEXT: v_alignbit_b32 v4, v1, v22, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; SI-NEXT: v_alignbit_b32 v28, v1, v2, 16
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v58
+; SI-NEXT: v_alignbit_b32 v3, v1, v36, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v6
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v61
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v45
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v46
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v10
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v51
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 24
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 16
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_alignbit_b32 v37, v0, v1, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v62
-; SI-NEXT: v_alignbit_b32 v8, v0, v21, 16
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 24
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v55
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 8
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v59
-; SI-NEXT: v_mov_b32_e32 v59, v19
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_alignbit_b32 v34, v0, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v42
-; SI-NEXT: v_alignbit_b32 v5, v0, v41, 16
-; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v41
-; SI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(4) expcnt(0)
-; SI-NEXT: v_alignbit_b32 v0, v0, v1, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57
-; SI-NEXT: v_alignbit_b32 v4, v1, v36, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v43
-; SI-NEXT: v_alignbit_b32 v28, v1, v2, 16
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v45
-; SI-NEXT: v_alignbit_b32 v3, v1, v61, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
@@ -150345,123 +149862,144 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 24
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 16
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v9
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v56
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v33
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v12
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr9
-; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr61
-; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_alignbit_b32 v25, v1, v2, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v44
-; SI-NEXT: v_alignbit_b32 v2, v1, v47, 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
-; SI-NEXT: v_alignbit_b32 v22, v1, v7, 16
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v33
-; SI-NEXT: v_alignbit_b32 v20, v7, v10, 16
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_alignbit_b32 v26, v1, v2, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v60
+; SI-NEXT: v_alignbit_b32 v2, v1, v13, 16
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61
+; SI-NEXT: v_alignbit_b32 v23, v1, v7, 16
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v45
+; SI-NEXT: v_alignbit_b32 v20, v7, v11, 16
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 16
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 8
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 16
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v46
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v46
-; SI-NEXT: v_alignbit_b32 v1, v1, v60, 16
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v57
+; SI-NEXT: v_alignbit_b32 v1, v1, v62, 16
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v59
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v33
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v27
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v41
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v49
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v53
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v24
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v19
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v47
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: s_waitcnt vmcnt(12)
-; SI-NEXT: v_alignbit_b32 v17, v7, v10, 16
+; SI-NEXT: ; implicit-def: $vgpr13
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_alignbit_b32 v17, v7, v11, 16
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v12
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16
-; SI-NEXT: v_alignbit_b32 v14, v7, v24, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v14, v7, v39, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
-; SI-NEXT: v_alignbit_b32 v10, v19, v30, 16
+; SI-NEXT: v_alignbit_b32 v6, v14, v3, 24
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v10
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
+; SI-NEXT: v_alignbit_b32 v11, v7, v30, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 24
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 24
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v51
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 16
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 16
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v7, v7, v63, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v7, v7, v44, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v6, v7, v1, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
@@ -150476,40 +150014,40 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v25
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v26
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v22
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v23
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v10
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v11
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
@@ -150565,219 +150103,183 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v58
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v39
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v27
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v49
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v53
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v55
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v41
+; SI-NEXT: ; kill: killed $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v43
+; SI-NEXT: ; kill: killed $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; kill: killed $vgpr6
; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v39, v14, v3, 24
-; SI-NEXT: v_alignbit_b32 v58, v7, v1, 8
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; kill: killed $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr10
+; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr63
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: .LBB90_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB90_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v46
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v60
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v62
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v60
; SI-NEXT: v_alignbit_b32 v1, v1, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v47
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v13
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v45
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58
; SI-NEXT: v_alignbit_b32 v2, v2, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v61
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v57
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v56
; SI-NEXT: v_alignbit_b32 v3, v3, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v36
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v22
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v51
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v42
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v5
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v41
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v5
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v63
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_alignbit_b32 v4, v4, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v63
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v44
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v24
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v5, v7, v5, 16
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v36
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v62
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v13
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v42
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v7, v7, v0, 16
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v21
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v12
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v55
-; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v6
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v11
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
-; SI-NEXT: v_alignbit_b32 v8, v10, v8, 16
-; SI-NEXT: v_alignbit_b32 v10, v59, v0, 16
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v11, v13, v11, 16
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v12
-; SI-NEXT: v_alignbit_b32 v14, v13, v0, 16
+; SI-NEXT: v_alignbit_b32 v8, v9, v8, 16
+; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v10
+; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v11, v9, v0, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v55
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v9
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v43
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v39
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
+; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_alignbit_b32 v9, v12, v9, 16
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v16
+; SI-NEXT: v_alignbit_b32 v14, v12, v0, 16
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v16
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v46
; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v49
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v53
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v53
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_alignbit_b32 v13, v15, v13, 16
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v16
+; SI-NEXT: v_alignbit_b32 v12, v15, v12, 16
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v19
; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v36
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v58, v7, v1, 8
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v17, v15, v0, 16
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v33
-; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v27
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v45
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v15
+; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v41
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
+; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
; SI-NEXT: v_alignbit_b32 v15, v18, v15, 16
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v21
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v22
; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v19
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
; SI-NEXT: s_waitcnt vmcnt(13)
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v26
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
+; SI-NEXT: s_waitcnt vmcnt(11)
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v25
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
+; SI-NEXT: v_alignbit_b32 v25, v28, v25, 16
; SI-NEXT: s_waitcnt vmcnt(9)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
-; SI-NEXT: v_alignbit_b32 v29, v30, v29, 16
-; SI-NEXT: s_waitcnt vmcnt(8)
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v29
+; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v34
; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v34
-; SI-NEXT: v_alignbit_b32 v32, v34, v32, 16
-; SI-NEXT: s_waitcnt vmcnt(7)
-; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v32
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
-; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v35
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v35
+; SI-NEXT: s_waitcnt vmcnt(8)
+; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
+; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v38
-; SI-NEXT: v_alignbit_b32 v35, v38, v35, 16
-; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: s_waitcnt vmcnt(7)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_and_b32_e32 v50, 0xffff0000, v50
-; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: s_waitcnt vmcnt(5)
; SI-NEXT: v_and_b32_e32 v52, 0xffff0000, v52
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: s_waitcnt vmcnt(4)
; SI-NEXT: v_and_b32_e32 v54, 0xffff0000, v54
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(3)
; SI-NEXT: v_and_b32_e32 v40, 0xffff0000, v40
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_add_f32_e32 v51, 0x40c00000, v50
@@ -150793,118 +150295,125 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: s_waitcnt vmcnt(6)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
; SI-NEXT: v_alignbit_b32 v20, v18, v0, 16
; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v56
+; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v61
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:560 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v18
; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(6)
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
+; SI-NEXT: v_alignbit_b32 v29, v32, v29, 16
+; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
-; SI-NEXT: v_alignbit_b32 v18, v19, v18, 16
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v27
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v22, v19, v0, 16
-; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v18, v21, v18, 16
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v27
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v23, v21, v0, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v23, v23, v19, 16
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v9
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v25, v19, v0, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v43
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v19
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:556 ; 4-byte Folded Reload
+; SI-NEXT: v_alignbit_b32 v21, v24, v21, 16
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v6
+; SI-NEXT: v_alignbit_b32 v26, v24, v0, 16
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:536 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v9
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v47
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
+; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v24
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v6
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v27
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v27
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v21
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v22
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v16
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v19
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v12
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(6)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; SI-NEXT: s_waitcnt vmcnt(5)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v10
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v6, 24, v13
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v24
+; SI-NEXT: s_waitcnt vmcnt(9)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
-; SI-NEXT: v_alignbit_b32 v26, v26, v19, 16
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24
-; SI-NEXT: v_alignbit_b32 v28, v19, v0, 16
+; SI-NEXT: v_alignbit_b32 v28, v28, v0, 16
; SI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xffff0000, v0
; SI-NEXT: v_add_f32_e32 v0, 0x40c00000, v0
+; SI-NEXT: v_alignbit_b32 v0, v32, v0, 16
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v19
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; SI-NEXT: v_alignbit_b32 v0, v30, v0, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v19
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v24
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v30
-; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v34, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v30
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v30
-; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v30
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v32
+; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v32
+; SI-NEXT: v_add_f32_e32 v32, 0x40c00000, v32
+; SI-NEXT: v_alignbit_b32 v32, v35, v32, 16
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v33
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v34, v35, v34, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v34, v34, v33, 16
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v30
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v33
-; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v33, 0xffff0000, v33
-; SI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v33
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
+; SI-NEXT: v_add_f32_e32 v37, 0x40c00000, v35
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
+; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v35
+; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v35
+; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v35
+; SI-NEXT: v_alignbit_b32 v35, v38, v35, 16
+; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v36
; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v37, v38, v37, 16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v33
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v36
+; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v33
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
+; SI-NEXT: v_mov_b32_e32 v27, v36
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v48, 0x40c00000, v38
-; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v38, 0xffff0000, v38
; SI-NEXT: v_add_f32_e32 v39, 0x40c00000, v38
@@ -150914,95 +150423,104 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v38, 0x40c00000, v38
; SI-NEXT: v_alignbit_b32 v38, v49, v38, 16
; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v39
; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: v_alignbit_b32 v48, v49, v48, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v39
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v39, v14, v3, 24
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v50, v50, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v52, v52, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v54, v54, v49, 16
-; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v49, 0xffff0000, v49
; SI-NEXT: v_add_f32_e32 v49, 0x40c00000, v49
; SI-NEXT: v_alignbit_b32 v40, v40, v49, 16
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v41
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v55
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v53
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v40, v38, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v51
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v54, v35, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v52, v32, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v50, v29, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 24
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 16
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v48, v26, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v48, v25, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v37, v23, 8
+; SI-NEXT: v_alignbit_b32 v6, v37, v21, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v34, v18, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
@@ -151013,71 +150531,77 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v6, v0, v15, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 24
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 16
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v28, v13, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v28, v12, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 16
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v25, v11, 8
+; SI-NEXT: v_alignbit_b32 v6, v26, v9, 8
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 24
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 16
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v22, v8, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v23, v8, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 16
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v20, v5, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v17, v4, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
+; SI-NEXT: v_alignbit_b32 v6, v14, v3, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v14, v3, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v14, v3, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 16
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 24
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v6, v10, v2, 8
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 16
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v6, v11, v2, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 24
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v6, v7, v1, 16
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v6, v7, v1, 8
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v40
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
@@ -151092,380 +150616,346 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v48
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v37
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v34
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v0
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v28
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v25
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v26
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v22
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v23
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v20
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v41
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v17
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v55
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v14
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v53
+; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v11
; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v10
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v51
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v6, 8, v7
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: .LBB90_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v38
; SI-NEXT: v_and_b32_e32 v0, 0xff, v0
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v40
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 4, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v35
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 8, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v54
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 12, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v32
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 16, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v52
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 20, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v29
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 24, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v50
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 28, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v26
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v25
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 32, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v48
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 36, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v23
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v21
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 40, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v37
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 44, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v18
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 48, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v34
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v27
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 52, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v15
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
+; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v6, v6, v9
-; SI-NEXT: v_add_i32_e32 v9, vcc, 56, v31
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: v_or_b32_e32 v10, v13, v10
+; SI-NEXT: v_or_b32_e32 v6, v6, v10
+; SI-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v33
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v9, v6
+; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 60, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:60
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v13
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v12
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v9, v6
+; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 64, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v28
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v59
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_or_b32_e32 v6, v9, v6
+; SI-NEXT: v_or_b32_e32 v6, v10, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x44, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:68
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v11
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v9
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
@@ -151478,11 +150968,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v9, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v25
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v26
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
@@ -151496,12 +150985,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v9, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x4c, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:76
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v8
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
@@ -151514,11 +151002,10 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x50, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v23
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
@@ -151532,12 +151019,11 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT: v_or_b32_e32 v6, v8, v6
; SI-NEXT: v_or_b32_e32 v0, v0, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x54, v31
-; SI-NEXT: buffer_store_dword v0, v6, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v5
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
@@ -151550,9 +151036,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x58, v31
-; SI-NEXT: buffer_store_dword v0, v5, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v20
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
@@ -151568,16 +151053,15 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v0, v0, v5
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x5c, v31
-; SI-NEXT: buffer_store_dword v0, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
@@ -151586,9 +151070,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x60, v31
-; SI-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v17
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
@@ -151604,25 +151087,25 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v0, v0, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x64, v31
-; SI-NEXT: buffer_store_dword v0, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v39
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x68, v31
-; SI-NEXT: buffer_store_dword v0, v3, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:104
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v14
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
@@ -151630,84 +151113,83 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v0, v0, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x6c, v31
-; SI-NEXT: buffer_store_dword v0, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v31
-; SI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v0, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v0, 0xff, v11
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v59
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v0, v0, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v31
-; SI-NEXT: buffer_store_dword v0, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v58
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v31
-; SI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v0, 0xff, v7
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v2
-; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v0, v0, v1
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x7c, v31
-; SI-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v0, v31, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -151749,53 +151231,113 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; kill: killed $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr35
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr49
-; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr36
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr44
+; VI-NEXT: ; implicit-def: $vgpr34
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr61
; VI-NEXT: ; implicit-def: $vgpr57
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr38
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; kill: killed $vgpr39
+; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr52
-; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v33
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; kill: killed $vgpr33
@@ -151860,266 +151402,181 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; kill: killed $vgpr33
; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: v_mov_b32_e32 v55, v53
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[21:22]
+; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v16
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, v53
-; VI-NEXT: v_mov_b32_e32 v53, v40
+; VI-NEXT: v_mov_b32_e32 v44, v39
+; VI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v29
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v28
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v27
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17
-; VI-NEXT: v_mov_b32_e32 v38, v45
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v1
-; VI-NEXT: v_mov_b32_e32 v39, v46
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v17
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v15
; VI-NEXT: .LBB90_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB90_4
@@ -152395,7 +151852,6 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_cndmask_b32_e32 v32, v34, v35, vcc
; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v32
; VI-NEXT: v_alignbit_b32 v32, v32, v33, 16
-; VI-NEXT: s_waitcnt vmcnt(14)
; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v31
; VI-NEXT: v_add_f32_e32 v33, 0x40c00000, v33
; VI-NEXT: v_bfe_u32 v34, v33, 16, 1
@@ -152703,29 +152159,8 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
; VI-NEXT: v_alignbit_b32 v15, v15, v33, 16
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[13:14]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[1:2]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[31:32]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
@@ -152739,474 +152174,443 @@ define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[17:18]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v16
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v15
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v14
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v13
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v12
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v11
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v10
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v9
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v8
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v6
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v5
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v4
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v32
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v32
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v30
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v30
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v29
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v27
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v26
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v25
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v23
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[50:51], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[51:52], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[52:53], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v22
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v21
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v20
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v19
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v18
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v1
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v29
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v28
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v28
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v27
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v27
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v16
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v1
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v20
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v38, 8, v20
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v17
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v17
; VI-NEXT: .LBB90_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v1, v1, v40, s4
-; VI-NEXT: v_perm_b32 v2, v2, v35, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v45, v39, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v33, 16, v45
-; VI-NEXT: v_or_b32_e32 v1, v1, v33
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v53, v49, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v55, v55, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v37, v37, v42, s4
+; VI-NEXT: v_perm_b32 v53, v59, v43, s4
+; VI-NEXT: v_perm_b32 v1, v1, v60, s4
+; VI-NEXT: v_perm_b32 v33, v33, v39, s4
+; VI-NEXT: v_lshlrev_b32_e32 v39, 16, v53
+; VI-NEXT: v_or_b32_e32 v1, v1, v39
+; VI-NEXT: v_perm_b32 v2, v2, v58, s4
+; VI-NEXT: v_perm_b32 v3, v3, v56, s4
+; VI-NEXT: v_perm_b32 v4, v4, v45, s4
+; VI-NEXT: v_perm_b32 v17, v17, v34, s4
+; VI-NEXT: v_perm_b32 v18, v18, v48, s4
+; VI-NEXT: v_perm_b32 v34, v63, v52, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
-; VI-NEXT: v_perm_b32 v1, v36, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v37, s4
-; VI-NEXT: v_perm_b32 v1, v4, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v5, v5, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v5, v55, s4
-; VI-NEXT: v_perm_b32 v1, v48, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v6, v6, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v6, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v54, v41, v54, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v7, v54, s4
-; VI-NEXT: v_perm_b32 v1, v44, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v51, v47, s4
-; VI-NEXT: v_perm_b32 v1, v8, v56, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v7, v7, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v8, v8, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v51, v41, v51, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v9, v9, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v10, v10, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v50, v41, v50, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v11, v11, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v12, v12, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v49, v41, v49, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v13, v13, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v14, v14, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v9, v63, s4
+; VI-NEXT: v_perm_b32 v40, v40, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v15, v15, v41, s4
+; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v16, v16, v41, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v39, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v10, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v55
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v11, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v54
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v60, s4
-; VI-NEXT: v_perm_b32 v1, v41, v1, s4
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v40
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v34
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
+; VI-NEXT: v_perm_b32 v1, v1, v44, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v33
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v1, v62, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: v_perm_b32 v1, v19, v57, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v47, v46, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_perm_b32 v1, v20, v38, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v21, v36, s4
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v2, v35, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v22, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v23, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v24, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v27, v50, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v59, v2, s4
+; VI-NEXT: v_perm_b32 v1, v27, v1, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v57, s4
-; VI-NEXT: v_perm_b32 v1, v28, v58, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v29, v38, s4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v42, v2, s4
+; VI-NEXT: v_perm_b32 v1, v29, v1, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v30, v52, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v30, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v31, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v32, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -157016,9 +156420,9 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
@@ -157069,37 +156473,36 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v63, s99, 33
; SI-NEXT: v_writelane_b32 v63, s30, 34
; SI-NEXT: v_writelane_b32 v63, s31, 35
+; SI-NEXT: v_readfirstlane_b32 s58, v14
; SI-NEXT: v_readfirstlane_b32 s56, v15
+; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
; SI-NEXT: s_and_b32 s57, s56, 0xffff0000
+; SI-NEXT: v_readfirstlane_b32 s88, v7
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s59
; SI-NEXT: v_readfirstlane_b32 s46, v16
; SI-NEXT: s_lshl_b32 s56, s56, 16
-; SI-NEXT: v_readfirstlane_b32 s78, v8
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s57
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s57
+; SI-NEXT: v_readfirstlane_b32 s42, v18
; SI-NEXT: v_readfirstlane_b32 s44, v17
; SI-NEXT: s_and_b32 s47, s46, 0xffff0000
; SI-NEXT: s_lshl_b32 s46, s46, 16
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s56
-; SI-NEXT: v_readfirstlane_b32 s42, v18
-; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
-; SI-NEXT: s_lshl_b32 s44, s44, 16
-; SI-NEXT: v_readfirstlane_b32 s58, v14
; SI-NEXT: v_readfirstlane_b32 s60, v13
; SI-NEXT: v_readfirstlane_b32 s62, v12
; SI-NEXT: v_readfirstlane_b32 s72, v11
; SI-NEXT: v_readfirstlane_b32 s74, v10
; SI-NEXT: v_readfirstlane_b32 s76, v9
-; SI-NEXT: v_readfirstlane_b32 s88, v7
+; SI-NEXT: v_readfirstlane_b32 s78, v8
; SI-NEXT: v_readfirstlane_b32 s90, v6
; SI-NEXT: v_readfirstlane_b32 s92, v5
; SI-NEXT: v_readfirstlane_b32 s94, v4
; SI-NEXT: v_readfirstlane_b32 vcc_lo, v3
; SI-NEXT: v_readfirstlane_b32 s30, v2
; SI-NEXT: v_readfirstlane_b32 s34, v1
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s46
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s56
; SI-NEXT: s_and_b32 s4, s29, 0xffff0000
; SI-NEXT: s_lshl_b32 s5, s29, 16
; SI-NEXT: s_and_b32 s6, s28, 0xffff0000
@@ -157130,7 +156533,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_and_b32 s43, s42, 0xffff0000
; SI-NEXT: s_lshl_b32 s42, s42, 16
-; SI-NEXT: s_and_b32 s59, s58, 0xffff0000
+; SI-NEXT: s_and_b32 s45, s44, 0xffff0000
+; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: s_lshl_b32 s58, s58, 16
; SI-NEXT: s_and_b32 s61, s60, 0xffff0000
; SI-NEXT: s_lshl_b32 s60, s60, 16
@@ -157159,415 +156563,396 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s35, s34, 0xffff0000
; SI-NEXT: s_lshl_b32 s34, s34, 16
; SI-NEXT: v_readfirstlane_b32 s36, v19
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s44
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s46
; SI-NEXT: s_cmp_lg_u32 s36, 0
; SI-NEXT: v_mul_f32_e64 v10, 1.0, s41
-; SI-NEXT: v_mul_f32_e64 v15, 1.0, s16
-; SI-NEXT: v_mul_f32_e64 v7, 1.0, s40
-; SI-NEXT: v_mul_f32_e64 v4, 1.0, s17
-; SI-NEXT: v_mul_f32_e64 v24, 1.0, s29
+; SI-NEXT: v_mul_f32_e64 v14, 1.0, s16
+; SI-NEXT: v_mul_f32_e64 v6, 1.0, s40
+; SI-NEXT: v_mul_f32_e64 v3, 1.0, s17
+; SI-NEXT: v_mul_f32_e64 v21, 1.0, s29
; SI-NEXT: v_mul_f32_e64 v25, 1.0, s18
-; SI-NEXT: v_mul_f32_e64 v9, 1.0, s28
-; SI-NEXT: v_mul_f32_e64 v19, 1.0, s19
+; SI-NEXT: v_mul_f32_e64 v8, 1.0, s28
+; SI-NEXT: v_mul_f32_e64 v18, 1.0, s19
; SI-NEXT: v_mul_f32_e64 v27, 1.0, s27
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s20
-; SI-NEXT: v_mul_f32_e64 v21, 1.0, s26
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s20
+; SI-NEXT: v_mul_f32_e64 v60, 1.0, s26
; SI-NEXT: v_mul_f32_e64 v26, 1.0, s21
-; SI-NEXT: v_mul_f32_e64 v52, 1.0, s25
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s22
-; SI-NEXT: v_mul_f32_e64 v14, 1.0, s24
-; SI-NEXT: v_mul_f32_e64 v30, 1.0, s23
-; SI-NEXT: v_mul_f32_e64 v45, 1.0, s14
-; SI-NEXT: v_mul_f32_e64 v60, 1.0, s15
-; SI-NEXT: v_mul_f32_e64 v20, 1.0, s12
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s13
-; SI-NEXT: v_mul_f32_e64 v35, 1.0, s10
-; SI-NEXT: v_mul_f32_e64 v49, 1.0, s11
-; SI-NEXT: v_mul_f32_e64 v56, 1.0, s8
-; SI-NEXT: v_mul_f32_e64 v34, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v54, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v40, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v22, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v2, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v38, 1.0, s35
-; SI-NEXT: v_mul_f32_e64 v42, 1.0, s34
-; SI-NEXT: v_mul_f32_e64 v48, 1.0, s31
-; SI-NEXT: v_mul_f32_e64 v11, 1.0, s30
-; SI-NEXT: v_mul_f32_e64 v51, 1.0, vcc_hi
-; SI-NEXT: v_mul_f32_e64 v50, 1.0, vcc_lo
-; SI-NEXT: v_mul_f32_e64 v53, 1.0, s95
-; SI-NEXT: v_mul_f32_e64 v16, 1.0, s94
-; SI-NEXT: v_mul_f32_e64 v44, 1.0, s93
-; SI-NEXT: v_mul_f32_e64 v47, 1.0, s92
-; SI-NEXT: v_mul_f32_e64 v41, 1.0, s91
-; SI-NEXT: v_mul_f32_e64 v32, 1.0, s90
-; SI-NEXT: v_mul_f32_e64 v57, 1.0, s89
-; SI-NEXT: v_mul_f32_e64 v59, 1.0, s88
-; SI-NEXT: v_mul_f32_e64 v46, 1.0, s79
-; SI-NEXT: v_mul_f32_e64 v17, 1.0, s78
-; SI-NEXT: v_mul_f32_e64 v3, 1.0, s77
+; SI-NEXT: v_mul_f32_e64 v38, 1.0, s25
+; SI-NEXT: v_mul_f32_e64 v50, 1.0, s22
+; SI-NEXT: v_mul_f32_e64 v15, 1.0, s24
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s23
+; SI-NEXT: v_mul_f32_e64 v59, 1.0, s14
+; SI-NEXT: v_mul_f32_e64 v29, 1.0, s15
+; SI-NEXT: v_mul_f32_e64 v17, 1.0, s12
+; SI-NEXT: v_mul_f32_e64 v45, 1.0, s13
+; SI-NEXT: v_mul_f32_e64 v31, 1.0, s10
+; SI-NEXT: v_mul_f32_e64 v51, 1.0, s11
+; SI-NEXT: v_mul_f32_e64 v23, 1.0, s8
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s9
+; SI-NEXT: v_mul_f32_e64 v53, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v55, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v24, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v9, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v36, 1.0, s35
+; SI-NEXT: v_mul_f32_e64 v41, 1.0, s34
+; SI-NEXT: v_mul_f32_e64 v39, 1.0, s31
+; SI-NEXT: v_mul_f32_e64 v34, 1.0, s30
+; SI-NEXT: v_mul_f32_e64 v2, 1.0, vcc_hi
+; SI-NEXT: v_mul_f32_e64 v49, 1.0, vcc_lo
+; SI-NEXT: v_mul_f32_e64 v52, 1.0, s95
+; SI-NEXT: v_mul_f32_e64 v54, 1.0, s94
+; SI-NEXT: v_mul_f32_e64 v43, 1.0, s93
+; SI-NEXT: v_mul_f32_e64 v46, 1.0, s92
+; SI-NEXT: v_mul_f32_e64 v40, 1.0, s91
+; SI-NEXT: v_mul_f32_e64 v42, 1.0, s90
+; SI-NEXT: v_mul_f32_e64 v56, 1.0, s89
+; SI-NEXT: v_mul_f32_e64 v58, 1.0, s88
+; SI-NEXT: v_mul_f32_e64 v44, 1.0, s79
+; SI-NEXT: v_mul_f32_e64 v47, 1.0, s78
+; SI-NEXT: v_mul_f32_e64 v12, 1.0, s77
; SI-NEXT: v_mul_f32_e64 v1, 1.0, s76
-; SI-NEXT: v_mul_f32_e64 v58, 1.0, s75
-; SI-NEXT: v_mul_f32_e64 v23, 1.0, s74
-; SI-NEXT: v_mul_f32_e64 v6, 1.0, s73
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s72
-; SI-NEXT: v_mul_f32_e64 v5, 1.0, s63
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s62
-; SI-NEXT: v_mul_f32_e64 v43, 1.0, s61
-; SI-NEXT: v_mul_f32_e64 v13, 1.0, s60
-; SI-NEXT: v_mul_f32_e64 v12, 1.0, s59
-; SI-NEXT: v_mul_f32_e64 v55, 1.0, s58
-; SI-NEXT: v_mul_f32_e64 v18, 1.0, s47
-; SI-NEXT: v_mul_f32_e64 v39, 1.0, s45
-; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v57, 1.0, s75
+; SI-NEXT: v_mul_f32_e64 v22, 1.0, s74
+; SI-NEXT: v_mul_f32_e64 v5, 1.0, s73
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s72
+; SI-NEXT: v_mul_f32_e64 v11, 1.0, s63
+; SI-NEXT: v_mul_f32_e64 v4, 1.0, s62
+; SI-NEXT: v_mul_f32_e64 v16, 1.0, s61
+; SI-NEXT: v_mul_f32_e64 v33, 1.0, s60
+; SI-NEXT: v_mul_f32_e64 v13, 1.0, s58
+; SI-NEXT: v_mul_f32_e64 v19, 1.0, s47
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_mul_f32_e64 v37, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v48, 1.0, s44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mul_f32_e64 v8, 1.0, s43
-; SI-NEXT: v_mul_f32_e64 v37, 1.0, s42
+; SI-NEXT: v_mul_f32_e64 v7, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v20, 1.0, s42
+; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr62 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr61 : SGPR spill to VGPR lane
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT: s_cbranch_scc0 .LBB91_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_readfirstlane_b32 s4, v10
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v15
+; SI-NEXT: v_readfirstlane_b32 s4, v14
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v7
-; SI-NEXT: s_lshr_b32 s7, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v24
+; SI-NEXT: v_readfirstlane_b32 s4, v6
+; SI-NEXT: s_lshr_b32 s97, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v21
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
; SI-NEXT: s_lshr_b64 s[86:87], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: s_lshr_b32 s65, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v8
+; SI-NEXT: s_lshr_b32 s31, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v27
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v29
-; SI-NEXT: v_mov_b32_e32 v10, v21
+; SI-NEXT: v_readfirstlane_b32 s4, v32
+; SI-NEXT: v_mov_b32_e32 v27, v60
; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v10
+; SI-NEXT: v_readfirstlane_b32 s4, v27
+; SI-NEXT: v_mov_b32_e32 v60, v23
+; SI-NEXT: v_mov_b32_e32 v23, v24
+; SI-NEXT: v_mov_b32_e32 v24, v40
+; SI-NEXT: v_mov_b32_e32 v40, v44
+; SI-NEXT: v_mov_b32_e32 v44, v57
+; SI-NEXT: v_mov_b32_e32 v57, v11
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s69, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v52
+; SI-NEXT: v_readfirstlane_b32 s4, v38
+; SI-NEXT: v_mov_b32_e32 v38, v22
+; SI-NEXT: v_mov_b32_e32 v20, v28
+; SI-NEXT: v_mov_b32_e32 v22, v33
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s88, v30
+; SI-NEXT: v_mov_b32_e32 v30, v55
+; SI-NEXT: v_mov_b32_e32 v55, v2
+; SI-NEXT: v_mov_b32_e32 v2, v12
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_readfirstlane_b32 s4, v50
; SI-NEXT: s_lshr_b64 s[66:67], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v14
+; SI-NEXT: v_readfirstlane_b32 s4, v15
; SI-NEXT: s_lshr_b32 s93, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v45
-; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v60
-; SI-NEXT: s_lshr_b64 s[52:53], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: s_lshr_b32 s39, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v35
-; SI-NEXT: v_mov_b32_e32 v35, v49
-; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v35
-; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v56
-; SI-NEXT: v_mov_b32_e32 v52, v54
-; SI-NEXT: s_lshr_b32 s91, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v52
-; SI-NEXT: v_mov_b32_e32 v45, v40
+; SI-NEXT: v_readfirstlane_b32 s4, v59
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v45
-; SI-NEXT: v_mov_b32_e32 v21, v22
-; SI-NEXT: v_readfirstlane_b32 s6, v4
-; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v21
-; SI-NEXT: v_mov_b32_e32 v4, v38
+; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s4, v17
; SI-NEXT: s_lshr_b32 s57, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v4
-; SI-NEXT: v_mov_b32_e32 v54, v42
+; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_mov_b32_e32 v31, v51
+; SI-NEXT: v_mov_b32_e32 v51, v9
+; SI-NEXT: v_mov_b32_e32 v9, v34
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v54
-; SI-NEXT: v_mov_b32_e32 v22, v48
+; SI-NEXT: v_readfirstlane_b32 s4, v31
; SI-NEXT: s_lshr_b64 s[94:95], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v22
-; SI-NEXT: v_mov_b32_e32 v40, v51
+; SI-NEXT: v_readfirstlane_b32 s4, v60
+; SI-NEXT: v_mov_b32_e32 v29, v53
; SI-NEXT: s_lshr_b32 s89, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v40
-; SI-NEXT: v_mov_b32_e32 v42, v50
+; SI-NEXT: v_readfirstlane_b32 s4, v29
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v42
-; SI-NEXT: v_mov_b32_e32 v49, v2
-; SI-NEXT: v_mov_b32_e32 v2, v11
+; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_lshr_b64 s[76:77], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s4, v23
+; SI-NEXT: v_mov_b32_e32 v50, v36
+; SI-NEXT: s_lshr_b32 s39, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v50
+; SI-NEXT: v_mov_b32_e32 v53, v41
+; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v53
-; SI-NEXT: v_mov_b32_e32 v11, v44
+; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s4, v39
+; SI-NEXT: s_lshr_b32 s91, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v55
+; SI-NEXT: v_mov_b32_e32 v41, v49
+; SI-NEXT: s_lshr_b32 s5, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s4, v41
+; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s4, v52
; SI-NEXT: s_lshr_b32 s73, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v11
+; SI-NEXT: v_readfirstlane_b32 s4, v43
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v47
+; SI-NEXT: v_readfirstlane_b32 s4, v46
; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v41
+; SI-NEXT: v_readfirstlane_b32 s4, v24
; SI-NEXT: s_lshr_b32 s59, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v57
+; SI-NEXT: v_readfirstlane_b32 s4, v56
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v59
+; SI-NEXT: v_readfirstlane_b32 s4, v58
; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v46
+; SI-NEXT: v_readfirstlane_b32 s4, v40
; SI-NEXT: s_lshr_b32 s45, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_readfirstlane_b32 s4, v2
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v1
-; SI-NEXT: v_mov_b32_e32 v44, v32
; SI-NEXT: s_lshr_b64 s[40:41], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v58
-; SI-NEXT: v_mov_b32_e32 v32, v13
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s4, v44
; SI-NEXT: s_lshr_b32 s29, s4, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_mov_b32_e32 v1, v9
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v9, v6
-; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: v_mov_b32_e32 v6, v36
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_readfirstlane_b32 s4, v5
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v6
-; SI-NEXT: v_mov_b32_e32 v3, v23
+; SI-NEXT: v_readfirstlane_b32 s4, v20
; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v5
-; SI-NEXT: v_mov_b32_e32 v23, v43
+; SI-NEXT: v_readfirstlane_b32 s4, v57
; SI-NEXT: s_lshr_b32 s23, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v23
+; SI-NEXT: v_readfirstlane_b32 s4, v16
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v32
+; SI-NEXT: v_readfirstlane_b32 s4, v22
; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v12
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: s_lshr_b32 s19, s4, 16
-; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 16
-; SI-NEXT: s_mov_b32 s9, s96
-; SI-NEXT: v_readfirstlane_b32 s90, v34
-; SI-NEXT: s_lshr_b64 s[82:83], s[90:91], 16
-; SI-NEXT: v_readfirstlane_b32 s64, v19
-; SI-NEXT: s_lshr_b64 s[84:85], s[64:65], 16
-; SI-NEXT: s_mov_b32 s87, s84
-; SI-NEXT: v_readfirstlane_b32 s68, v26
-; SI-NEXT: s_lshr_b64 s[70:71], s[68:69], 16
-; SI-NEXT: s_mov_b32 s81, s70
-; SI-NEXT: v_readfirstlane_b32 s92, v30
-; SI-NEXT: s_lshr_b64 s[48:49], s[92:93], 16
-; SI-NEXT: s_mov_b32 s67, s48
-; SI-NEXT: v_readfirstlane_b32 s38, v33
-; SI-NEXT: s_lshr_b64 s[98:99], s[38:39], 16
-; SI-NEXT: s_mov_b32 s53, s98
-; SI-NEXT: s_mov_b32 s35, s82
-; SI-NEXT: v_readfirstlane_b32 s56, v49
-; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16
-; SI-NEXT: s_mov_b32 s79, s30
-; SI-NEXT: v_readfirstlane_b32 s88, v2
-; SI-NEXT: s_lshr_b64 s[74:75], s[88:89], 16
-; SI-NEXT: s_mov_b32 s95, s74
-; SI-NEXT: v_mov_b32_e32 v38, v16
-; SI-NEXT: v_readfirstlane_b32 s72, v38
-; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
-; SI-NEXT: s_mov_b32 s77, s60
-; SI-NEXT: v_readfirstlane_b32 s58, v44
-; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16
-; SI-NEXT: s_mov_b32 s63, s54
-; SI-NEXT: v_mov_b32_e32 v15, v17
-; SI-NEXT: v_readfirstlane_b32 s44, v15
-; SI-NEXT: s_lshr_b64 s[42:43], s[44:45], 16
-; SI-NEXT: s_mov_b32 s47, s42
-; SI-NEXT: v_readfirstlane_b32 s28, v3
-; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16
-; SI-NEXT: s_mov_b32 s41, s26
-; SI-NEXT: v_mov_b32_e32 v17, v28
-; SI-NEXT: v_readfirstlane_b32 s22, v17
-; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16
-; SI-NEXT: s_mov_b32 s25, s36
-; SI-NEXT: v_mov_b32_e32 v28, v55
-; SI-NEXT: v_readfirstlane_b32 s18, v28
-; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 16
-; SI-NEXT: s_mov_b32 s17, s14
-; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v7
-; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v1
-; SI-NEXT: v_lshrrev_b32_e32 v7, 24, v20
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v53
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v8
-; SI-NEXT: s_lshr_b32 s88, s96, 8
-; SI-NEXT: s_lshr_b32 s61, s84, 8
-; SI-NEXT: s_lshr_b32 s72, s70, 8
-; SI-NEXT: s_lshr_b32 s75, s48, 8
-; SI-NEXT: s_lshr_b32 s58, s98, 8
-; SI-NEXT: s_lshr_b32 s43, s82, 8
-; SI-NEXT: s_lshr_b32 s44, s30, 8
-; SI-NEXT: s_mov_b32 s64, s74
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: s_lshr_b32 s5, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s96, v3
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_readfirstlane_b32 s12, v48
-; SI-NEXT: s_lshr_b32 s27, s74, 8
-; SI-NEXT: s_mov_b32 s92, s60
-; SI-NEXT: s_lshr_b32 s28, s60, 8
-; SI-NEXT: s_lshr_b32 s74, s54, 8
-; SI-NEXT: s_mov_b32 s68, s42
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_readfirstlane_b32 s4, v36
+; SI-NEXT: v_readfirstlane_b32 s4, v28
+; SI-NEXT: s_lshr_b32 s5, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s12, v33
+; SI-NEXT: s_lshr_b64 s[6:7], s[96:97], 16
+; SI-NEXT: s_mov_b32 s9, s6
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_readfirstlane_b32 s4, v12
; SI-NEXT: s_lshr_b64 s[10:11], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v19
; SI-NEXT: s_lshr_b32 s13, s4, 16
; SI-NEXT: s_mov_b32 s5, s13
; SI-NEXT: v_writelane_b32 v61, s4, 26
; SI-NEXT: v_writelane_b32 v61, s5, 27
-; SI-NEXT: v_readfirstlane_b32 s4, v39
+; SI-NEXT: v_readfirstlane_b32 s4, v37
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v51
+; SI-NEXT: v_readfirstlane_b32 s4, v48
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s5, v8
+; SI-NEXT: v_readfirstlane_b32 s5, v7
; SI-NEXT: s_lshr_b64 s[20:21], s[12:13], 16
; SI-NEXT: s_lshr_b32 s13, s5, 16
-; SI-NEXT: v_readfirstlane_b32 s12, v37
+; SI-NEXT: v_readfirstlane_b32 s90, v9
+; SI-NEXT: s_lshr_b64 s[82:83], s[90:91], 16
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_readfirstlane_b32 s12, v34
; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
; SI-NEXT: s_mov_b32 s5, vcc_lo
; SI-NEXT: s_mov_b32 s90, vcc_lo
-; SI-NEXT: s_lshr_b32 s6, vcc_lo, 8
+; SI-NEXT: s_lshr_b32 s7, vcc_lo, 8
; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 4
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 5
; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s30, v18
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 2
+; SI-NEXT: s_lshr_b64 s[84:85], s[30:31], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 3
; SI-NEXT: s_lshr_b64 vcc, s[8:9], 8
+; SI-NEXT: s_mov_b32 s87, s84
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 0
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 1
; SI-NEXT: s_lshr_b64 vcc, s[86:87], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 10
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 11
; SI-NEXT: s_lshr_b64 vcc, s[86:87], 16
+; SI-NEXT: v_readfirstlane_b32 s68, v26
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 8
+; SI-NEXT: s_lshr_b64 s[70:71], s[68:69], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 9
; SI-NEXT: s_lshr_b64 vcc, s[86:87], 8
+; SI-NEXT: s_mov_b32 s81, s70
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 6
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 7
; SI-NEXT: s_lshr_b64 vcc, s[80:81], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 17
; SI-NEXT: s_lshr_b64 vcc, s[80:81], 16
+; SI-NEXT: v_readfirstlane_b32 s92, v35
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 14
+; SI-NEXT: s_lshr_b64 s[64:65], s[92:93], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 15
; SI-NEXT: s_lshr_b64 vcc, s[80:81], 8
+; SI-NEXT: s_mov_b32 s67, s64
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 12
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 13
; SI-NEXT: s_lshr_b64 vcc, s[66:67], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 22
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 23
; SI-NEXT: s_lshr_b64 vcc, s[66:67], 16
+; SI-NEXT: v_readfirstlane_b32 s56, v45
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 20
+; SI-NEXT: s_lshr_b64 s[48:49], s[56:57], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 21
; SI-NEXT: s_lshr_b64 vcc, s[66:67], 8
+; SI-NEXT: s_mov_b32 s51, s48
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 18
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 19
-; SI-NEXT: s_lshr_b64 vcc, s[52:53], 24
+; SI-NEXT: s_lshr_b64 vcc, s[50:51], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 28
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 29
-; SI-NEXT: s_lshr_b64 vcc, s[52:53], 16
+; SI-NEXT: s_lshr_b64 vcc, s[50:51], 16
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 26
+; SI-NEXT: s_lshr_b64 s[74:75], s[88:89], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 27
-; SI-NEXT: s_lshr_b64 vcc, s[52:53], 8
+; SI-NEXT: s_lshr_b64 vcc, s[50:51], 8
+; SI-NEXT: s_mov_b32 s95, s74
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 24
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 25
-; SI-NEXT: s_lshr_b64 vcc, s[34:35], 24
+; SI-NEXT: s_lshr_b64 vcc, s[94:95], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 34
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 35
-; SI-NEXT: s_lshr_b64 vcc, s[34:35], 16
+; SI-NEXT: s_lshr_b64 vcc, s[94:95], 16
+; SI-NEXT: v_readfirstlane_b32 s38, v51
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 32
+; SI-NEXT: s_lshr_b64 s[52:53], s[38:39], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 33
-; SI-NEXT: s_lshr_b64 vcc, s[34:35], 8
+; SI-NEXT: s_lshr_b64 vcc, s[94:95], 8
+; SI-NEXT: s_mov_b32 s77, s52
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 30
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 31
-; SI-NEXT: s_lshr_b64 vcc, s[78:79], 24
+; SI-NEXT: s_lshr_b64 vcc, s[76:77], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 40
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 41
-; SI-NEXT: s_lshr_b64 vcc, s[78:79], 16
+; SI-NEXT: s_lshr_b64 vcc, s[76:77], 16
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 38
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 39
-; SI-NEXT: s_lshr_b64 vcc, s[78:79], 8
+; SI-NEXT: s_lshr_b64 vcc, s[76:77], 8
+; SI-NEXT: s_mov_b32 s35, s82
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 36
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 37
-; SI-NEXT: s_lshr_b64 vcc, s[94:95], 24
+; SI-NEXT: s_lshr_b64 vcc, s[34:35], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 46
+; SI-NEXT: v_mov_b32_e32 v36, v54
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 47
-; SI-NEXT: s_lshr_b64 vcc, s[94:95], 16
+; SI-NEXT: s_lshr_b64 vcc, s[34:35], 16
+; SI-NEXT: v_readfirstlane_b32 s72, v36
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 44
+; SI-NEXT: s_lshr_b64 s[60:61], s[72:73], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 45
-; SI-NEXT: s_lshr_b64 vcc, s[94:95], 8
+; SI-NEXT: s_lshr_b64 vcc, s[34:35], 8
+; SI-NEXT: s_mov_b32 s79, s60
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 42
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 43
-; SI-NEXT: s_lshr_b64 vcc, s[76:77], 24
+; SI-NEXT: s_lshr_b64 vcc, s[78:79], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 52
+; SI-NEXT: v_mov_b32_e32 v32, v42
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 53
-; SI-NEXT: s_lshr_b64 vcc, s[76:77], 16
+; SI-NEXT: s_lshr_b64 vcc, s[78:79], 16
+; SI-NEXT: v_readfirstlane_b32 s58, v32
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 50
+; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 51
-; SI-NEXT: s_lshr_b64 vcc, s[76:77], 8
+; SI-NEXT: s_lshr_b64 vcc, s[78:79], 8
+; SI-NEXT: s_mov_b32 s63, s54
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 48
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 49
; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 58
+; SI-NEXT: v_mov_b32_e32 v35, v47
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 59
; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16
+; SI-NEXT: v_readfirstlane_b32 s44, v35
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 56
+; SI-NEXT: s_lshr_b64 s[42:43], s[44:45], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 57
; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8
+; SI-NEXT: s_mov_b32 s47, s42
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 54
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 55
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 0
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 1
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16
+; SI-NEXT: v_readfirstlane_b32 s28, v38
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 62
+; SI-NEXT: s_lshr_b64 s[26:27], s[28:29], 16
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 63
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8
+; SI-NEXT: s_mov_b32 s41, s26
; SI-NEXT: v_writelane_b32 v62, vcc_lo, 60
; SI-NEXT: v_writelane_b32 v62, vcc_hi, 61
; SI-NEXT: s_lshr_b64 vcc, s[40:41], 24
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 6
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 7
; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16
+; SI-NEXT: v_readfirstlane_b32 s22, v4
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 4
+; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 5
; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8
+; SI-NEXT: s_mov_b32 s25, s36
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 2
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 3
; SI-NEXT: s_lshr_b64 vcc, s[24:25], 24
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 12
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 13
; SI-NEXT: s_lshr_b64 vcc, s[24:25], 16
+; SI-NEXT: v_readfirstlane_b32 s18, v13
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 10
+; SI-NEXT: s_lshr_b64 s[14:15], s[18:19], 16
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 11
; SI-NEXT: s_lshr_b64 vcc, s[24:25], 8
+; SI-NEXT: s_mov_b32 s17, s14
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 8
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 9
; SI-NEXT: s_lshr_b64 vcc, s[16:17], 24
@@ -157593,10 +156978,38 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 32
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 33
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_mov_b32_e32 v1, v8
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 30
+; SI-NEXT: s_waitcnt expcnt(4)
+; SI-NEXT: v_mov_b32_e32 v8, v5
+; SI-NEXT: v_mov_b32_e32 v5, v17
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 31
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8
+; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v1
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v19
+; SI-NEXT: v_mov_b32_e32 v3, v15
; SI-NEXT: v_writelane_b32 v61, vcc_lo, 28
+; SI-NEXT: v_lshrrev_b32_e32 v14, 24, v5
+; SI-NEXT: v_lshrrev_b32_e32 v5, 24, v24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v7
+; SI-NEXT: v_mov_b32_e32 v17, v16
+; SI-NEXT: v_mov_b32_e32 v15, v13
+; SI-NEXT: s_lshr_b32 s88, s6, 8
+; SI-NEXT: s_lshr_b32 s61, s84, 8
+; SI-NEXT: s_lshr_b32 s72, s70, 8
+; SI-NEXT: s_lshr_b32 s75, s64, 8
+; SI-NEXT: s_lshr_b32 s58, s48, 8
+; SI-NEXT: s_mov_b32 s96, s74
+; SI-NEXT: s_lshr_b32 s43, s74, 8
+; SI-NEXT: s_lshr_b32 s44, s52, 8
+; SI-NEXT: s_lshr_b32 s27, s82, 8
+; SI-NEXT: s_mov_b32 s92, s60
+; SI-NEXT: s_lshr_b32 s28, s60, 8
+; SI-NEXT: s_lshr_b32 s74, s54, 8
+; SI-NEXT: s_mov_b32 s68, s42
; SI-NEXT: s_lshr_b32 s22, s42, 8
; SI-NEXT: s_mov_b32 s56, s26
; SI-NEXT: s_lshr_b32 s21, s26, 8
@@ -157607,216 +157020,221 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b32 s12, s20, 8
; SI-NEXT: v_writelane_b32 v61, vcc_hi, 29
; SI-NEXT: s_mov_b64 vcc, 0
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v10
-; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v56
-; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v21
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v41
-; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v46
-; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v58
-; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v5
-; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v18
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(4)
-; SI-NEXT: v_mov_b32_e32 v20, v35
-; SI-NEXT: v_mov_b32_e32 v14, v52
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: v_mov_b32_e32 v37, v45
-; SI-NEXT: v_mov_b32_e32 v45, v2
-; SI-NEXT: s_waitcnt expcnt(2)
-; SI-NEXT: v_mov_b32_e32 v39, v4
-; SI-NEXT: v_mov_b32_e32 v52, v44
-; SI-NEXT: v_mov_b32_e32 v44, v11
-; SI-NEXT: v_mov_b32_e32 v35, v3
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v1, v17
-; SI-NEXT: v_mov_b32_e32 v11, v6
-; SI-NEXT: v_mov_b32_e32 v6, v10
-; SI-NEXT: v_mov_b32_e32 v10, v7
-; SI-NEXT: v_mov_b32_e32 v17, v28
-; SI-NEXT: v_mov_b32_e32 v16, v23
-; SI-NEXT: v_mov_b32_e32 v23, v32
-; SI-NEXT: v_mov_b32_e32 v28, v48
-; SI-NEXT: v_mov_b32_e32 v32, v13
-; SI-NEXT: v_mov_b32_e32 v48, v22
-; SI-NEXT: v_mov_b32_e32 v7, v5
-; SI-NEXT: v_mov_b32_e32 v2, v12
-; SI-NEXT: v_mov_b32_e32 v3, v18
+; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v27
+; SI-NEXT: v_lshrrev_b32_e32 v18, 24, v3
+; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v60
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v23
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v39
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v52
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v40
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v44
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v57
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v11
+; SI-NEXT: v_mov_b32_e32 v13, v31
+; SI-NEXT: v_mov_b32_e32 v16, v29
+; SI-NEXT: v_mov_b32_e32 v29, v1
+; SI-NEXT: v_mov_b32_e32 v37, v30
+; SI-NEXT: v_mov_b32_e32 v30, v9
+; SI-NEXT: v_mov_b32_e32 v48, v50
+; SI-NEXT: v_mov_b32_e32 v50, v5
+; SI-NEXT: v_mov_b32_e32 v31, v2
+; SI-NEXT: v_mov_b32_e32 v1, v4
+; SI-NEXT: v_mov_b32_e32 v9, v20
+; SI-NEXT: v_mov_b32_e32 v5, v27
+; SI-NEXT: v_mov_b32_e32 v20, v22
+; SI-NEXT: v_mov_b32_e32 v22, v33
+; SI-NEXT: v_mov_b32_e32 v27, v60
+; SI-NEXT: v_mov_b32_e32 v33, v12
+; SI-NEXT: v_mov_b32_e32 v6, v57
+; SI-NEXT: v_mov_b32_e32 v2, v11
+; SI-NEXT: v_mov_b32_e32 v4, v19
; SI-NEXT: s_branch .LBB91_3
; SI-NEXT: .LBB91_2:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_mov_b32_e32 v37, v40
+; SI-NEXT: s_waitcnt expcnt(3)
+; SI-NEXT: v_mov_b32_e32 v15, v13
; SI-NEXT: v_writelane_b32 v62, s4, 0
; SI-NEXT: v_writelane_b32 v62, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v45, v11
+; SI-NEXT: v_mov_b32_e32 v13, v51
; SI-NEXT: v_writelane_b32 v62, s4, 2
; SI-NEXT: v_writelane_b32 v62, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v40, v51
+; SI-NEXT: v_mov_b32_e32 v51, v9
; SI-NEXT: v_writelane_b32 v62, s4, 4
; SI-NEXT: v_writelane_b32 v62, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v52, v32
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v37, v55
; SI-NEXT: v_writelane_b32 v62, s4, 6
; SI-NEXT: v_writelane_b32 v62, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v1, v28
+; SI-NEXT: v_mov_b32_e32 v30, v34
; SI-NEXT: v_writelane_b32 v62, s4, 8
; SI-NEXT: v_writelane_b32 v62, s5, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v11, v36
+; SI-NEXT: v_mov_b32_e32 v55, v2
; SI-NEXT: v_writelane_b32 v62, s4, 10
; SI-NEXT: v_writelane_b32 v62, s5, 11
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v38, v22
; SI-NEXT: v_writelane_b32 v62, s4, 12
; SI-NEXT: v_writelane_b32 v62, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v9, v28
; SI-NEXT: v_writelane_b32 v62, s4, 14
; SI-NEXT: v_writelane_b32 v62, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr21
-; SI-NEXT: ; implicit-def: $sgpr20
-; SI-NEXT: ; implicit-def: $sgpr91
-; SI-NEXT: ; implicit-def: $sgpr90
-; SI-NEXT: v_mov_b32_e32 v9, v6
+; SI-NEXT: v_mov_b32_e32 v20, v33
; SI-NEXT: v_writelane_b32 v62, s4, 16
; SI-NEXT: v_writelane_b32 v62, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_mov_b64 vcc, -1
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: v_writelane_b32 v62, s4, 18
; SI-NEXT: v_writelane_b32 v62, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v20, v49
+; SI-NEXT: ; implicit-def: $sgpr21
+; SI-NEXT: ; implicit-def: $sgpr20
+; SI-NEXT: ; implicit-def: $sgpr91
+; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: v_mov_b32_e32 v17, v16
; SI-NEXT: v_writelane_b32 v62, s4, 20
; SI-NEXT: v_writelane_b32 v62, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v49, v2
+; SI-NEXT: v_mov_b32_e32 v8, v5
; SI-NEXT: v_writelane_b32 v62, s4, 22
; SI-NEXT: v_writelane_b32 v62, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v14, v54
+; SI-NEXT: s_mov_b64 vcc, -1
; SI-NEXT: v_writelane_b32 v62, s4, 24
; SI-NEXT: v_writelane_b32 v62, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v39, v38
+; SI-NEXT: v_mov_b32_e32 v16, v53
; SI-NEXT: v_writelane_b32 v62, s4, 26
; SI-NEXT: v_writelane_b32 v62, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v54, v42
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v48, v36
; SI-NEXT: v_writelane_b32 v62, s4, 28
; SI-NEXT: v_writelane_b32 v62, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v38, v16
+; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: v_mov_b32_e32 v53, v41
; SI-NEXT: v_writelane_b32 v62, s4, 30
; SI-NEXT: v_writelane_b32 v62, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v42, v50
+; SI-NEXT: v_mov_b32_e32 v36, v54
; SI-NEXT: v_writelane_b32 v62, s4, 32
; SI-NEXT: v_writelane_b32 v62, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v15, v17
+; SI-NEXT: v_mov_b32_e32 v41, v49
; SI-NEXT: v_writelane_b32 v62, s4, 34
; SI-NEXT: v_writelane_b32 v62, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v35, v23
+; SI-NEXT: v_mov_b32_e32 v32, v42
; SI-NEXT: v_writelane_b32 v62, s4, 36
; SI-NEXT: v_writelane_b32 v62, s5, 37
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v6, v21
+; SI-NEXT: v_mov_b32_e32 v35, v47
; SI-NEXT: v_writelane_b32 v62, s4, 38
; SI-NEXT: v_writelane_b32 v62, s5, 39
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v17, v55
+; SI-NEXT: v_mov_b32_e32 v31, v12
; SI-NEXT: v_writelane_b32 v62, s4, 40
; SI-NEXT: v_writelane_b32 v62, s5, 41
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v16, v43
+; SI-NEXT: v_mov_b32_e32 v1, v4
; SI-NEXT: v_writelane_b32 v62, s4, 42
; SI-NEXT: v_writelane_b32 v62, s5, 43
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v23, v13
+; SI-NEXT: v_mov_b32_e32 v5, v60
; SI-NEXT: v_writelane_b32 v62, s4, 44
; SI-NEXT: v_writelane_b32 v62, s5, 45
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v21, v22
+; SI-NEXT: v_mov_b32_e32 v27, v23
; SI-NEXT: v_writelane_b32 v62, s4, 46
; SI-NEXT: v_writelane_b32 v62, s5, 47
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v7, v5
+; SI-NEXT: v_mov_b32_e32 v23, v24
; SI-NEXT: v_writelane_b32 v62, s4, 48
; SI-NEXT: v_writelane_b32 v62, s5, 49
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v2, v12
+; SI-NEXT: v_mov_b32_e32 v24, v40
; SI-NEXT: v_writelane_b32 v62, s4, 50
; SI-NEXT: v_writelane_b32 v62, s5, 51
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_mov_b32_e32 v3, v18
+; SI-NEXT: v_mov_b32_e32 v40, v44
; SI-NEXT: v_writelane_b32 v62, s4, 52
; SI-NEXT: v_writelane_b32 v62, s5, 53
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_mov_b32_e32 v44, v57
+; SI-NEXT: v_writelane_b32 v62, s4, 54
+; SI-NEXT: v_writelane_b32 v62, s5, 55
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_mov_b32_e32 v6, v11
+; SI-NEXT: v_writelane_b32 v62, s4, 56
+; SI-NEXT: v_writelane_b32 v62, s5, 57
+; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: v_mov_b32_e32 v4, v19
+; SI-NEXT: v_writelane_b32 v62, s4, 58
+; SI-NEXT: v_writelane_b32 v62, s5, 59
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr8
-; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr88
-; SI-NEXT: ; implicit-def: $sgpr7
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $sgpr97
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr61
-; SI-NEXT: ; implicit-def: $sgpr65
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $sgpr31
+; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr70
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr69
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $sgpr66
-; SI-NEXT: ; implicit-def: $sgpr48
+; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr93
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr48
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr39
-; SI-NEXT: ; implicit-def: $vgpr10
-; SI-NEXT: ; implicit-def: $sgpr34
-; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr57
+; SI-NEXT: ; implicit-def: $vgpr14
+; SI-NEXT: ; implicit-def: $sgpr94
+; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr43
-; SI-NEXT: ; implicit-def: $sgpr78
+; SI-NEXT: ; implicit-def: $sgpr89
+; SI-NEXT: ; implicit-def: $vgpr10
+; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $sgpr27
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $sgpr28
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $sgpr22
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; kill: killed $vgpr26
-; SI-NEXT: ; implicit-def: $sgpr30
-; SI-NEXT: ; implicit-def: $sgpr57
-; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr64
-; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr76
+; SI-NEXT: ; implicit-def: $sgpr7
+; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr39
+; SI-NEXT: ; implicit-def: $sgpr34
+; SI-NEXT: ; implicit-def: $sgpr82
+; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr62
@@ -157837,19 +157255,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr13
-; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: v_writelane_b32 v62, s4, 54
-; SI-NEXT: v_writelane_b32 v62, s5, 55
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v62, s4, 56
-; SI-NEXT: v_writelane_b32 v62, s5, 57
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v62, s4, 58
-; SI-NEXT: v_writelane_b32 v62, s5, 59
-; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: v_writelane_b32 v62, s4, 60
; SI-NEXT: v_writelane_b32 v62, s5, 61
; SI-NEXT: ; implicit-def: $sgpr4
@@ -157907,305 +157316,304 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_writelane_b32 v61, s91, 33
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: .LBB91_3: ; %Flow
-; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT: s_andn2_b64 vcc, exec, vcc
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v26, v27
-; SI-NEXT: v_mov_b32_e32 v27, v29
-; SI-NEXT: v_mov_b32_e32 v29, v30
-; SI-NEXT: v_mov_b32_e32 v30, v31
-; SI-NEXT: v_mov_b32_e32 v31, v33
; SI-NEXT: s_cbranch_vccnz .LBB91_5
; SI-NEXT: ; %bb.4: ; %cmp.true
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v11
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v12
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v51
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v12
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_readfirstlane_b32 s4, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v8
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v7
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v5
-; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v32
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s4, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v34
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v28
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s12, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v36
+; SI-NEXT: v_readfirstlane_b32 s12, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v33
; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v3
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v10
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v11
; SI-NEXT: s_lshr_b64 s[10:11], s[8:9], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v28
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v22
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_mov_b32 s7, s9
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v16
-; SI-NEXT: v_readfirstlane_b32 s8, v4
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v17
+; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: v_writelane_b32 v61, s6, 26
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v23
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_writelane_b32 v61, s7, 27
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s6, v7
+; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v9
; SI-NEXT: s_lshr_b64 s[20:21], s[8:9], 16
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v17
-; SI-NEXT: v_readfirstlane_b32 s6, v5
+; SI-NEXT: v_readfirstlane_b32 s8, v3
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_lshr_b32 s19, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s8, v2
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; SI-NEXT: v_readfirstlane_b32 s18, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v11
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v15
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_readfirstlane_b32 s18, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v8
+; SI-NEXT: v_readfirstlane_b32 s6, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: s_lshr_b32 s19, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v3
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v7
; SI-NEXT: v_readfirstlane_b32 s22, v3
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v6
; SI-NEXT: s_lshr_b64 s[24:25], s[8:9], 16
+; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v31
; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: s_lshr_b32 s23, s6, 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v57
+; SI-NEXT: v_readfirstlane_b32 s6, v6
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v44
+; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v56
+; SI-NEXT: v_readfirstlane_b32 s6, v6
+; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
+; SI-NEXT: s_lshr_b32 s29, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v7
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v40
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v44
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v43
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v40
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v6
-; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v5
+; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: s_lshr_b64 s[36:37], s[22:23], 16
; SI-NEXT: s_mov_b32 s25, s36
; SI-NEXT: s_lshr_b64 s[26:27], s[18:19], 16
; SI-NEXT: s_mov_b32 s17, s26
; SI-NEXT: s_mov_b32 s11, s20
; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s5, v18
+; SI-NEXT: v_readfirstlane_b32 s5, v19
; SI-NEXT: s_lshr_b32 s13, s5, 16
; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
; SI-NEXT: s_mov_b32 s5, vcc_lo
; SI-NEXT: s_lshr_b32 s18, s36, 8
; SI-NEXT: s_lshr_b32 s12, s20, 8
-; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v2
-; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v5
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v12
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshrrev_b32_e32 v21, 24, v9
+; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v7
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v2
+; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v4
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v19
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v1
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
-; SI-NEXT: v_readfirstlane_b32 s6, v4
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s28, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v59
-; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v38
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s28, v3
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v58
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v35
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v15
-; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_lshr_b32 s29, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_readfirstlane_b32 s44, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v47
+; SI-NEXT: v_readfirstlane_b32 s44, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v46
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v46
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v52
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v32
; SI-NEXT: v_readfirstlane_b32 s6, v7
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b32 s45, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_readfirstlane_b32 s58, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v42
+; SI-NEXT: v_readfirstlane_b32 s58, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v41
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v41
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v24
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b64 s[62:63], s[8:9], 16
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v38
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v36
; SI-NEXT: v_readfirstlane_b32 s6, v8
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b32 s59, s6, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v9
-; SI-NEXT: v_readfirstlane_b32 s72, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v54
+; SI-NEXT: v_readfirstlane_b32 s6, v10
+; SI-NEXT: v_readfirstlane_b32 s72, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v53
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v53
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v45
-; SI-NEXT: v_readfirstlane_b32 s6, v9
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v52
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v48
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v30
+; SI-NEXT: v_readfirstlane_b32 s6, v12
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: s_lshr_b32 s73, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_readfirstlane_b32 s88, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v37
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v39
+; SI-NEXT: v_readfirstlane_b32 s90, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v37
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v48
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 16
-; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v14
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v49
-; SI-NEXT: v_readfirstlane_b32 s6, v13
+; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v16
+; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v15
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: s_lshr_b32 s89, s6, 16
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v51
+; SI-NEXT: s_lshr_b32 s91, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v21
-; SI-NEXT: v_readfirstlane_b32 s56, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v20
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v3
+; SI-NEXT: v_readfirstlane_b32 s38, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v13
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: s_lshr_b64 s[76:77], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s8, v10
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v23
+; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_readfirstlane_b32 s6, v3
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: s_lshr_b32 s39, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v14
-; SI-NEXT: s_lshr_b32 s57, s6, 16
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b64 s[30:31], s[56:57], 16
-; SI-NEXT: s_mov_b32 s79, s30
-; SI-NEXT: s_lshr_b64 s[50:51], s[88:89], 16
-; SI-NEXT: s_mov_b32 s95, s50
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[8:9], 16
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b64 s[52:53], s[38:39], 16
+; SI-NEXT: s_mov_b32 s77, s52
+; SI-NEXT: s_lshr_b64 s[98:99], s[90:91], 16
+; SI-NEXT: s_mov_b32 s35, s98
; SI-NEXT: s_lshr_b64 s[74:75], s[72:73], 16
-; SI-NEXT: s_mov_b32 s77, s74
+; SI-NEXT: s_mov_b32 s79, s74
; SI-NEXT: s_lshr_b64 s[54:55], s[58:59], 16
; SI-NEXT: s_mov_b32 s63, s54
; SI-NEXT: s_lshr_b64 s[60:61], s[44:45], 16
; SI-NEXT: s_mov_b32 s47, s60
; SI-NEXT: s_lshr_b64 s[42:43], s[28:29], 16
; SI-NEXT: s_mov_b32 s41, s42
-; SI-NEXT: s_lshr_b32 s44, s30, 8
-; SI-NEXT: s_lshr_b32 s27, s50, 8
+; SI-NEXT: s_lshr_b32 s44, s52, 8
+; SI-NEXT: s_lshr_b32 s27, s98, 8
; SI-NEXT: s_lshr_b32 s28, s74, 8
; SI-NEXT: s_lshr_b32 s22, s60, 8
-; SI-NEXT: s_mov_b32 s56, s42
; SI-NEXT: s_lshr_b32 s21, s42, 8
-; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v7
-; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v3
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v4
-; SI-NEXT: v_readfirstlane_b32 s90, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[34:35], s[8:9], 16
-; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v56
-; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
-; SI-NEXT: v_readfirstlane_b32 s6, v4
-; SI-NEXT: s_lshr_b32 s91, s6, 16
-; SI-NEXT: s_lshr_b64 s[82:83], s[90:91], 16
-; SI-NEXT: s_mov_b32 s35, s82
-; SI-NEXT: s_lshr_b32 s43, s82, 8
+; SI-NEXT: s_mov_b32 s38, s26
; SI-NEXT: s_mov_b32 s90, vcc_lo
-; SI-NEXT: v_lshrrev_b32_e32 v55, 24, v4
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s8, v10
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_readfirstlane_b32 s6, v15
-; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 16
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v15
+; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v12
+; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v8
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v10
-; SI-NEXT: v_readfirstlane_b32 s38, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v10
+; SI-NEXT: v_readfirstlane_b32 s88, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v27
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_readfirstlane_b32 s6, v10
-; SI-NEXT: s_lshr_b32 s39, s6, 16
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: s_lshr_b64 s[98:99], s[38:39], 16
-; SI-NEXT: s_mov_b32 s53, s98
-; SI-NEXT: s_lshr_b32 s58, s98, 8
-; SI-NEXT: s_mov_b32 s38, s26
+; SI-NEXT: s_lshr_b32 s89, s6, 16
+; SI-NEXT: s_lshr_b64 s[82:83], s[88:89], 16
+; SI-NEXT: s_mov_b32 s95, s82
+; SI-NEXT: s_lshr_b32 s43, s82, 8
; SI-NEXT: v_lshrrev_b32_e32 v10, 24, v10
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_readfirstlane_b32 s8, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s8, v14
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_readfirstlane_b32 s6, v16
; SI-NEXT: s_lshr_b32 s9, s6, 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v15
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s56, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_readfirstlane_b32 s6, v14
+; SI-NEXT: s_lshr_b32 s57, s6, 16
+; SI-NEXT: s_lshr_b64 s[48:49], s[56:57], 16
+; SI-NEXT: s_mov_b32 s51, s48
+; SI-NEXT: s_lshr_b32 s58, s48, 8
+; SI-NEXT: s_mov_b32 s56, s42
+; SI-NEXT: v_lshrrev_b32_e32 v14, 24, v14
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: v_readfirstlane_b32 s8, v16
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
+; SI-NEXT: v_lshrrev_b32_e32 v18, 24, v13
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_readfirstlane_b32 s92, v16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
-; SI-NEXT: v_readfirstlane_b32 s6, v15
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
+; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
+; SI-NEXT: v_readfirstlane_b32 s6, v17
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_lshr_b32 s9, s6, 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[8:9], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v13
; SI-NEXT: s_lshr_b32 s93, s6, 16
-; SI-NEXT: s_lshr_b64 s[48:49], s[92:93], 16
-; SI-NEXT: s_mov_b32 s67, s48
-; SI-NEXT: s_lshr_b32 s75, s48, 8
+; SI-NEXT: s_lshr_b64 s[64:65], s[92:93], 16
+; SI-NEXT: s_mov_b32 s67, s64
+; SI-NEXT: s_lshr_b32 s75, s64, 8
; SI-NEXT: s_mov_b32 s92, s74
; SI-NEXT: s_lshr_b32 s74, s54, 8
-; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v15
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
+; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v5
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_readfirstlane_b32 s8, v16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
-; SI-NEXT: v_lshrrev_b32_e32 v24, 24, v6
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
+; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_readfirstlane_b32 s68, v16
@@ -158216,16 +157624,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v11
+; SI-NEXT: v_readfirstlane_b32 s6, v9
; SI-NEXT: s_lshr_b32 s69, s6, 16
; SI-NEXT: s_lshr_b64 s[70:71], s[68:69], 16
; SI-NEXT: s_mov_b32 s81, s70
; SI-NEXT: s_lshr_b32 s72, s70, 8
; SI-NEXT: s_mov_b32 s68, s60
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
-; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
@@ -158234,7 +157638,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s64, v16
+; SI-NEXT: v_readfirstlane_b32 s30, v16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
@@ -158242,12 +157646,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: s_lshr_b64 s[86:87], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s6, v6
-; SI-NEXT: s_lshr_b32 s65, s6, 16
-; SI-NEXT: s_lshr_b64 s[84:85], s[64:65], 16
+; SI-NEXT: v_readfirstlane_b32 s6, v5
+; SI-NEXT: s_lshr_b32 s31, s6, 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[30:31], 16
; SI-NEXT: s_mov_b32 s87, s84
; SI-NEXT: s_lshr_b32 s61, s84, 8
-; SI-NEXT: s_mov_b32 s64, s50
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
@@ -158259,19 +157662,16 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: v_readfirstlane_b32 s6, v17
; SI-NEXT: s_lshr_b32 s9, s6, 16
; SI-NEXT: v_readfirstlane_b32 s6, v1
-; SI-NEXT: s_lshr_b32 s7, s6, 16
+; SI-NEXT: s_lshr_b32 s97, s6, 16
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 16
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v18
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v11
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
-; SI-NEXT: v_readfirstlane_b32 s6, v16
-; SI-NEXT: s_lshr_b64 s[96:97], s[6:7], 16
-; SI-NEXT: s_mov_b32 s9, s96
+; SI-NEXT: v_readfirstlane_b32 s96, v16
+; SI-NEXT: s_lshr_b64 s[6:7], s[96:97], 16
+; SI-NEXT: s_mov_b32 s9, s6
; SI-NEXT: s_lshr_b64 s[14:15], s[8:9], 24
; SI-NEXT: v_writelane_b32 v62, s14, 4
; SI-NEXT: v_writelane_b32 v62, s15, 5
@@ -158308,49 +157708,49 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b64 s[14:15], s[66:67], 8
; SI-NEXT: v_writelane_b32 v62, s14, 18
; SI-NEXT: v_writelane_b32 v62, s15, 19
-; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 24
+; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 24
; SI-NEXT: v_writelane_b32 v62, s14, 28
; SI-NEXT: v_writelane_b32 v62, s15, 29
-; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 16
; SI-NEXT: v_writelane_b32 v62, s14, 26
; SI-NEXT: v_writelane_b32 v62, s15, 27
-; SI-NEXT: s_lshr_b64 s[14:15], s[52:53], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[50:51], 8
; SI-NEXT: v_writelane_b32 v62, s14, 24
; SI-NEXT: v_writelane_b32 v62, s15, 25
-; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 24
+; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 24
; SI-NEXT: v_writelane_b32 v62, s14, 34
; SI-NEXT: v_writelane_b32 v62, s15, 35
-; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 16
; SI-NEXT: v_writelane_b32 v62, s14, 32
; SI-NEXT: v_writelane_b32 v62, s15, 33
-; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 8
; SI-NEXT: v_writelane_b32 v62, s14, 30
; SI-NEXT: v_writelane_b32 v62, s15, 31
-; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 24
+; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 24
; SI-NEXT: v_writelane_b32 v62, s14, 40
; SI-NEXT: v_writelane_b32 v62, s15, 41
-; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 16
; SI-NEXT: v_writelane_b32 v62, s14, 38
; SI-NEXT: v_writelane_b32 v62, s15, 39
-; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 8
; SI-NEXT: v_writelane_b32 v62, s14, 36
; SI-NEXT: v_writelane_b32 v62, s15, 37
-; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 24
+; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 24
; SI-NEXT: v_writelane_b32 v62, s14, 46
; SI-NEXT: v_writelane_b32 v62, s15, 47
-; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 16
; SI-NEXT: v_writelane_b32 v62, s14, 44
; SI-NEXT: v_writelane_b32 v62, s15, 45
-; SI-NEXT: s_lshr_b64 s[14:15], s[94:95], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[34:35], 8
; SI-NEXT: v_writelane_b32 v62, s14, 42
; SI-NEXT: v_writelane_b32 v62, s15, 43
-; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 24
+; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 24
; SI-NEXT: v_writelane_b32 v62, s14, 52
; SI-NEXT: v_writelane_b32 v62, s15, 53
-; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 16
; SI-NEXT: v_writelane_b32 v62, s14, 50
; SI-NEXT: v_writelane_b32 v62, s15, 51
-; SI-NEXT: s_lshr_b64 s[14:15], s[76:77], 8
+; SI-NEXT: s_lshr_b64 s[14:15], s[78:79], 8
; SI-NEXT: v_writelane_b32 v62, s14, 48
; SI-NEXT: v_writelane_b32 v62, s15, 49
; SI-NEXT: s_lshr_b64 s[14:15], s[62:63], 24
@@ -158416,10 +157816,12 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 8
; SI-NEXT: v_writelane_b32 v61, s14, 28
; SI-NEXT: v_writelane_b32 v61, s15, 29
-; SI-NEXT: s_lshr_b32 s88, s96, 8
+; SI-NEXT: s_lshr_b32 s88, s6, 8
+; SI-NEXT: s_mov_b32 s96, s82
+; SI-NEXT: s_mov_b32 s82, s98
; SI-NEXT: s_lshr_b32 s15, s26, 8
; SI-NEXT: s_mov_b32 s14, s20
-; SI-NEXT: s_lshr_b32 s6, vcc_lo, 8
+; SI-NEXT: s_lshr_b32 s7, vcc_lo, 8
; SI-NEXT: .LBB91_5: ; %end
; SI-NEXT: s_and_b32 s5, s8, 0xff
; SI-NEXT: v_readlane_b32 s8, v62, 0
@@ -158437,23 +157839,22 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s5
-; SI-NEXT: s_and_b32 s5, s96, 0xff
+; SI-NEXT: s_and_b32 s5, s6, 0xff
; SI-NEXT: s_lshl_b32 s8, s88, 8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s7, 0xff
+; SI-NEXT: s_and_b32 s8, s97, 0xff
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 6
-; SI-NEXT: v_readlane_b32 vcc_hi, v62, 5
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: s_and_b32 s5, s86, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 7
; SI-NEXT: s_lshl_b32 s8, s8, 8
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
+; SI-NEXT: v_readlane_b32 vcc_hi, v62, 5
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: v_readlane_b32 s8, v62, 8
; SI-NEXT: v_readlane_b32 s9, v62, 9
@@ -158464,18 +157865,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_readlane_b32 vcc_hi, v62, 11
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s84, 0xff
; SI-NEXT: s_lshl_b32 s8, s61, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s65, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s8, s31, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v24
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 12
@@ -158492,20 +157892,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s60, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s70, 0xff
; SI-NEXT: s_lshl_b32 s8, s72, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s69, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v19
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v21
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 18
@@ -158523,25 +157921,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s60, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: s_and_b32 s5, s48, 0xff
-; SI-NEXT: s_lshl_b32 s8, s75, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: s_and_b32 s5, s64, 0xff
+; SI-NEXT: s_lshl_b32 s8, s75, 8
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s93, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v43
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v18
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 24
; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: s_and_b32 s5, s52, 0xff
+; SI-NEXT: s_and_b32 s5, s50, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 25
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: v_readlane_b32 s61, v62, 23
@@ -158554,25 +157950,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s60, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: s_and_b32 s5, s98, 0xff
-; SI-NEXT: s_lshl_b32 s8, s58, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: s_and_b32 s5, s48, 0xff
+; SI-NEXT: s_lshl_b32 s8, s58, 8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s39, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s8, s57, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v10
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v14
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 30
; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: s_and_b32 s5, s34, 0xff
+; SI-NEXT: s_and_b32 s5, s94, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 31
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: v_readlane_b32 s61, v62, 29
@@ -158585,25 +157979,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s60, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: s_and_b32 s5, s82, 0xff
-; SI-NEXT: s_lshl_b32 s8, s43, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: s_and_b32 s5, s96, 0xff
+; SI-NEXT: s_lshl_b32 s8, s43, 8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s91, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s8, s89, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v55
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v10
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 36
; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: s_and_b32 s5, s78, 0xff
+; SI-NEXT: s_and_b32 s5, s76, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 37
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s5, s5, s8
@@ -158615,25 +158007,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s42, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: s_and_b32 s5, s30, 0xff
-; SI-NEXT: s_lshl_b32 s8, s44, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: s_and_b32 s5, s52, 0xff
+; SI-NEXT: s_lshl_b32 s8, s44, 8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s57, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s8, s39, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v50
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 42
; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: s_and_b32 s5, s94, 0xff
+; SI-NEXT: s_and_b32 s5, s34, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 43
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: v_readlane_b32 s43, v62, 41
@@ -158646,25 +158036,23 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s42, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: s_and_b32 s5, s64, 0xff
-; SI-NEXT: s_lshl_b32 s8, s27, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: s_and_b32 s5, s82, 0xff
+; SI-NEXT: s_lshl_b32 s8, s27, 8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: s_and_b32 s8, s89, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s8, s91, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v60
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v59
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 48
; SI-NEXT: v_or_b32_e32 v1, s5, v1
-; SI-NEXT: s_and_b32 s5, s76, 0xff
+; SI-NEXT: s_and_b32 s5, s78, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 49
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s5, s5, s8
@@ -158676,89 +158064,47 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0
-; SI-NEXT: v_mov_b32_e32 v2, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s92, 0xff
; SI-NEXT: s_lshl_b32 s8, s28, 8
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s73, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
-; SI-NEXT: v_readlane_b32 s27, v62, 53
-; SI-NEXT: v_readlane_b32 s26, v62, 58
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: v_readlane_b32 s27, v62, 59
-; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s30, v63, 34
-; SI-NEXT: v_readlane_b32 s61, v62, 35
-; SI-NEXT: v_readlane_b32 s43, v62, 47
-; SI-NEXT: v_readlane_b32 s31, v63, 35
-; SI-NEXT: v_readlane_b32 s99, v63, 33
-; SI-NEXT: v_readlane_b32 s98, v63, 32
-; SI-NEXT: v_readlane_b32 s97, v63, 31
-; SI-NEXT: v_readlane_b32 s96, v63, 30
-; SI-NEXT: v_readlane_b32 s87, v63, 29
-; SI-NEXT: v_readlane_b32 s86, v63, 28
-; SI-NEXT: v_readlane_b32 s85, v63, 27
-; SI-NEXT: v_readlane_b32 s84, v63, 26
-; SI-NEXT: v_readlane_b32 s83, v63, 25
-; SI-NEXT: v_readlane_b32 s82, v63, 24
-; SI-NEXT: v_readlane_b32 s81, v63, 23
-; SI-NEXT: v_readlane_b32 s80, v63, 22
-; SI-NEXT: v_readlane_b32 s71, v63, 21
-; SI-NEXT: v_readlane_b32 s70, v63, 20
-; SI-NEXT: v_readlane_b32 s69, v63, 19
-; SI-NEXT: v_readlane_b32 s67, v63, 17
-; SI-NEXT: v_readlane_b32 s66, v63, 16
-; SI-NEXT: v_readlane_b32 s65, v63, 15
-; SI-NEXT: v_readlane_b32 s64, v63, 14
-; SI-NEXT: v_readlane_b32 s55, v63, 13
-; SI-NEXT: v_readlane_b32 s53, v63, 11
-; SI-NEXT: v_readlane_b32 s52, v63, 10
-; SI-NEXT: v_readlane_b32 s51, v63, 9
-; SI-NEXT: v_readlane_b32 s50, v63, 8
-; SI-NEXT: v_readlane_b32 s49, v63, 7
-; SI-NEXT: v_readlane_b32 s48, v63, 6
-; SI-NEXT: v_readlane_b32 s39, v63, 5
-; SI-NEXT: v_readlane_b32 s37, v63, 3
-; SI-NEXT: v_readlane_b32 s35, v63, 1
-; SI-NEXT: v_readlane_b32 s34, v63, 0
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v45
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 54
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: s_and_b32 s5, s62, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 55
; SI-NEXT: s_lshl_b32 s8, s8, 8
+; SI-NEXT: v_readlane_b32 s27, v62, 53
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: v_readlane_b32 s8, v62, 56
; SI-NEXT: v_readlane_b32 s9, v62, 57
; SI-NEXT: s_and_b32 s8, s8, 0xff
+; SI-NEXT: v_readlane_b32 s26, v62, 58
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s54, 0xff
; SI-NEXT: s_lshl_b32 s8, s74, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s59, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v34
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v50
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v62, 60
@@ -158766,6 +158112,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_and_b32 s5, s46, 0xff
; SI-NEXT: v_readlane_b32 s9, v62, 61
; SI-NEXT: s_lshl_b32 s8, s8, 8
+; SI-NEXT: v_readlane_b32 s27, v62, 59
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: v_readlane_b32 s8, v62, 62
; SI-NEXT: v_readlane_b32 s9, v62, 63
@@ -158775,20 +158122,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s68, 0xff
; SI-NEXT: s_lshl_b32 s8, s22, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s45, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v47
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 2
@@ -158806,20 +158151,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s56, 0xff
; SI-NEXT: s_lshl_b32 s8, s21, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s29, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v42
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 8
@@ -158836,20 +158179,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s20, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s36, 0xff
; SI-NEXT: s_lshl_b32 s8, s18, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s23, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v29
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v54
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 14
@@ -158866,20 +158207,18 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s16, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s38, 0xff
; SI-NEXT: s_lshl_b32 s8, s15, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: s_and_b32 s8, s19, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v27
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v49
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 20
@@ -158896,25 +158235,69 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
; SI-NEXT: s_or_b32 s5, s5, s8
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT: s_and_b32 s5, s14, 0xff
; SI-NEXT: s_lshl_b32 s8, s12, 8
; SI-NEXT: s_or_b32 s5, s5, s8
; SI-NEXT: v_readlane_b32 s8, v61, 26
; SI-NEXT: v_readlane_b32 s9, v61, 27
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26
+; SI-NEXT: s_and_b32 s5, s5, 0xffff
+; SI-NEXT: s_and_b32 s4, s4, 0xff
+; SI-NEXT: v_readlane_b32 s30, v63, 34
+; SI-NEXT: v_readlane_b32 vcc_hi, v62, 11
+; SI-NEXT: v_readlane_b32 s61, v62, 35
+; SI-NEXT: v_readlane_b32 s43, v62, 47
+; SI-NEXT: v_readlane_b32 s27, v61, 7
+; SI-NEXT: v_readlane_b32 s21, v61, 13
+; SI-NEXT: v_readlane_b32 s17, v61, 19
+; SI-NEXT: v_readlane_b32 s11, v61, 25
+; SI-NEXT: v_readlane_b32 s31, v63, 35
+; SI-NEXT: v_readlane_b32 s99, v63, 33
+; SI-NEXT: v_readlane_b32 s98, v63, 32
+; SI-NEXT: v_readlane_b32 s97, v63, 31
+; SI-NEXT: v_readlane_b32 s96, v63, 30
+; SI-NEXT: v_readlane_b32 s87, v63, 29
+; SI-NEXT: v_readlane_b32 s86, v63, 28
+; SI-NEXT: v_readlane_b32 s85, v63, 27
+; SI-NEXT: v_readlane_b32 s84, v63, 26
+; SI-NEXT: v_readlane_b32 s83, v63, 25
+; SI-NEXT: v_readlane_b32 s82, v63, 24
+; SI-NEXT: v_readlane_b32 s81, v63, 23
+; SI-NEXT: v_readlane_b32 s80, v63, 22
+; SI-NEXT: v_readlane_b32 s71, v63, 21
+; SI-NEXT: v_readlane_b32 s70, v63, 20
+; SI-NEXT: v_readlane_b32 s69, v63, 19
+; SI-NEXT: v_readlane_b32 s68, v63, 18
+; SI-NEXT: v_readlane_b32 s67, v63, 17
+; SI-NEXT: v_readlane_b32 s66, v63, 16
+; SI-NEXT: v_readlane_b32 s65, v63, 15
+; SI-NEXT: v_readlane_b32 s64, v63, 14
+; SI-NEXT: v_readlane_b32 s55, v63, 13
+; SI-NEXT: v_readlane_b32 s54, v63, 12
+; SI-NEXT: v_readlane_b32 s53, v63, 11
+; SI-NEXT: v_readlane_b32 s52, v63, 10
+; SI-NEXT: v_readlane_b32 s51, v63, 9
+; SI-NEXT: v_readlane_b32 s50, v63, 8
+; SI-NEXT: v_readlane_b32 s49, v63, 7
+; SI-NEXT: v_readlane_b32 s48, v63, 6
+; SI-NEXT: v_readlane_b32 s39, v63, 5
+; SI-NEXT: v_readlane_b32 s38, v63, 4
+; SI-NEXT: v_readlane_b32 s37, v63, 3
+; SI-NEXT: v_readlane_b32 s36, v63, 2
+; SI-NEXT: v_readlane_b32 s35, v63, 1
+; SI-NEXT: v_readlane_b32 s34, v63, 0
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; SI-NEXT: v_or_b32_e32 v1, s8, v1
; SI-NEXT: v_readlane_b32 s8, v61, 28
-; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: v_readlane_b32 s9, v61, 29
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: s_lshl_b32 s5, s8, 8
@@ -158927,36 +158310,22 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s8, s5
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0
-; SI-NEXT: v_mov_b32_e32 v2, s4
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s90, 0xff
-; SI-NEXT: s_lshl_b32 s5, s6, 8
+; SI-NEXT: s_lshl_b32 s5, s7, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s13, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v29
; SI-NEXT: s_and_b32 s4, s4, 0xffff
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
-; SI-NEXT: v_readlane_b32 s27, v61, 7
-; SI-NEXT: v_readlane_b32 s21, v61, 13
-; SI-NEXT: v_readlane_b32 s17, v61, 19
-; SI-NEXT: v_readlane_b32 s11, v61, 25
-; SI-NEXT: v_readlane_b32 s9, v61, 33
-; SI-NEXT: v_readlane_b32 s68, v63, 18
-; SI-NEXT: v_readlane_b32 s54, v63, 12
-; SI-NEXT: v_readlane_b32 s38, v63, 4
-; SI-NEXT: v_readlane_b32 s36, v63, 2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -158970,10 +158339,11 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; SI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
+; SI-NEXT: v_readlane_b32 s9, v61, 33
; SI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
@@ -158982,8 +158352,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -159227,12 +158597,10 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s45, s44, 16
+; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s45, v2
+; VI-NEXT: v_lshrrev_b64 v[56:57], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159247,17 +158615,14 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; VI-NEXT: v_lshrrev_b64 v[3:4], 16, v[3:4]
; VI-NEXT: s_lshl_b32 s44, s43, 16
+; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s44, v2
-; VI-NEXT: s_and_b32 s43, s43, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v4, v6
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
+; VI-NEXT: s_and_b32 s43, s43, 0xffff0000
; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_add_f32_e32 v1, s43, v2
@@ -159270,8 +158635,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; VI-NEXT: s_lshl_b32 s43, s42, 16
; VI-NEXT: v_add_f32_e32 v1, s43, v2
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
@@ -159291,7 +158656,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s42, s41, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s42, v2
-; VI-NEXT: v_lshrrev_b64 v[59:60], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159306,12 +158671,15 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s41, s40, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; VI-NEXT: s_lshl_b32 s41, s40, 16
; VI-NEXT: v_add_f32_e32 v1, s41, v2
; VI-NEXT: s_and_b32 s40, s40, 0xffff0000
-; VI-NEXT: v_mov_b32_e32 v60, v6
+; VI-NEXT: v_mov_b32_e32 v18, v56
+; VI-NEXT: v_mov_b32_e32 v9, v6
; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159328,7 +158696,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s40, s15, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s40, v2
-; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159343,14 +158711,17 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
-; VI-NEXT: s_lshl_b32 s15, s14, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
+; VI-NEXT: s_lshl_b32 s15, s14, 16
; VI-NEXT: v_add_f32_e32 v1, s15, v2
-; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[3:4]
+; VI-NEXT: s_and_b32 s14, s14, 0xffff0000
+; VI-NEXT: v_mov_b32_e32 v25, v6
+; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
-; VI-NEXT: s_and_b32 s14, s14, 0xffff0000
; VI-NEXT: v_or_b32_e32 v4, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: v_add_f32_e32 v1, s14, v2
@@ -159364,7 +158735,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s14, s13, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s14, v2
-; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159382,7 +158753,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s13, s12, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s13, v2
-; VI-NEXT: v_lshrrev_b64 v[55:56], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159400,7 +158771,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s12, s11, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s12, v2
-; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[15:16], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159418,7 +158789,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s11, s10, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s11, v2
-; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159436,7 +158807,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s10, s9, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s10, v2
-; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159454,7 +158825,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s9, s8, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s9, v2
-; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[3:4]
+; VI-NEXT: v_mov_b32_e32 v27, v6
+; VI-NEXT: v_lshrrev_b64 v[6:7], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159472,7 +158844,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s8, s7, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s8, v2
-; VI-NEXT: v_lshrrev_b64 v[42:43], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159490,7 +158862,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s7, s6, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s7, v2
-; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[59:60], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159508,7 +158880,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s17, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[60:61], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159526,7 +158898,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s16, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[28:29], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159544,7 +158916,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s19, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[26:27], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159562,7 +158934,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s18, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159580,7 +158952,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s21, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[29:30], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159598,7 +158970,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s20, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[31:32], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159616,7 +158988,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s23, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[32:33], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159634,7 +159006,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s22, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[34:35], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159652,7 +159024,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s25, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[35:36], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159666,11 +159038,13 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc
; VI-NEXT: s_lshl_b32 s6, s24, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[37:38], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159680,8 +159054,6 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_add_f32_e32 v1, s6, v2
; VI-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; VI-NEXT: v_bfe_u32 v4, v1, 16, 1
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v1
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
; VI-NEXT: v_or_b32_e32 v5, 0x400000, v1
@@ -159690,7 +159062,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s27, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[38:39], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159708,7 +159080,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s26, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[48:49], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159726,7 +159098,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s29, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[49:50], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159744,7 +159116,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s28, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[51:52], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[54:55], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159762,7 +159134,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s6, s5, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s6, v2
-; VI-NEXT: v_lshrrev_b64 v[52:53], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159780,7 +159152,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: s_lshl_b32 s5, s4, 16
; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; VI-NEXT: v_add_f32_e32 v1, s5, v2
-; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[46:47], 16, v[3:4]
; VI-NEXT: v_bfe_u32 v3, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v1
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -159796,238 +159168,229 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_lshrrev_b64 v[44:45], 16, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v45, v19
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[44:45]
-; VI-NEXT: v_mov_b32_e32 v53, v51
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[57:58], 16, v[1:2]
+; VI-NEXT: v_mov_b32_e32 v58, v46
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[57:58]
+; VI-NEXT: v_mov_b32_e32 v61, v59
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[60:61]
+; VI-NEXT: v_mov_b32_e32 v11, v6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[10:11]
+; VI-NEXT: v_mov_b32_e32 v23, v21
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[22:23]
+; VI-NEXT: v_mov_b32_e32 v16, v14
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[26:27]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[24:25]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[8:9]
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v46
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v57
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v57
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v54
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v54
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v54
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v40
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v40
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v51
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[52:53]
-; VI-NEXT: v_mov_b32_e32 v50, v48
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v39, v37
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[49:50]
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[38:39]
-; VI-NEXT: v_mov_b32_e32 v36, v34
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v33, v31
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[35:36]
-; VI-NEXT: v_mov_b32_e32 v30, v24
-; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[32:33]
-; VI-NEXT: v_mov_b32_e32 v15, v6
-; VI-NEXT: v_mov_b32_e32 v27, v46
-; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[29:30]
-; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[26:27]
-; VI-NEXT: v_mov_b32_e32 v7, v8
-; VI-NEXT: v_mov_b32_e32 v10, v8
-; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v46
-; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v46
-; VI-NEXT: v_mov_b32_e32 v47, v46
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v46
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v8
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[9:10]
-; VI-NEXT: v_mov_b32_e32 v43, v12
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v9
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[42:43]
-; VI-NEXT: v_mov_b32_e32 v41, v57
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[40:41]
-; VI-NEXT: v_mov_b32_e32 v22, v55
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[21:22]
-; VI-NEXT: v_mov_b32_e32 v18, v16
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18]
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[14:15]
-; VI-NEXT: v_mov_b32_e32 v18, v14
-; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v19
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v19
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v44
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v44
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v51
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v52
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v52
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v48
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v49
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v49
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v37
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v37
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v37
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v38
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v38
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v34
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v34
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[59:60]
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v34
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v35
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v35
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v31
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v31
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v32
-; VI-NEXT: v_lshrrev_b32_e32 v22, 24, v51
-; VI-NEXT: v_mov_b32_e32 v27, v34
-; VI-NEXT: v_mov_b32_e32 v60, v31
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v31
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v8
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v9
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v12
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v12
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v12
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v12
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v42
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v42
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v42
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v57
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v57
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v57
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v57
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v40
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v40
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v40
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v55
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v55
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v7, v55
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v55
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v21
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v21
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 24, v16
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v16
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v16
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v17
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v17
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_mov_b32_e32 v7, v12
-; VI-NEXT: v_lshrrev_b32_e32 v12, 24, v7
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v7
-; VI-NEXT: v_mov_b32_e32 v8, v16
-; VI-NEXT: v_mov_b32_e32 v16, v17
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v12, v7
-; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v28
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
+; VI-NEXT: v_mov_b32_e32 v53, v51
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v59
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[52:53]
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v59
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v59
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v59
+; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v60
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_mov_b32_e32 v2, v58
+; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v2
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v10
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v10
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v10
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v21
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v22
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v22
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 24, v14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v14
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v15
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v15
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v41, v54
+; VI-NEXT: v_mov_b32_e32 v39, v37
+; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[40:41]
+; VI-NEXT: v_mov_b32_e32 v30, v28
+; VI-NEXT: v_mov_b32_e32 v33, v31
+; VI-NEXT: v_mov_b32_e32 v36, v34
+; VI-NEXT: v_mov_b32_e32 v50, v48
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[38:39]
+; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[49:50]
+; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[35:36]
+; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[32:33]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[29:30]
+; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[17:18]
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v52
+; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v49
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v38
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v38
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v34
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v35
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v35
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v31
+; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v32
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v29
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v24
+; VI-NEXT: v_mov_b32_e32 v60, v8
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v21, 24, v56
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v56
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v56
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v17
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_mov_b32_e32 v2, v14
; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[53:54]
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v32
-; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v24
-; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v24
-; VI-NEXT: v_mov_b32_e32 v23, v24
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v24
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v29
-; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v29
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v26
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v9
-; VI-NEXT: v_mov_b32_e32 v42, v21
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v59
-; VI-NEXT: v_mov_b32_e32 v41, v59
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v59
-; VI-NEXT: v_mov_b32_e32 v59, v53
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_mov_b32_e32 v15, v14
-; VI-NEXT: s_waitcnt vmcnt(4)
-; VI-NEXT: v_mov_b32_e32 v36, v55
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v15
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v36
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v36
-; VI-NEXT: s_waitcnt vmcnt(3)
-; VI-NEXT: v_mov_b32_e32 v56, v36
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v36
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v53
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v53
+; VI-NEXT: v_lshrrev_b32_e32 v10, 24, v2
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v2
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v2, v26
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v2, 8, v26
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v10, v33
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v24
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_mov_b32_e32 v59, v58
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v49
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_mov_b32_e32 v2, v14
+; VI-NEXT: v_lshrrev_b32_e32 v14, 24, v2
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v2
+; VI-NEXT: v_mov_b32_e32 v41, v2
+; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v2
+; VI-NEXT: v_mov_b32_e32 v2, v58
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v14, v24
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; VI-NEXT: s_waitcnt vmcnt(9)
+; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v2
+; VI-NEXT: v_mov_b32_e32 v2, v56
+; VI-NEXT: v_mov_b32_e32 v58, v17
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v17
; VI-NEXT: s_branch .LBB91_5
; VI-NEXT: .LBB91_3:
; VI-NEXT: ; implicit-def: $sgpr46
@@ -160189,305 +159552,305 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_readlane_b32 s47, v62, 0
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 2
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 3
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 7
-; VI-NEXT: v_mov_b32_e32 v7, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 10
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v10, s47
; VI-NEXT: v_readlane_b32 s47, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 13
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v8, s47
; VI-NEXT: v_readlane_b32 s47, v62, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v7, s47
; VI-NEXT: v_readlane_b32 s47, v62, 17
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v5, s47
; VI-NEXT: v_readlane_b32 s47, v62, 21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v13, s47
; VI-NEXT: v_readlane_b32 s47, v62, 22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v11, s47
; VI-NEXT: v_readlane_b32 s47, v62, 25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_mov_b32_e32 v18, s47
; VI-NEXT: v_readlane_b32 s47, v62, 26
-; VI-NEXT: v_mov_b32_e32 v34, s47
+; VI-NEXT: v_mov_b32_e32 v20, s47
; VI-NEXT: v_readlane_b32 s47, v62, 27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s47, v62, 29
+; VI-NEXT: v_mov_b32_e32 v9, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 30
+; VI-NEXT: v_mov_b32_e32 v25, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 31
+; VI-NEXT: v_mov_b32_e32 v30, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 32
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 33
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 34
+; VI-NEXT: v_mov_b32_e32 v27, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 35
+; VI-NEXT: v_mov_b32_e32 v23, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 36
+; VI-NEXT: v_mov_b32_e32 v53, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 37
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 38
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s47
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s71
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s70
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s69
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s68
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s67
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s66
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s64
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s54
-; VI-NEXT: v_readlane_b32 s47, v62, 29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s87
-; VI-NEXT: v_mov_b32_e32 v10, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s86
-; VI-NEXT: v_mov_b32_e32 v24, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s53
-; VI-NEXT: v_mov_b32_e32 v2, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s52
-; VI-NEXT: v_mov_b32_e32 v28, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s51
-; VI-NEXT: v_mov_b32_e32 v11, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 34
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s85
-; VI-NEXT: v_mov_b32_e32 v31, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 35
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s84
-; VI-NEXT: v_mov_b32_e32 v33, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s50
-; VI-NEXT: v_mov_b32_e32 v58, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s83
-; VI-NEXT: v_mov_b32_e32 v30, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s82
-; VI-NEXT: v_mov_b32_e32 v25, s47
; VI-NEXT: v_readlane_b32 s47, v62, 39
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s81
; VI-NEXT: v_mov_b32_e32 v50, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s80
; VI-NEXT: v_readlane_b32 s47, v62, 40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 43
-; VI-NEXT: v_mov_b32_e32 v20, s47
+; VI-NEXT: v_mov_b32_e32 v26, s47
; VI-NEXT: v_readlane_b32 s47, v62, 44
-; VI-NEXT: v_mov_b32_e32 v17, s47
+; VI-NEXT: v_mov_b32_e32 v16, s47
; VI-NEXT: v_readlane_b32 s47, v62, 45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
; VI-NEXT: v_readlane_b32 s47, v62, 46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s7
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s9
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s10
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s11
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s8
+; VI-NEXT: v_mov_b32_e32 v1, s12
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: v_mov_b32_e32 v8, s15
-; VI-NEXT: v_mov_b32_e32 v22, v7
-; VI-NEXT: v_mov_b32_e32 v7, s90
+; VI-NEXT: v_mov_b32_e32 v1, s13
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s10
-; VI-NEXT: v_mov_b32_e32 v7, s30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s11
-; VI-NEXT: v_mov_b32_e32 v7, s34
+; VI-NEXT: v_mov_b32_e32 v1, s14
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s15
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_mov_b32_e32 v7, s36
+; VI-NEXT: v_mov_b32_e32 v2, s45
+; VI-NEXT: v_mov_b32_e32 v1, s46
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s46
-; VI-NEXT: v_mov_b32_e32 v7, s38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s78
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s88
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s90
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s30
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s34
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_readlane_b32 s47, v62, 47
-; VI-NEXT: v_mov_b32_e32 v13, s47
+; VI-NEXT: v_mov_b32_e32 v22, s47
; VI-NEXT: v_readlane_b32 s47, v62, 48
-; VI-NEXT: v_mov_b32_e32 v21, s47
+; VI-NEXT: v_mov_b32_e32 v33, s47
; VI-NEXT: v_readlane_b32 s47, v62, 49
-; VI-NEXT: v_mov_b32_e32 v9, s47
+; VI-NEXT: v_mov_b32_e32 v39, s47
; VI-NEXT: v_readlane_b32 s47, v62, 50
-; VI-NEXT: v_mov_b32_e32 v54, s47
+; VI-NEXT: v_mov_b32_e32 v61, s47
; VI-NEXT: v_readlane_b32 s47, v62, 51
-; VI-NEXT: v_mov_b32_e32 v39, s47
+; VI-NEXT: v_mov_b32_e32 v15, s47
; VI-NEXT: v_readlane_b32 s47, v62, 52
-; VI-NEXT: v_mov_b32_e32 v40, s47
-; VI-NEXT: v_readlane_b32 s47, v62, 53
; VI-NEXT: v_mov_b32_e32 v36, s47
+; VI-NEXT: v_readlane_b32 s47, v62, 53
+; VI-NEXT: v_mov_b32_e32 v45, s47
; VI-NEXT: v_readlane_b32 s47, v62, 54
-; VI-NEXT: v_mov_b32_e32 v53, s47
+; VI-NEXT: v_mov_b32_e32 v56, s47
; VI-NEXT: v_readlane_b32 s47, v62, 55
-; VI-NEXT: v_mov_b32_e32 v46, s68
-; VI-NEXT: v_mov_b32_e32 v15, s47
+; VI-NEXT: v_mov_b32_e32 v21, s47
; VI-NEXT: v_readlane_b32 s47, v62, 56
-; VI-NEXT: v_mov_b32_e32 v44, s4
-; VI-NEXT: v_mov_b32_e32 v1, s56
-; VI-NEXT: v_mov_b32_e32 v3, s60
-; VI-NEXT: v_mov_b32_e32 v45, s78
-; VI-NEXT: v_mov_b32_e32 v43, s88
-; VI-NEXT: v_mov_b32_e32 v7, s48
+; VI-NEXT: v_mov_b32_e32 v1, s36
; VI-NEXT: v_mov_b32_e32 v55, s47
; VI-NEXT: v_readlane_b32 s47, v62, 57
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v61, s71
-; VI-NEXT: v_mov_b32_e32 v57, s47
-; VI-NEXT: v_mov_b32_e32 v19, s5
-; VI-NEXT: v_mov_b32_e32 v52, s28
-; VI-NEXT: v_mov_b32_e32 v51, s29
-; VI-NEXT: v_mov_b32_e32 v49, s26
-; VI-NEXT: v_mov_b32_e32 v48, s27
-; VI-NEXT: v_mov_b32_e32 v38, s24
-; VI-NEXT: v_mov_b32_e32 v37, s25
-; VI-NEXT: v_mov_b32_e32 v35, s22
-; VI-NEXT: v_mov_b32_e32 v27, s23
-; VI-NEXT: v_mov_b32_e32 v32, s20
-; VI-NEXT: v_mov_b32_e32 v60, s21
-; VI-NEXT: v_mov_b32_e32 v29, s18
-; VI-NEXT: v_mov_b32_e32 v23, s19
-; VI-NEXT: v_mov_b32_e32 v26, s16
-; VI-NEXT: v_mov_b32_e32 v47, s17
-; VI-NEXT: v_mov_b32_e32 v42, s12
-; VI-NEXT: v_mov_b32_e32 v16, s14
-; VI-NEXT: v_mov_b32_e32 v18, s40
-; VI-NEXT: v_mov_b32_e32 v12, s41
-; VI-NEXT: v_mov_b32_e32 v41, s42
-; VI-NEXT: v_mov_b32_e32 v14, s43
-; VI-NEXT: v_mov_b32_e32 v59, s44
-; VI-NEXT: v_mov_b32_e32 v56, s45
-; VI-NEXT: v_mov_b32_e32 v1, s58
-; VI-NEXT: v_mov_b32_e32 v3, s62
-; VI-NEXT: v_mov_b32_e32 v4, s72
-; VI-NEXT: v_mov_b32_e32 v5, s74
-; VI-NEXT: v_mov_b32_e32 v6, s76
-; VI-NEXT: v_mov_b32_e32 v45, s69
-; VI-NEXT: v_mov_b32_e32 v43, s67
-; VI-NEXT: v_mov_b32_e32 v7, v20
-; VI-NEXT: v_mov_b32_e32 v20, v10
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v47, s47
+; VI-NEXT: v_mov_b32_e32 v57, s4
+; VI-NEXT: v_mov_b32_e32 v46, s5
+; VI-NEXT: v_mov_b32_e32 v40, s28
+; VI-NEXT: v_mov_b32_e32 v54, s29
+; VI-NEXT: v_mov_b32_e32 v52, s26
+; VI-NEXT: v_mov_b32_e32 v51, s27
+; VI-NEXT: v_mov_b32_e32 v49, s24
+; VI-NEXT: v_mov_b32_e32 v48, s25
+; VI-NEXT: v_mov_b32_e32 v38, s22
+; VI-NEXT: v_mov_b32_e32 v37, s23
+; VI-NEXT: v_mov_b32_e32 v35, s20
+; VI-NEXT: v_mov_b32_e32 v34, s21
+; VI-NEXT: v_mov_b32_e32 v32, s18
+; VI-NEXT: v_mov_b32_e32 v31, s19
+; VI-NEXT: v_mov_b32_e32 v29, s16
+; VI-NEXT: v_mov_b32_e32 v28, s17
+; VI-NEXT: v_mov_b32_e32 v14, s40
+; VI-NEXT: v_mov_b32_e32 v41, s41
+; VI-NEXT: v_mov_b32_e32 v60, s42
+; VI-NEXT: v_mov_b32_e32 v59, s43
+; VI-NEXT: v_mov_b32_e32 v58, s44
+; VI-NEXT: v_mov_b32_e32 v42, s56
+; VI-NEXT: v_mov_b32_e32 v3, s58
+; VI-NEXT: v_mov_b32_e32 v6, s60
+; VI-NEXT: v_mov_b32_e32 v43, s62
+; VI-NEXT: v_mov_b32_e32 v44, s72
+; VI-NEXT: v_mov_b32_e32 v12, s74
+; VI-NEXT: v_mov_b32_e32 v19, s76
+; VI-NEXT: v_mov_b32_e32 v1, s38
+; VI-NEXT: v_mov_b32_e32 v4, s48
; VI-NEXT: .LBB91_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v6, v33, v6, s4
-; VI-NEXT: v_perm_b32 v26, v26, v58, s4
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_or_b32_e32 v6, v26, v6
-; VI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v6, v25, v30, s4
-; VI-NEXT: v_perm_b32 v33, v47, v50, s4
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_or_b32_e32 v6, v33, v6
-; VI-NEXT: v_add_u32_e32 v25, vcc, 4, v0
-; VI-NEXT: v_perm_b32 v5, v24, v5, s4
-; VI-NEXT: buffer_store_dword v6, v25, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v6, v29, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v6, v5
-; VI-NEXT: v_add_u32_e32 v6, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v6, v11, v28, s4
-; VI-NEXT: v_perm_b32 v5, v23, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v5, v32, v34, s4
+; VI-NEXT: v_perm_b32 v17, v5, v43, s4
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v6, v8, v6, s4
+; VI-NEXT: v_perm_b32 v12, v25, v12, s4
+; VI-NEXT: v_perm_b32 v25, v31, v27, s4
+; VI-NEXT: v_perm_b32 v19, v23, v19, s4
+; VI-NEXT: v_perm_b32 v23, v28, v50, s4
+; VI-NEXT: v_perm_b32 v28, v32, v30, s4
+; VI-NEXT: v_perm_b32 v24, v34, v9, s4
+; VI-NEXT: v_perm_b32 v20, v35, v20, s4
+; VI-NEXT: v_perm_b32 v13, v38, v13, s4
+; VI-NEXT: v_perm_b32 v11, v37, v11, s4
+; VI-NEXT: v_perm_b32 v7, v49, v7, s4
+; VI-NEXT: v_perm_b32 v49, v2, v47, s4
+; VI-NEXT: v_perm_b32 v29, v29, v53, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; VI-NEXT: v_or_b32_e32 v19, v29, v19
+; VI-NEXT: v_perm_b32 v18, v18, v44, s4
+; VI-NEXT: v_perm_b32 v10, v52, v10, s4
+; VI-NEXT: v_perm_b32 v1, v33, v1, s4
+; VI-NEXT: v_perm_b32 v39, v60, v39, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v4, v45, v4, s4
+; VI-NEXT: v_or_b32_e32 v1, v39, v1
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: v_perm_b32 v33, v59, v36, s4
+; VI-NEXT: v_perm_b32 v16, v14, v16, s4
+; VI-NEXT: v_perm_b32 v22, v41, v22, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -160521,300 +159884,262 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v2, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_add_u32_e32 v5, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v4, v60, v20, s4
+; VI-NEXT: v_perm_b32 v8, v48, v5, s4
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v48, v58, v56, s4
+; VI-NEXT: v_or_b32_e32 v4, v48, v4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v5, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v4, v4, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v27, v5, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v35, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v30, v51, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v2, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_add_u32_e32 v4, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v31, v40, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v27, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v32, v3, v42, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v4, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v34, v54, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v38, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v35, v57, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v3, v4, v3, s4
+; VI-NEXT: v_perm_b32 v37, v3, v37, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v37, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v49, v2, s4
+; VI-NEXT: v_perm_b32 v38, v46, v3, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v26, v26, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v3, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v23, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v12
+; VI-NEXT: v_or_b32_e32 v5, v28, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v48, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v52, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v51, v1, s4
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v25, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v18
+; VI-NEXT: v_or_b32_e32 v5, v20, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v22, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v24, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v17
+; VI-NEXT: v_or_b32_e32 v5, v13, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v11, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v6
+; VI-NEXT: v_or_b32_e32 v5, v7, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v8, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v27
+; VI-NEXT: v_or_b32_e32 v5, v10, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v30, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
+; VI-NEXT: v_or_b32_e32 v5, v31, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v44, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v59, v53, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v36, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v55, v15, s4
-; VI-NEXT: v_perm_b32 v1, v56, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v34, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; VI-NEXT: v_or_b32_e32 v5, v35, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_perm_b32 v1, v15, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v4, v55, v21, s4
+; VI-NEXT: v_or_b32_e32 v1, v33, v1
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
+; VI-NEXT: v_or_b32_e32 v4, v49, v4
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v5, v3, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; VI-NEXT: v_or_b32_e32 v5, v38, v5
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v22, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v41, v9, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v21, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v54, s4
-; VI-NEXT: v_perm_b32 v1, v14, v40, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v18, v17, s4
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v7, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v12, v13, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v8, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v42, v1, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v61, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
+; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
-; VI-NEXT: v_perm_b32 v1, v1, v43, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -160830,8 +160155,8 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -176436,751 +175761,754 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; SI-NEXT: v_mov_b32_e32 v32, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8
+; SI-NEXT: v_mov_b32_e32 v31, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:4
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: buffer_load_dword v57, off, s[0:3], s32
-; SI-NEXT: v_mov_b32_e32 v31, v3
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v30
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v29
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
+; SI-NEXT: buffer_load_dword v52, off, s[0:3], s32
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_mov_b32_e32 v32, v2
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v30
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v28
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v29
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v27
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v28
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v26
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v27
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v25
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v26
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v25
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v23
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v24
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v23
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v21
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v22
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v20
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v21
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v19
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v20
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v18
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v19
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v17
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v18
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v16
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v17
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v15
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v16
+; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v14
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v15
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v13
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v14
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v11
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v13
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v10
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v11
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v9
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v9
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v7
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: s_waitcnt vmcnt(14)
-; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2
-; SI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v4
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v31
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v7
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v32
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v47
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v5
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v5
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v8
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v57
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; kill: killed $vgpr2
; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v12
+; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v6
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; kill: killed $vgpr2
+; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr63
-; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr60
-; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; kill: killed $vgpr4
+; SI-NEXT: ; implicit-def: $vgpr6
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr4
+; SI-NEXT: ; kill: killed $vgpr4
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; kill: killed $vgpr6
-; SI-NEXT: ; implicit-def: $vgpr6
+; SI-NEXT: ; kill: killed $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; kill: killed $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; kill: killed $vgpr43
+; SI-NEXT: s_waitcnt vmcnt(14)
+; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v1
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v47
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v52
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr1
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; kill: killed $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB94_2
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_mov_b32_e32 v42, v40
-; SI-NEXT: v_mov_b32_e32 v6, v53
-; SI-NEXT: v_and_b32_e32 v4, 0xffff, v57
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v52, v2, v31
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v43, v41
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(4)
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_or_b32_e32 v1, v1, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v45
-; SI-NEXT: v_or_b32_e32 v2, v2, v31
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v51, v31, v32
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v43
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v31, 0xffff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v50, v31, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v51, v2, v31
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v50, v2, v31
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v41
+; SI-NEXT: v_mov_b32_e32 v41, v40
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
+; SI-NEXT: v_or_b32_e32 v2, v2, v31
+; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v48, v5, v31
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v40
-; SI-NEXT: v_mov_b32_e32 v40, v55
+; SI-NEXT: v_mov_b32_e32 v40, v54
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v49, v5, v31
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v7
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v38, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v8
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v55
-; SI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v54
; SI-NEXT: v_or_b32_e32 v39, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_mov_b32_e32 v54, v53
+; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
-; SI-NEXT: v_or_b32_e32 v37, v5, v7
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v55
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v36, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v52, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v10
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53
+; SI-NEXT: v_or_b32_e32 v37, v5, v7
+; SI-NEXT: v_alignbit_b32 v5, v51, v1, 24
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v11
; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v34, v5, v7
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53
-; SI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v12
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v57
; SI-NEXT: v_or_b32_e32 v35, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v52, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v5, v51, v1, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v13
; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(4)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(3)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v32, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v14
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v53
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v6
; SI-NEXT: v_or_b32_e32 v33, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v2, v52, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v5, v51, v1, 8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v63, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v16
-; SI-NEXT: s_waitcnt vmcnt(3)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v14
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15
; SI-NEXT: v_or_b32_e32 v31, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v50, v51, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 24
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v17
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v61, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v14
; SI-NEXT: v_or_b32_e32 v62, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v50, v51, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 16
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v19
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v59, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13
; SI-NEXT: v_or_b32_e32 v60, v5, v7
-; SI-NEXT: v_alignbit_b32 v5, v50, v51, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v5, v2, v50, 8
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v21
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v20, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v12
; SI-NEXT: v_or_b32_e32 v58, v5, v7
; SI-NEXT: v_alignbit_b32 v5, v49, v48, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v23
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v19, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v24
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v11
; SI-NEXT: v_or_b32_e32 v56, v5, v7
; SI-NEXT: v_alignbit_b32 v5, v49, v48, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v25
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v18, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v26
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v10
; SI-NEXT: v_or_b32_e32 v46, v5, v7
; SI-NEXT: v_alignbit_b32 v5, v49, v48, 8
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; SI-NEXT: v_or_b32_e32 v17, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v9
; SI-NEXT: v_or_b32_e32 v44, v5, v7
; SI-NEXT: v_alignbit_b32 v5, v39, v38, 24
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v29
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v1
+; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v4
; SI-NEXT: v_or_b32_e32 v16, v5, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v30
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v8
-; SI-NEXT: v_or_b32_e32 v41, v5, v7
+; SI-NEXT: v_or_b32_e32 v42, v5, v7
; SI-NEXT: v_alignbit_b32 v5, v39, v38, 16
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_or_b32_e32 v5, v4, v3
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v47
-; SI-NEXT: ; implicit-def: $vgpr7
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v52
+; SI-NEXT: v_or_b32_e32 v7, v5, v3
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v47
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v4
-; SI-NEXT: v_or_b32_e32 v54, v1, v3
-; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v5
+; SI-NEXT: v_or_b32_e32 v55, v3, v4
+; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v20, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v20, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v20, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v58, v20, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v20, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v56, v19, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v20, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v56, v19, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v56, v19, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v3, v56, v19, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v56, v19, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v56, v19, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v46, v18, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v18, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v46, v18, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v18, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v46, v18, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v18, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v17, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v44, v17, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v17, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v44, v17, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v3, v44, v17, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v17, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v16, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v16, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v16, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v16, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v16, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v16, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v55, v7, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v5, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v55, v7, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v5, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v55, v7, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v5, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v50
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v35
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v62
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v60
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v56
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v46
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v42
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v45, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v45, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v43, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v43, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v41, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v42, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v40, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v40, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v54, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v55, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v57, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v6, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v6, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v53, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v15, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v14, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v14, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v13, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v13, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v12, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v12, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v11, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v11, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v10, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v10, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v9, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v9, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v15, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v8, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v8, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: v_mov_b32_e32 v45, v17
-; SI-NEXT: v_mov_b32_e32 v43, v16
-; SI-NEXT: v_mov_b32_e32 v55, v40
-; SI-NEXT: v_mov_b32_e32 v40, v42
-; SI-NEXT: v_mov_b32_e32 v42, v5
-; SI-NEXT: v_mov_b32_e32 v53, v6
-; SI-NEXT: v_bfe_u32 v6, v4, 8, 8
+; SI-NEXT: v_bfe_u32 v3, v5, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: ; kill: killed $vgpr3
+; SI-NEXT: ; implicit-def: $vgpr3
+; SI-NEXT: v_mov_b32_e32 v45, v16
+; SI-NEXT: v_mov_b32_e32 v6, v20
+; SI-NEXT: v_mov_b32_e32 v54, v40
+; SI-NEXT: v_mov_b32_e32 v40, v41
+; SI-NEXT: v_mov_b32_e32 v41, v43
; SI-NEXT: ; implicit-def: $vgpr5
+; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr9
; SI-NEXT: ; implicit-def: $vgpr10
@@ -177194,37 +176522,38 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; kill: killed $vgpr1
-; SI-NEXT: ; implicit-def: $vgpr1
-; SI-NEXT: ; kill: killed $vgpr1
+; SI-NEXT: ; kill: killed $vgpr3
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: .LBB94_2: ; %Flow
-; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; SI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
+; SI-NEXT: s_xor_b64 exec, exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB94_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v57
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v47
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v52
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v21
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v42, v3, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_or_b32_e32 v43, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v47
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v6, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
-; SI-NEXT: v_or_b32_e32 v54, v1, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v52, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; SI-NEXT: v_or_b32_e32 v55, v1, v2
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:528 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v29
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -177234,7 +176563,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v43, v2, v1
+; SI-NEXT: v_or_b32_e32 v45, v2, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v30
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -177244,7 +176573,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; SI-NEXT: v_or_b32_e32 v41, v1, v2
+; SI-NEXT: v_or_b32_e32 v42, v1, v2
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:524 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v27
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -177254,8 +176583,8 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_or_b32_e32 v45, v2, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v30, v2, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v28
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
@@ -177264,7 +176593,6 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
-; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: v_or_b32_e32 v44, v1, v2
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v25
@@ -177276,7 +176604,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_or_b32_e32 v28, v2, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v26
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
@@ -177300,8 +176628,6 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v1, v24
; SI-NEXT: v_cvt_f16_f32_e32 v23, v2
-; SI-NEXT: v_mov_b32_e32 v24, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v21
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -177312,10 +176638,10 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v56, v1, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, v22
-; SI-NEXT: v_or_b32_e32 v22, v3, v1
+; SI-NEXT: v_or_b32_e32 v6, v3, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
@@ -177328,7 +176654,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v21
; SI-NEXT: v_cvt_f32_f16_e32 v4, v17
; SI-NEXT: v_or_b32_e32 v58, v2, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v19
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -177350,7 +176676,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_or_b32_e32 v60, v3, v1
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
@@ -177371,7 +176697,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v17
; SI-NEXT: v_or_b32_e32 v62, v1, v3
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f32_f16_e32 v4, v16
@@ -177388,7 +176714,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v15
; SI-NEXT: v_cvt_f32_f16_e32 v4, v11
; SI-NEXT: v_or_b32_e32 v31, v2, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f32_f16_e32 v2, v13
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
@@ -177413,382 +176739,379 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v53
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v57
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v34, v4, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v12
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v53, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v57, v1
; SI-NEXT: v_cvt_f32_f16_e32 v4, v9
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v57
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
; SI-NEXT: v_or_b32_e32 v35, v1, v3
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v53
; SI-NEXT: v_cvt_f32_f16_e32 v4, v10
-; SI-NEXT: v_or_b32_e32 v37, v3, v1
+; SI-NEXT: v_or_b32_e32 v36, v3, v1
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v53, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
; SI-NEXT: v_cvt_f32_f16_e32 v4, v5
-; SI-NEXT: v_or_b32_e32 v36, v2, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v53
+; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v37, v2, v3
; SI-NEXT: v_cvt_f32_f16_e32 v2, v7
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v55
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v54
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v55, v3
-; SI-NEXT: v_or_b32_e32 v38, v2, v1
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f16_f32_e32 v54, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, v8
-; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
-; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v55
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v5, v5
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_or_b32_e32 v38, v2, v1
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v54
; SI-NEXT: v_or_b32_e32 v39, v3, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v40
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v40
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v40, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v48, v4, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v2
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
+; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_or_b32_e32 v49, v1, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, v41
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v51, v3, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v1, v24
-; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_cvt_f16_f32_e32 v41, v2
+; SI-NEXT: v_or_b32_e32 v50, v3, v1
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v41
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v5, v2
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v5
-; SI-NEXT: v_or_b32_e32 v50, v2, v3
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: v_or_b32_e32 v2, v2, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
+; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
+; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v4
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
-; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v4
+; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
-; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v3
-; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
-; SI-NEXT: v_or_b32_e32 v52, v2, v1
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v7
-; SI-NEXT: v_or_b32_e32 v2, v3, v1
-; SI-NEXT: v_alignbit_b32 v1, v2, v52, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
+; SI-NEXT: v_or_b32_e32 v1, v3, v1
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v7
+; SI-NEXT: v_or_b32_e32 v51, v4, v3
+; SI-NEXT: v_alignbit_b32 v3, v51, v1, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v2, v52, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v51, v1, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v2, v52, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v51, v1, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v50, v51, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v2, v50, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v50, v51, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v2, v50, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v50, v51, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v2, v50, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v49, v48, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v49, v48, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v49, v48, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v49, v48, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v49, v48, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v49, v48, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v38, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v39, v38, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v38, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v39, v38, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v39, v38, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v37, v36, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v35, v34, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v35, v34, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v32, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v33, v32, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v63, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v31, v63, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v62, v61, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v62, v61, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v60, v59, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v60, v59, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v22, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v6, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v22, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v58, v22, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v6, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v56, v26, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v58, v6, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v56, v26, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v56, v26, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v3, v56, v26, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v56, v26, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v56, v26, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v46, v28, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v28, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v46, v28, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v28, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v46, v28, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v46, v28, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v45, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v44, v30, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v45, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v44, v30, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v3, v44, v30, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v45, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v45, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v43, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v45, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v43, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v42, v45, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v41, v43, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v55, v43, 24
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v42, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v3, v55, v43, 16
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_alignbit_b32 v3, v55, v43, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v42, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v54, v42, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v2
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v50
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v35
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v35
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v62
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v60
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v46
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v56
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v44
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v46
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_bfe_u32 v3, v7, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v41, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v40, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v7, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v5, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v54, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v40, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v53, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v55, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v57, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v9, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v53, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v13, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v13, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v15, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v15, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v17, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v17, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v19, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v19, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v21, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v21, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v23, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v23, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v25, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v25, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v27, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v3, v27, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_bfe_u32 v1, v29, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v6, v6, 8, 8
+; SI-NEXT: v_bfe_u32 v3, v29, 8, 8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v42
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_bfe_u32 v3, v52, 8, 8
+; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: .LBB94_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v52
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v1, v1, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
@@ -177798,68 +177121,63 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v1, v1, v3
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_or_b32_e32 v2, v3, v2
-; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: v_or_b32_e32 v3, v4, v3
+; SI-NEXT: v_or_b32_e32 v1, v1, v3
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v48
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -177868,10 +177186,9 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
; SI-NEXT: s_waitcnt vmcnt(1)
@@ -177884,16 +177201,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v38
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -177902,32 +177218,30 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v55
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v54
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -177936,34 +177250,30 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -177972,32 +177282,30 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v57
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178006,16 +177314,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178024,16 +177331,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178042,16 +177348,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178060,8 +177365,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v61
@@ -178078,16 +177382,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v62
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178096,8 +177399,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v59
@@ -178105,7 +177407,7 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178114,16 +177416,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v60
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178132,14 +177433,11 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(2)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -178152,16 +177450,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178170,18 +177467,17 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178190,16 +177486,15 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -178208,18 +177503,17 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -178228,34 +177522,34 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v46
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
@@ -178264,96 +177558,92 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v44
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v41
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v42
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v42
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(2)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v6
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
-; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v55
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -178392,992 +177682,998 @@ define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v24
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v31, v30
-; VI-NEXT: v_mov_b32_e32 v30, v29
+; VI-NEXT: v_mov_b32_e32 v54, v30
+; VI-NEXT: v_mov_b32_e32 v31, v28
+; VI-NEXT: v_mov_b32_e32 v30, v27
+; VI-NEXT: v_mov_b32_e32 v28, v26
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v31
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v27, v25
+; VI-NEXT: v_mov_b32_e32 v26, v24
+; VI-NEXT: v_mov_b32_e32 v53, v29
+; VI-NEXT: v_mov_b32_e32 v25, v23
; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v16
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v13
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v9
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v7
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v31
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v28
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v18
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v17
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr24
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; kill: killed $vgpr24
-; VI-NEXT: ; implicit-def: $vgpr46
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr48
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32
+; VI-NEXT: v_mov_b32_e32 v51, v3
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v15
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v13
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v11
+; VI-NEXT: v_mov_b32_e32 v49, v5
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v9
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v49
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v51
+; VI-NEXT: v_mov_b32_e32 v50, v6
+; VI-NEXT: v_mov_b32_e32 v52, v4
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v50
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v52
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v54
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v53
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v28
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v20
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v17
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v30
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v27
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v25
+; VI-NEXT: s_waitcnt vmcnt(12)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v29
-; VI-NEXT: s_waitcnt vmcnt(13)
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v51
+; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v24
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v21
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: s_waitcnt vmcnt(12)
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v50
-; VI-NEXT: ; kill: killed $vgpr23
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v23
+; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr5
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr6
+; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: ; kill: killed $vgpr3
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v16
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v16
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v15
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v14
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v14
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v13
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v12
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v12
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v11
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v10
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v10
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v9
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v7
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v6
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v6
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v5
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v4
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v4
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v3
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v2
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v2
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v1
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v51
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v51
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v50
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v31
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v31
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v30
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v28
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v28
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v27
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v26
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v26
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v25
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v20
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v24, 8, v19
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v29, v49
-; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v49, v29
+; VI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v16
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v16
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v15
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v14
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v14
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v13
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v12
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v12
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v11
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v10
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v10
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v9
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v7
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v50
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v52
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v24
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v24
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v23
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v54
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v54
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v53
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v4, 8, v51
+; VI-NEXT: v_mov_b32_e32 v31, v44
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[15:16]
+; VI-NEXT: v_mov_b32_e32 v44, v31
+; VI-NEXT: v_mov_b32_e32 v31, v4
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[11:12]
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v2
+; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[51:52]
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v50
+; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v49
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v52
+; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v17
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v55
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v55
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v54
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v22
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v21
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v18
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v17
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[50:51]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[30:31]
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v29, v44
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[27:28]
-; VI-NEXT: v_mov_b32_e32 v44, v29
-; VI-NEXT: v_mov_b32_e32 v29, v47
-; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v47, v29
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v29, v63
-; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[54:55]
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[25:26]
-; VI-NEXT: v_mov_b32_e32 v63, v29
-; VI-NEXT: v_mov_b32_e32 v29, v61
-; VI-NEXT: v_lshrrev_b64 v[60:61], 24, v[21:22]
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[19:20]
-; VI-NEXT: v_mov_b32_e32 v61, v29
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v30
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v30
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v29
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v28
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v28
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v27
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v26
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v26
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v25
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v22
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v22
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v21
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v20
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v20
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v3, v48
+; VI-NEXT: v_lshrrev_b64 v[47:48], 24, v[49:50]
+; VI-NEXT: v_mov_b32_e32 v48, v3
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[53:54]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[25:26]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v30, v55
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[21:22]
; VI-NEXT: v_mov_b32_e32 v29, v56
-; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v22
-; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v18
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[19:20]
; VI-NEXT: v_mov_b32_e32 v56, v29
+; VI-NEXT: v_mov_b32_e32 v29, v42
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v42, v29
; VI-NEXT: .LBB94_2: ; %Flow
-; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: s_xor_b64 exec, exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB94_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v42, 0x200
-; VI-NEXT: v_add_f16_sdwa v23, v18, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
+; VI-NEXT: v_mov_b32_e32 v44, 0x200
+; VI-NEXT: v_add_f16_sdwa v3, v18, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
; VI-NEXT: v_add_f16_e32 v18, 0x200, v18
-; VI-NEXT: v_add_f16_sdwa v23, v17, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v57, v18, v29
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
+; VI-NEXT: v_add_f16_sdwa v3, v17, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v17, 0x200, v17
-; VI-NEXT: v_add_f16_sdwa v23, v20, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v56, v17, v29
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
+; VI-NEXT: v_or_b32_e32 v46, v18, v29
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_sdwa v3, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
-; VI-NEXT: v_add_f16_sdwa v23, v19, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v4, v24, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
+; VI-NEXT: v_add_f16_sdwa v13, v2, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
+; VI-NEXT: v_add_f16_sdwa v63, v52, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v52, 0x200, v52
+; VI-NEXT: v_add_f16_sdwa v18, v8, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
+; VI-NEXT: v_add_f16_sdwa v6, v7, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
+; VI-NEXT: v_add_f16_sdwa v15, v10, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
+; VI-NEXT: v_add_f16_sdwa v14, v12, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
+; VI-NEXT: v_or_b32_e32 v45, v17, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
-; VI-NEXT: v_or_b32_e32 v59, v20, v29
+; VI-NEXT: v_or_b32_e32 v56, v20, v29
; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: v_add_f16_sdwa v20, v51, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v51, 0x200, v51
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v37, v10, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
-; VI-NEXT: v_add_f16_sdwa v45, v14, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v14, 0x200, v14
-; VI-NEXT: v_or_b32_e32 v58, v19, v29
-; VI-NEXT: v_add_f16_sdwa v19, v22, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_add_f16_sdwa v3, v22, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
-; VI-NEXT: v_add_f16_sdwa v19, v21, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v55, v19, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_or_b32_e32 v58, v22, v29
+; VI-NEXT: v_add_f16_sdwa v29, v21, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
-; VI-NEXT: v_or_b32_e32 v55, v22, v29
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: s_waitcnt vmcnt(5)
-; VI-NEXT: v_add_f16_sdwa v19, v24, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_e32 v24, 0x200, v24
-; VI-NEXT: v_add_f16_sdwa v22, v8, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_or_b32_e32 v54, v21, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v23, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
-; VI-NEXT: v_or_b32_e32 v61, v24, v29
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v24, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v26, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_add_f16_sdwa v3, v26, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v26, 0x200, v26
-; VI-NEXT: v_add_f16_sdwa v24, v4, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
-; VI-NEXT: v_add_f16_sdwa v21, v6, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
-; VI-NEXT: v_or_b32_e32 v60, v23, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v25, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v57, v21, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_sdwa v21, v25, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v39, v26, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
; VI-NEXT: v_add_f16_e32 v25, 0x200, v25
-; VI-NEXT: v_or_b32_e32 v63, v26, v29
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v28, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v3, v28, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v38, v25, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
; VI-NEXT: v_add_f16_e32 v28, 0x200, v28
-; VI-NEXT: v_add_f16_sdwa v26, v31, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v31, 0x200, v31
-; VI-NEXT: v_add_f16_sdwa v23, v12, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
-; VI-NEXT: v_or_b32_e32 v62, v25, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v21, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v60, v28, v29
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: v_add_f16_e32 v27, 0x200, v27
-; VI-NEXT: v_or_b32_e32 v39, v28, v29
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v50, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v59, v27, v29
+; VI-NEXT: v_mov_b32_e32 v16, v27
+; VI-NEXT: v_mov_b32_e32 v17, v28
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v3, v22, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_e32 v22, 0x200, v22
+; VI-NEXT: v_or_b32_e32 v37, v22, v29
+; VI-NEXT: v_add_f16_sdwa v29, v21, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v21, 0x200, v21
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; VI-NEXT: v_add_f16_sdwa v3, v54, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v54, 0x200, v54
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_sdwa v22, v50, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_f16_e32 v50, 0x200, v50
-; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_add_f16_sdwa v25, v30, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_e32 v30, 0x200, v30
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v38, v27, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v26
-; VI-NEXT: v_or_b32_e32 v34, v31, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v25
-; VI-NEXT: v_or_b32_e32 v33, v30, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: v_or_b32_e32 v36, v51, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_sdwa v19, v2, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v35, v50, v29
-; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
-; VI-NEXT: v_add_f16_sdwa v20, v1, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v19
-; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
-; VI-NEXT: v_or_b32_e32 v47, v2, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v46, v1, v29
-; VI-NEXT: v_add_f16_sdwa v20, v3, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v24
-; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
-; VI-NEXT: v_or_b32_e32 v44, v4, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v43, v3, v29
-; VI-NEXT: v_add_f16_sdwa v20, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v36, v21, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_sdwa v21, v53, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v53, 0x200, v53
+; VI-NEXT: v_or_b32_e32 v62, v54, v29
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
-; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
-; VI-NEXT: v_or_b32_e32 v49, v6, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v48, v5, v29
-; VI-NEXT: v_add_f16_sdwa v20, v7, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v61, v53, v29
+; VI-NEXT: v_add_f16_sdwa v3, v23, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v4
+; VI-NEXT: v_add_f16_e32 v23, 0x200, v23
+; VI-NEXT: v_or_b32_e32 v34, v24, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v33, v23, v29
+; VI-NEXT: v_add_f16_sdwa v3, v1, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v13
+; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
+; VI-NEXT: v_or_b32_e32 v43, v2, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v42, v1, v29
+; VI-NEXT: v_add_f16_sdwa v3, v51, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v63
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v41, v52, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_add_f16_sdwa v3, v49, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v49, 0x200, v49
+; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_e32 v51, 0x200, v51
+; VI-NEXT: v_or_b32_e32 v40, v51, v29
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v22
-; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
-; VI-NEXT: v_or_b32_e32 v51, v8, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v50, v7, v29
-; VI-NEXT: v_add_f16_sdwa v20, v9, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v37
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, v51
+; VI-NEXT: v_mov_b32_e32 v5, v52
+; VI-NEXT: v_mov_b32_e32 v27, v53
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v28, v54
+; VI-NEXT: v_add_f16_sdwa v21, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_or_b32_e32 v48, v50, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: v_or_b32_e32 v47, v49, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v18
+; VI-NEXT: v_or_b32_e32 v50, v8, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v6
+; VI-NEXT: v_or_b32_e32 v49, v7, v29
+; VI-NEXT: v_add_f16_sdwa v3, v9, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v15
; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
-; VI-NEXT: v_or_b32_e32 v53, v10, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v52, v9, v29
-; VI-NEXT: v_add_f16_sdwa v20, v11, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v23
+; VI-NEXT: v_or_b32_e32 v52, v10, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v51, v9, v29
+; VI-NEXT: v_add_f16_sdwa v3, v11, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v14
; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
-; VI-NEXT: v_or_b32_e32 v41, v12, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v40, v11, v29
-; VI-NEXT: v_add_f16_sdwa v20, v13, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v45
-; VI-NEXT: v_add_f16_e32 v13, 0x200, v13
-; VI-NEXT: v_or_b32_e32 v32, v14, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v20
-; VI-NEXT: v_mov_b32_e32 v27, v30
-; VI-NEXT: v_add_f16_sdwa v25, v16, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_mov_b32_e32 v28, v31
-; VI-NEXT: v_or_b32_e32 v31, v13, v29
-; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
-; VI-NEXT: v_add_f16_sdwa v42, v15, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v25
-; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
-; VI-NEXT: v_or_b32_e32 v30, v16, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v42
+; VI-NEXT: v_or_b32_e32 v54, v12, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v53, v11, v29
+; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v21
+; VI-NEXT: v_or_b32_e32 v32, v20, v29
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v19, v29
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_add_f16_sdwa v3, v19, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_add_f16_sdwa v35, v20, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_e32 v20, 0x200, v20
+; VI-NEXT: v_add_f16_e32 v19, 0x200, v19
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v35
+; VI-NEXT: v_or_b32_e32 v30, v20, v29
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v3
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v30
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v29, v19, v29
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v29
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v32
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v31
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v54
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v53
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v52
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v51
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v50
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v49
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v15, v29
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v30
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v29
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v32
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v31
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v41
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v40
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v53
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v52
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v51
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v50
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v49
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v48
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v44
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v43
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v47
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v46
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v36
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v35
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v34
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v33
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v39
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v38
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v63
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v62
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[31:32]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v61
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v60
-; VI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v30, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v55
-; VI-NEXT: v_mov_b32_e32 v31, v28
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v54
-; VI-NEXT: v_mov_b32_e32 v30, v27
-; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[40:41]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v59
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[33:34]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v58
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v57
-; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[52:53]
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v56
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[38:39]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v20, v25, 8, 8
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v28, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[43:44]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v40, v45
-; VI-NEXT: v_bfe_u32 v20, v45, 8, 8
-; VI-NEXT: v_mov_b32_e32 v45, v23
-; VI-NEXT: v_mov_b32_e32 v52, v26
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[50:51]
-; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v20, v45, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[35:36], 24, v[35:36]
-; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[62:63]
-; VI-NEXT: v_lshrrev_b64 v[62:63], 24, v[60:61]
-; VI-NEXT: v_lshrrev_b64 v[60:61], 24, v[54:55]
-; VI-NEXT: v_lshrrev_b64 v[54:55], 24, v[58:59]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v59, v37
-; VI-NEXT: v_bfe_u32 v20, v37, 8, 8
-; VI-NEXT: v_mov_b32_e32 v37, v22
-; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v20, v37, 8, 8
-; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[48:49], 24, v[48:49]
-; VI-NEXT: v_lshrrev_b64 v[46:47], 24, v[46:47]
-; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v20, v21, 8, 8
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[56:57]
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v20, v24, 8, 8
-; VI-NEXT: v_mov_b32_e32 v35, v19
-; VI-NEXT: v_bfe_u32 v19, v19, 8, 8
-; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_mov_b32_e32 v58, v21
-; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v48
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v47
+; VI-NEXT: v_lshrrev_b64 v[47:48], 24, v[47:48]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[53:54]
+; VI-NEXT: v_mov_b32_e32 v54, v28
+; VI-NEXT: v_mov_b32_e32 v48, v6
+; VI-NEXT: v_mov_b32_e32 v6, v3
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v42
+; VI-NEXT: v_mov_b32_e32 v53, v27
+; VI-NEXT: v_mov_b32_e32 v28, v17
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v34
+; VI-NEXT: v_mov_b32_e32 v27, v16
+; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[51:52]
+; VI-NEXT: v_mov_b32_e32 v52, v5
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v33
+; VI-NEXT: v_mov_b32_e32 v51, v4
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v62
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v61
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[61:62]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v37
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v36
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[36:37]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v60
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v59
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[59:60]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v39
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v38
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[38:39]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v58
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v57
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[57:58]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v56
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v55
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v35, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v21, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v14, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v15, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v18, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v22, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v63, 8, 8
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v13, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v41
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v40
+; VI-NEXT: v_lshrrev_b64 v[40:41], 24, v[40:41]
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v43
+; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[42:43]
+; VI-NEXT: v_lshrrev_b64 v[55:56], 24, v[55:56]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v34, v24
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[45:46]
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v46
+; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[49:50]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v45
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v57, v18
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: v_mov_b32_e32 v61, v21
+; VI-NEXT: v_mov_b32_e32 v58, v14
+; VI-NEXT: v_mov_b32_e32 v37, v15
+; VI-NEXT: v_mov_b32_e32 v34, v22
+; VI-NEXT: v_mov_b32_e32 v59, v63
+; VI-NEXT: v_mov_b32_e32 v36, v13
; VI-NEXT: s_waitcnt vmcnt(14)
-; VI-NEXT: v_bfe_u32 v23, v44, 8, 8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v23, v52, 8, 8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v23, v32, 8, 8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v23, v42, 8, 8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v33, v53, 8, 8
-; VI-NEXT: v_bfe_u32 v23, v41, 8, 8
-; VI-NEXT: v_bfe_u32 v57, v49, 8, 8
-; VI-NEXT: v_bfe_u32 v38, v47, 8, 8
-; VI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v3, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(13)
+; VI-NEXT: v_bfe_u32 v3, v56, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(11)
+; VI-NEXT: v_bfe_u32 v3, v38, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v42, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v46, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v3, v44, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v45, v3
+; VI-NEXT: v_bfe_u32 v3, v3, 8, 8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_mov_b32_e32 v33, v3
+; VI-NEXT: v_bfe_u32 v63, v3, 8, 8
; VI-NEXT: .LBB94_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v29, v24, v46, s4
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v4, v52, v5, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v30, s4
+; VI-NEXT: v_perm_b32 v29, v39, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v29
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v24, s4
+; VI-NEXT: v_perm_b32 v17, v17, v60, s4
+; VI-NEXT: v_perm_b32 v18, v18, v62, s4
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v1, v1, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: v_or_b32_e32 v1, v1, v29
-; VI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v2, v2, v24, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v35, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v43, s4
+; VI-NEXT: v_perm_b32 v30, v3, v40, s4
+; VI-NEXT: v_perm_b32 v3, v51, v31, s4
+; VI-NEXT: v_perm_b32 v31, v5, v47, s4
+; VI-NEXT: v_perm_b32 v5, v49, v6, s4
+; VI-NEXT: v_perm_b32 v6, v50, v32, s4
+; VI-NEXT: v_perm_b32 v32, v48, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v4, v1, s4
+; VI-NEXT: v_perm_b32 v7, v7, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v34, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v8, v8, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v48, s4
+; VI-NEXT: v_perm_b32 v39, v13, v14, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v5, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v6, v1, s4
+; VI-NEXT: v_perm_b32 v9, v9, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v58, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v10, v10, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v48, v13, v14, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v7, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v8, v1, s4
+; VI-NEXT: v_perm_b32 v11, v11, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v37, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v12, v12, v13, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v49, v13, v14, s4
+; VI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v9, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v10, v1, s4
+; VI-NEXT: v_perm_b32 v13, v13, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v59, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v14, v14, v15, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v50, v15, v21, s4
+; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v11, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v12, v1, s4
+; VI-NEXT: v_perm_b32 v15, v15, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v45, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v16, v16, v21, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v13, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v14, v1, s4
+; VI-NEXT: v_perm_b32 v51, v21, v41, s4
+; VI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(2)
+; VI-NEXT: v_perm_b32 v52, v21, v55, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v40, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v36, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v15, v2, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v30
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v52
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v59, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v31
+; VI-NEXT: v_or_b32_e32 v1, v5, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v34, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
+; VI-NEXT: v_or_b32_e32 v1, v7, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v16, v1, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v63, v55, s4
+; VI-NEXT: v_perm_b32 v1, v57, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v8, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v39
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v47, v38, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v1, v37, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v10, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v48
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v18, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v56, v54, s4
+; VI-NEXT: v_perm_b32 v1, v58, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v12, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
+; VI-NEXT: v_or_b32_e32 v1, v13, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v49, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v1, v61, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
+; VI-NEXT: v_or_b32_e32 v1, v15, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v20, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v39, v60, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v1, v35, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
+; VI-NEXT: v_or_b32_e32 v1, v17, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v1, v33, v63, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v18, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v21, v1, s4
+; VI-NEXT: v_perm_b32 v1, v19, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v53, v33, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v20, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v22, v1, s4
+; VI-NEXT: v_perm_b32 v2, v45, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: v_perm_b32 v2, v36, v62, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v2, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v3, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v41, v2, s4
+; VI-NEXT: v_perm_b32 v2, v44, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_perm_b32 v1, v25, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v26, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v42, v2, s4
+; VI-NEXT: v_perm_b32 v2, v46, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_perm_b32 v1, v27, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v28, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v32, v2, s4
+; VI-NEXT: v_perm_b32 v2, v42, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_perm_b32 v1, v30, v1, s4
+; VI-NEXT: v_perm_b32 v2, v2, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v31, v1, s4
+; VI-NEXT: v_perm_b32 v1, v3, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v52, v2, s4
+; VI-NEXT: v_perm_b32 v2, v38, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v61, v2, s4
-; VI-NEXT: v_perm_b32 v1, v50, v1, s4
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v1, v53, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v51, v1, s4
+; VI-NEXT: v_perm_b32 v1, v54, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v44, v2, s4
+; VI-NEXT: v_perm_b32 v2, v56, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v1, v23, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v24, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -181241,72 +180537,76 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_writelane_b32 v34, s30, 34
; SI-NEXT: v_writelane_b32 v34, s31, 35
; SI-NEXT: s_lshr_b32 s5, s16, 16
-; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane
+; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane
; SI-NEXT: s_lshr_b32 s6, s18, 16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v37, s5, 0
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_writelane_b32 v36, s5, 0
; SI-NEXT: s_lshr_b32 s7, s20, 16
-; SI-NEXT: v_writelane_b32 v37, s6, 2
+; SI-NEXT: v_writelane_b32 v36, s6, 1
; SI-NEXT: s_lshr_b32 s8, s22, 16
-; SI-NEXT: v_writelane_b32 v37, s7, 3
+; SI-NEXT: v_writelane_b32 v36, s7, 2
; SI-NEXT: s_lshr_b32 s9, s24, 16
-; SI-NEXT: v_readfirstlane_b32 s34, v18
+; SI-NEXT: v_writelane_b32 v36, s8, 3
+; SI-NEXT: s_lshr_b32 s10, s26, 16
+; SI-NEXT: v_writelane_b32 v36, s9, 4
+; SI-NEXT: s_lshr_b32 s11, s28, 16
+; SI-NEXT: v_readfirstlane_b32 s93, v1
+; SI-NEXT: v_writelane_b32 v36, s10, 5
+; SI-NEXT: v_readfirstlane_b32 s30, v3
+; SI-NEXT: s_lshr_b32 s12, s93, 16
+; SI-NEXT: v_writelane_b32 v36, s11, 6
+; SI-NEXT: v_readfirstlane_b32 s36, v5
+; SI-NEXT: s_lshr_b32 s13, s30, 16
+; SI-NEXT: v_writelane_b32 v36, s12, 7
+; SI-NEXT: v_readfirstlane_b32 s81, v18
; SI-NEXT: v_readfirstlane_b32 s83, v17
-; SI-NEXT: v_readfirstlane_b32 s70, v16
-; SI-NEXT: v_readfirstlane_b32 s80, v15
-; SI-NEXT: v_readfirstlane_b32 s66, v14
-; SI-NEXT: v_readfirstlane_b32 s68, v13
-; SI-NEXT: v_readfirstlane_b32 s54, v12
-; SI-NEXT: v_readfirstlane_b32 s64, v11
-; SI-NEXT: v_readfirstlane_b32 s51, v10
-; SI-NEXT: v_readfirstlane_b32 s53, v9
-; SI-NEXT: v_readfirstlane_b32 s39, v8
-; SI-NEXT: v_readfirstlane_b32 s49, v7
-; SI-NEXT: v_readfirstlane_b32 s35, v6
-; SI-NEXT: v_readfirstlane_b32 s37, v5
+; SI-NEXT: v_readfirstlane_b32 s69, v16
+; SI-NEXT: v_readfirstlane_b32 s71, v15
+; SI-NEXT: v_readfirstlane_b32 s65, v14
+; SI-NEXT: v_readfirstlane_b32 s67, v13
+; SI-NEXT: v_readfirstlane_b32 s53, v12
+; SI-NEXT: v_readfirstlane_b32 s55, v11
+; SI-NEXT: v_readfirstlane_b32 s31, v10
+; SI-NEXT: v_readfirstlane_b32 s51, v9
+; SI-NEXT: v_readfirstlane_b32 s38, v8
+; SI-NEXT: v_readfirstlane_b32 s48, v7
+; SI-NEXT: v_readfirstlane_b32 s34, v6
+; SI-NEXT: s_lshr_b32 s14, s36, 16
; SI-NEXT: v_readfirstlane_b32 s94, v4
-; SI-NEXT: v_readfirstlane_b32 s31, v3
; SI-NEXT: v_readfirstlane_b32 s91, v2
-; SI-NEXT: v_readfirstlane_b32 s93, v1
-; SI-NEXT: v_writelane_b32 v37, s8, 4
+; SI-NEXT: v_writelane_b32 v36, s13, 8
; SI-NEXT: s_lshr_b32 s90, s29, 16
-; SI-NEXT: s_lshr_b32 s11, s28, 16
; SI-NEXT: s_lshr_b32 s89, s27, 16
-; SI-NEXT: s_lshr_b32 s10, s26, 16
; SI-NEXT: s_lshr_b32 s88, s25, 16
; SI-NEXT: s_lshr_b32 s79, s23, 16
-; SI-NEXT: s_lshr_b32 s86, s21, 16
+; SI-NEXT: s_lshr_b32 s78, s21, 16
; SI-NEXT: s_lshr_b32 s77, s19, 16
; SI-NEXT: s_lshr_b32 s76, s17, 16
-; SI-NEXT: s_lshr_b32 s82, s34, 16
-; SI-NEXT: s_lshr_b32 s84, s83, 16
-; SI-NEXT: s_lshr_b32 s71, s70, 16
-; SI-NEXT: s_lshr_b32 s81, s80, 16
-; SI-NEXT: s_lshr_b32 s67, s66, 16
-; SI-NEXT: s_lshr_b32 s38, s68, 16
-; SI-NEXT: s_lshr_b32 s55, s54, 16
-; SI-NEXT: s_lshr_b32 s99, s64, 16
-; SI-NEXT: s_lshr_b32 s52, s51, 16
-; SI-NEXT: s_lshr_b32 s69, s53, 16
-; SI-NEXT: s_lshr_b32 s48, s39, 16
-; SI-NEXT: s_lshr_b32 s98, s49, 16
-; SI-NEXT: s_lshr_b32 s36, s35, 16
-; SI-NEXT: s_lshr_b32 s65, s37, 16
+; SI-NEXT: s_lshr_b32 s82, s81, 16
+; SI-NEXT: s_lshr_b32 s37, s83, 16
+; SI-NEXT: s_lshr_b32 s70, s69, 16
+; SI-NEXT: s_lshr_b32 s80, s71, 16
+; SI-NEXT: s_lshr_b32 s66, s65, 16
+; SI-NEXT: s_lshr_b32 s68, s67, 16
+; SI-NEXT: s_lshr_b32 s54, s53, 16
+; SI-NEXT: s_lshr_b32 s64, s55, 16
+; SI-NEXT: s_lshr_b32 s50, s31, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s51, 16
+; SI-NEXT: s_lshr_b32 s39, s38, 16
+; SI-NEXT: s_lshr_b32 s15, s48, 16
+; SI-NEXT: s_lshr_b32 s35, s34, 16
; SI-NEXT: s_lshr_b32 s95, s94, 16
-; SI-NEXT: s_lshr_b32 s85, s31, 16
; SI-NEXT: s_lshr_b32 s92, s91, 16
-; SI-NEXT: s_lshr_b32 s30, s93, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v37, s9, 5
-; SI-NEXT: s_mov_b32 s97, s16
+; SI-NEXT: v_writelane_b32 v36, s14, 9
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v37, s10, 6
-; SI-NEXT: v_writelane_b32 v37, s11, 7
-; SI-NEXT: ; implicit-def: $vgpr36 : SGPR spill to VGPR lane
+; SI-NEXT: v_writelane_b32 v36, s15, 10
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 11
+; SI-NEXT: ; implicit-def: $vgpr37 : SGPR spill to VGPR lane
; SI-NEXT: ; implicit-def: $vgpr35 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB95_3
; SI-NEXT: ; %bb.1: ; %cmp.false
-; SI-NEXT: s_and_b32 s4, s97, 0xffff
+; SI-NEXT: s_and_b32 s4, s16, 0xffff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_or_b32 s74, s4, s5
; SI-NEXT: s_and_b32 s4, s17, 0xffff
@@ -181322,7 +180622,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s86, 16
+; SI-NEXT: s_lshl_b32 s5, s78, 16
; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, s8, 16
@@ -181332,10 +180632,10 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, s9, 16
-; SI-NEXT: s_or_b32 s56, s4, s5
+; SI-NEXT: s_or_b32 s46, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s88, 16
-; SI-NEXT: s_or_b32 s57, s4, s5
+; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, s10, 16
; SI-NEXT: s_or_b32 s60, s4, s5
@@ -181344,303 +180644,277 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s11, 16
-; SI-NEXT: s_or_b32 s46, s4, s5
+; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s90, 16
-; SI-NEXT: s_or_b32 s47, s4, s5
+; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_and_b32 s4, s93, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s30, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s91, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
; SI-NEXT: s_or_b32 s45, s4, s5
-; SI-NEXT: s_and_b32 s4, s31, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s85, 16
+; SI-NEXT: s_and_b32 s4, s30, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s13, 16
; SI-NEXT: s_or_b32 s42, s4, s5
; SI-NEXT: s_and_b32 s4, s94, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
; SI-NEXT: s_or_b32 s43, s4, s5
-; SI-NEXT: s_and_b32 s4, s37, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s65, 16
+; SI-NEXT: s_and_b32 s4, s36, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s14, 16
; SI-NEXT: s_or_b32 s40, s4, s5
-; SI-NEXT: s_and_b32 s4, s35, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s36, 16
+; SI-NEXT: s_and_b32 s4, s34, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s35, 16
; SI-NEXT: s_or_b32 s41, s4, s5
-; SI-NEXT: s_and_b32 s4, s49, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s98, 16
+; SI-NEXT: s_and_b32 s4, s48, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s15, 16
; SI-NEXT: s_or_b32 s14, s4, s5
-; SI-NEXT: s_and_b32 s4, s39, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s48, 16
+; SI-NEXT: s_and_b32 s4, s38, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s39, 16
; SI-NEXT: s_or_b32 s15, s4, s5
-; SI-NEXT: s_and_b32 s4, s53, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s69, 16
-; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s51, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s52, 16
+; SI-NEXT: s_lshl_b32 s5, vcc_lo, 16
+; SI-NEXT: s_or_b32 s12, s4, s5
+; SI-NEXT: s_and_b32 s4, s31, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s50, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_and_b32 s4, s64, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s99, 16
+; SI-NEXT: s_and_b32 s4, s55, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s64, 16
; SI-NEXT: s_or_b32 s10, s4, s5
-; SI-NEXT: s_and_b32 s4, s54, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s55, 16
+; SI-NEXT: s_and_b32 s4, s53, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s54, 16
; SI-NEXT: s_or_b32 s11, s4, s5
-; SI-NEXT: s_and_b32 s4, s68, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s38, 16
+; SI-NEXT: s_and_b32 s4, s67, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s68, 16
; SI-NEXT: s_or_b32 s8, s4, s5
-; SI-NEXT: s_and_b32 s4, s66, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s67, 16
-; SI-NEXT: s_lshr_b32 s16, s75, 8
+; SI-NEXT: s_and_b32 s4, s65, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s66, 16
; SI-NEXT: s_or_b32 s9, s4, s5
-; SI-NEXT: s_and_b32 s4, s80, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: v_writelane_b32 v35, s16, 2
-; SI-NEXT: s_lshr_b32 s16, s73, 8
+; SI-NEXT: s_and_b32 s4, s71, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s80, 16
; SI-NEXT: s_or_b32 s6, s4, s5
-; SI-NEXT: s_and_b32 s4, s70, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s71, 16
-; SI-NEXT: v_writelane_b32 v35, s16, 1
-; SI-NEXT: s_lshr_b32 s16, s63, 8
+; SI-NEXT: s_and_b32 s4, s69, 0xffff
+; SI-NEXT: s_lshl_b32 s5, s70, 16
; SI-NEXT: s_or_b32 s7, s4, s5
; SI-NEXT: s_and_b32 s4, s83, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: v_writelane_b32 v35, s16, 0
-; SI-NEXT: s_lshr_b32 s16, s59, 8
+; SI-NEXT: s_lshl_b32 s5, s37, 16
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: s_and_b32 s5, s34, 0xffff
+; SI-NEXT: s_and_b32 s5, s81, 0xffff
; SI-NEXT: s_lshl_b32 vcc_lo, s82, 16
-; SI-NEXT: v_writelane_b32 v36, s16, 63
-; SI-NEXT: s_lshr_b32 s16, s57, 8
; SI-NEXT: s_or_b32 s5, s5, vcc_lo
-; SI-NEXT: v_writelane_b32 v36, s16, 62
-; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 61
+; SI-NEXT: s_lshr_b32 vcc_lo, s75, 8
+; SI-NEXT: v_writelane_b32 v35, vcc_lo, 0
+; SI-NEXT: s_lshr_b32 vcc_lo, s73, 8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 63
+; SI-NEXT: s_lshr_b32 vcc_lo, s63, 8
+; SI-NEXT: v_writelane_b32 v35, vcc_lo, 1
+; SI-NEXT: s_lshr_b32 vcc_lo, s59, 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 62
; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 60
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 61
+; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 60
+; SI-NEXT: s_lshr_b32 vcc_lo, s57, 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 59
; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 59
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 58
; SI-NEXT: s_lshr_b32 vcc_lo, s43, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 58
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 57
; SI-NEXT: s_lshr_b32 vcc_lo, s41, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 57
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 56
; SI-NEXT: s_lshr_b32 vcc_lo, s15, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 56
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 55
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 55
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 54
; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 54
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 53
; SI-NEXT: s_lshr_b32 vcc_lo, s9, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 53
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 52
; SI-NEXT: s_lshr_b32 vcc_lo, s7, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 52
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 51
; SI-NEXT: s_lshr_b32 vcc_lo, s5, 8
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 51
-; SI-NEXT: s_bfe_u32 s16, s76, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 50
-; SI-NEXT: s_bfe_u32 s16, s77, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 49
-; SI-NEXT: s_bfe_u32 s16, s86, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 48
-; SI-NEXT: s_bfe_u32 s16, s79, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 47
-; SI-NEXT: s_bfe_u32 s16, s88, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 46
-; SI-NEXT: s_bfe_u32 s16, s89, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 45
-; SI-NEXT: s_bfe_u32 s16, s90, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 44
-; SI-NEXT: s_bfe_u32 s16, s92, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 43
-; SI-NEXT: s_bfe_u32 s16, s95, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 42
-; SI-NEXT: s_bfe_u32 s16, s36, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 41
-; SI-NEXT: s_bfe_u32 s16, s48, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 40
-; SI-NEXT: s_bfe_u32 s16, s52, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 39
-; SI-NEXT: s_bfe_u32 s16, s55, 0x80008
-; SI-NEXT: v_writelane_b32 v36, s16, 38
-; SI-NEXT: s_mov_b32 s78, s81
-; SI-NEXT: s_mov_b32 s81, s38
-; SI-NEXT: s_mov_b32 s38, s77
-; SI-NEXT: s_mov_b32 s77, s99
-; SI-NEXT: s_mov_b32 s99, s69
-; SI-NEXT: s_mov_b32 s69, s76
-; SI-NEXT: s_mov_b32 s76, s98
-; SI-NEXT: s_mov_b32 s98, s65
-; SI-NEXT: s_mov_b32 s65, s97
-; SI-NEXT: s_mov_b32 s97, s85
-; SI-NEXT: s_mov_b32 s85, s17
-; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 12
-; SI-NEXT: v_writelane_b32 v37, s17, 13
-; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 10
-; SI-NEXT: v_writelane_b32 v37, s17, 11
-; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 8
-; SI-NEXT: v_writelane_b32 v37, s17, 9
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 18
-; SI-NEXT: v_writelane_b32 v37, s17, 19
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 16
-; SI-NEXT: v_writelane_b32 v37, s17, 17
-; SI-NEXT: s_lshr_b64 s[16:17], s[72:73], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 14
-; SI-NEXT: v_writelane_b32 v37, s17, 15
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 50
+; SI-NEXT: s_bfe_u32 vcc_lo, s77, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 49
+; SI-NEXT: s_bfe_u32 vcc_lo, s78, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 48
+; SI-NEXT: s_bfe_u32 vcc_lo, s79, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 47
+; SI-NEXT: s_bfe_u32 vcc_lo, s88, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 46
+; SI-NEXT: s_bfe_u32 vcc_lo, s89, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 45
+; SI-NEXT: s_bfe_u32 vcc_lo, s90, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 44
+; SI-NEXT: s_lshr_b64 vcc, s[74:75], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 16
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 17
+; SI-NEXT: s_lshr_b64 vcc, s[74:75], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 14
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 15
+; SI-NEXT: s_lshr_b64 vcc, s[74:75], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 12
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 13
+; SI-NEXT: s_lshr_b64 vcc, s[72:73], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 22
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 23
+; SI-NEXT: s_lshr_b64 vcc, s[72:73], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 20
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 21
+; SI-NEXT: s_lshr_b64 vcc, s[72:73], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 18
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 19
; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 28
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 29
+; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 26
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 27
+; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 24
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 25
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 34
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 35
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 32
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 33
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 30
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 31
+; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 40
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 41
+; SI-NEXT: s_lshr_b64 vcc, s[46:47], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 38
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 39
+; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 36
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 37
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 46
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 47
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 44
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 45
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 42
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 43
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 52
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 53
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 50
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 51
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 48
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 49
+; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 58
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 59
+; SI-NEXT: s_lshr_b64 vcc, s[44:45], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 56
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 57
+; SI-NEXT: s_lshr_b64 vcc, s[44:45], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 54
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 55
+; SI-NEXT: s_lshr_b64 vcc, s[42:43], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 0
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 1
+; SI-NEXT: s_lshr_b64 vcc, s[42:43], 16
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 62
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 63
+; SI-NEXT: s_lshr_b64 vcc, s[42:43], 8
+; SI-NEXT: v_writelane_b32 v36, vcc_lo, 60
+; SI-NEXT: v_writelane_b32 v36, vcc_hi, 61
+; SI-NEXT: s_lshr_b64 vcc, s[40:41], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 6
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 7
+; SI-NEXT: s_lshr_b64 vcc, s[40:41], 16
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 4
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 5
+; SI-NEXT: s_lshr_b64 vcc, s[40:41], 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 2
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 3
+; SI-NEXT: s_lshr_b64 vcc, s[14:15], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 12
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 13
+; SI-NEXT: s_lshr_b64 vcc, s[14:15], 16
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 10
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 11
+; SI-NEXT: s_lshr_b64 vcc, s[14:15], 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 8
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 9
+; SI-NEXT: s_lshr_b64 vcc, s[12:13], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 18
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 19
+; SI-NEXT: s_lshr_b64 vcc, s[12:13], 16
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 16
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 17
+; SI-NEXT: s_lshr_b64 vcc, s[12:13], 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 14
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 15
+; SI-NEXT: s_lshr_b64 vcc, s[10:11], 24
; SI-NEXT: v_writelane_b32 v37, vcc_lo, 24
; SI-NEXT: v_writelane_b32 v37, vcc_hi, 25
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 22
-; SI-NEXT: v_writelane_b32 v37, s17, 23
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 20
-; SI-NEXT: v_writelane_b32 v37, s17, 21
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24
+; SI-NEXT: s_lshr_b64 vcc, s[10:11], 16
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 22
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 23
+; SI-NEXT: s_lshr_b64 vcc, s[10:11], 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 20
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 21
+; SI-NEXT: s_lshr_b64 vcc, s[8:9], 24
; SI-NEXT: v_writelane_b32 v37, vcc_lo, 30
; SI-NEXT: v_writelane_b32 v37, vcc_hi, 31
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16
+; SI-NEXT: s_lshr_b64 vcc, s[8:9], 16
; SI-NEXT: v_writelane_b32 v37, vcc_lo, 28
; SI-NEXT: v_writelane_b32 v37, vcc_hi, 29
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8
+; SI-NEXT: s_lshr_b64 vcc, s[8:9], 8
; SI-NEXT: v_writelane_b32 v37, vcc_lo, 26
; SI-NEXT: v_writelane_b32 v37, vcc_hi, 27
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 36
-; SI-NEXT: v_writelane_b32 v37, s17, 37
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 34
-; SI-NEXT: v_writelane_b32 v37, s17, 35
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 32
-; SI-NEXT: v_writelane_b32 v37, s17, 33
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 42
-; SI-NEXT: v_writelane_b32 v37, s17, 43
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 40
-; SI-NEXT: v_writelane_b32 v37, s17, 41
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 38
-; SI-NEXT: v_writelane_b32 v37, s17, 39
-; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 48
-; SI-NEXT: v_writelane_b32 v37, s17, 49
-; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 46
-; SI-NEXT: v_writelane_b32 v37, s17, 47
-; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 44
-; SI-NEXT: v_writelane_b32 v37, s17, 45
-; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 54
-; SI-NEXT: v_writelane_b32 v37, s17, 55
-; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 52
-; SI-NEXT: v_writelane_b32 v37, s17, 53
-; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 50
-; SI-NEXT: v_writelane_b32 v37, s17, 51
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24
-; SI-NEXT: v_writelane_b32 v37, s16, 60
-; SI-NEXT: v_writelane_b32 v37, s17, 61
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v37, s16, 58
-; SI-NEXT: v_writelane_b32 v37, s17, 59
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 56
-; SI-NEXT: v_writelane_b32 v37, s17, 57
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 2
-; SI-NEXT: v_writelane_b32 v36, s17, 3
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 0
-; SI-NEXT: v_writelane_b32 v36, s17, 1
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 8
-; SI-NEXT: v_writelane_b32 v37, s16, 62
-; SI-NEXT: v_writelane_b32 v37, s17, 63
-; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 8
-; SI-NEXT: v_writelane_b32 v36, s17, 9
-; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 6
-; SI-NEXT: v_writelane_b32 v36, s17, 7
-; SI-NEXT: s_lshr_b64 s[16:17], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v36, s16, 4
-; SI-NEXT: v_writelane_b32 v36, s17, 5
-; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 14
-; SI-NEXT: v_writelane_b32 v36, s17, 15
-; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 12
-; SI-NEXT: v_writelane_b32 v36, s17, 13
-; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v36, s16, 10
-; SI-NEXT: v_writelane_b32 v36, s17, 11
-; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 20
-; SI-NEXT: v_writelane_b32 v36, s17, 21
-; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 18
-; SI-NEXT: v_writelane_b32 v36, s17, 19
-; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 8
-; SI-NEXT: v_writelane_b32 v36, s16, 16
-; SI-NEXT: v_writelane_b32 v36, s17, 17
-; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 26
-; SI-NEXT: v_writelane_b32 v36, s17, 27
-; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 24
-; SI-NEXT: v_writelane_b32 v36, s17, 25
-; SI-NEXT: s_lshr_b64 s[16:17], s[8:9], 8
-; SI-NEXT: v_writelane_b32 v36, s16, 22
-; SI-NEXT: v_writelane_b32 v36, s17, 23
-; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v36, s16, 32
-; SI-NEXT: v_writelane_b32 v36, s17, 33
-; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 16
-; SI-NEXT: v_writelane_b32 v36, s16, 30
-; SI-NEXT: v_writelane_b32 v36, s17, 31
-; SI-NEXT: s_lshr_b64 s[16:17], s[6:7], 8
-; SI-NEXT: v_writelane_b32 v36, s16, 28
-; SI-NEXT: v_writelane_b32 v36, s17, 29
+; SI-NEXT: s_lshr_b64 vcc, s[6:7], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 36
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 37
+; SI-NEXT: s_lshr_b64 vcc, s[6:7], 16
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 34
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 35
+; SI-NEXT: s_lshr_b64 vcc, s[6:7], 8
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 32
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 33
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 42
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 43
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 36
-; SI-NEXT: v_writelane_b32 v36, vcc_hi, 37
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 40
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 41
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8
-; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24
-; SI-NEXT: v_writelane_b32 v36, vcc_lo, 34
-; SI-NEXT: s_bfe_u32 s87, s67, 0x80008
-; SI-NEXT: s_bfe_u32 s50, s71, 0x80008
-; SI-NEXT: s_bfe_u32 s96, s82, 0x80008
-; SI-NEXT: s_mov_b32 s17, s85
-; SI-NEXT: s_mov_b32 s85, s97
-; SI-NEXT: s_mov_b32 s97, s65
-; SI-NEXT: s_mov_b32 s65, s98
-; SI-NEXT: s_mov_b32 s98, s76
-; SI-NEXT: s_mov_b32 s76, s69
-; SI-NEXT: s_mov_b32 s69, s99
-; SI-NEXT: s_mov_b32 s99, s77
-; SI-NEXT: s_mov_b32 s77, s38
-; SI-NEXT: s_mov_b32 s38, s81
-; SI-NEXT: s_mov_b32 s81, s78
-; SI-NEXT: v_writelane_b32 v36, vcc_hi, 35
+; SI-NEXT: v_writelane_b32 v37, vcc_lo, 38
+; SI-NEXT: s_bfe_u32 s96, s76, 0x80008
+; SI-NEXT: s_bfe_u32 s87, s92, 0x80008
+; SI-NEXT: s_bfe_u32 s84, s95, 0x80008
+; SI-NEXT: s_bfe_u32 s97, s35, 0x80008
+; SI-NEXT: s_bfe_u32 s52, s39, 0x80008
+; SI-NEXT: s_bfe_u32 s98, s50, 0x80008
+; SI-NEXT: s_bfe_u32 s99, s54, 0x80008
+; SI-NEXT: s_bfe_u32 s85, s66, 0x80008
+; SI-NEXT: s_bfe_u32 s49, s70, 0x80008
+; SI-NEXT: s_bfe_u32 s86, s82, 0x80008
+; SI-NEXT: v_writelane_b32 v37, vcc_hi, 39
; SI-NEXT: s_cbranch_execnz .LBB95_4
; SI-NEXT: .LBB95_2: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v2, s83
-; SI-NEXT: v_cvt_f32_f16_e32 v1, s84
+; SI-NEXT: v_cvt_f32_f16_e32 v1, s37
; SI-NEXT: v_cvt_f32_f16_e32 v3, s82
-; SI-NEXT: v_readlane_b32 s46, v37, 7
+; SI-NEXT: v_readlane_b32 s12, v36, 11
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_cvt_f16_f32_e32 v4, v1
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT: v_readfirstlane_b32 s5, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s34
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s81
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s80
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_readfirstlane_b32 s4, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
@@ -181648,157 +180922,161 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: s_lshl_b32 s4, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s6, v2
-; SI-NEXT: v_cvt_f32_f16_e32 v2, s80
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: v_readfirstlane_b32 s5, v1
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: v_readfirstlane_b32 s6, v2
+; SI-NEXT: v_cvt_f32_f16_e32 v2, s71
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_readfirstlane_b32 s6, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s71
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s70
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v2
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s70
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s69
; SI-NEXT: v_readfirstlane_b32 s7, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s38
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s68
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: s_or_b32 s6, s7, s6
+; SI-NEXT: v_readfirstlane_b32 s8, v3
+; SI-NEXT: v_cvt_f32_f16_e32 v3, s67
; SI-NEXT: v_readfirstlane_b32 s7, v2
; SI-NEXT: s_lshl_b32 s7, s7, 16
-; SI-NEXT: v_readfirstlane_b32 s8, v3
-; SI-NEXT: v_cvt_f32_f16_e32 v3, s68
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: v_readfirstlane_b32 s8, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s67
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s66
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v5, v3
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s66
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s65
; SI-NEXT: v_readfirstlane_b32 s9, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s99
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s64
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_readfirstlane_b32 s10, v4
-; SI-NEXT: v_cvt_f32_f16_e32 v4, s64
; SI-NEXT: v_readfirstlane_b32 s9, v3
; SI-NEXT: s_lshl_b32 s9, s9, 16
+; SI-NEXT: v_readfirstlane_b32 s10, v4
+; SI-NEXT: v_cvt_f32_f16_e32 v4, s55
; SI-NEXT: s_or_b32 s9, s10, s9
; SI-NEXT: v_readfirstlane_b32 s10, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s55
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s54
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v6, v4
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s54
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s53
; SI-NEXT: v_readfirstlane_b32 s11, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s69
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s12
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: v_readfirstlane_b32 s12, v5
+; SI-NEXT: v_cvt_f32_f16_e32 v5, s51
; SI-NEXT: v_readfirstlane_b32 s11, v4
; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: v_readfirstlane_b32 s12, v5
-; SI-NEXT: v_cvt_f32_f16_e32 v5, s53
; SI-NEXT: s_or_b32 s11, s12, s11
; SI-NEXT: v_readfirstlane_b32 s12, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s52
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s50
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
-; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: v_readlane_b32 s14, v36, 10
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s51
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s31
; SI-NEXT: v_readfirstlane_b32 s13, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s98
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s14
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
+; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readfirstlane_b32 s14, v6
-; SI-NEXT: v_cvt_f32_f16_e32 v6, s49
; SI-NEXT: v_readfirstlane_b32 s13, v5
; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: v_readfirstlane_b32 s14, v6
+; SI-NEXT: v_cvt_f32_f16_e32 v6, s48
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: v_readfirstlane_b32 s14, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s48
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s39
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v8, v6
-; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: v_readlane_b32 s40, v36, 9
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s39
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s38
; SI-NEXT: v_readfirstlane_b32 s15, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s65
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s40
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
+; SI-NEXT: s_lshl_b32 s14, s14, 16
+; SI-NEXT: v_readfirstlane_b32 s40, v7
+; SI-NEXT: v_cvt_f32_f16_e32 v7, s36
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: v_readfirstlane_b32 s15, v6
; SI-NEXT: s_lshl_b32 s15, s15, 16
-; SI-NEXT: v_readfirstlane_b32 s40, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v7, s37
; SI-NEXT: s_or_b32 s15, s40, s15
; SI-NEXT: v_readfirstlane_b32 s40, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s36
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s35
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v9, v7
-; SI-NEXT: s_lshl_b32 s40, s40, 16
+; SI-NEXT: v_readlane_b32 s42, v36, 8
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s35
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s34
; SI-NEXT: v_readfirstlane_b32 s41, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s85
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s42
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
+; SI-NEXT: s_lshl_b32 s40, s40, 16
; SI-NEXT: s_or_b32 s40, s41, s40
-; SI-NEXT: v_readfirstlane_b32 s42, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s31
; SI-NEXT: v_readfirstlane_b32 s41, v7
; SI-NEXT: s_lshl_b32 s41, s41, 16
+; SI-NEXT: v_readfirstlane_b32 s42, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s30
; SI-NEXT: s_or_b32 s41, s42, s41
; SI-NEXT: v_readfirstlane_b32 s42, v9
; SI-NEXT: v_cvt_f32_f16_e32 v9, s95
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v10, v8
-; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: v_readlane_b32 s44, v36, 7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v9
; SI-NEXT: v_cvt_f32_f16_e32 v9, s94
; SI-NEXT: v_readfirstlane_b32 s43, v10
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s30
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s44
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
+; SI-NEXT: s_lshl_b32 s42, s42, 16
+; SI-NEXT: v_readfirstlane_b32 s44, v9
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s93
; SI-NEXT: s_or_b32 s42, s43, s42
; SI-NEXT: v_readfirstlane_b32 s43, v8
; SI-NEXT: s_lshl_b32 s43, s43, 16
-; SI-NEXT: v_readfirstlane_b32 s44, v9
-; SI-NEXT: v_cvt_f32_f16_e32 v9, s93
; SI-NEXT: s_or_b32 s43, s44, s43
; SI-NEXT: v_readfirstlane_b32 s44, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s92
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v11, v9
-; SI-NEXT: s_lshl_b32 s44, s44, 16
+; SI-NEXT: v_readlane_b32 s46, v36, 6
; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s91
; SI-NEXT: v_readfirstlane_b32 s45, v11
@@ -181808,18 +181086,19 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
-; SI-NEXT: s_or_b32 s44, s45, s44
+; SI-NEXT: s_lshl_b32 s44, s44, 16
; SI-NEXT: v_readfirstlane_b32 s46, v10
; SI-NEXT: v_cvt_f32_f16_e32 v10, s28
; SI-NEXT: v_readfirstlane_b32 s28, v11
; SI-NEXT: v_cvt_f32_f16_e32 v11, s90
-; SI-NEXT: v_readfirstlane_b32 s45, v9
+; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v12, v10
-; SI-NEXT: s_lshl_b32 s45, s45, 16
; SI-NEXT: v_add_f32_e32 v10, 0x38000000, v11
; SI-NEXT: v_cvt_f32_f16_e32 v11, s29
-; SI-NEXT: v_readlane_b32 s29, v37, 6
+; SI-NEXT: v_readfirstlane_b32 s45, v9
+; SI-NEXT: s_lshl_b32 s45, s45, 16
+; SI-NEXT: v_readlane_b32 s29, v36, 5
; SI-NEXT: s_or_b32 s45, s46, s45
; SI-NEXT: v_readfirstlane_b32 s46, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s29
@@ -181835,263 +181114,273 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_cvt_f32_f16_e32 v12, s89
; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT: v_cvt_f16_f32_e32 v13, v11
-; SI-NEXT: s_or_b32 s46, s46, s28
-; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
+; SI-NEXT: s_or_b32 s56, s46, s28
; SI-NEXT: v_readfirstlane_b32 s28, v10
; SI-NEXT: s_lshl_b32 s28, s28, 16
-; SI-NEXT: v_readlane_b32 s27, v37, 5
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: s_or_b32 s47, s29, s28
+; SI-NEXT: v_add_f32_e32 v11, 0x38000000, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v12, s27
+; SI-NEXT: v_readlane_b32 s27, v36, 4
+; SI-NEXT: s_or_b32 s57, s29, s28
; SI-NEXT: v_readfirstlane_b32 s28, v13
; SI-NEXT: v_cvt_f32_f16_e32 v13, s27
+; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_readfirstlane_b32 s27, v12
; SI-NEXT: v_cvt_f32_f16_e32 v12, s24
-; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s60, s28, s26
+; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s88
; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v14, v12
+; SI-NEXT: s_or_b32 s60, s28, s26
+; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s25
; SI-NEXT: v_readfirstlane_b32 s26, v11
; SI-NEXT: s_lshl_b32 s26, s26, 16
-; SI-NEXT: s_or_b32 s61, s27, s26
-; SI-NEXT: v_readfirstlane_b32 s26, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s25
+; SI-NEXT: v_readlane_b32 s25, v36, 3
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: v_readlane_b32 s25, v37, 4
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_readfirstlane_b32 s24, v13
-; SI-NEXT: v_cvt_f32_f16_e32 v13, s88
+; SI-NEXT: s_or_b32 s61, s27, s26
+; SI-NEXT: v_readfirstlane_b32 s26, v14
; SI-NEXT: v_cvt_f32_f16_e32 v14, s25
-; SI-NEXT: v_readfirstlane_b32 s25, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s22
+; SI-NEXT: v_readfirstlane_b32 s25, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s22
+; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: s_lshl_b32 s24, s24, 16
+; SI-NEXT: s_or_b32 s46, s26, s24
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
-; SI-NEXT: s_lshl_b32 s24, s24, 16
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: s_or_b32 s56, s26, s24
-; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: v_readfirstlane_b32 s24, v12
; SI-NEXT: s_lshl_b32 s24, s24, 16
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: s_or_b32 s57, s25, s24
-; SI-NEXT: v_readfirstlane_b32 s24, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s23
+; SI-NEXT: s_or_b32 s47, s25, s24
+; SI-NEXT: v_readfirstlane_b32 s24, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s23
; SI-NEXT: v_readfirstlane_b32 s22, v14
; SI-NEXT: v_cvt_f32_f16_e32 v14, s79
-; SI-NEXT: v_readlane_b32 s23, v37, 3
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_readlane_b32 s23, v36, 2
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f16_f32_e32 v16, v14
+; SI-NEXT: v_cvt_f16_f32_e32 v15, v14
; SI-NEXT: v_cvt_f32_f16_e32 v14, s23
-; SI-NEXT: v_readfirstlane_b32 s23, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s20
+; SI-NEXT: v_readfirstlane_b32 s23, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s20
; SI-NEXT: s_lshl_b32 s22, s22, 16
-; SI-NEXT: s_or_b32 s58, s24, s22
-; SI-NEXT: v_readfirstlane_b32 s22, v16
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: s_lshl_b32 s22, s22, 16
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: s_or_b32 s58, s24, s22
+; SI-NEXT: v_readfirstlane_b32 s22, v15
+; SI-NEXT: s_lshl_b32 s22, s22, 16
; SI-NEXT: s_or_b32 s59, s23, s22
-; SI-NEXT: v_readfirstlane_b32 s22, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s21
; SI-NEXT: v_readfirstlane_b32 s20, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v14, s86
-; SI-NEXT: v_readlane_b32 s21, v37, 2
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_cvt_f32_f16_e32 v14, s78
+; SI-NEXT: v_readfirstlane_b32 s22, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s21
+; SI-NEXT: v_readlane_b32 s21, v36, 1
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f16_f32_e32 v20, v14
+; SI-NEXT: v_cvt_f16_f32_e32 v18, v14
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, s21
-; SI-NEXT: v_readfirstlane_b32 s21, v12
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s18
-; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: s_lshr_b64 s[80:81], s[12:13], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 18
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
+; SI-NEXT: v_readfirstlane_b32 s21, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s18
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: s_or_b32 s62, s22, s20
-; SI-NEXT: v_readfirstlane_b32 s20, v20
; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v37, s81, 19
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT: v_readfirstlane_b32 s18, v14
-; SI-NEXT: s_or_b32 s63, s21, s20
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: v_readfirstlane_b32 s20, v12
-; SI-NEXT: s_or_b32 s72, s20, s18
-; SI-NEXT: s_lshr_b64 s[20:21], s[46:47], 24
-; SI-NEXT: v_cvt_f32_f16_e32 v12, s19
-; SI-NEXT: v_readlane_b32 s19, v37, 0
-; SI-NEXT: v_writelane_b32 v37, s20, 48
-; SI-NEXT: v_writelane_b32 v37, s21, 49
-; SI-NEXT: s_lshr_b64 s[20:21], s[46:47], 16
-; SI-NEXT: v_writelane_b32 v37, s20, 46
-; SI-NEXT: v_writelane_b32 v37, s21, 47
-; SI-NEXT: s_lshr_b64 s[20:21], s[44:45], 24
-; SI-NEXT: v_writelane_b32 v37, s20, 54
-; SI-NEXT: v_writelane_b32 v37, s21, 55
-; SI-NEXT: s_lshr_b64 s[20:21], s[40:41], 16
-; SI-NEXT: v_writelane_b32 v36, s20, 0
-; SI-NEXT: v_writelane_b32 v36, s21, 1
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v36, s50, 14
-; SI-NEXT: v_writelane_b32 v36, s51, 15
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 16
; SI-NEXT: v_cvt_f32_f16_e32 v14, s77
-; SI-NEXT: v_writelane_b32 v36, s50, 12
-; SI-NEXT: v_writelane_b32 v36, s51, 13
-; SI-NEXT: s_lshr_b64 s[50:51], s[12:13], 8
-; SI-NEXT: v_writelane_b32 v36, s50, 10
-; SI-NEXT: v_writelane_b32 v36, s51, 11
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 24
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: s_lshr_b64 s[80:81], s[12:13], 16
+; SI-NEXT: s_or_b32 s62, s22, s20
+; SI-NEXT: v_readfirstlane_b32 s20, v18
+; SI-NEXT: v_writelane_b32 v37, s80, 16
+; SI-NEXT: s_lshl_b32 s20, s20, 16
+; SI-NEXT: v_writelane_b32 v37, s81, 17
+; SI-NEXT: s_lshr_b64 s[80:81], s[12:13], 8
+; SI-NEXT: s_or_b32 s63, s21, s20
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v36, s50, 20
-; SI-NEXT: v_cvt_f16_f32_e32 v23, v14
+; SI-NEXT: v_readfirstlane_b32 s20, v13
+; SI-NEXT: v_cvt_f32_f16_e32 v13, s19
+; SI-NEXT: v_readlane_b32 s19, v36, 0
+; SI-NEXT: v_writelane_b32 v37, s80, 14
+; SI-NEXT: v_cvt_f16_f32_e32 v22, v14
; SI-NEXT: v_cvt_f32_f16_e32 v14, s19
-; SI-NEXT: v_writelane_b32 v36, s51, 21
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 16
-; SI-NEXT: v_writelane_b32 v36, s50, 18
-; SI-NEXT: v_writelane_b32 v36, s51, 19
-; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 8
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v12
-; SI-NEXT: v_writelane_b32 v36, s50, 16
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_writelane_b32 v37, s81, 15
+; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 24
+; SI-NEXT: v_writelane_b32 v37, s81, 25
+; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 16
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
+; SI-NEXT: v_writelane_b32 v37, s80, 22
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s97
-; SI-NEXT: v_writelane_b32 v36, s51, 17
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 24
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s16
+; SI-NEXT: v_writelane_b32 v37, s81, 23
+; SI-NEXT: s_lshr_b64 s[80:81], s[10:11], 8
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
-; SI-NEXT: v_writelane_b32 v36, s50, 26
-; SI-NEXT: v_writelane_b32 v36, s51, 27
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 16
-; SI-NEXT: v_readfirstlane_b32 s18, v23
-; SI-NEXT: v_writelane_b32 v36, s50, 24
+; SI-NEXT: v_writelane_b32 v37, s80, 20
; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: v_readfirstlane_b32 s16, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v15
-; SI-NEXT: v_writelane_b32 v36, s51, 25
-; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 8
+; SI-NEXT: v_writelane_b32 v37, s81, 21
+; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 16
+; SI-NEXT: s_or_b32 s72, s20, s18
+; SI-NEXT: v_readfirstlane_b32 s18, v22
+; SI-NEXT: v_writelane_b32 v37, s80, 28
+; SI-NEXT: s_lshl_b32 s18, s18, 16
+; SI-NEXT: v_readfirstlane_b32 s16, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
+; SI-NEXT: v_writelane_b32 v37, s81, 29
+; SI-NEXT: s_lshr_b64 s[80:81], s[8:9], 8
; SI-NEXT: s_or_b32 s73, s16, s18
; SI-NEXT: v_readfirstlane_b32 s16, v14
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, s76
-; SI-NEXT: v_writelane_b32 v36, s50, 22
-; SI-NEXT: v_cvt_f32_f16_e32 v15, s17
-; SI-NEXT: v_writelane_b32 v36, s51, 23
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 24
-; SI-NEXT: v_writelane_b32 v36, s50, 32
-; SI-NEXT: v_writelane_b32 v36, s51, 33
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 16
-; SI-NEXT: v_readfirstlane_b32 s17, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v14
-; SI-NEXT: v_writelane_b32 v36, s50, 30
-; SI-NEXT: v_cvt_f16_f32_e32 v27, v12
-; SI-NEXT: v_add_f32_e32 v12, 0x38000000, v15
-; SI-NEXT: v_writelane_b32 v36, s51, 31
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
-; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
-; SI-NEXT: v_writelane_b32 v36, s50, 28
-; SI-NEXT: v_writelane_b32 v36, s51, 29
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 26
+; SI-NEXT: v_cvt_f32_f16_e32 v16, s17
+; SI-NEXT: v_writelane_b32 v37, s81, 27
+; SI-NEXT: s_lshr_b64 s[80:81], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[20:21], s[60:61], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 36
+; SI-NEXT: v_writelane_b32 v36, s20, 46
+; SI-NEXT: v_writelane_b32 v37, s81, 37
+; SI-NEXT: s_lshr_b64 s[80:81], s[6:7], 16
+; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v14
+; SI-NEXT: v_writelane_b32 v36, s21, 47
+; SI-NEXT: s_lshr_b64 s[22:23], s[56:57], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 34
+; SI-NEXT: v_cvt_f16_f32_e32 v26, v13
+; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v16
+; SI-NEXT: v_writelane_b32 v36, s22, 52
+; SI-NEXT: v_writelane_b32 v37, s81, 35
+; SI-NEXT: s_lshr_b64 s[80:81], s[6:7], 8
+; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
+; SI-NEXT: v_writelane_b32 v36, s23, 53
+; SI-NEXT: s_lshr_b64 s[22:23], s[56:57], 16
+; SI-NEXT: v_writelane_b32 v37, s80, 32
+; SI-NEXT: v_writelane_b32 v36, s22, 50
+; SI-NEXT: v_writelane_b32 v37, s81, 33
+; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 24
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_writelane_b32 v37, s50, 0
+; SI-NEXT: v_writelane_b32 v36, s23, 51
+; SI-NEXT: s_lshr_b64 s[22:23], s[56:57], 8
+; SI-NEXT: v_writelane_b32 v37, s80, 42
; SI-NEXT: s_or_b32 s74, s17, s16
-; SI-NEXT: v_readfirstlane_b32 s16, v27
-; SI-NEXT: v_writelane_b32 v37, s51, 1
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 16
+; SI-NEXT: v_readfirstlane_b32 s16, v26
+; SI-NEXT: v_writelane_b32 v36, s22, 48
+; SI-NEXT: v_writelane_b32 v37, s81, 43
+; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 16
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: v_readfirstlane_b32 s17, v12
-; SI-NEXT: v_writelane_b32 v36, s50, 36
+; SI-NEXT: v_readfirstlane_b32 s17, v13
+; SI-NEXT: v_writelane_b32 v36, s23, 49
+; SI-NEXT: s_lshr_b64 s[22:23], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 40
; SI-NEXT: s_or_b32 s75, s17, s16
-; SI-NEXT: v_writelane_b32 v36, s51, 37
-; SI-NEXT: s_lshr_b64 s[50:51], s[4:5], 8
+; SI-NEXT: v_writelane_b32 v36, s22, 58
+; SI-NEXT: v_writelane_b32 v37, s81, 41
+; SI-NEXT: s_lshr_b64 s[80:81], s[4:5], 8
; SI-NEXT: s_lshr_b64 s[18:19], s[74:75], 24
-; SI-NEXT: s_lshr_b64 s[54:55], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[38:39], s[72:73], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[72:73], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; SI-NEXT: s_lshr_b64 s[30:31], s[72:73], 16
+; SI-NEXT: s_lshr_b64 s[34:35], s[72:73], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[62:63], 24
-; SI-NEXT: s_lshr_b64 s[94:95], s[62:63], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[62:63], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[62:63], 16
+; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8
; SI-NEXT: s_lshr_b64 s[76:77], s[58:59], 24
; SI-NEXT: s_lshr_b64 s[78:79], s[58:59], 16
; SI-NEXT: s_lshr_b64 s[90:91], s[58:59], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[60:61], 24
-; SI-NEXT: s_lshr_b64 s[22:23], s[60:61], 8
-; SI-NEXT: s_lshr_b64 s[86:87], s[14:15], 24
-; SI-NEXT: v_writelane_b32 v36, s50, 34
-; SI-NEXT: s_lshr_b64 s[16:17], s[74:75], 8
-; SI-NEXT: s_lshr_b64 vcc, s[72:73], 24
-; SI-NEXT: s_lshr_b64 s[84:85], s[56:57], 24
-; SI-NEXT: s_lshr_b64 s[98:99], s[56:57], 16
-; SI-NEXT: s_lshr_b64 s[64:65], s[56:57], 8
-; SI-NEXT: s_lshr_b64 s[66:67], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[46:47], 8
-; SI-NEXT: s_lshr_b32 s23, s75, 8
-; SI-NEXT: s_lshr_b32 s91, s73, 8
-; SI-NEXT: s_lshr_b32 s89, s63, 8
+; SI-NEXT: s_lshr_b64 s[20:21], s[60:61], 16
+; SI-NEXT: v_writelane_b32 v36, s23, 59
+; SI-NEXT: s_lshr_b64 s[98:99], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[86:87], s[8:9], 24
+; SI-NEXT: v_writelane_b32 v37, s80, 38
+; SI-NEXT: s_lshr_b64 s[36:37], s[74:75], 16
+; SI-NEXT: s_lshr_b64 s[64:65], s[46:47], 24
+; SI-NEXT: s_lshr_b64 s[70:71], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[84:85], s[46:47], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[60:61], 8
+; SI-NEXT: s_lshr_b32 s91, s75, 8
+; SI-NEXT: s_lshr_b32 s89, s73, 8
+; SI-NEXT: s_lshr_b32 s17, s63, 8
; SI-NEXT: s_lshr_b32 s79, s59, 8
-; SI-NEXT: s_lshr_b32 s77, s57, 8
+; SI-NEXT: s_lshr_b32 s77, s47, 8
; SI-NEXT: s_lshr_b32 s29, s61, 8
-; SI-NEXT: s_lshr_b32 s28, s47, 8
+; SI-NEXT: s_lshr_b32 s28, s57, 8
; SI-NEXT: s_lshr_b32 s27, s45, 8
; SI-NEXT: s_lshr_b32 s26, s43, 8
-; SI-NEXT: s_lshr_b32 s55, s41, 8
+; SI-NEXT: s_lshr_b32 s35, s41, 8
; SI-NEXT: s_lshr_b32 s19, s15, 8
-; SI-NEXT: s_lshr_b32 s53, s13, 8
-; SI-NEXT: s_lshr_b32 s49, s11, 8
-; SI-NEXT: s_lshr_b32 s39, s9, 8
-; SI-NEXT: s_lshr_b32 s37, s7, 8
-; SI-NEXT: s_lshr_b32 s95, s5, 8
-; SI-NEXT: v_bfe_u32 v32, v27, 8, 8
-; SI-NEXT: v_bfe_u32 v31, v23, 8, 8
-; SI-NEXT: v_bfe_u32 v30, v20, 8, 8
-; SI-NEXT: v_bfe_u32 v29, v16, 8, 8
-; SI-NEXT: v_bfe_u32 v28, v13, 8, 8
-; SI-NEXT: v_bfe_u32 v26, v11, 8, 8
+; SI-NEXT: s_lshr_b32 s31, s13, 8
+; SI-NEXT: s_lshr_b32 vcc_hi, s11, 8
+; SI-NEXT: s_lshr_b32 s95, s9, 8
+; SI-NEXT: s_lshr_b32 s93, s7, 8
+; SI-NEXT: s_lshr_b32 s21, s5, 8
+; SI-NEXT: v_bfe_u32 v32, v26, 8, 8
+; SI-NEXT: v_bfe_u32 v31, v22, 8, 8
+; SI-NEXT: v_bfe_u32 v30, v18, 8, 8
+; SI-NEXT: v_bfe_u32 v29, v15, 8, 8
+; SI-NEXT: v_bfe_u32 v28, v12, 8, 8
+; SI-NEXT: v_bfe_u32 v27, v11, 8, 8
; SI-NEXT: v_bfe_u32 v25, v10, 8, 8
; SI-NEXT: v_bfe_u32 v24, v9, 8, 8
-; SI-NEXT: v_bfe_u32 v22, v8, 8, 8
+; SI-NEXT: v_bfe_u32 v23, v8, 8, 8
; SI-NEXT: v_bfe_u32 v21, v7, 8, 8
-; SI-NEXT: v_bfe_u32 v19, v6, 8, 8
-; SI-NEXT: v_bfe_u32 v18, v5, 8, 8
+; SI-NEXT: v_bfe_u32 v20, v6, 8, 8
+; SI-NEXT: v_bfe_u32 v19, v5, 8, 8
; SI-NEXT: v_bfe_u32 v17, v4, 8, 8
-; SI-NEXT: v_bfe_u32 v15, v3, 8, 8
+; SI-NEXT: v_bfe_u32 v16, v3, 8, 8
; SI-NEXT: v_bfe_u32 v14, v2, 8, 8
-; SI-NEXT: v_bfe_u32 v12, v1, 8, 8
-; SI-NEXT: s_lshr_b64 s[70:71], s[44:45], 16
+; SI-NEXT: v_bfe_u32 v13, v1, 8, 8
+; SI-NEXT: s_lshr_b64 s[68:69], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[82:83], s[44:45], 8
-; SI-NEXT: s_lshr_b64 s[30:31], s[42:43], 24
-; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 16
-; SI-NEXT: s_lshr_b64 s[34:35], s[42:43], 8
-; SI-NEXT: s_lshr_b64 s[96:97], s[40:41], 24
-; SI-NEXT: s_lshr_b64 s[20:21], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[68:69], s[14:15], 16
-; SI-NEXT: s_lshr_b64 s[80:81], s[14:15], 8
-; SI-NEXT: v_writelane_b32 v36, s51, 35
-; SI-NEXT: s_mov_b32 s50, s86
+; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 24
+; SI-NEXT: s_lshr_b64 s[54:55], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[22:23], s[42:43], 8
+; SI-NEXT: s_lshr_b64 s[48:49], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[96:97], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[14:15], 8
+; SI-NEXT: v_writelane_b32 v37, s81, 39
+; SI-NEXT: s_mov_b32 s80, s86
+; SI-NEXT: s_mov_b32 s86, s98
+; SI-NEXT: v_readlane_b32 s98, v36, 46
+; SI-NEXT: v_writelane_b32 v35, s17, 1
+; SI-NEXT: v_readlane_b32 s99, v36, 47
; SI-NEXT: s_branch .LBB95_5
; SI-NEXT: .LBB95_3:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr16
-; SI-NEXT: v_writelane_b32 v37, s4, 8
-; SI-NEXT: v_writelane_b32 v37, s5, 9
+; SI-NEXT: ; implicit-def: $sgpr97
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: v_writelane_b32 v36, s4, 12
+; SI-NEXT: v_writelane_b32 v36, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr58
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr87
-; SI-NEXT: ; implicit-def: $sgpr50
-; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; implicit-def: $sgpr84
+; SI-NEXT: ; implicit-def: $sgpr52
+; SI-NEXT: ; implicit-def: $sgpr98
+; SI-NEXT: ; implicit-def: $sgpr99
+; SI-NEXT: ; implicit-def: $sgpr85
+; SI-NEXT: ; implicit-def: $sgpr49
+; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
@@ -182100,62 +181389,46 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: v_writelane_b32 v37, s4, 10
-; SI-NEXT: v_writelane_b32 v37, s5, 11
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 12
-; SI-NEXT: v_writelane_b32 v37, s5, 13
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 14
-; SI-NEXT: v_writelane_b32 v37, s5, 15
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 16
-; SI-NEXT: v_writelane_b32 v37, s5, 17
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 18
-; SI-NEXT: v_writelane_b32 v37, s5, 19
+; SI-NEXT: v_writelane_b32 v36, s4, 14
+; SI-NEXT: v_writelane_b32 v36, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 16
+; SI-NEXT: v_writelane_b32 v36, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 20
-; SI-NEXT: v_writelane_b32 v37, s5, 21
+; SI-NEXT: v_writelane_b32 v36, s4, 18
+; SI-NEXT: v_writelane_b32 v36, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 22
-; SI-NEXT: v_writelane_b32 v37, s5, 23
+; SI-NEXT: v_writelane_b32 v36, s4, 20
+; SI-NEXT: v_writelane_b32 v36, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 24
-; SI-NEXT: v_writelane_b32 v37, s5, 25
+; SI-NEXT: v_writelane_b32 v36, s4, 22
+; SI-NEXT: v_writelane_b32 v36, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 26
-; SI-NEXT: v_writelane_b32 v37, s5, 27
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 28
-; SI-NEXT: v_writelane_b32 v37, s5, 29
-; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 30
-; SI-NEXT: v_writelane_b32 v37, s5, 31
+; SI-NEXT: v_writelane_b32 v36, s4, 24
+; SI-NEXT: v_writelane_b32 v36, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 26
+; SI-NEXT: v_writelane_b32 v36, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 28
+; SI-NEXT: v_writelane_b32 v36, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 30
+; SI-NEXT: v_writelane_b32 v36, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 32
+; SI-NEXT: v_writelane_b32 v36, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
+; SI-NEXT: v_writelane_b32 v36, s4, 34
+; SI-NEXT: v_writelane_b32 v36, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
@@ -182191,248 +181464,247 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 32
-; SI-NEXT: v_writelane_b32 v37, s5, 33
+; SI-NEXT: v_writelane_b32 v36, s4, 36
+; SI-NEXT: v_writelane_b32 v36, s5, 37
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 34
-; SI-NEXT: v_writelane_b32 v37, s5, 35
+; SI-NEXT: v_writelane_b32 v36, s4, 38
+; SI-NEXT: v_writelane_b32 v36, s5, 39
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 36
-; SI-NEXT: v_writelane_b32 v37, s5, 37
+; SI-NEXT: v_writelane_b32 v36, s4, 40
+; SI-NEXT: v_writelane_b32 v36, s5, 41
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 38
-; SI-NEXT: v_writelane_b32 v37, s5, 39
+; SI-NEXT: v_writelane_b32 v36, s4, 42
+; SI-NEXT: v_writelane_b32 v36, s5, 43
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 40
-; SI-NEXT: v_writelane_b32 v37, s5, 41
+; SI-NEXT: v_writelane_b32 v36, s4, 44
+; SI-NEXT: v_writelane_b32 v36, s5, 45
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 42
-; SI-NEXT: v_writelane_b32 v37, s5, 43
+; SI-NEXT: v_writelane_b32 v36, s4, 46
+; SI-NEXT: v_writelane_b32 v36, s5, 47
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 44
-; SI-NEXT: v_writelane_b32 v37, s5, 45
+; SI-NEXT: v_writelane_b32 v36, s4, 48
+; SI-NEXT: v_writelane_b32 v36, s5, 49
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 46
-; SI-NEXT: v_writelane_b32 v37, s5, 47
+; SI-NEXT: v_writelane_b32 v36, s4, 50
+; SI-NEXT: v_writelane_b32 v36, s5, 51
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 48
-; SI-NEXT: v_writelane_b32 v37, s5, 49
+; SI-NEXT: v_writelane_b32 v36, s4, 52
+; SI-NEXT: v_writelane_b32 v36, s5, 53
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 50
-; SI-NEXT: v_writelane_b32 v37, s5, 51
+; SI-NEXT: v_writelane_b32 v36, s4, 54
+; SI-NEXT: v_writelane_b32 v36, s5, 55
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 52
-; SI-NEXT: v_writelane_b32 v37, s5, 53
+; SI-NEXT: v_writelane_b32 v36, s4, 56
+; SI-NEXT: v_writelane_b32 v36, s5, 57
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 54
-; SI-NEXT: v_writelane_b32 v37, s5, 55
+; SI-NEXT: v_writelane_b32 v36, s4, 58
+; SI-NEXT: v_writelane_b32 v36, s5, 59
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 56
-; SI-NEXT: v_writelane_b32 v37, s5, 57
+; SI-NEXT: v_writelane_b32 v36, s4, 60
+; SI-NEXT: v_writelane_b32 v36, s5, 61
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 58
-; SI-NEXT: v_writelane_b32 v37, s5, 59
+; SI-NEXT: v_writelane_b32 v36, s4, 62
+; SI-NEXT: v_writelane_b32 v36, s5, 63
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 60
-; SI-NEXT: v_writelane_b32 v37, s5, 61
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v37, s4, 0
+; SI-NEXT: v_writelane_b32 v37, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v37, s4, 62
-; SI-NEXT: v_writelane_b32 v37, s5, 63
+; SI-NEXT: v_writelane_b32 v37, s4, 2
+; SI-NEXT: v_writelane_b32 v37, s5, 3
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 0
-; SI-NEXT: v_writelane_b32 v36, s5, 1
+; SI-NEXT: v_writelane_b32 v37, s4, 4
+; SI-NEXT: v_writelane_b32 v37, s5, 5
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 2
-; SI-NEXT: v_writelane_b32 v36, s5, 3
+; SI-NEXT: v_writelane_b32 v37, s4, 6
+; SI-NEXT: v_writelane_b32 v37, s5, 7
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 4
-; SI-NEXT: v_writelane_b32 v36, s5, 5
+; SI-NEXT: v_writelane_b32 v37, s4, 8
+; SI-NEXT: v_writelane_b32 v37, s5, 9
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 6
-; SI-NEXT: v_writelane_b32 v36, s5, 7
+; SI-NEXT: v_writelane_b32 v37, s4, 10
+; SI-NEXT: v_writelane_b32 v37, s5, 11
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 8
-; SI-NEXT: v_writelane_b32 v36, s5, 9
+; SI-NEXT: v_writelane_b32 v37, s4, 12
+; SI-NEXT: v_writelane_b32 v37, s5, 13
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 10
-; SI-NEXT: v_writelane_b32 v36, s5, 11
+; SI-NEXT: v_writelane_b32 v37, s4, 14
+; SI-NEXT: v_writelane_b32 v37, s5, 15
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 12
-; SI-NEXT: v_writelane_b32 v36, s5, 13
+; SI-NEXT: v_writelane_b32 v37, s4, 16
+; SI-NEXT: v_writelane_b32 v37, s5, 17
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 14
-; SI-NEXT: v_writelane_b32 v36, s5, 15
+; SI-NEXT: v_writelane_b32 v37, s4, 18
+; SI-NEXT: v_writelane_b32 v37, s5, 19
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 16
-; SI-NEXT: v_writelane_b32 v36, s5, 17
+; SI-NEXT: v_writelane_b32 v37, s4, 20
+; SI-NEXT: v_writelane_b32 v37, s5, 21
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 18
-; SI-NEXT: v_writelane_b32 v36, s5, 19
+; SI-NEXT: v_writelane_b32 v37, s4, 22
+; SI-NEXT: v_writelane_b32 v37, s5, 23
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 20
-; SI-NEXT: v_writelane_b32 v36, s5, 21
+; SI-NEXT: v_writelane_b32 v37, s4, 24
+; SI-NEXT: v_writelane_b32 v37, s5, 25
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 22
-; SI-NEXT: v_writelane_b32 v36, s5, 23
+; SI-NEXT: v_writelane_b32 v37, s4, 26
+; SI-NEXT: v_writelane_b32 v37, s5, 27
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 24
-; SI-NEXT: v_writelane_b32 v36, s5, 25
+; SI-NEXT: v_writelane_b32 v37, s4, 28
+; SI-NEXT: v_writelane_b32 v37, s5, 29
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 26
-; SI-NEXT: v_writelane_b32 v36, s5, 27
+; SI-NEXT: v_writelane_b32 v37, s4, 30
+; SI-NEXT: v_writelane_b32 v37, s5, 31
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 28
-; SI-NEXT: v_writelane_b32 v36, s5, 29
+; SI-NEXT: v_writelane_b32 v37, s4, 32
+; SI-NEXT: v_writelane_b32 v37, s5, 33
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 30
-; SI-NEXT: v_writelane_b32 v36, s5, 31
+; SI-NEXT: v_writelane_b32 v37, s4, 34
+; SI-NEXT: v_writelane_b32 v37, s5, 35
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s4, 32
-; SI-NEXT: v_writelane_b32 v36, s5, 33
-; SI-NEXT: v_writelane_b32 v36, s16, 34
-; SI-NEXT: v_writelane_b32 v36, s17, 35
-; SI-NEXT: ; implicit-def: $sgpr16
+; SI-NEXT: v_writelane_b32 v37, s4, 36
+; SI-NEXT: v_writelane_b32 v37, s5, 37
+; SI-NEXT: v_writelane_b32 v37, s96, 38
+; SI-NEXT: v_writelane_b32 v37, s97, 39
+; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v36, s16, 36
-; SI-NEXT: v_writelane_b32 v36, s17, 37
-; SI-NEXT: ; implicit-def: $sgpr16
+; SI-NEXT: ; implicit-def: $sgpr5
+; SI-NEXT: v_writelane_b32 v37, s96, 40
+; SI-NEXT: v_writelane_b32 v37, s97, 41
+; SI-NEXT: ; implicit-def: $sgpr96
+; SI-NEXT: ; kill: killed $sgpr5
+; SI-NEXT: v_writelane_b32 v37, s96, 42
+; SI-NEXT: v_writelane_b32 v37, s97, 43
+; SI-NEXT: ; implicit-def: $sgpr96
; SI-NEXT: s_branch .LBB95_2
; SI-NEXT: .LBB95_4:
-; SI-NEXT: v_readlane_b32 s17, v36, 38
-; SI-NEXT: v_mov_b32_e32 v17, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 39
-; SI-NEXT: v_mov_b32_e32 v18, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 40
-; SI-NEXT: v_mov_b32_e32 v19, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 41
-; SI-NEXT: v_mov_b32_e32 v21, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 42
-; SI-NEXT: v_mov_b32_e32 v22, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 43
-; SI-NEXT: v_mov_b32_e32 v24, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 44
-; SI-NEXT: v_mov_b32_e32 v25, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 45
-; SI-NEXT: v_mov_b32_e32 v26, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 46
-; SI-NEXT: v_mov_b32_e32 v28, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 47
-; SI-NEXT: v_mov_b32_e32 v29, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 48
-; SI-NEXT: v_mov_b32_e32 v30, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 49
-; SI-NEXT: v_mov_b32_e32 v31, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 50
-; SI-NEXT: v_mov_b32_e32 v10, s90
-; SI-NEXT: v_mov_b32_e32 v11, s89
-; SI-NEXT: v_mov_b32_e32 v13, s88
-; SI-NEXT: v_mov_b32_e32 v16, s79
-; SI-NEXT: v_mov_b32_e32 v23, s77
-; SI-NEXT: v_mov_b32_e32 v27, s76
-; SI-NEXT: v_mov_b32_e32 v32, s17
-; SI-NEXT: v_readlane_b32 s17, v36, 51
-; SI-NEXT: v_readlane_b32 s76, v37, 30
-; SI-NEXT: v_readlane_b32 s78, v37, 28
-; SI-NEXT: v_readlane_b32 s88, v37, 24
-; SI-NEXT: v_readlane_b32 s90, v37, 26
-; SI-NEXT: v_readlane_b32 s77, v37, 31
-; SI-NEXT: v_readlane_b32 s79, v37, 29
-; SI-NEXT: v_readlane_b32 s89, v37, 25
-; SI-NEXT: v_readlane_b32 s91, v37, 27
-; SI-NEXT: v_writelane_b32 v37, s16, 0
-; SI-NEXT: v_writelane_b32 v37, s17, 1
+; SI-NEXT: v_readlane_b32 s16, v37, 44
+; SI-NEXT: v_mov_b32_e32 v25, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 45
+; SI-NEXT: v_mov_b32_e32 v27, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 46
+; SI-NEXT: v_mov_b32_e32 v7, s35
+; SI-NEXT: v_mov_b32_e32 v28, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 47
+; SI-NEXT: v_readlane_b32 s30, v36, 20
+; SI-NEXT: v_readlane_b32 s34, v36, 18
+; SI-NEXT: v_mov_b32_e32 v29, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 48
+; SI-NEXT: v_readlane_b32 s20, v37, 54
+; SI-NEXT: v_readlane_b32 s21, v37, 56
+; SI-NEXT: v_readlane_b32 s31, v36, 21
+; SI-NEXT: v_readlane_b32 s35, v36, 19
; SI-NEXT: v_mov_b32_e32 v8, s95
-; SI-NEXT: v_readlane_b32 s94, v37, 22
-; SI-NEXT: v_readlane_b32 s95, v37, 23
-; SI-NEXT: s_mov_b32 s95, s17
-; SI-NEXT: v_readlane_b32 s16, v36, 36
-; SI-NEXT: v_mov_b32_e32 v4, s55
-; SI-NEXT: v_mov_b32_e32 v6, s48
-; SI-NEXT: v_readlane_b32 s17, v36, 37
-; SI-NEXT: v_readlane_b32 s54, v37, 10
-; SI-NEXT: v_readlane_b32 s48, v37, 42
-; SI-NEXT: v_mov_b32_e32 v5, s52
-; SI-NEXT: v_mov_b32_e32 v7, s36
-; SI-NEXT: v_readlane_b32 s22, v36, 54
-; SI-NEXT: v_readlane_b32 s23, v36, 57
-; SI-NEXT: v_readlane_b32 s36, v37, 20
-; SI-NEXT: v_readlane_b32 s38, v37, 16
-; SI-NEXT: v_readlane_b32 s16, v37, 12
-; SI-NEXT: v_readlane_b32 s52, v37, 14
-; SI-NEXT: v_readlane_b32 s55, v37, 11
-; SI-NEXT: v_readlane_b32 s49, v37, 43
-; SI-NEXT: v_readlane_b32 s18, v36, 52
-; SI-NEXT: v_readlane_b32 s20, v36, 53
-; SI-NEXT: v_readlane_b32 s21, v36, 55
-; SI-NEXT: v_readlane_b32 s37, v37, 21
-; SI-NEXT: v_readlane_b32 s39, v37, 17
-; SI-NEXT: v_readlane_b32 s17, v37, 13
-; SI-NEXT: v_readlane_b32 s53, v37, 15
-; SI-NEXT: s_mov_b32 s55, s23
-; SI-NEXT: s_mov_b32 s49, s22
-; SI-NEXT: v_readlane_b32 s22, v37, 38
-; SI-NEXT: v_mov_b32_e32 v1, s82
-; SI-NEXT: v_mov_b32_e32 v2, s71
-; SI-NEXT: v_mov_b32_e32 v3, s67
; SI-NEXT: v_mov_b32_e32 v9, s92
-; SI-NEXT: v_mov_b32_e32 v12, s96
-; SI-NEXT: v_mov_b32_e32 v14, s50
-; SI-NEXT: v_readlane_b32 vcc_lo, v37, 18
-; SI-NEXT: s_mov_b32 s37, s18
-; SI-NEXT: s_mov_b32 s39, s20
+; SI-NEXT: v_mov_b32_e32 v30, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 49
+; SI-NEXT: v_readlane_b32 s92, v36, 26
+; SI-NEXT: v_readlane_b32 s94, v36, 22
+; SI-NEXT: s_mov_b32 s31, s20
+; SI-NEXT: s_mov_b32 s35, s21
+; SI-NEXT: v_readlane_b32 s20, v37, 40
+; SI-NEXT: v_mov_b32_e32 v31, s16
+; SI-NEXT: v_readlane_b32 s16, v37, 51
+; SI-NEXT: v_readlane_b32 s17, v37, 52
+; SI-NEXT: v_readlane_b32 s93, v36, 27
+; SI-NEXT: v_readlane_b32 s95, v36, 23
+; SI-NEXT: v_readlane_b32 s21, v37, 41
+; SI-NEXT: v_mov_b32_e32 v1, s82
+; SI-NEXT: s_mov_b32 s93, s16
+; SI-NEXT: s_mov_b32 s95, s17
+; SI-NEXT: v_readlane_b32 vcc_lo, v36, 24
+; SI-NEXT: v_readlane_b32 s16, v36, 16
+; SI-NEXT: v_readlane_b32 s82, v37, 30
+; SI-NEXT: v_readlane_b32 s20, v36, 44
+; SI-NEXT: v_mov_b32_e32 v10, s90
+; SI-NEXT: v_mov_b32_e32 v11, s89
+; SI-NEXT: v_mov_b32_e32 v12, s88
+; SI-NEXT: v_mov_b32_e32 v15, s79
+; SI-NEXT: v_mov_b32_e32 v18, s78
+; SI-NEXT: v_mov_b32_e32 v22, s77
+; SI-NEXT: v_mov_b32_e32 v26, s76
+; SI-NEXT: v_readlane_b32 s22, v37, 50
+; SI-NEXT: v_readlane_b32 s18, v37, 53
+; SI-NEXT: v_readlane_b32 s76, v36, 34
+; SI-NEXT: v_readlane_b32 s78, v36, 32
+; SI-NEXT: v_readlane_b32 s88, v36, 28
+; SI-NEXT: v_readlane_b32 s90, v36, 30
+; SI-NEXT: v_readlane_b32 vcc_hi, v36, 25
+; SI-NEXT: v_readlane_b32 s17, v36, 17
+; SI-NEXT: v_readlane_b32 s83, v37, 31
+; SI-NEXT: v_readlane_b32 s21, v36, 45
+; SI-NEXT: v_mov_b32_e32 v2, s70
+; SI-NEXT: v_mov_b32_e32 v3, s66
+; SI-NEXT: v_mov_b32_e32 v4, s54
+; SI-NEXT: v_mov_b32_e32 v5, s50
+; SI-NEXT: v_mov_b32_e32 v6, s39
+; SI-NEXT: v_mov_b32_e32 v13, s86
+; SI-NEXT: v_mov_b32_e32 v14, s49
+; SI-NEXT: v_mov_b32_e32 v16, s85
+; SI-NEXT: v_mov_b32_e32 v17, s99
+; SI-NEXT: v_mov_b32_e32 v19, s98
+; SI-NEXT: v_mov_b32_e32 v20, s52
+; SI-NEXT: v_mov_b32_e32 v21, s97
+; SI-NEXT: v_mov_b32_e32 v23, s84
+; SI-NEXT: v_mov_b32_e32 v24, s87
+; SI-NEXT: v_mov_b32_e32 v32, s96
+; SI-NEXT: v_readlane_b32 s77, v36, 35
+; SI-NEXT: v_readlane_b32 s79, v36, 33
+; SI-NEXT: v_readlane_b32 s89, v36, 29
+; SI-NEXT: v_readlane_b32 s91, v36, 31
+; SI-NEXT: s_mov_b32 vcc_hi, s18
; SI-NEXT: s_mov_b32 s18, s16
-; SI-NEXT: s_mov_b32 s53, s21
-; SI-NEXT: v_readlane_b32 s16, v37, 8
-; SI-NEXT: v_readlane_b32 s92, v37, 44
-; SI-NEXT: v_readlane_b32 s50, v36, 8
-; SI-NEXT: v_readlane_b32 s66, v37, 40
-; SI-NEXT: v_readlane_b32 s68, v36, 6
-; SI-NEXT: v_readlane_b32 s23, v37, 39
-; SI-NEXT: v_readlane_b32 s80, v36, 4
-; SI-NEXT: v_readlane_b32 s84, v37, 36
-; SI-NEXT: v_readlane_b32 s96, v36, 2
-; SI-NEXT: v_readlane_b32 s98, v37, 34
-; SI-NEXT: v_readlane_b32 s64, v37, 32
-; SI-NEXT: v_readlane_b32 s20, v37, 62
-; SI-NEXT: v_readlane_b32 s30, v37, 60
-; SI-NEXT: v_readlane_b32 s24, v37, 58
-; SI-NEXT: v_readlane_b32 s34, v37, 56
-; SI-NEXT: v_readlane_b32 s70, v37, 52
-; SI-NEXT: v_readlane_b32 s82, v37, 50
-; SI-NEXT: v_mov_b32_e32 v20, s86
-; SI-NEXT: v_mov_b32_e32 v15, s87
-; SI-NEXT: v_readlane_b32 s19, v36, 56
-; SI-NEXT: v_readlane_b32 s26, v36, 58
-; SI-NEXT: v_readlane_b32 s27, v36, 59
-; SI-NEXT: v_readlane_b32 s28, v36, 60
-; SI-NEXT: v_readlane_b32 s29, v36, 61
-; SI-NEXT: v_readlane_b32 vcc_hi, v37, 19
-; SI-NEXT: v_readlane_b32 s77, v36, 62
-; SI-NEXT: v_readlane_b32 s17, v37, 9
-; SI-NEXT: v_readlane_b32 s79, v36, 63
-; SI-NEXT: v_readlane_b32 s93, v37, 45
-; SI-NEXT: v_readlane_b32 s89, v35, 0
-; SI-NEXT: v_readlane_b32 s91, v35, 1
-; SI-NEXT: v_readlane_b32 s51, v36, 9
-; SI-NEXT: v_readlane_b32 s67, v37, 41
-; SI-NEXT: v_readlane_b32 s69, v36, 7
-; SI-NEXT: v_readlane_b32 s81, v36, 5
-; SI-NEXT: v_readlane_b32 s23, v35, 2
-; SI-NEXT: v_readlane_b32 s85, v37, 37
-; SI-NEXT: v_readlane_b32 s97, v36, 3
-; SI-NEXT: v_readlane_b32 s99, v37, 35
-; SI-NEXT: v_readlane_b32 s65, v37, 33
-; SI-NEXT: v_readlane_b32 s21, v37, 63
-; SI-NEXT: v_readlane_b32 s31, v37, 61
-; SI-NEXT: v_readlane_b32 s25, v37, 59
-; SI-NEXT: v_readlane_b32 s35, v37, 57
-; SI-NEXT: v_readlane_b32 s71, v37, 53
-; SI-NEXT: v_readlane_b32 s83, v37, 51
+; SI-NEXT: v_readlane_b32 s36, v36, 14
+; SI-NEXT: v_readlane_b32 s16, v36, 12
+; SI-NEXT: s_mov_b32 s80, s82
+; SI-NEXT: v_readlane_b32 s98, v36, 46
+; SI-NEXT: s_mov_b32 s21, s22
+; SI-NEXT: v_readlane_b32 s52, v36, 42
+; SI-NEXT: v_readlane_b32 s64, v36, 40
+; SI-NEXT: v_readlane_b32 s70, v36, 38
+; SI-NEXT: v_readlane_b32 s84, v36, 36
+; SI-NEXT: v_readlane_b32 s86, v37, 12
+; SI-NEXT: v_readlane_b32 s96, v37, 10
+; SI-NEXT: v_readlane_b32 s38, v37, 8
+; SI-NEXT: v_readlane_b32 s48, v37, 6
+; SI-NEXT: v_readlane_b32 s50, v37, 4
+; SI-NEXT: v_readlane_b32 s66, v37, 2
+; SI-NEXT: v_readlane_b32 s24, v37, 0
+; SI-NEXT: v_readlane_b32 s54, v36, 62
+; SI-NEXT: v_readlane_b32 s22, v36, 60
+; SI-NEXT: v_readlane_b32 s68, v36, 56
+; SI-NEXT: v_readlane_b32 s82, v36, 54
+; SI-NEXT: v_readlane_b32 s19, v37, 55
+; SI-NEXT: v_readlane_b32 s26, v37, 57
+; SI-NEXT: v_readlane_b32 s27, v37, 58
+; SI-NEXT: v_readlane_b32 s28, v37, 59
+; SI-NEXT: v_readlane_b32 s29, v37, 60
+; SI-NEXT: v_readlane_b32 s77, v37, 61
+; SI-NEXT: v_readlane_b32 s37, v36, 15
+; SI-NEXT: v_readlane_b32 s17, v36, 13
+; SI-NEXT: v_readlane_b32 s79, v37, 62
+; SI-NEXT: v_readlane_b32 s89, v37, 63
+; SI-NEXT: v_readlane_b32 s99, v36, 47
+; SI-NEXT: v_readlane_b32 s91, v35, 0
+; SI-NEXT: v_readlane_b32 s53, v36, 43
+; SI-NEXT: v_readlane_b32 s65, v36, 41
+; SI-NEXT: v_readlane_b32 s71, v36, 39
+; SI-NEXT: v_readlane_b32 s85, v36, 37
+; SI-NEXT: v_readlane_b32 s87, v37, 13
+; SI-NEXT: v_readlane_b32 s97, v37, 11
+; SI-NEXT: v_readlane_b32 s39, v37, 9
+; SI-NEXT: v_readlane_b32 s49, v37, 7
+; SI-NEXT: v_readlane_b32 s51, v37, 5
+; SI-NEXT: v_readlane_b32 s67, v37, 3
+; SI-NEXT: v_readlane_b32 s25, v37, 1
+; SI-NEXT: v_readlane_b32 s55, v36, 63
+; SI-NEXT: v_readlane_b32 s23, v36, 61
+; SI-NEXT: v_readlane_b32 s69, v36, 57
+; SI-NEXT: v_readlane_b32 s83, v36, 55
; SI-NEXT: .LBB95_5: ; %end
; SI-NEXT: s_lshl_b32 s16, s16, 8
; SI-NEXT: s_and_b32 s17, s74, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s54, 0xff
+; SI-NEXT: s_and_b32 s17, s36, 0xff
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -182440,52 +181712,53 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v33, s16
; SI-NEXT: s_and_b32 s16, s75, 0xff
-; SI-NEXT: s_lshl_b32 s17, s23, 8
-; SI-NEXT: v_and_b32_e32 v27, 0xff, v27
+; SI-NEXT: s_lshl_b32 s17, s91, 8
+; SI-NEXT: v_and_b32_e32 v26, 0xff, v26
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT: v_lshlrev_b32_e32 v32, 24, v32
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v27, v32, v27
-; SI-NEXT: v_or_b32_e32 v27, s16, v27
-; SI-NEXT: s_lshl_b32 s16, s52, 8
+; SI-NEXT: v_or_b32_e32 v26, v32, v26
+; SI-NEXT: v_or_b32_e32 v26, s16, v26
+; SI-NEXT: s_lshl_b32 s16, s34, 8
; SI-NEXT: s_and_b32 s17, s72, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s38, 0xff
-; SI-NEXT: s_lshl_b32 s18, vcc_lo, 24
+; SI-NEXT: s_and_b32 s17, s30, 0xff
+; SI-NEXT: s_lshl_b32 s18, s94, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_mov_b32_e32 v32, s16
; SI-NEXT: s_and_b32 s16, s73, 0xff
-; SI-NEXT: s_lshl_b32 s17, s91, 8
-; SI-NEXT: v_and_b32_e32 v23, 0xff, v23
+; SI-NEXT: s_lshl_b32 s17, s89, 8
+; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_lshlrev_b32_e32 v31, 24, v31
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v23, v31, v23
-; SI-NEXT: v_or_b32_e32 v23, s16, v23
-; SI-NEXT: s_lshl_b32 s16, s36, 8
+; SI-NEXT: v_or_b32_e32 v22, v31, v22
+; SI-NEXT: v_or_b32_e32 v22, s16, v22
+; SI-NEXT: s_lshl_b32 s16, vcc_lo, 8
; SI-NEXT: s_and_b32 s17, s62, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s94, 0xff
+; SI-NEXT: s_and_b32 s17, s92, 0xff
; SI-NEXT: s_lshl_b32 s18, s88, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s17, v35, 1
; SI-NEXT: v_mov_b32_e32 v31, s16
; SI-NEXT: s_and_b32 s16, s63, 0xff
-; SI-NEXT: s_lshl_b32 s17, s89, 8
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
+; SI-NEXT: s_lshl_b32 s17, s17, 8
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT: v_lshlrev_b32_e32 v30, 24, v30
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v20, v30, v20
-; SI-NEXT: v_or_b32_e32 v20, s16, v20
+; SI-NEXT: v_or_b32_e32 v18, v30, v18
+; SI-NEXT: v_or_b32_e32 v18, s16, v18
; SI-NEXT: s_lshl_b32 s16, s90, 8
; SI-NEXT: s_and_b32 s17, s58, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
@@ -182498,359 +181771,331 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; SI-NEXT: v_mov_b32_e32 v30, s16
; SI-NEXT: s_and_b32 s16, s59, 0xff
; SI-NEXT: s_lshl_b32 s17, s79, 8
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
+; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v29, 24, v29
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v16, v29, v16
-; SI-NEXT: v_or_b32_e32 v16, s16, v16
-; SI-NEXT: s_lshl_b32 s16, s64, 8
-; SI-NEXT: s_and_b32 s17, s56, 0xff
+; SI-NEXT: v_or_b32_e32 v15, v29, v15
+; SI-NEXT: v_or_b32_e32 v15, s16, v15
+; SI-NEXT: s_lshl_b32 s16, s84, 8
+; SI-NEXT: s_and_b32 s17, s46, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s98, 0xff
-; SI-NEXT: s_lshl_b32 s18, s84, 24
+; SI-NEXT: s_and_b32 s17, s70, 0xff
+; SI-NEXT: s_lshl_b32 s18, s64, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v33, vcc, 4, v0
; SI-NEXT: v_mov_b32_e32 v29, s16
-; SI-NEXT: s_and_b32 s16, s57, 0xff
+; SI-NEXT: s_and_b32 s16, s47, 0xff
; SI-NEXT: s_lshl_b32 s17, s77, 8
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
-; SI-NEXT: buffer_store_dword v27, v33, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v27, vcc, 8, v0
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: v_lshlrev_b32_e32 v28, 24, v28
-; SI-NEXT: buffer_store_dword v32, v27, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v27, vcc, 12, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v13, v28, v13
-; SI-NEXT: buffer_store_dword v23, v27, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v23, vcc, 16, v0
-; SI-NEXT: v_or_b32_e32 v13, s16, v13
-; SI-NEXT: s_lshl_b32 s16, s22, 8
+; SI-NEXT: v_or_b32_e32 v12, v28, v12
+; SI-NEXT: v_or_b32_e32 v12, s16, v12
+; SI-NEXT: s_lshl_b32 s16, s52, 8
; SI-NEXT: s_and_b32 s17, s60, 0xff
-; SI-NEXT: buffer_store_dword v31, v23, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v23, vcc, 20, v0
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: s_and_b32 s17, s66, 0xff
-; SI-NEXT: buffer_store_dword v20, v23, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 24, v0
-; SI-NEXT: s_lshl_b32 s18, s48, 24
+; SI-NEXT: s_and_b32 s17, s20, 0xff
+; SI-NEXT: s_lshl_b32 s18, s98, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v30, v20, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v20, vcc, 28, v0
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: buffer_store_dword v16, v20, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v16, vcc, 32, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v29, v16, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v16, vcc, 36, v0
; SI-NEXT: v_mov_b32_e32 v28, s16
; SI-NEXT: s_and_b32 s16, s61, 0xff
-; SI-NEXT: buffer_store_dword v13, v16, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v13, vcc, 40, v0
; SI-NEXT: s_lshl_b32 s17, s29, 8
; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
-; SI-NEXT: buffer_store_dword v28, v13, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s46, v36, 48
+; SI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_lshlrev_b32_e32 v13, 24, v26
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v27
+; SI-NEXT: v_readlane_b32 s47, v36, 49
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v11, v13, v11
-; SI-NEXT: v_readlane_b32 s22, v37, 46
+; SI-NEXT: v_or_b32_e32 v11, v12, v11
+; SI-NEXT: s_lshl_b32 s17, s46, 8
+; SI-NEXT: v_readlane_b32 s46, v36, 50
; SI-NEXT: v_or_b32_e32 v11, s16, v11
-; SI-NEXT: s_and_b32 s16, s46, 0xff
-; SI-NEXT: s_lshl_b32 s17, s92, 8
-; SI-NEXT: v_readlane_b32 s23, v37, 47
+; SI-NEXT: s_and_b32 s16, s56, 0xff
+; SI-NEXT: v_readlane_b32 s47, v36, 51
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s22, 0xff
-; SI-NEXT: v_readlane_b32 s22, v37, 48
+; SI-NEXT: s_and_b32 s17, s46, 0xff
+; SI-NEXT: v_readlane_b32 s46, v36, 52
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s22, 24
+; SI-NEXT: s_lshl_b32 s18, s46, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v13, vcc, 44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v11, vcc, 48, v0
-; SI-NEXT: v_mov_b32_e32 v13, s16
-; SI-NEXT: s_and_b32 s16, s47, 0xff
+; SI-NEXT: v_mov_b32_e32 v11, s16
+; SI-NEXT: s_and_b32 s16, s57, 0xff
; SI-NEXT: s_lshl_b32 s17, s28, 8
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
-; SI-NEXT: buffer_store_dword v13, v11, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v25
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_readlane_b32 s23, v37, 49
; SI-NEXT: v_or_b32_e32 v10, s16, v10
; SI-NEXT: s_and_b32 s16, s44, 0xff
; SI-NEXT: s_lshl_b32 s17, s82, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s70, 0xff
-; SI-NEXT: v_readlane_b32 s22, v37, 54
+; SI-NEXT: s_and_b32 s17, s68, 0xff
+; SI-NEXT: v_readlane_b32 s28, v36, 58
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s22, 24
+; SI-NEXT: s_lshl_b32 s18, s28, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v11, vcc, 52, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v10, v11, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v10, vcc, 56, v0
-; SI-NEXT: v_mov_b32_e32 v11, s16
+; SI-NEXT: v_mov_b32_e32 v10, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s27, 8
; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: buffer_store_dword v11, v10, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v10, 24, v24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v9, v10, v9
; SI-NEXT: v_or_b32_e32 v9, s16, v9
; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s34, 8
+; SI-NEXT: s_lshl_b32 s17, s22, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s24, 0xff
+; SI-NEXT: s_and_b32 s17, s54, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s30, 24
+; SI-NEXT: s_lshl_b32 s18, s24, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v10, vcc, 60, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:60
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 64, v0
-; SI-NEXT: v_mov_b32_e32 v10, s16
+; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
; SI-NEXT: s_lshl_b32 s17, s26, 8
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
-; SI-NEXT: buffer_store_dword v10, v9, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v22
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v23
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v8, v9, v8
; SI-NEXT: v_or_b32_e32 v8, s16, v8
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s20, 8
-; SI-NEXT: v_readlane_b32 s20, v36, 0
+; SI-NEXT: s_lshl_b32 s17, s66, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s20, 0xff
+; SI-NEXT: s_and_b32 s17, s50, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s96, 24
+; SI-NEXT: s_lshl_b32 s18, s48, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v9, vcc, 0x44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v8, v9, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x48, v0
-; SI-NEXT: v_mov_b32_e32 v9, s16
+; SI-NEXT: v_mov_b32_e32 v8, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
-; SI-NEXT: s_lshl_b32 s17, s55, 8
+; SI-NEXT: s_lshl_b32 s17, s35, 8
; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: buffer_store_dword v9, v8, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v21
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_or_b32_e32 v7, s16, v7
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: s_lshl_b32 s16, s80, 8
+; SI-NEXT: s_lshl_b32 s16, s38, 8
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_and_b32 s16, s68, 0xff
+; SI-NEXT: s_and_b32 s16, s96, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s50, 24
+; SI-NEXT: s_lshl_b32 s17, s86, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v8, vcc, 0x4c, v0
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x50, v0
-; SI-NEXT: v_mov_b32_e32 v8, s14
+; SI-NEXT: v_mov_b32_e32 v7, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
; SI-NEXT: s_lshl_b32 s15, s19, 8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: buffer_store_dword v8, v7, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v19
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v20
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: v_or_b32_e32 v6, v7, v6
; SI-NEXT: v_or_b32_e32 v6, s14, v6
-; SI-NEXT: v_readlane_b32 s14, v36, 10
+; SI-NEXT: v_readlane_b32 s14, v37, 14
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s15, v36, 11
+; SI-NEXT: v_readlane_b32 s15, v37, 15
; SI-NEXT: s_lshl_b32 s14, s14, 8
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: v_readlane_b32 s14, v36, 12
-; SI-NEXT: v_readlane_b32 s15, v36, 13
+; SI-NEXT: v_readlane_b32 s14, v37, 16
+; SI-NEXT: v_readlane_b32 s15, v37, 17
; SI-NEXT: s_and_b32 s14, s14, 0xff
-; SI-NEXT: v_readlane_b32 s16, v36, 14
+; SI-NEXT: v_readlane_b32 s16, v37, 18
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: buffer_store_dword v6, v7, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x58, v0
-; SI-NEXT: v_mov_b32_e32 v7, s12
+; SI-NEXT: v_mov_b32_e32 v6, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s53, 8
+; SI-NEXT: s_lshl_b32 s13, s31, 8
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: buffer_store_dword v7, v6, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v18
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v19
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: v_or_b32_e32 v5, v6, v5
; SI-NEXT: v_or_b32_e32 v5, s12, v5
-; SI-NEXT: v_readlane_b32 s12, v36, 16
+; SI-NEXT: v_readlane_b32 s12, v37, 20
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s13, v36, 17
+; SI-NEXT: v_readlane_b32 s13, v37, 21
; SI-NEXT: s_lshl_b32 s12, s12, 8
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: v_readlane_b32 s12, v36, 18
-; SI-NEXT: v_readlane_b32 s13, v36, 19
+; SI-NEXT: v_readlane_b32 s12, v37, 22
+; SI-NEXT: v_readlane_b32 s13, v37, 23
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: v_readlane_b32 s14, v36, 20
+; SI-NEXT: v_readlane_b32 s14, v37, 24
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v6, vcc, 0x5c, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x60, v0
-; SI-NEXT: v_mov_b32_e32 v6, s10
+; SI-NEXT: v_mov_b32_e32 v5, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: s_lshl_b32 s11, s49, 8
+; SI-NEXT: s_lshl_b32 s11, vcc_hi, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: buffer_store_dword v6, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v17
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v4, s10, v4
-; SI-NEXT: v_readlane_b32 s10, v36, 22
+; SI-NEXT: v_readlane_b32 s10, v37, 26
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s11, v36, 23
+; SI-NEXT: v_readlane_b32 s11, v37, 27
; SI-NEXT: s_lshl_b32 s10, s10, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: v_readlane_b32 s10, v36, 24
-; SI-NEXT: v_readlane_b32 s11, v36, 25
+; SI-NEXT: v_readlane_b32 s10, v37, 28
+; SI-NEXT: v_readlane_b32 s11, v37, 29
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: v_readlane_b32 s12, v36, 26
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s12, 24
+; SI-NEXT: s_lshl_b32 s11, s80, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v5, vcc, 0x64, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x68, v0
-; SI-NEXT: v_mov_b32_e32 v5, s8
+; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: s_lshl_b32 s9, s39, 8
+; SI-NEXT: s_lshl_b32 s9, s95, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: buffer_store_dword v5, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v15
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v16
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v3, s8, v3
-; SI-NEXT: v_readlane_b32 s8, v36, 28
+; SI-NEXT: v_readlane_b32 s8, v37, 32
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s9, v36, 29
+; SI-NEXT: v_readlane_b32 s9, v37, 33
; SI-NEXT: s_lshl_b32 s8, s8, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: v_readlane_b32 s8, v36, 30
-; SI-NEXT: v_readlane_b32 s9, v36, 31
+; SI-NEXT: v_readlane_b32 s8, v37, 34
+; SI-NEXT: v_readlane_b32 s9, v37, 35
; SI-NEXT: s_and_b32 s8, s8, 0xff
-; SI-NEXT: v_readlane_b32 s10, v36, 32
+; SI-NEXT: v_readlane_b32 s10, v37, 36
; SI-NEXT: s_lshl_b32 s8, s8, 16
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v4, vcc, 0x6c, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x70, v0
-; SI-NEXT: v_mov_b32_e32 v4, s6
+; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: s_lshl_b32 s7, s37, 8
+; SI-NEXT: s_lshl_b32 s7, s93, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: buffer_store_dword v4, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v14
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v2, s6, v2
-; SI-NEXT: v_readlane_b32 s6, v36, 34
+; SI-NEXT: v_readlane_b32 s6, v37, 38
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: v_readlane_b32 s7, v36, 35
+; SI-NEXT: v_readlane_b32 s7, v37, 39
; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_readlane_b32 s6, v36, 36
-; SI-NEXT: v_readlane_b32 s7, v36, 37
+; SI-NEXT: v_readlane_b32 s6, v37, 40
+; SI-NEXT: v_readlane_b32 s7, v37, 41
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: v_readlane_b32 s8, v37, 0
+; SI-NEXT: v_readlane_b32 s8, v37, 42
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: s_lshl_b32 s5, s95, 8
+; SI-NEXT: s_lshl_b32 s5, s21, 8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v13
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
; SI-NEXT: v_readlane_b32 s30, v34, 34
-; SI-NEXT: v_readlane_b32 s23, v37, 55
-; SI-NEXT: v_readlane_b32 s21, v36, 1
-; SI-NEXT: v_readlane_b32 s17, v36, 15
-; SI-NEXT: v_readlane_b32 s15, v36, 21
-; SI-NEXT: v_readlane_b32 s13, v36, 27
-; SI-NEXT: v_readlane_b32 s11, v36, 33
-; SI-NEXT: v_readlane_b32 s9, v37, 1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s47, v36, 53
+; SI-NEXT: v_readlane_b32 s29, v36, 59
+; SI-NEXT: v_readlane_b32 s17, v37, 19
+; SI-NEXT: v_readlane_b32 s15, v37, 25
+; SI-NEXT: v_readlane_b32 s11, v37, 37
+; SI-NEXT: v_readlane_b32 s9, v37, 43
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v34, 35
; SI-NEXT: v_readlane_b32 s99, v34, 33
; SI-NEXT: v_readlane_b32 s98, v34, 32
@@ -182899,8 +182144,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
@@ -182949,6 +182194,7 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_writelane_b32 v63, s30, 30
; VI-NEXT: v_writelane_b32 v63, s31, 31
; VI-NEXT: v_readfirstlane_b32 s4, v19
+; VI-NEXT: v_mov_b32_e32 v46, v0
; VI-NEXT: v_readfirstlane_b32 s7, v18
; VI-NEXT: v_readfirstlane_b32 s6, v17
; VI-NEXT: v_readfirstlane_b32 s9, v16
@@ -183128,303 +182374,333 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: s_cbranch_execnz .LBB95_4
; VI-NEXT: .LBB95_2: ; %cmp.true
; VI-NEXT: s_lshr_b32 s46, s45, 16
-; VI-NEXT: v_mov_b32_e32 v7, 0x200
-; VI-NEXT: v_add_f16_e32 v36, s46, v7
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v36
-; VI-NEXT: v_add_f16_e32 v2, s45, v7
+; VI-NEXT: v_mov_b32_e32 v8, 0x200
+; VI-NEXT: v_add_f16_e32 v0, s46, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; VI-NEXT: v_add_f16_e32 v0, s45, v8
; VI-NEXT: s_lshr_b32 s45, s44, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v23, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s45, v7
-; VI-NEXT: v_add_f16_e32 v2, s44, v7
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v36, v0, v1
+; VI-NEXT: v_add_f16_e32 v0, s45, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; VI-NEXT: v_add_f16_e32 v0, s44, v8
; VI-NEXT: s_lshr_b32 s44, s43, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v53, s44, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v22, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v53
-; VI-NEXT: v_add_f16_e32 v2, s43, v7
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v35, v0, v1
+; VI-NEXT: v_add_f16_e32 v0, s44, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; VI-NEXT: v_add_f16_e32 v0, s43, v8
; VI-NEXT: s_lshr_b32 s43, s42, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v25, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s43, v7
-; VI-NEXT: v_add_f16_e32 v2, s42, v7
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v24, v0, v1
+; VI-NEXT: v_add_f16_e32 v0, s43, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; VI-NEXT: v_add_f16_e32 v0, s42, v8
; VI-NEXT: s_lshr_b32 s42, s41, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v50, s42, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v24, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v50
-; VI-NEXT: v_add_f16_e32 v2, s41, v7
+; VI-NEXT: v_add_f16_e32 v57, s42, v8
+; VI-NEXT: v_add_f16_e32 v2, s41, v8
; VI-NEXT: s_lshr_b32 s41, s40, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v27, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s41, v7
-; VI-NEXT: v_add_f16_e32 v2, s40, v7
-; VI-NEXT: s_lshr_b32 s40, s15, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v61, s40, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v23, v0, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v57
+; VI-NEXT: v_add_f16_e32 v0, s41, v8
; VI-NEXT: v_or_b32_e32 v26, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v61
-; VI-NEXT: v_add_f16_e32 v2, s15, v7
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v0
+; VI-NEXT: v_add_f16_e32 v0, s40, v8
+; VI-NEXT: s_lshr_b32 s40, s15, 16
+; VI-NEXT: v_add_f16_e32 v42, s40, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v25, v0, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v42
+; VI-NEXT: v_add_f16_e32 v2, s15, v8
; VI-NEXT: s_lshr_b32 s15, s14, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s15, v7
-; VI-NEXT: v_add_f16_e32 v2, s14, v7
-; VI-NEXT: s_lshr_b32 s14, s13, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v22, v2, v1
+; VI-NEXT: v_add_f16_e32 v1, s15, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v51, s14, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v28, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v51
-; VI-NEXT: v_add_f16_e32 v2, s13, v7
-; VI-NEXT: s_lshr_b32 s13, s12, 16
+; VI-NEXT: v_add_f16_e32 v2, s14, v8
+; VI-NEXT: s_lshr_b32 s14, s13, 16
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v6, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s13, v7
-; VI-NEXT: v_add_f16_e32 v2, s12, v7
+; VI-NEXT: v_or_b32_e32 v21, v2, v1
+; VI-NEXT: v_add_f16_e32 v58, s14, v8
+; VI-NEXT: v_add_f16_e32 v2, s13, v8
+; VI-NEXT: s_lshr_b32 s13, s12, 16
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
+; VI-NEXT: v_add_f16_e32 v43, s13, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v28, v2, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v43
+; VI-NEXT: v_add_f16_e32 v2, s12, v8
; VI-NEXT: s_lshr_b32 s12, s11, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v41, s12, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v5, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v41
-; VI-NEXT: v_add_f16_e32 v2, s11, v7
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v27, v2, v1
+; VI-NEXT: v_add_f16_e32 v60, s12, v8
+; VI-NEXT: v_add_f16_e32 v2, s11, v8
; VI-NEXT: s_lshr_b32 s11, s10, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v31, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s11, v7
-; VI-NEXT: v_add_f16_e32 v2, s10, v7
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v60
+; VI-NEXT: v_add_f16_e32 v47, s11, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v5, v2, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
+; VI-NEXT: v_add_f16_e32 v2, s10, v8
; VI-NEXT: s_lshr_b32 s10, s9, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v37, s10, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v30, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v37
-; VI-NEXT: v_add_f16_e32 v2, s9, v7
-; VI-NEXT: s_lshr_b32 s9, s8, 16
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v4, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s9, v7
-; VI-NEXT: v_add_f16_e32 v2, s8, v7
+; VI-NEXT: v_add_f16_e32 v41, s10, v8
+; VI-NEXT: v_add_f16_e32 v2, s9, v8
+; VI-NEXT: s_lshr_b32 s9, s8, 16
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v41
+; VI-NEXT: v_add_f16_e32 v45, s9, v8
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v30, v2, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v45
+; VI-NEXT: v_add_f16_e32 v2, s8, v8
; VI-NEXT: s_lshr_b32 s8, s7, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v52, s8, v7
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v3, v2, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v52
-; VI-NEXT: v_add_f16_e32 v2, s7, v7
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v29, v2, v1
+; VI-NEXT: v_add_f16_e32 v44, s8, v8
+; VI-NEXT: v_add_f16_e32 v2, s7, v8
; VI-NEXT: s_lshr_b32 s7, s6, 16
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v2, v2, v1
-; VI-NEXT: v_add_f16_e32 v1, s7, v7
-; VI-NEXT: v_add_f16_e32 v8, s6, v7
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v44
+; VI-NEXT: v_add_f16_e32 v55, s7, v8
+; VI-NEXT: v_add_f16_e32 v3, s6, v8
; VI-NEXT: s_lshr_b32 s6, s17, 16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_add_f16_e32 v42, s6, v7
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v2, v2, v1
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v55
+; VI-NEXT: v_add_f16_e32 v61, s6, v8
; VI-NEXT: s_lshr_b32 s6, s16, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v1, v8, v1
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v42
-; VI-NEXT: v_add_f16_e32 v9, s17, v7
-; VI-NEXT: v_add_f16_e32 v11, s6, v7
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v61
+; VI-NEXT: v_add_f16_e32 v52, s17, v8
+; VI-NEXT: v_add_f16_e32 v40, s6, v8
; VI-NEXT: s_lshr_b32 s6, s19, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v33, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v11
-; VI-NEXT: v_add_f16_e32 v9, s16, v7
-; VI-NEXT: v_add_f16_e32 v60, s6, v7
+; VI-NEXT: v_or_b32_e32 v32, v52, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v40
+; VI-NEXT: v_add_f16_e32 v9, s16, v8
+; VI-NEXT: v_add_f16_e32 v37, s6, v8
; VI-NEXT: s_lshr_b32 s6, s18, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v32, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v60
-; VI-NEXT: v_add_f16_e32 v9, s19, v7
-; VI-NEXT: v_add_f16_e32 v55, s6, v7
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v37
+; VI-NEXT: v_add_f16_e32 v9, s19, v8
+; VI-NEXT: v_add_f16_e32 v51, s6, v8
; VI-NEXT: s_lshr_b32 s6, s21, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v21, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v55
-; VI-NEXT: v_add_f16_e32 v9, s18, v7
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v20, v9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v51
+; VI-NEXT: v_add_f16_e32 v9, s18, v8
; VI-NEXT: s_lshr_b32 s7, s20, 16
-; VI-NEXT: v_add_f16_e32 v39, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v20, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v39
-; VI-NEXT: v_add_f16_e32 v9, s21, v7
-; VI-NEXT: v_add_f16_e32 v38, s7, v7
+; VI-NEXT: v_add_f16_e32 v54, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v19, v9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v54
+; VI-NEXT: v_add_f16_e32 v9, s21, v8
+; VI-NEXT: v_add_f16_e32 v38, s7, v8
; VI-NEXT: s_lshr_b32 s6, s23, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v35, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v38
-; VI-NEXT: v_add_f16_e32 v9, s20, v7
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v34, v9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v38
+; VI-NEXT: v_add_f16_e32 v9, s20, v8
+; VI-NEXT: v_add_f16_e32 v14, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v33, v9, v3
; VI-NEXT: s_lshr_b32 s7, s22, 16
-; VI-NEXT: v_add_f16_e32 v49, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v34, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v49
-; VI-NEXT: v_add_f16_e32 v9, s23, v7
-; VI-NEXT: v_add_f16_e32 v48, s7, v7
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
+; VI-NEXT: v_add_f16_e32 v9, s23, v8
+; VI-NEXT: v_or_b32_e32 v16, v9, v3
+; VI-NEXT: v_add_f16_e32 v3, s7, v8
; VI-NEXT: s_lshr_b32 s6, s25, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v19, v9, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v48
-; VI-NEXT: v_add_f16_e32 v9, s22, v7
-; VI-NEXT: v_add_f16_e32 v45, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v18, v9, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_add_f16_e32 v9, s22, v8
+; VI-NEXT: v_add_f16_e32 v6, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v15, v9, v3
; VI-NEXT: s_lshr_b32 s7, s24, 16
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v45
-; VI-NEXT: v_add_f16_e32 v9, s25, v7
-; VI-NEXT: v_or_b32_e32 v16, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s7, v7
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v6
+; VI-NEXT: v_add_f16_e32 v9, s25, v8
+; VI-NEXT: v_or_b32_e32 v13, v9, v3
+; VI-NEXT: v_add_f16_e32 v3, s7, v8
; VI-NEXT: s_lshr_b32 s6, s27, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_f16_e32 v9, s24, v7
-; VI-NEXT: v_add_f16_e32 v47, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v9, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_add_f16_e32 v9, s24, v8
; VI-NEXT: s_lshr_b32 s7, s26, 16
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v47
-; VI-NEXT: v_add_f16_e32 v9, s27, v7
-; VI-NEXT: v_or_b32_e32 v13, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s7, v7
+; VI-NEXT: v_add_f16_e32 v7, s6, v8
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v12, v9, v3
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v7
+; VI-NEXT: v_add_f16_e32 v10, s27, v8
+; VI-NEXT: v_add_f16_e32 v3, s7, v8
; VI-NEXT: s_lshr_b32 s6, s29, 16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_f16_e32 v54, s26, v7
-; VI-NEXT: v_add_f16_e32 v57, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v12, v54, v8
+; VI-NEXT: v_or_b32_e32 v18, v10, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; VI-NEXT: v_add_f16_e32 v53, s26, v8
; VI-NEXT: s_lshr_b32 s7, s28, 16
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v57
-; VI-NEXT: v_add_f16_e32 v9, s29, v7
-; VI-NEXT: v_or_b32_e32 v10, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s7, v7
+; VI-NEXT: v_add_f16_e32 v56, s6, v8
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v17, v53, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v56
+; VI-NEXT: v_add_f16_e32 v48, s29, v8
+; VI-NEXT: v_add_f16_e32 v3, s7, v8
; VI-NEXT: s_lshr_b32 s6, s5, 16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_add_f16_e32 v9, s28, v7
+; VI-NEXT: v_or_b32_e32 v11, v48, v9
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v3
+; VI-NEXT: v_add_f16_e32 v59, s28, v8
; VI-NEXT: s_lshr_b32 s7, s4, 16
-; VI-NEXT: v_add_f16_e32 v59, s6, v7
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_add_f16_e32 v3, s6, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v10, v59, v9
+; VI-NEXT: v_add_f16_e32 v9, s5, v8
+; VI-NEXT: v_add_f16_e32 v0, s7, v8
+; VI-NEXT: v_add_f16_e32 v39, s4, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v3
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v9, v9, v8
-; VI-NEXT: v_add_f16_e32 v8, s5, v7
-; VI-NEXT: v_add_f16_e32 v14, s7, v7
-; VI-NEXT: v_add_f16_e32 v17, s4, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v59
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v8, v8, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v14
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v7, v17, v7
-; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v8
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v7
-; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v10
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v9
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v13
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v12
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v16
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16]
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v19
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v10, 8, v18
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[18:19]
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v35
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v34
-; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[34:35]
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v1
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v0
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v8, v39, v8
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v9
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v8
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v11
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v10
+; VI-NEXT: v_lshrrev_b64 v[49:50], 24, v[10:11]
+; VI-NEXT: v_lshrrev_b64 v[10:11], 24, v[17:18]
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v2
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v1
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[24:25]
-; VI-NEXT: v_bfe_u32 v25, v52, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v37, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v41, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v3
-; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[3:4]
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v51, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
-; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[30:31]
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v61, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[20:21]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5
-; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v50, 8, 8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v21
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v32
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[32:33]
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v29
-; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[28:29]
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v27
-; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[26:27]
-; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v25, v53, 8, 8
-; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v27, v36, 8, 8
-; VI-NEXT: v_mov_b32_e32 v36, v53
-; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[12:13]
-; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[22:23]
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v28
-; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v26
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: v_mov_b32_e32 v23, v11
-; VI-NEXT: v_bfe_u32 v11, v59, 8, 8
-; VI-NEXT: v_bfe_u32 v26, v57, 8, 8
-; VI-NEXT: v_bfe_u32 v28, v47, 8, 8
-; VI-NEXT: v_bfe_u32 v9, v45, 8, 8
-; VI-NEXT: v_bfe_u32 v12, v49, 8, 8
-; VI-NEXT: v_bfe_u32 v15, v39, 8, 8
-; VI-NEXT: v_bfe_u32 v22, v60, 8, 8
-; VI-NEXT: v_bfe_u32 v30, v42, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v5
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[4:5]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v18
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v12
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v16
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v15
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v34
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v33
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v20
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v19
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[8:9]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v26
+; VI-NEXT: v_lshrrev_b64 v[0:1], 24, v[25:26]
+; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[35:36]
+; VI-NEXT: v_bfe_u32 v26, v41, 8, 8
+; VI-NEXT: v_bfe_u32 v5, v44, 8, 8
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v26, v58, 8, 8
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[16:17], 24, v[15:16]
+; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v5, v60, 8, 8
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v26, v42, 8, 8
+; VI-NEXT: v_lshrrev_b64 v[8:9], 24, v[12:13]
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[33:34]
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
+; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[23:24]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 8, v36
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v15, v6, 8, 8
+; VI-NEXT: v_mov_b32_e32 v6, v54
+; VI-NEXT: v_bfe_u32 v21, v54, 8, 8
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v5, v57, 8, 8
+; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[19:20]
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v22
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v32
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v31
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[31:32]
+; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v24
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v24, v3, 8, 8
+; VI-NEXT: v_mov_b32_e32 v3, v7
+; VI-NEXT: v_mov_b32_e32 v32, v14
+; VI-NEXT: v_bfe_u32 v2, v14, 8, 8
+; VI-NEXT: v_mov_b32_e32 v14, v38
+; VI-NEXT: v_mov_b32_e32 v28, v37
+; VI-NEXT: v_bfe_u32 v22, v37, 8, 8
+; VI-NEXT: v_mov_b32_e32 v31, v61
+; VI-NEXT: v_bfe_u32 v27, v61, 8, 8
+; VI-NEXT: v_mov_b32_e32 v61, v13
+; VI-NEXT: v_mov_b32_e32 v13, v51
+; VI-NEXT: v_mov_b32_e32 v7, v9
+; VI-NEXT: v_mov_b32_e32 v9, v40
+; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v25
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v35
+; VI-NEXT: v_bfe_u32 v25, v56, 8, 8
+; VI-NEXT: v_bfe_u32 v35, v3, 8, 8
+; VI-NEXT: s_waitcnt vmcnt(7)
+; VI-NEXT: v_bfe_u32 v12, v54, 8, 8
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_bfe_u32 v26, v38, 8, 8
; VI-NEXT: s_branch .LBB95_5
; VI-NEXT: .LBB95_3:
; VI-NEXT: ; implicit-def: $sgpr46
@@ -183583,278 +182859,287 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: s_branch .LBB95_2
; VI-NEXT: .LBB95_4:
-; VI-NEXT: v_mov_b32_e32 v1, s44
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s43
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s40
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s41
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s13
-; VI-NEXT: v_mov_b32_e32 v2, s46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s10
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s11
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s9
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s6, v62, 0
+; VI-NEXT: v_mov_b32_e32 v9, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 1
+; VI-NEXT: v_mov_b32_e32 v31, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 2
+; VI-NEXT: v_mov_b32_e32 v13, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 3
+; VI-NEXT: v_mov_b32_e32 v28, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 4
+; VI-NEXT: v_mov_b32_e32 v14, s6
+; VI-NEXT: v_readlane_b32 s6, v62, 5
+; VI-NEXT: v_mov_b32_e32 v6, s6
+; VI-NEXT: v_mov_b32_e32 v5, s46
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, s78
+; VI-NEXT: v_mov_b32_e32 v4, s90
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s16
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s18
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s27
-; VI-NEXT: v_readlane_b32 s6, v62, 0
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s70
-; VI-NEXT: v_mov_b32_e32 v23, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 1
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s69
-; VI-NEXT: v_mov_b32_e32 v42, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 2
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s67
-; VI-NEXT: v_mov_b32_e32 v55, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 3
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s66
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s65
-; VI-NEXT: v_mov_b32_e32 v60, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s55
-; VI-NEXT: v_mov_b32_e32 v38, s6
-; VI-NEXT: v_readlane_b32 s6, v62, 5
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s87
-; VI-NEXT: v_mov_b32_e32 v39, s6
; VI-NEXT: v_readlane_b32 s6, v62, 6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s85
-; VI-NEXT: v_mov_b32_e32 v48, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_readlane_b32 s6, v62, 7
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s53
-; VI-NEXT: v_mov_b32_e32 v49, s6
+; VI-NEXT: v_mov_b32_e32 v32, s6
; VI-NEXT: v_readlane_b32 s6, v62, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_readlane_b32 s6, v62, 9
-; VI-NEXT: v_mov_b32_e32 v45, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_readlane_b32 s6, v62, 10
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_readlane_b32 s6, v62, 11
-; VI-NEXT: v_mov_b32_e32 v47, s6
+; VI-NEXT: v_mov_b32_e32 v3, s6
; VI-NEXT: v_readlane_b32 s6, v62, 12
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
; VI-NEXT: v_readlane_b32 s6, v62, 13
-; VI-NEXT: v_mov_b32_e32 v57, s6
+; VI-NEXT: v_mov_b32_e32 v56, s6
; VI-NEXT: v_readlane_b32 s6, v62, 14
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_readlane_b32 s6, v62, 15
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s6
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 16
-; VI-NEXT: v_mov_b32_e32 v11, s4
+; VI-NEXT: v_mov_b32_e32 v24, s4
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, s88
; VI-NEXT: v_readlane_b32 s4, v62, 17
-; VI-NEXT: v_mov_b32_e32 v26, s4
+; VI-NEXT: v_mov_b32_e32 v25, s4
; VI-NEXT: v_readlane_b32 s4, v62, 18
-; VI-NEXT: v_mov_b32_e32 v28, s4
+; VI-NEXT: v_mov_b32_e32 v35, s4
; VI-NEXT: v_readlane_b32 s4, v62, 19
-; VI-NEXT: v_mov_b32_e32 v9, s4
+; VI-NEXT: v_mov_b32_e32 v15, s4
; VI-NEXT: v_readlane_b32 s4, v62, 20
-; VI-NEXT: v_mov_b32_e32 v12, s4
+; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_readlane_b32 s4, v62, 21
-; VI-NEXT: v_mov_b32_e32 v15, s4
+; VI-NEXT: v_mov_b32_e32 v21, s4
; VI-NEXT: v_readlane_b32 s4, v62, 22
; VI-NEXT: v_mov_b32_e32 v22, s4
; VI-NEXT: v_readlane_b32 s4, v62, 23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s5
-; VI-NEXT: v_mov_b32_e32 v30, s4
+; VI-NEXT: v_mov_b32_e32 v27, s4
; VI-NEXT: v_readlane_b32 s4, v62, 24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s80
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s81
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s82
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s83
; VI-NEXT: v_readlane_b32 s4, v62, 26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 31
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 32
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 33
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 34
-; VI-NEXT: v_mov_b32_e32 v10, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 35
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 36
-; VI-NEXT: v_mov_b32_e32 v44, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, s83
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s30
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 37
-; VI-NEXT: v_mov_b32_e32 v43, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 38
-; VI-NEXT: v_mov_b32_e32 v46, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 39
-; VI-NEXT: v_mov_b32_e32 v40, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 40
-; VI-NEXT: v_mov_b32_e32 v58, s4
+; VI-NEXT: v_mov_b32_e32 v33, s4
; VI-NEXT: v_readlane_b32 s4, v62, 41
-; VI-NEXT: v_mov_b32_e32 v56, s4
+; VI-NEXT: v_mov_b32_e32 v34, s4
; VI-NEXT: v_readlane_b32 s4, v62, 42
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 43
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 44
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 45
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 46
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 47
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 48
-; VI-NEXT: v_mov_b32_e32 v31, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 49
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 50
-; VI-NEXT: v_mov_b32_e32 v33, s4
+; VI-NEXT: v_mov_b32_e32 v61, s4
; VI-NEXT: v_readlane_b32 s4, v62, 51
-; VI-NEXT: v_mov_b32_e32 v32, s4
+; VI-NEXT: v_mov_b32_e32 v7, s4
; VI-NEXT: v_readlane_b32 s4, v62, 52
-; VI-NEXT: v_mov_b32_e32 v6, s4
-; VI-NEXT: v_readlane_b32 s4, v62, 53
; VI-NEXT: v_mov_b32_e32 v29, s4
+; VI-NEXT: v_readlane_b32 s4, v62, 53
+; VI-NEXT: v_mov_b32_e32 v39, s4
; VI-NEXT: v_readlane_b32 s4, v62, 54
-; VI-NEXT: v_mov_b32_e32 v35, s4
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_readlane_b32 s4, v62, 55
-; VI-NEXT: v_mov_b32_e32 v34, s4
+; VI-NEXT: v_mov_b32_e32 v30, s4
; VI-NEXT: v_readlane_b32 s4, v62, 56
-; VI-NEXT: v_mov_b32_e32 v2, s78
-; VI-NEXT: v_readlane_b32 s6, v62, 15
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, s4
+; VI-NEXT: v_mov_b32_e32 v20, s4
; VI-NEXT: v_readlane_b32 s4, v62, 57
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v54, s26
-; VI-NEXT: v_mov_b32_e32 v53, s71
-; VI-NEXT: v_mov_b32_e32 v36, s68
-; VI-NEXT: v_mov_b32_e32 v50, s66
-; VI-NEXT: v_mov_b32_e32 v61, s64
-; VI-NEXT: v_mov_b32_e32 v51, s54
-; VI-NEXT: v_mov_b32_e32 v41, s86
-; VI-NEXT: v_mov_b32_e32 v37, s84
-; VI-NEXT: v_mov_b32_e32 v52, s52
-; VI-NEXT: v_mov_b32_e32 v59, s6
-; VI-NEXT: v_mov_b32_e32 v25, s50
-; VI-NEXT: v_mov_b32_e32 v27, s51
-; VI-NEXT: v_mov_b32_e32 v21, s4
-; VI-NEXT: v_mov_b32_e32 v7, s56
-; VI-NEXT: v_mov_b32_e32 v13, s58
-; VI-NEXT: v_mov_b32_e32 v16, s60
-; VI-NEXT: v_mov_b32_e32 v17, s62
-; VI-NEXT: v_mov_b32_e32 v18, s72
-; VI-NEXT: v_mov_b32_e32 v19, s74
-; VI-NEXT: v_mov_b32_e32 v20, s76
-; VI-NEXT: v_mov_b32_e32 v2, s88
-; VI-NEXT: v_mov_b32_e32 v3, s90
-; VI-NEXT: v_mov_b32_e32 v4, s30
-; VI-NEXT: v_mov_b32_e32 v5, s34
-; VI-NEXT: v_mov_b32_e32 v8, s36
-; VI-NEXT: v_mov_b32_e32 v24, s38
-; VI-NEXT: v_mov_b32_e32 v14, s48
+; VI-NEXT: v_mov_b32_e32 v0, s44
+; VI-NEXT: v_mov_b32_e32 v57, s45
+; VI-NEXT: v_mov_b32_e32 v40, s42
+; VI-NEXT: v_mov_b32_e32 v51, s40
+; VI-NEXT: v_mov_b32_e32 v52, s17
+; VI-NEXT: v_mov_b32_e32 v53, s26
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s34
+; VI-NEXT: v_mov_b32_e32 v37, s71
+; VI-NEXT: v_mov_b32_e32 v54, s70
+; VI-NEXT: v_mov_b32_e32 v36, s69
+; VI-NEXT: v_mov_b32_e32 v38, s68
+; VI-NEXT: v_mov_b32_e32 v42, s64
+; VI-NEXT: v_mov_b32_e32 v43, s55
+; VI-NEXT: v_mov_b32_e32 v58, s54
+; VI-NEXT: v_mov_b32_e32 v47, s87
+; VI-NEXT: v_mov_b32_e32 v60, s86
+; VI-NEXT: v_mov_b32_e32 v45, s85
+; VI-NEXT: v_mov_b32_e32 v41, s84
+; VI-NEXT: v_mov_b32_e32 v55, s53
+; VI-NEXT: v_mov_b32_e32 v44, s52
+; VI-NEXT: v_mov_b32_e32 v59, s28
+; VI-NEXT: v_mov_b32_e32 v48, s29
+; VI-NEXT: v_mov_b32_e32 v26, s50
+; VI-NEXT: v_mov_b32_e32 v12, s51
+; VI-NEXT: v_mov_b32_e32 v23, s4
+; VI-NEXT: v_mov_b32_e32 v49, s56
+; VI-NEXT: v_mov_b32_e32 v10, s58
+; VI-NEXT: v_mov_b32_e32 v8, s60
+; VI-NEXT: v_mov_b32_e32 v16, s62
+; VI-NEXT: v_mov_b32_e32 v17, s72
+; VI-NEXT: v_mov_b32_e32 v18, s74
+; VI-NEXT: v_mov_b32_e32 v19, s76
+; VI-NEXT: v_mov_b32_e32 v11, s38
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s36
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v4, s48
; VI-NEXT: .LBB95_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v20, v23, v20, s4
-; VI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_perm_b32 v30, v42, v30, s4
-; VI-NEXT: v_lshlrev_b32_e32 v30, 16, v30
-; VI-NEXT: v_perm_b32 v19, v55, v19, s4
+; VI-NEXT: v_perm_b32 v19, v9, v19, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v11, v36, v11, s4
+; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v13, v18, s4
; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_perm_b32 v18, v38, v18, s4
+; VI-NEXT: v_perm_b32 v27, v31, v27, s4
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v27
+; VI-NEXT: v_perm_b32 v17, v14, v17, s4
+; VI-NEXT: v_perm_b32 v14, v37, v4, s4
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_perm_b32 v15, v39, v15, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_perm_b32 v12, v49, v12, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_perm_b32 v9, v45, v9, s4
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; VI-NEXT: v_perm_b32 v2, v32, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v3, v3, v35, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v1, v40, v1, s4
; VI-NEXT: v_readlane_b32 s30, v63, 30
; VI-NEXT: v_readlane_b32 s31, v63, 31
; VI-NEXT: v_readlane_b32 s87, v63, 29
@@ -183887,301 +183172,269 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: v_readlane_b32 s36, v63, 2
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v16, v9, v16, s4
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v36, v36, v33, s4
+; VI-NEXT: v_or_b32_e32 v19, v36, v19
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v58, v23, v58, s4
-; VI-NEXT: v_or_b32_e32 v20, v58, v20
-; VI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v20, v56, s4
-; VI-NEXT: v_or_b32_e32 v20, v20, v30
-; VI-NEXT: v_add_u32_e32 v30, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v20, v30, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v13, v9, v8, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v20, v20, v46, s4
-; VI-NEXT: v_or_b32_e32 v19, v20, v19
-; VI-NEXT: v_add_u32_e32 v20, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v20, v60, v22, s4
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; VI-NEXT: v_perm_b32 v10, v8, v10, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v19, v40, s4
-; VI-NEXT: v_or_b32_e32 v19, v19, v20
-; VI-NEXT: v_add_u32_e32 v20, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v9, v8, v49, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v19, v46, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v19, v52, v34, s4
+; VI-NEXT: v_or_b32_e32 v19, v19, v27
+; VI-NEXT: buffer_store_dword v19, v46, s[0:3], 0 offen offset:4
+; VI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(5)
+; VI-NEXT: v_perm_b32 v8, v8, v49, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v19, v19, v44, s4
+; VI-NEXT: v_perm_b32 v19, v19, v4, s4
; VI-NEXT: v_or_b32_e32 v18, v19, v18
-; VI-NEXT: v_add_u32_e32 v19, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v18, v19, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v18, v18, v43, s4
-; VI-NEXT: v_or_b32_e32 v15, v18, v15
-; VI-NEXT: v_add_u32_e32 v18, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v15, v18, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v15, v48, v17, s4
-; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v17, v17, v10, s4
-; VI-NEXT: v_or_b32_e32 v15, v17, v15
-; VI-NEXT: v_add_u32_e32 v17, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v18, v46, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v19, v28, v22, s4
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v10, s4
-; VI-NEXT: v_or_b32_e32 v12, v15, v12
-; VI-NEXT: v_add_u32_e32 v15, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v12, v15, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v18, v4, s4
+; VI-NEXT: v_or_b32_e32 v18, v18, v19
+; VI-NEXT: buffer_store_dword v18, v46, s[0:3], 0 offen offset:12
+; VI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v10, v16, s4
-; VI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v18, v18, v4, s4
+; VI-NEXT: v_or_b32_e32 v17, v18, v17
+; VI-NEXT: buffer_store_dword v17, v46, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v18, v6, v21, s4
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v15, v15, v10, s4
-; VI-NEXT: v_or_b32_e32 v12, v15, v12
-; VI-NEXT: v_add_u32_e32 v15, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v12, v15, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v12, v10, s4
-; VI-NEXT: v_or_b32_e32 v9, v12, v9
-; VI-NEXT: v_add_u32_e32 v12, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v9, v9, v13, s4
+; VI-NEXT: v_perm_b32 v17, v17, v4, s4
+; VI-NEXT: v_or_b32_e32 v17, v17, v18
+; VI-NEXT: buffer_store_dword v17, v46, s[0:3], 0 offen offset:20
+; VI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v12, v54, v10, s4
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_or_b32_e32 v9, v12, v9
-; VI-NEXT: v_add_u32_e32 v12, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v12, v47, v28, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; VI-NEXT: v_perm_b32 v17, v17, v4, s4
+; VI-NEXT: v_or_b32_e32 v16, v17, v16
+; VI-NEXT: buffer_store_dword v16, v46, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v10, s4
-; VI-NEXT: v_or_b32_e32 v9, v9, v12
-; VI-NEXT: v_add_u32_e32 v12, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v16, v16, v4, s4
+; VI-NEXT: v_or_b32_e32 v2, v16, v2
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:28
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v7, s4
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_perm_b32 v2, v2, v4, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v13
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v10, v7, v10, s4
-; VI-NEXT: v_or_b32_e32 v9, v10, v9
-; VI-NEXT: v_add_u32_e32 v10, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v10, v57, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_perm_b32 v2, v2, v4, s4
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v7, v9, s4
-; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v7, v7, v9, s4
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_perm_b32 v13, v4, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; VI-NEXT: v_or_b32_e32 v2, v2, v13
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:36
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v9, v9, v10, s4
-; VI-NEXT: v_or_b32_e32 v7, v9, v7
-; VI-NEXT: v_add_u32_e32 v9, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v53, v2, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v10
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v7, v7, v9, s4
-; VI-NEXT: v_perm_b32 v9, v59, v11, s4
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v7, v53, v14, s4
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_perm_b32 v2, v2, v4, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:44
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v9
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v9, v1, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v21, s4
+; VI-NEXT: v_perm_b32 v2, v59, v2, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v56, v25, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v7, v7, v27, s4
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; VI-NEXT: v_or_b32_e32 v1, v1, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v24, s4
+; VI-NEXT: v_perm_b32 v2, v48, v2, s4
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:52
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v7, v7, v35, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v7, v1
-; VI-NEXT: v_add_u32_e32 v7, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v7, v36, v25, s4
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v8
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v34, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v6, s4
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v3, v3, v24, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:60
+; VI-NEXT: v_perm_b32 v2, v0, v20, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v14
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: v_perm_b32 v3, v54, v12, s4
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:64
+; VI-NEXT: v_perm_b32 v2, v57, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_or_b32_e32 v2, v2, v3
+; VI-NEXT: buffer_store_dword v2, v46, s[0:3], 0 offen offset:68
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v38, v26, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v6, v6, v8, s4
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_or_b32_e32 v1, v1, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_perm_b32 v1, v0, v30, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v51, v29, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v6, v50, v6, s4
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_or_b32_e32 v1, v1, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v0, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v33, s4
+; VI-NEXT: v_perm_b32 v1, v1, v39, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v6, v5, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v1, v1, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v5, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v5, v61, v5, s4
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v1, v1, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v1, v1, v61, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v5, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v1, v1, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v7, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v42, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v4, v51, v4, s4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; VI-NEXT: v_or_b32_e32 v1, v1, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v43, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v4, s4
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v4, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v58, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v47, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v3, v41, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v3, s4
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v60, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v45, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v37, v2, s4
+; VI-NEXT: v_perm_b32 v2, v41, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:116
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v55, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v52, v2, s4
+; VI-NEXT: v_perm_b32 v2, v44, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v46, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -184197,8 +183450,8 @@ define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT: s_or_saveexec_b64 s[4:5], -1
-; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b64 exec, s[4:5]
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
@@ -197220,45 +196473,45 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; SI-NEXT: buffer_load_dword v39, off, s[0:3], s32
-; SI-NEXT: s_waitcnt expcnt(3)
-; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:4
-; SI-NEXT: v_lshrrev_b32_e32 v38, 16, v17
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v38
-; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: buffer_load_dword v38, off, s[0:3], s32
+; SI-NEXT: s_waitcnt expcnt(5)
+; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:4
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v17
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v39
+; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v23
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v25
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v27
; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:540 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v2
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v29
; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:544 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
@@ -197267,8 +196520,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v35, 16, v35
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:552 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT: s_waitcnt expcnt(0)
@@ -197277,8 +196530,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v34, 16, v34
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:568 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
@@ -197286,116 +196539,116 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v33, 16, v33
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v10
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v10
; SI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v32
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v57, 16, v12
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v58
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v59
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v14
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:524 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v57
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v16
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:528 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v56
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v18
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:536 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v47
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v45, 16, v20
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:548 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v46
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v22
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:556 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v45
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v24
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:560 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v44
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v26
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:564 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v43
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v41, 16, v28
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:576 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v42
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v40, 16, v30
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:580 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v41
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:584 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v32, 16, v40
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: s_waitcnt vmcnt(14)
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v39
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v38
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:572 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v60
+; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v58
; SI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:592 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:588 ; 4-byte Folded Spill
@@ -197414,113 +196667,113 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v21
; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v19
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v15
-; SI-NEXT: v_lshrrev_b32_e32 v51, 16, v9
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v50, 16, v11
; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v54, 16, v3
; SI-NEXT: v_lshrrev_b32_e32 v55, 16, v1
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v55
; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v54
; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v52
-; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v51
-; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v48
+; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v50
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v49
+; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT: ; kill: killed $vgpr31
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v53, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v52, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v51, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v50, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:532 ; 4-byte Folded Spill
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr34
@@ -197531,99 +196784,99 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr56
; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; kill: killed $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; kill: killed $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; kill: killed $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; kill: killed $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB98_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; kill: killed $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; kill: killed $vgpr48
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v41, v1, v31
+; SI-NEXT: v_or_b32_e32 v55, v1, v31
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
@@ -197636,12 +196889,12 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v4
; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v44, v1, v2
+; SI-NEXT: v_or_b32_e32 v42, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v52, v1, v2
+; SI-NEXT: v_or_b32_e32 v50, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
; SI-NEXT: ; implicit-def: $vgpr6
@@ -197691,12 +196944,12 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v59, v1, v2
+; SI-NEXT: v_or_b32_e32 v60, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v58, v1, v2
+; SI-NEXT: v_or_b32_e32 v59, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v17
; SI-NEXT: ; implicit-def: $vgpr17
@@ -197721,103 +196974,103 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v21
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_or_b32_e32 v42, v1, v2
+; SI-NEXT: v_or_b32_e32 v43, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v22
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v43, v1, v2
+; SI-NEXT: v_or_b32_e32 v44, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v55, v1, v2
+; SI-NEXT: v_or_b32_e32 v40, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v24
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v40, v1, v2
+; SI-NEXT: v_or_b32_e32 v41, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v25
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v53, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:580 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v26
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v54, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v27
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v50, v1, v2
+; SI-NEXT: v_or_b32_e32 v51, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v28
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v51, v1, v2
+; SI-NEXT: v_or_b32_e32 v52, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v29
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v3, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v30
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: s_waitcnt vmcnt(1)
-; SI-NEXT: v_or_b32_e32 v48, v1, v2
+; SI-NEXT: v_or_b32_e32 v49, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v39
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v38
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v2, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v60
-; SI-NEXT: v_or_b32_e32 v38, v1, v4
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v58
+; SI-NEXT: v_or_b32_e32 v39, v1, v4
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v63, v31, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -197826,24 +197079,24 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v63, v31, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 24
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 8
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v56, v57, 24
@@ -197856,7 +197109,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
@@ -197864,85 +197117,85 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 16
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 16
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 16
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v48, v3, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v49, v3, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v48, v3, 16
+; SI-NEXT: v_alignbit_b32 v1, v49, v3, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v48, v3, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v49, v3, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v38, v2, 24
+; SI-NEXT: v_alignbit_b32 v1, v39, v2, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v38, v2, 16
+; SI-NEXT: v_alignbit_b32 v1, v39, v2, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v38, v2, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v2, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v42
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v37
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v63
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v61
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v59
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v56
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
@@ -197950,29 +197203,29 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v45
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v40
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v51
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v52
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v48
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr3
; SI-NEXT: ; implicit-def: $vgpr4
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
@@ -197980,42 +197233,42 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
@@ -198027,30 +197280,30 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_bfe_u32 v1, v1, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: .LBB98_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -198058,7 +197311,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; %bb.3: ; %cmp.true
; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:572 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:588 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v39
+; SI-NEXT: v_add_i32_e32 v31, vcc, 3, v38
; SI-NEXT: v_and_b32_e32 v31, 0xffff, v31
; SI-NEXT: v_add_i32_e32 v29, vcc, 3, v29
; SI-NEXT: v_and_b32_e32 v29, 0xffff, v29
@@ -198096,30 +197349,30 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_or_b32_e32 v31, v32, v31
-; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v60
+; SI-NEXT: v_add_i32_e32 v32, vcc, 3, v58
; SI-NEXT: v_and_b32_e32 v32, 0xffff, v32
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v32, v33, v32
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:568 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v39, vcc, 0x30000, v31
-; SI-NEXT: v_add_i32_e32 v38, vcc, s6, v32
+; SI-NEXT: v_add_i32_e32 v38, vcc, 0x30000, v31
+; SI-NEXT: v_add_i32_e32 v39, vcc, s6, v32
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v29, v33, v29
; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:592 ; 4-byte Folded Reload
; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v29
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v30, v33, v30
-; SI-NEXT: v_add_i32_e32 v48, vcc, s6, v30
+; SI-NEXT: v_add_i32_e32 v49, vcc, s6, v30
; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:552 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v27, v30, v27
-; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v27
+; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v27
; SI-NEXT: v_add_i32_e32 v27, vcc, 3, v28
; SI-NEXT: buffer_load_dword v28, off, s[0:3], s32 offset:584 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v27, v28, v27
-; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v27
+; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v27
; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:544 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v25, v27, v25
@@ -198133,23 +197386,23 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:540 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v23, v25, v23
-; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v23
+; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v23
; SI-NEXT: v_add_i32_e32 v23, vcc, 3, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:576 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v23, v24, v23
-; SI-NEXT: v_add_i32_e32 v40, vcc, s6, v23
+; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v23
; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:532 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v21, v23, v21
-; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v21
+; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v21
; SI-NEXT: v_add_i32_e32 v21, vcc, 3, v22
; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:564 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v21, v22, v21
-; SI-NEXT: v_add_i32_e32 v43, vcc, s6, v21
+; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v21
; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v19, v21, v19
@@ -198173,13 +197426,13 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v15, v17, v15
-; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v15
+; SI-NEXT: v_add_i32_e32 v60, vcc, s6, v15
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v16
; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:548 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v15, v16, v15
-; SI-NEXT: v_add_i32_e32 v58, vcc, s6, v15
+; SI-NEXT: v_add_i32_e32 v59, vcc, s6, v15
; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v13, v15, v13
@@ -198223,7 +197476,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v5, v7, v5
-; SI-NEXT: v_add_i32_e32 v52, vcc, s6, v5
+; SI-NEXT: v_add_i32_e32 v50, vcc, s6, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v6
; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
@@ -198239,61 +197492,61 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v3, v4, v3
-; SI-NEXT: v_add_i32_e32 v44, vcc, s6, v3
+; SI-NEXT: v_add_i32_e32 v42, vcc, s6, v3
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v1, v3, v1
-; SI-NEXT: v_add_i32_e32 v41, vcc, s6, v1
+; SI-NEXT: v_add_i32_e32 v55, vcc, s6, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_add_i32_e32 v36, vcc, s6, v1
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v36, v41, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v55, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 24
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 16
+; SI-NEXT: v_alignbit_b32 v1, v42, v47, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v44, v47, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v37, v52, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v37, v50, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v35, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v33, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v63, v31, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
@@ -198302,24 +197555,24 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v63, v31, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v61, v62, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 24
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v58, v59, 8
+; SI-NEXT: v_alignbit_b32 v1, v59, v60, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v56, v57, 24
@@ -198332,7 +197585,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
@@ -198340,61 +197593,61 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v1, v45, v46, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 16
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v43, v42, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v44, v43, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 16
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v40, v55, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v41, v40, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v54, v53, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 16
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v51, v50, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v52, v51, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v48, v29, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v49, v29, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v48, v29, 16
+; SI-NEXT: v_alignbit_b32 v1, v49, v29, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v29, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v48, v29, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v49, v29, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v38, v39, 24
+; SI-NEXT: v_alignbit_b32 v1, v39, v38, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v38, v39, 16
+; SI-NEXT: v_alignbit_b32 v1, v39, v38, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(1)
-; SI-NEXT: v_alignbit_b32 v1, v38, v39, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v38, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v36
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
@@ -198403,73 +197656,73 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v44
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v44
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v42
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v42
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v42
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v37
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v37
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v37
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v34
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v34
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v32
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v63
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v63
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v63
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v61
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v61
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v61
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v58
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v58
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v59
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v59
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v58
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v59
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v56
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
@@ -198486,69 +197739,69 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v45
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v43
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v44
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v43
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v44
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v43
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v40
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v41
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v40
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v41
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v41
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v54
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v54
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v51
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v52
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v51
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v52
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v51
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v52
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v48
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v49
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v48
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v49
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v48
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v49
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v39
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v38
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v39
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; SI-NEXT: .LBB98_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v41
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v55
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198558,7 +197811,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
@@ -198574,16 +197827,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v47
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198592,12 +197844,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v44
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v42
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198610,16 +197861,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v52
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198628,12 +197878,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198646,16 +197895,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198664,12 +197912,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198682,16 +197929,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198700,12 +197946,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198718,9 +197963,8 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
@@ -198736,12 +197980,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v63
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198754,16 +197997,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v62
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198772,12 +198014,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v61
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198790,16 +198031,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v59
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v60
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198808,12 +198048,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v59
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198826,8 +198065,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v57
@@ -198844,12 +198082,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v56
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198862,12 +198099,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v46
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198880,8 +198116,7 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
@@ -198898,12 +198133,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v42
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198916,11 +198150,10 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v44
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
@@ -198934,12 +198167,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v55
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198952,16 +198184,15 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v40
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v41
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -198970,12 +198201,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v53
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -198988,12 +198218,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -199006,12 +198235,11 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v50
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -199024,67 +198252,63 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v52
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v48
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v49
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(2)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
@@ -199100,26 +198324,24 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v38
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
-; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -199159,58 +198381,59 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:4
-; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v13
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:4
+; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32
; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v11
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v9
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v7
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v28
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v3
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v22
; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v30
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v29
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v26
-; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v8
+; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v28
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v27
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v25
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v22
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v21
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v18
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v3
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v29
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v27
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v26
+; VI-NEXT: v_lshrrev_b32_e32 v62, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v23
+; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v20
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v17
+; VI-NEXT: ; implicit-def: $vgpr43
+; VI-NEXT: ; implicit-def: $vgpr56
+; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: s_waitcnt vmcnt(7)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v31
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v19
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: s_waitcnt vmcnt(13)
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v36
-; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v37
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v17
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v54
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: s_waitcnt vmcnt(6)
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v53
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; kill: killed $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
@@ -199293,19 +198516,14 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr48
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr32
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
@@ -199314,7 +198532,6 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
@@ -199323,7 +198540,6 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
@@ -199364,236 +198580,257 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; kill: killed $vgpr31
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; kill: killed $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr41
; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr60
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_2
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v16
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v14
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v14
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v13
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v12
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v12
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v11
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v10
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v9
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v8
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v8
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v6
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v5
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v31, v7
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v10
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v11
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v12
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v13
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v14
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v15
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v16
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v9, v8
; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, v5
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v7, v6
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 24, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v5, v3
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v5, v4
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, v1
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v37
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v3, v2
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v53
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[36:37]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v53
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v1, v54
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[53:54]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v24
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 24, v22
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v19
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v20
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[2:3], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v17
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, v18
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v5, v4
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v45
-; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v24
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v22
-; VI-NEXT: v_lshrrev_b32_e32 v49, 24, v20
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v18
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v17
-; VI-NEXT: v_mov_b32_e32 v45, v1
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v30
+; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v20
+; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v17
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr5
@@ -199609,678 +198846,654 @@ define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr29
-; VI-NEXT: ; implicit-def: $vgpr37
+; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: .LBB98_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB98_4
; VI-NEXT: ; %bb.3: ; %cmp.true
-; VI-NEXT: v_mov_b32_e32 v31, 3
-; VI-NEXT: v_add_u16_sdwa v55, v18, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v32, 3, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v55
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v18, v32, v18
-; VI-NEXT: v_add_u16_e32 v32, 3, v17
-; VI-NEXT: v_add_u16_sdwa v17, v17, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_add_u16_sdwa v54, v20, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v17, v32, v17
-; VI-NEXT: v_add_u16_e32 v32, 3, v20
-; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v54
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v20, v32, v20
-; VI-NEXT: v_add_u16_e32 v32, 3, v19
-; VI-NEXT: v_add_u16_sdwa v19, v19, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
-; VI-NEXT: v_add_u16_sdwa v57, v22, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v19, v32, v19
-; VI-NEXT: v_add_u16_e32 v32, 3, v22
+; VI-NEXT: v_mov_b32_e32 v39, 3
+; VI-NEXT: v_add_u16_sdwa v46, v18, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v31, 3, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v46
+; VI-NEXT: v_add_u16_sdwa v50, v17, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v18, v31, v18
+; VI-NEXT: v_add_u16_e32 v31, 3, v17
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v50
+; VI-NEXT: v_add_u16_sdwa v59, v20, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v17, v31, v17
+; VI-NEXT: v_add_u16_e32 v31, 3, v20
+; VI-NEXT: v_lshlrev_b32_e32 v20, 16, v59
+; VI-NEXT: v_add_u16_sdwa v49, v19, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v20, v31, v20
+; VI-NEXT: v_add_u16_e32 v31, 3, v19
+; VI-NEXT: v_lshlrev_b32_e32 v19, 16, v49
+; VI-NEXT: v_add_u16_sdwa v57, v22, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v19, v31, v19
+; VI-NEXT: v_add_u16_e32 v31, 3, v22
; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v57
-; VI-NEXT: v_add_u16_sdwa v52, v21, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v22, v32, v22
-; VI-NEXT: v_add_u16_e32 v32, 3, v21
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v52
-; VI-NEXT: v_add_u16_sdwa v56, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v21, v32, v21
-; VI-NEXT: v_add_u16_e32 v32, 3, v24
-; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v56
-; VI-NEXT: v_add_u16_sdwa v50, v23, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v24, v32, v24
-; VI-NEXT: v_add_u16_e32 v32, 3, v23
-; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v50
-; VI-NEXT: v_add_u16_sdwa v49, v26, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v23, v32, v23
-; VI-NEXT: v_add_u16_e32 v32, 3, v26
-; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v49
-; VI-NEXT: v_add_u16_sdwa v59, v25, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v26, v32, v26
-; VI-NEXT: v_add_u16_e32 v32, 3, v25
-; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v59
-; VI-NEXT: v_add_u16_sdwa v38, v28, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v25, v32, v25
-; VI-NEXT: v_add_u16_e32 v32, 3, v28
-; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v38
-; VI-NEXT: v_add_u16_sdwa v35, v27, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v28, v32, v28
-; VI-NEXT: v_add_u16_e32 v32, 3, v27
-; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v35
-; VI-NEXT: v_add_u16_sdwa v48, v30, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v27, v32, v27
-; VI-NEXT: v_add_u16_e32 v32, 3, v30
-; VI-NEXT: v_add_u16_e32 v33, 3, v29
-; VI-NEXT: v_add_u16_sdwa v34, v29, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v48
-; VI-NEXT: v_or_b32_e32 v30, v32, v29
-; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v34
-; VI-NEXT: v_add_u16_sdwa v53, v37, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v29, v33, v29
-; VI-NEXT: v_add_u16_e32 v34, 3, v37
-; VI-NEXT: v_add_u16_sdwa v33, v36, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v53
-; VI-NEXT: v_add_u16_e32 v39, 3, v36
-; VI-NEXT: v_or_b32_e32 v37, v34, v32
-; VI-NEXT: v_lshlrev_b32_e32 v32, 16, v33
-; VI-NEXT: v_add_u16_sdwa v47, v2, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v36, v39, v32
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v22, v31, v22
+; VI-NEXT: v_add_u16_e32 v31, 3, v21
+; VI-NEXT: v_add_u16_sdwa v21, v21, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; VI-NEXT: v_add_u16_sdwa v61, v24, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v21, v31, v21
+; VI-NEXT: v_add_u16_e32 v31, 3, v24
+; VI-NEXT: v_lshlrev_b32_e32 v24, 16, v61
+; VI-NEXT: v_add_u16_sdwa v63, v23, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v24, v31, v24
+; VI-NEXT: v_add_u16_e32 v31, 3, v23
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v63
+; VI-NEXT: v_add_u16_sdwa v51, v26, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v23, v31, v23
+; VI-NEXT: v_add_u16_e32 v31, 3, v26
+; VI-NEXT: v_lshlrev_b32_e32 v26, 16, v51
+; VI-NEXT: v_add_u16_sdwa v62, v25, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v26, v31, v26
+; VI-NEXT: v_add_u16_e32 v31, 3, v25
+; VI-NEXT: v_lshlrev_b32_e32 v25, 16, v62
+; VI-NEXT: v_add_u16_sdwa v56, v28, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v25, v31, v25
+; VI-NEXT: v_add_u16_e32 v31, 3, v28
+; VI-NEXT: v_lshlrev_b32_e32 v28, 16, v56
+; VI-NEXT: v_add_u16_sdwa v48, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v28, v31, v28
+; VI-NEXT: v_add_u16_e32 v31, 3, v27
+; VI-NEXT: v_lshlrev_b32_e32 v27, 16, v48
+; VI-NEXT: v_add_u16_sdwa v60, v30, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v27, v31, v27
+; VI-NEXT: v_add_u16_e32 v31, 3, v30
+; VI-NEXT: v_add_u16_e32 v32, 3, v29
+; VI-NEXT: v_add_u16_sdwa v52, v29, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v60
+; VI-NEXT: v_or_b32_e32 v30, v31, v29
+; VI-NEXT: v_lshlrev_b32_e32 v29, 16, v52
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v29, v32, v29
+; VI-NEXT: v_add_u16_e32 v32, 3, v54
+; VI-NEXT: v_add_u16_sdwa v54, v54, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v33, v53, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v54
+; VI-NEXT: v_add_u16_e32 v34, 3, v53
+; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v32, v32, v31
+; VI-NEXT: v_lshlrev_b32_e32 v31, 16, v33
+; VI-NEXT: v_add_u16_sdwa v58, v2, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v31, v34, v31
; VI-NEXT: v_add_u16_e32 v33, 3, v2
; VI-NEXT: v_add_u16_e32 v34, 3, v1
-; VI-NEXT: v_add_u16_sdwa v32, v1, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v47
+; VI-NEXT: v_add_u16_sdwa v53, v1, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v58
+; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:360 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v2, v33, v1
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v32
-; VI-NEXT: v_add_u16_sdwa v46, v4, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v53
+; VI-NEXT: v_add_u16_sdwa v33, v4, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v1, v34, v1
-; VI-NEXT: v_add_u16_e32 v33, 3, v4
-; VI-NEXT: v_add_u16_e32 v34, 3, v3
-; VI-NEXT: v_add_u16_sdwa v32, v3, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v46
-; VI-NEXT: v_or_b32_e32 v4, v33, v3
-; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v32
-; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v3, v34, v3
-; VI-NEXT: v_add_u16_sdwa v34, v6, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
-; VI-NEXT: v_add_u16_e32 v33, 3, v6
-; VI-NEXT: v_add_u16_e32 v39, 3, v5
-; VI-NEXT: v_add_u16_sdwa v32, v5, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v34, 3, v4
+; VI-NEXT: v_add_u16_e32 v35, 3, v3
+; VI-NEXT: v_add_u16_sdwa v45, v3, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v33
+; VI-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v4, v34, v3
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v45
+; VI-NEXT: v_add_u16_sdwa v34, v6, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:372 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v3, v35, v3
+; VI-NEXT: v_add_u16_e32 v35, 3, v6
+; VI-NEXT: v_add_u16_e32 v36, 3, v5
+; VI-NEXT: v_add_u16_sdwa v47, v5, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v34
-; VI-NEXT: v_or_b32_e32 v6, v33, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v32
-; VI-NEXT: v_add_u16_sdwa v62, v8, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:380 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v5, v39, v5
-; VI-NEXT: v_add_u16_e32 v39, 3, v8
-; VI-NEXT: v_add_u16_e32 v33, 3, v7
-; VI-NEXT: v_add_u16_sdwa v32, v7, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v62
-; VI-NEXT: v_or_b32_e32 v8, v39, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v32
-; VI-NEXT: v_add_u16_sdwa v61, v10, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v7, v33, v7
-; VI-NEXT: v_add_u16_e32 v33, 3, v10
-; VI-NEXT: v_add_u16_e32 v39, 3, v9
-; VI-NEXT: v_add_u16_sdwa v32, v9, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v61
-; VI-NEXT: v_or_b32_e32 v10, v33, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v32
-; VI-NEXT: v_add_u16_sdwa v60, v12, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:292 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v9, v39, v9
-; VI-NEXT: v_add_u16_e32 v33, 3, v12
-; VI-NEXT: v_add_u16_e32 v39, 3, v11
-; VI-NEXT: v_add_u16_sdwa v32, v11, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v60
-; VI-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:364 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v12, v33, v11
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v32
-; VI-NEXT: v_add_u16_sdwa v33, v14, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:368 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v11, v39, v11
-; VI-NEXT: v_add_u16_e32 v39, 3, v14
-; VI-NEXT: v_add_u16_e32 v40, 3, v13
-; VI-NEXT: v_add_u16_sdwa v32, v13, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
-; VI-NEXT: v_add_u16_sdwa v63, v16, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v14, v39, v13
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v32
-; VI-NEXT: v_add_u16_sdwa v31, v15, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v35, off, s[0:3], s32 offset:376 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v6, v35, v5
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v47
+; VI-NEXT: v_add_u16_sdwa v35, v8, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:384 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v5, v36, v5
+; VI-NEXT: v_add_u16_e32 v37, 3, v8
+; VI-NEXT: v_add_u16_e32 v36, 3, v7
+; VI-NEXT: v_add_u16_sdwa v41, v7, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v35
+; VI-NEXT: v_or_b32_e32 v8, v37, v7
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v41
+; VI-NEXT: buffer_store_dword v36, off, s[0:3], s32 offset:304 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v7, v36, v7
+; VI-NEXT: v_add_u16_sdwa v36, v10, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:388 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v37, 3, v10
+; VI-NEXT: v_add_u16_e32 v38, 3, v9
+; VI-NEXT: v_add_u16_sdwa v40, v9, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v36
+; VI-NEXT: buffer_store_dword v37, off, s[0:3], s32 offset:352 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v10, v37, v9
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v40
+; VI-NEXT: v_add_u16_sdwa v37, v12, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:356 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v9, v38, v9
+; VI-NEXT: v_add_u16_e32 v55, 3, v12
+; VI-NEXT: v_add_u16_e32 v38, 3, v11
+; VI-NEXT: v_add_u16_sdwa v42, v11, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v37
+; VI-NEXT: v_or_b32_e32 v12, v55, v11
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v42
+; VI-NEXT: buffer_store_dword v38, off, s[0:3], s32 offset:392 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v11, v38, v11
+; VI-NEXT: v_add_u16_sdwa v38, v14, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:396 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v44, 3, v14
+; VI-NEXT: v_add_u16_e32 v55, 3, v13
+; VI-NEXT: v_add_u16_sdwa v42, v13, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v38
+; VI-NEXT: v_or_b32_e32 v14, v44, v13
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v42
+; VI-NEXT: buffer_store_dword v55, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v13, v55, v13
+; VI-NEXT: v_add_u16_sdwa v55, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v44, v15, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v16, 3, v16
-; VI-NEXT: v_add_u16_e32 v32, 3, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v63
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:412 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_e32 v43, 3, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v55
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: v_or_b32_e32 v16, v16, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v31
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v15, v32, v15
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v44
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v15, v43, v15
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v16
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v15
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[15:16]
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
-; VI-NEXT: v_or_b32_e32 v13, v40, v13
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v14
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v13
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11
; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[11:12]
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
; VI-NEXT: v_lshrrev_b64 v[9:10], 24, v[9:10]
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:300 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7
; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:312 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[5:6]
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; VI-NEXT: buffer_store_dword v32, off, s[0:3], s32 offset:408 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v31, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:424 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v3
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v2
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:436 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[41:42], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v37
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v36
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:420 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[36:37]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[1:2]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[31:32]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v30
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[29:30]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:444 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v27
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:448 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:452 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:456 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[25:26]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v23
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:464 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[23:24]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:488 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:468 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:496 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:512 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[21:22]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v20
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v63, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v33, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v60, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v62, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:516 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v19
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:520 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v55, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v38, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v37, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v36, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v35, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v1, v34, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[42:43], 24, v[21:22]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v46, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[43:44], 24, v[19:20]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:460 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v47, 8, 8
-; VI-NEXT: v_lshrrev_b64 v[44:45], 24, v[17:18]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:340 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v33, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v58, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:508 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v54, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:416 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v56, 8, 8
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:472 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v53, 8, 8
-; VI-NEXT: v_mov_b32_e32 v45, v38
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:432 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v48, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v48, 8, 8
+; VI-NEXT: v_bfe_u32 v1, v51, 8, 8
+; VI-NEXT: v_mov_b32_e32 v39, v41
+; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[19:20]
+; VI-NEXT: v_mov_b32_e32 v41, v45
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:476 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
+; VI-NEXT: v_mov_b32_e32 v61, v57
+; VI-NEXT: v_mov_b32_e32 v57, v59
+; VI-NEXT: v_bfe_u32 v45, v59, 8, 8
+; VI-NEXT: v_mov_b32_e32 v59, v46
+; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v17
+; VI-NEXT: v_bfe_u32 v60, v60, 8, 8
+; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:480 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v61, 8, 8
+; VI-NEXT: v_mov_b32_e32 v46, v53
+; VI-NEXT: v_bfe_u32 v56, v59, 8, 8
+; VI-NEXT: buffer_store_dword v54, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:264 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:296 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:308 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:316 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:500 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:484 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v45, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:492 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v49, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v49, 8, 8
-; VI-NEXT: buffer_store_dword v39, off, s[0:3], s32 offset:400 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:404 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[39:40], 24, v[23:24]
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:504 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v1, v57
-; VI-NEXT: v_mov_b32_e32 v57, v55
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v18
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v17
-; VI-NEXT: v_bfe_u32 v56, v56, 8, 8
-; VI-NEXT: v_mov_b32_e32 v51, v1
-; VI-NEXT: v_bfe_u32 v38, v1, 8, 8
-; VI-NEXT: v_mov_b32_e32 v55, v54
-; VI-NEXT: v_bfe_u32 v49, v54, 8, 8
-; VI-NEXT: v_bfe_u32 v48, v57, 8, 8
-; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:256 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:268 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:428 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Spill
; VI-NEXT: .LBB98_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v1, v1, v41, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: s_waitcnt vmcnt(14)
+; VI-NEXT: v_perm_b32 v1, v46, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
+; VI-NEXT: s_waitcnt vmcnt(12)
+; VI-NEXT: v_perm_b32 v2, v41, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(10)
+; VI-NEXT: v_perm_b32 v3, v47, v3, s4
+; VI-NEXT: s_waitcnt vmcnt(8)
+; VI-NEXT: v_perm_b32 v4, v39, v4, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v6, v6, v7, s4
+; VI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v11, v11, v12, s4
+; VI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; VI-NEXT: v_or_b32_e32 v1, v11, v1
+; VI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v5, v40, v5, s4
+; VI-NEXT: s_waitcnt vmcnt(3)
+; VI-NEXT: v_perm_b32 v10, v49, v31, s4
+; VI-NEXT: v_perm_b32 v7, v42, v7, s4
+; VI-NEXT: v_perm_b32 v8, v44, v8, s4
+; VI-NEXT: v_perm_b32 v9, v50, v9, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v11, s4
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:508 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v47, v2, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(2)
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
+; VI-NEXT: v_perm_b32 v11, v58, v11, s4
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; VI-NEXT: v_or_b32_e32 v1, v1, v11
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:372 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v11, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v46, v2, s4
+; VI-NEXT: v_perm_b32 v2, v33, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:384 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v3
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:376 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v34, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:388 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v62, v2, s4
+; VI-NEXT: v_perm_b32 v2, v35, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v5
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:280 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v61, v2, s4
+; VI-NEXT: v_perm_b32 v2, v36, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:368 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:264 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:392 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:364 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:396 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v60, v2, s4
+; VI-NEXT: v_perm_b32 v2, v37, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:424 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v33, v2, s4
+; VI-NEXT: v_perm_b32 v2, v38, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:436 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v3, v2, s4
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v1, v2, v1, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:440 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v2, v1, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:320 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v63, v2, s4
+; VI-NEXT: v_perm_b32 v2, v55, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:340 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v1, v44, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v58, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:308 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v57, v48, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:400 ; 4-byte Folded Reload
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v40, s4
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:328 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v1, v1, v43, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v32, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:312 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:500 ; 4-byte Folded Reload
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v55, v49, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:380 ; 4-byte Folded Reload
+; VI-NEXT: v_perm_b32 v2, v59, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v32, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:496 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:408 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:520 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v52, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:296 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:488 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:404 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:516 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v51, v38, s4
+; VI-NEXT: v_perm_b32 v2, v57, v45, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:324 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:412 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:512 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: v_perm_b32 v2, v50, v39, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:300 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v56, s4
+; VI-NEXT: v_perm_b32 v2, v61, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:332 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:468 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:256 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v59, v2, s4
+; VI-NEXT: v_perm_b32 v2, v63, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:304 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:464 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:460 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:504 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:480 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:352 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:268 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:456 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v35, v2, s4
+; VI-NEXT: v_perm_b32 v2, v62, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:316 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:452 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:492 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:476 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v45, v2, s4
+; VI-NEXT: v_perm_b32 v2, v51, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:360 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:272 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:448 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v2, v3, s4
+; VI-NEXT: v_perm_b32 v2, v48, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:336 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:260 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:444 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:484 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:472 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x74, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:356 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:420 ; 4-byte Folded Reload
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:284 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v2, v52, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:276 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:428 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v2, v2, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:292 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(0)
+; VI-NEXT: v_perm_b32 v1, v1, v2, s4
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 0x78, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:348 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:288 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:344 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v1, v2, s4
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:432 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:416 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v53, v2, s4
+; VI-NEXT: v_perm_b32 v2, v2, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
@@ -202158,15 +201371,15 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readfirstlane_b32 s55, v11
; SI-NEXT: s_lshr_b32 s10, s53, 16
; SI-NEXT: v_writelane_b32 v21, s9, 3
-; SI-NEXT: v_readfirstlane_b32 s65, v13
; SI-NEXT: s_lshr_b32 s11, s55, 16
; SI-NEXT: v_writelane_b32 v21, s10, 4
+; SI-NEXT: s_lshr_b32 s12, s24, 16
; SI-NEXT: v_readfirstlane_b32 s68, v18
; SI-NEXT: v_readfirstlane_b32 s69, v17
; SI-NEXT: v_readfirstlane_b32 s66, v16
; SI-NEXT: v_readfirstlane_b32 s67, v15
; SI-NEXT: v_readfirstlane_b32 s64, v14
-; SI-NEXT: s_lshr_b32 vcc_lo, s65, 16
+; SI-NEXT: v_readfirstlane_b32 s65, v13
; SI-NEXT: v_readfirstlane_b32 s54, v12
; SI-NEXT: v_readfirstlane_b32 s52, v10
; SI-NEXT: v_readfirstlane_b32 s50, v8
@@ -202176,10 +201389,9 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v21, s11, 5
; SI-NEXT: s_lshr_b32 s92, s29, 16
; SI-NEXT: s_lshr_b32 s99, s28, 16
-; SI-NEXT: s_lshr_b32 s94, s27, 16
+; SI-NEXT: s_lshr_b32 s93, s27, 16
; SI-NEXT: s_lshr_b32 s97, s26, 16
; SI-NEXT: s_lshr_b32 s95, s25, 16
-; SI-NEXT: s_lshr_b32 s87, s24, 16
; SI-NEXT: s_lshr_b32 s30, s23, 16
; SI-NEXT: s_lshr_b32 s85, s22, 16
; SI-NEXT: s_lshr_b32 s31, s21, 16
@@ -202193,17 +201405,18 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s77, s66, 16
; SI-NEXT: s_lshr_b32 vcc_hi, s67, 16
; SI-NEXT: s_lshr_b32 s78, s64, 16
+; SI-NEXT: s_lshr_b32 vcc_lo, s65, 16
; SI-NEXT: s_lshr_b32 s79, s54, 16
; SI-NEXT: s_lshr_b32 s88, s52, 16
; SI-NEXT: s_lshr_b32 s89, s50, 16
; SI-NEXT: s_lshr_b32 s90, s48, 16
; SI-NEXT: s_lshr_b32 s91, s38, 16
-; SI-NEXT: s_lshr_b32 s93, s36, 16
+; SI-NEXT: s_lshr_b32 s94, s36, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
-; SI-NEXT: v_writelane_b32 v21, vcc_lo, 6
+; SI-NEXT: v_writelane_b32 v21, s12, 6
; SI-NEXT: s_cmp_lg_u32 s4, 0
-; SI-NEXT: v_writelane_b32 v21, vcc_hi, 7
-; SI-NEXT: v_writelane_b32 v21, s70, 8
+; SI-NEXT: v_writelane_b32 v21, vcc_lo, 7
+; SI-NEXT: v_writelane_b32 v21, vcc_hi, 8
; SI-NEXT: ; implicit-def: $vgpr22 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB99_4
; SI-NEXT: ; %bb.1: ; %cmp.false
@@ -202215,16 +201428,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s73, s4, s5
; SI-NEXT: s_and_b32 s4, s18, 0xffff
; SI-NEXT: s_lshl_b32 s5, s81, 16
-; SI-NEXT: s_or_b32 s62, s4, s5
+; SI-NEXT: s_or_b32 s60, s4, s5
; SI-NEXT: s_and_b32 s4, s19, 0xffff
; SI-NEXT: s_lshl_b32 s5, s34, 16
-; SI-NEXT: s_or_b32 s63, s4, s5
+; SI-NEXT: s_or_b32 s61, s4, s5
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s58, s4, s5
+; SI-NEXT: s_or_b32 s56, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s31, 16
-; SI-NEXT: s_or_b32 s59, s4, s5
+; SI-NEXT: s_or_b32 s57, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, s85, 16
; SI-NEXT: s_or_b32 s46, s4, s5
@@ -202232,7 +201445,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s30, 16
; SI-NEXT: s_or_b32 s47, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s87, 16
+; SI-NEXT: s_lshl_b32 s5, s12, 16
; SI-NEXT: s_or_b32 s44, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s95, 16
@@ -202241,20 +201454,20 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s5, s97, 16
; SI-NEXT: s_or_b32 s74, s4, s5
; SI-NEXT: s_and_b32 s4, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_lshl_b32 s5, s93, 16
; SI-NEXT: s_or_b32 s75, s4, s5
; SI-NEXT: s_and_b32 s4, s28, 0xffff
; SI-NEXT: s_lshl_b32 s5, s99, 16
-; SI-NEXT: s_or_b32 s60, s4, s5
+; SI-NEXT: s_or_b32 s62, s4, s5
; SI-NEXT: s_and_b32 s4, s29, 0xffff
; SI-NEXT: s_lshl_b32 s5, s92, 16
-; SI-NEXT: s_or_b32 s61, s4, s5
+; SI-NEXT: s_or_b32 s63, s4, s5
; SI-NEXT: s_and_b32 s4, s37, 0xffff
; SI-NEXT: s_lshl_b32 s5, s6, 16
-; SI-NEXT: s_or_b32 s56, s4, s5
+; SI-NEXT: s_or_b32 s58, s4, s5
; SI-NEXT: s_and_b32 s4, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s93, 16
-; SI-NEXT: s_or_b32 s57, s4, s5
+; SI-NEXT: s_lshl_b32 s5, s94, 16
+; SI-NEXT: s_or_b32 s59, s4, s5
; SI-NEXT: s_and_b32 s4, s39, 0xffff
; SI-NEXT: s_lshl_b32 s5, s7, 16
; SI-NEXT: s_or_b32 s42, s4, s5
@@ -202305,69 +201518,67 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s5, s5, vcc_lo
; SI-NEXT: s_lshr_b32 vcc_lo, s73, 8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 28
-; SI-NEXT: s_lshr_b32 vcc_lo, s63, 8
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 30
-; SI-NEXT: s_lshr_b32 vcc_lo, s59, 8
+; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 32
-; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8
+; SI-NEXT: s_lshr_b32 vcc_lo, s57, 8
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 34
-; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8
+; SI-NEXT: s_lshr_b32 vcc_lo, s47, 8
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 36
+; SI-NEXT: s_lshr_b32 vcc_lo, s45, 8
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 37
; SI-NEXT: s_lshr_b32 vcc_lo, s75, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 38
-; SI-NEXT: s_lshr_b32 vcc_lo, s61, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 40
-; SI-NEXT: s_lshr_b32 vcc_lo, s57, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 42
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 39
+; SI-NEXT: s_lshr_b32 vcc_lo, s63, 8
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 41
+; SI-NEXT: s_lshr_b32 vcc_lo, s59, 8
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 43
; SI-NEXT: s_lshr_b32 vcc_lo, s43, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 44
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 45
; SI-NEXT: s_lshr_b32 vcc_lo, s41, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 46
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 47
; SI-NEXT: s_lshr_b32 vcc_lo, s15, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 48
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 49
; SI-NEXT: s_lshr_b32 vcc_lo, s13, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 50
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 51
; SI-NEXT: s_lshr_b32 vcc_lo, s11, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 52
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 53
; SI-NEXT: s_lshr_b32 vcc_lo, s9, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 54
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 55
; SI-NEXT: s_lshr_b32 vcc_lo, s7, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 56
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 57
; SI-NEXT: s_lshr_b32 vcc_lo, s5, 8
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 58
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 59
; SI-NEXT: s_bfe_u32 vcc_lo, s35, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 27
-; SI-NEXT: s_bfe_u32 vcc_lo, s34, 0x80008
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 29
-; SI-NEXT: s_bfe_u32 vcc_lo, s31, 0x80008
+; SI-NEXT: s_bfe_u32 vcc_lo, s34, 0x80008
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 31
-; SI-NEXT: s_bfe_u32 vcc_lo, s30, 0x80008
+; SI-NEXT: s_bfe_u32 vcc_lo, s31, 0x80008
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 33
-; SI-NEXT: s_bfe_u32 vcc_lo, s95, 0x80008
+; SI-NEXT: s_bfe_u32 vcc_lo, s30, 0x80008
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 35
-; SI-NEXT: s_bfe_u32 vcc_lo, s94, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 37
-; SI-NEXT: s_bfe_u32 vcc_lo, s92, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 39
; SI-NEXT: s_bfe_u32 vcc_lo, s93, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 41
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 38
+; SI-NEXT: s_bfe_u32 vcc_lo, s92, 0x80008
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 40
+; SI-NEXT: s_bfe_u32 vcc_lo, s94, 0x80008
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 42
; SI-NEXT: s_bfe_u32 vcc_lo, s91, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 43
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 44
; SI-NEXT: s_bfe_u32 vcc_lo, s90, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 45
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 46
; SI-NEXT: s_bfe_u32 vcc_lo, s89, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 47
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 48
; SI-NEXT: s_bfe_u32 vcc_lo, s88, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 49
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 50
; SI-NEXT: s_bfe_u32 vcc_lo, s79, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 51
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 52
; SI-NEXT: s_bfe_u32 vcc_lo, s78, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 53
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 54
; SI-NEXT: s_bfe_u32 vcc_lo, s77, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 55
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 56
; SI-NEXT: s_bfe_u32 vcc_lo, s76, 0x80008
-; SI-NEXT: v_writelane_b32 v22, vcc_lo, 57
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 58
; SI-NEXT: s_lshr_b64 vcc, s[72:73], 24
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 13
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 14
@@ -202377,22 +201588,22 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b64 vcc, s[72:73], 8
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 9
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 10
-; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 24
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 19
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 20
-; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 17
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 18
-; SI-NEXT: s_lshr_b64 vcc, s[62:63], 8
+; SI-NEXT: s_lshr_b64 vcc, s[60:61], 8
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 15
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 16
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 24
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 25
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 26
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 23
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 24
-; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8
+; SI-NEXT: s_lshr_b64 vcc, s[56:57], 8
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 21
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 22
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 24
@@ -202404,9 +201615,9 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b64 vcc, s[46:47], 8
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 27
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 28
-; SI-NEXT: s_mov_b32 vcc_lo, s87
-; SI-NEXT: s_lshr_b64 s[86:87], s[44:45], 24
-; SI-NEXT: s_mov_b32 s87, vcc_lo
+; SI-NEXT: s_lshr_b64 vcc, s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, vcc_lo, 33
+; SI-NEXT: v_writelane_b32 v21, vcc_hi, 34
; SI-NEXT: s_mov_b32 vcc_lo, s97
; SI-NEXT: s_lshr_b64 s[96:97], s[44:45], 16
; SI-NEXT: s_mov_b32 s97, vcc_lo
@@ -202422,22 +201633,23 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_mov_b32 vcc_lo, s85
; SI-NEXT: s_lshr_b64 s[84:85], s[74:75], 8
; SI-NEXT: s_mov_b32 s85, vcc_lo
-; SI-NEXT: s_lshr_b64 vcc, s[60:61], 24
+; SI-NEXT: s_lshr_b64 vcc, s[62:63], 24
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 37
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 38
-; SI-NEXT: s_lshr_b64 vcc, s[60:61], 16
+; SI-NEXT: s_lshr_b64 vcc, s[62:63], 16
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 35
+; SI-NEXT: s_mov_b32 s87, s70
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 36
-; SI-NEXT: s_lshr_b64 vcc, s[60:61], 8
-; SI-NEXT: v_writelane_b32 v21, vcc_lo, 33
-; SI-NEXT: v_writelane_b32 v21, vcc_hi, 34
-; SI-NEXT: s_lshr_b64 vcc, s[56:57], 24
+; SI-NEXT: s_mov_b32 vcc_lo, s71
+; SI-NEXT: s_lshr_b64 s[70:71], s[62:63], 8
+; SI-NEXT: s_mov_b32 s71, vcc_lo
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 24
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 43
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 44
-; SI-NEXT: s_lshr_b64 vcc, s[56:57], 16
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 16
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 41
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 42
-; SI-NEXT: s_lshr_b64 vcc, s[56:57], 8
+; SI-NEXT: s_lshr_b64 vcc, s[58:59], 8
; SI-NEXT: v_writelane_b32 v21, vcc_lo, 39
; SI-NEXT: v_writelane_b32 v21, vcc_hi, 40
; SI-NEXT: s_lshr_b64 vcc, s[42:43], 24
@@ -202504,26 +201716,26 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 17
; SI-NEXT: v_writelane_b32 v22, vcc_hi, 18
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 24
+; SI-NEXT: v_writelane_b32 v22, vcc_lo, 27
+; SI-NEXT: v_writelane_b32 v22, vcc_hi, 28
+; SI-NEXT: s_lshr_b64 vcc, s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 25
; SI-NEXT: v_writelane_b32 v22, vcc_hi, 26
-; SI-NEXT: s_mov_b32 vcc_lo, s71
-; SI-NEXT: s_lshr_b64 s[70:71], s[4:5], 16
-; SI-NEXT: s_mov_b32 s71, vcc_lo
; SI-NEXT: s_lshr_b64 vcc, s[4:5], 8
; SI-NEXT: v_writelane_b32 v22, vcc_lo, 23
+; SI-NEXT: s_bfe_u32 s86, s95, 0x80008
; SI-NEXT: v_writelane_b32 v22, vcc_hi, 24
; SI-NEXT: s_cbranch_execnz .LBB99_3
; SI-NEXT: .LBB99_2: ; %cmp.true
; SI-NEXT: s_add_i32 s69, s69, 3
-; SI-NEXT: v_readlane_b32 s5, v21, 8
; SI-NEXT: s_and_b32 s4, s69, 0xffff
-; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_add_i32 s68, s68, 3
; SI-NEXT: s_or_b32 s4, s5, s4
; SI-NEXT: s_and_b32 s5, s68, 0xffff
; SI-NEXT: s_lshl_b32 s6, s76, 16
; SI-NEXT: s_add_i32 s67, s67, 3
-; SI-NEXT: v_readlane_b32 s7, v21, 7
+; SI-NEXT: v_readlane_b32 s7, v21, 8
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: s_and_b32 s6, s67, 0xffff
; SI-NEXT: s_lshl_b32 s7, s7, 16
@@ -202532,7 +201744,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_and_b32 s7, s66, 0xffff
; SI-NEXT: s_lshl_b32 s8, s77, 16
; SI-NEXT: s_add_i32 s65, s65, 3
-; SI-NEXT: v_readlane_b32 s9, v21, 6
+; SI-NEXT: v_readlane_b32 s9, v21, 7
; SI-NEXT: s_or_b32 s7, s8, s7
; SI-NEXT: s_and_b32 s8, s65, 0xffff
; SI-NEXT: s_lshl_b32 s9, s9, 16
@@ -202592,34 +201804,35 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s45, s45, 16
; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: s_add_i32 s36, s36, 3
-; SI-NEXT: s_add_i32 s56, s44, 0x30000
+; SI-NEXT: s_add_i32 s58, s44, 0x30000
; SI-NEXT: s_and_b32 s44, s36, 0xffff
-; SI-NEXT: s_lshl_b32 s45, s93, 16
+; SI-NEXT: s_lshl_b32 s45, s94, 16
; SI-NEXT: s_or_b32 s44, s45, s44
; SI-NEXT: s_add_i32 s28, s28, 3
-; SI-NEXT: s_add_i32 s57, s44, 0x30000
+; SI-NEXT: s_add_i32 s59, s44, 0x30000
; SI-NEXT: s_and_b32 s28, s28, 0xffff
; SI-NEXT: s_lshl_b32 s44, s99, 16
; SI-NEXT: s_or_b32 s28, s44, s28
; SI-NEXT: s_add_i32 s29, s29, 3
-; SI-NEXT: s_add_i32 s60, s28, 0x30000
+; SI-NEXT: s_add_i32 s62, s28, 0x30000
; SI-NEXT: s_and_b32 s28, s29, 0xffff
; SI-NEXT: s_lshl_b32 s29, s92, 16
; SI-NEXT: s_or_b32 s28, s29, s28
; SI-NEXT: s_add_i32 s26, s26, 3
-; SI-NEXT: s_add_i32 s61, s28, 0x30000
+; SI-NEXT: s_add_i32 s63, s28, 0x30000
; SI-NEXT: s_and_b32 s26, s26, 0xffff
; SI-NEXT: s_lshl_b32 s28, s97, 16
; SI-NEXT: s_or_b32 s26, s28, s26
; SI-NEXT: s_add_i32 s27, s27, 3
; SI-NEXT: s_add_i32 s74, s26, 0x30000
; SI-NEXT: s_and_b32 s26, s27, 0xffff
-; SI-NEXT: s_lshl_b32 s27, s94, 16
+; SI-NEXT: s_lshl_b32 s27, s93, 16
; SI-NEXT: s_or_b32 s26, s27, s26
-; SI-NEXT: s_add_i32 s24, s24, 3
; SI-NEXT: s_add_i32 s75, s26, 0x30000
+; SI-NEXT: s_add_i32 s24, s24, 3
+; SI-NEXT: v_readlane_b32 s26, v21, 6
; SI-NEXT: s_and_b32 s24, s24, 0xffff
-; SI-NEXT: s_lshl_b32 s26, s87, 16
+; SI-NEXT: s_lshl_b32 s26, s26, 16
; SI-NEXT: s_or_b32 s24, s26, s24
; SI-NEXT: s_add_i32 s25, s25, 3
; SI-NEXT: s_add_i32 s44, s24, 0x30000
@@ -202642,22 +201855,22 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s22, s83, 16
; SI-NEXT: s_or_b32 s20, s22, s20
; SI-NEXT: s_add_i32 s21, s21, 3
-; SI-NEXT: s_add_i32 s58, s20, 0x30000
+; SI-NEXT: s_add_i32 s56, s20, 0x30000
; SI-NEXT: s_and_b32 s20, s21, 0xffff
; SI-NEXT: s_lshl_b32 s21, s31, 16
; SI-NEXT: s_or_b32 s20, s21, s20
; SI-NEXT: s_add_i32 s18, s18, 3
-; SI-NEXT: s_add_i32 s59, s20, 0x30000
+; SI-NEXT: s_add_i32 s57, s20, 0x30000
; SI-NEXT: s_and_b32 s18, s18, 0xffff
; SI-NEXT: s_lshl_b32 s20, s81, 16
; SI-NEXT: s_or_b32 s18, s20, s18
; SI-NEXT: s_add_i32 s19, s19, 3
-; SI-NEXT: s_add_i32 s62, s18, 0x30000
+; SI-NEXT: s_add_i32 s60, s18, 0x30000
; SI-NEXT: s_and_b32 s18, s19, 0xffff
; SI-NEXT: s_lshl_b32 s19, s34, 16
; SI-NEXT: s_or_b32 s18, s19, s18
; SI-NEXT: s_add_i32 s16, s16, 3
-; SI-NEXT: s_add_i32 s63, s18, 0x30000
+; SI-NEXT: s_add_i32 s61, s18, 0x30000
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_lshl_b32 s18, s71, 16
; SI-NEXT: s_or_b32 s16, s18, s16
@@ -202677,93 +201890,91 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v21, s16, 9
; SI-NEXT: v_writelane_b32 v21, s17, 10
; SI-NEXT: s_lshr_b32 s16, s73, 24
-; SI-NEXT: v_writelane_b32 v22, s16, 27
-; SI-NEXT: s_lshr_b32 s16, s73, 8
-; SI-NEXT: v_writelane_b32 v22, s16, 28
-; SI-NEXT: s_lshr_b32 s16, s63, 24
; SI-NEXT: v_writelane_b32 v22, s16, 29
-; SI-NEXT: s_lshr_b32 s16, s63, 8
+; SI-NEXT: s_lshr_b32 s16, s73, 8
; SI-NEXT: v_writelane_b32 v22, s16, 30
-; SI-NEXT: s_lshr_b32 s16, s59, 24
+; SI-NEXT: s_lshr_b32 s16, s61, 24
; SI-NEXT: v_writelane_b32 v22, s16, 31
-; SI-NEXT: s_lshr_b32 s16, s59, 8
+; SI-NEXT: s_lshr_b32 s16, s61, 8
; SI-NEXT: v_writelane_b32 v22, s16, 32
-; SI-NEXT: s_lshr_b32 s16, s47, 24
+; SI-NEXT: s_lshr_b32 s16, s57, 24
; SI-NEXT: v_writelane_b32 v22, s16, 33
-; SI-NEXT: s_lshr_b32 s16, s47, 8
+; SI-NEXT: s_lshr_b32 s16, s57, 8
; SI-NEXT: v_writelane_b32 v22, s16, 34
-; SI-NEXT: s_lshr_b32 s16, s45, 24
+; SI-NEXT: s_lshr_b32 s16, s47, 24
; SI-NEXT: v_writelane_b32 v22, s16, 35
-; SI-NEXT: s_lshr_b32 s16, s45, 8
+; SI-NEXT: s_lshr_b32 s16, s47, 8
; SI-NEXT: v_writelane_b32 v22, s16, 36
-; SI-NEXT: s_lshr_b32 s16, s75, 24
+; SI-NEXT: s_lshr_b32 s16, s45, 8
; SI-NEXT: v_writelane_b32 v22, s16, 37
-; SI-NEXT: s_lshr_b32 s16, s75, 8
+; SI-NEXT: s_lshr_b32 s16, s75, 24
; SI-NEXT: v_writelane_b32 v22, s16, 38
-; SI-NEXT: s_lshr_b32 s16, s61, 24
+; SI-NEXT: s_lshr_b32 s16, s75, 8
; SI-NEXT: v_writelane_b32 v22, s16, 39
-; SI-NEXT: s_lshr_b32 s16, s61, 8
+; SI-NEXT: s_lshr_b32 s16, s63, 24
; SI-NEXT: v_writelane_b32 v22, s16, 40
-; SI-NEXT: s_lshr_b32 s16, s57, 24
-; SI-NEXT: s_add_i32 s43, s43, 0x30000
+; SI-NEXT: s_lshr_b32 s16, s63, 8
; SI-NEXT: v_writelane_b32 v22, s16, 41
-; SI-NEXT: s_lshr_b32 s16, s57, 8
+; SI-NEXT: s_lshr_b32 s16, s59, 24
+; SI-NEXT: s_add_i32 s43, s43, 0x30000
; SI-NEXT: v_writelane_b32 v22, s16, 42
+; SI-NEXT: s_lshr_b32 s16, s59, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 43
; SI-NEXT: s_lshr_b32 s16, s43, 24
; SI-NEXT: s_add_i32 s41, s41, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 43
-; SI-NEXT: s_lshr_b32 s16, s43, 8
; SI-NEXT: v_writelane_b32 v22, s16, 44
+; SI-NEXT: s_lshr_b32 s16, s43, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 45
; SI-NEXT: s_lshr_b32 s16, s41, 24
; SI-NEXT: s_add_i32 s15, s15, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 45
-; SI-NEXT: s_lshr_b32 s16, s41, 8
; SI-NEXT: v_writelane_b32 v22, s16, 46
+; SI-NEXT: s_lshr_b32 s16, s41, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 47
; SI-NEXT: s_lshr_b32 s16, s15, 24
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 47
-; SI-NEXT: s_lshr_b32 s16, s15, 8
; SI-NEXT: v_writelane_b32 v22, s16, 48
+; SI-NEXT: s_lshr_b32 s16, s15, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 49
; SI-NEXT: s_lshr_b32 s16, s13, 24
; SI-NEXT: s_add_i32 s11, s11, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 49
-; SI-NEXT: s_lshr_b32 s16, s13, 8
; SI-NEXT: v_writelane_b32 v22, s16, 50
+; SI-NEXT: s_lshr_b32 s16, s13, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 51
; SI-NEXT: s_lshr_b32 s16, s11, 24
; SI-NEXT: s_add_i32 s9, s9, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 51
-; SI-NEXT: s_lshr_b32 s16, s11, 8
; SI-NEXT: v_writelane_b32 v22, s16, 52
+; SI-NEXT: s_lshr_b32 s16, s11, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 53
; SI-NEXT: s_lshr_b32 s16, s9, 24
; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 53
-; SI-NEXT: s_lshr_b32 s16, s9, 8
; SI-NEXT: v_writelane_b32 v22, s16, 54
+; SI-NEXT: s_lshr_b32 s16, s9, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 55
; SI-NEXT: s_lshr_b32 s16, s7, 24
; SI-NEXT: s_add_i32 s5, s5, 0x30000
-; SI-NEXT: v_writelane_b32 v22, s16, 55
-; SI-NEXT: s_lshr_b32 s16, s7, 8
; SI-NEXT: v_writelane_b32 v22, s16, 56
-; SI-NEXT: s_lshr_b32 s16, s5, 24
+; SI-NEXT: s_lshr_b32 s16, s7, 8
; SI-NEXT: v_writelane_b32 v22, s16, 57
-; SI-NEXT: s_lshr_b32 s16, s5, 8
+; SI-NEXT: s_lshr_b32 s16, s5, 24
; SI-NEXT: v_writelane_b32 v22, s16, 58
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
+; SI-NEXT: s_lshr_b32 s16, s5, 8
+; SI-NEXT: v_writelane_b32 v22, s16, 59
+; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24
; SI-NEXT: v_writelane_b32 v21, s16, 19
; SI-NEXT: v_writelane_b32 v21, s17, 20
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
; SI-NEXT: v_writelane_b32 v21, s16, 17
; SI-NEXT: v_writelane_b32 v21, s17, 18
-; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8
; SI-NEXT: v_writelane_b32 v21, s16, 15
; SI-NEXT: v_writelane_b32 v21, s17, 16
-; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24
; SI-NEXT: v_writelane_b32 v21, s16, 25
; SI-NEXT: v_writelane_b32 v21, s17, 26
-; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
; SI-NEXT: v_writelane_b32 v21, s16, 23
; SI-NEXT: v_writelane_b32 v21, s17, 24
-; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8
; SI-NEXT: v_writelane_b32 v21, s16, 21
; SI-NEXT: v_writelane_b32 v21, s17, 22
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 24
@@ -202775,22 +201986,22 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[16:17], s[46:47], 8
; SI-NEXT: v_writelane_b32 v21, s16, 27
; SI-NEXT: v_writelane_b32 v21, s17, 28
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 24
+; SI-NEXT: s_lshr_b64 s[16:17], s[44:45], 24
+; SI-NEXT: v_writelane_b32 v21, s16, 33
+; SI-NEXT: v_writelane_b32 v21, s17, 34
+; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 24
; SI-NEXT: v_writelane_b32 v21, s16, 37
; SI-NEXT: v_writelane_b32 v21, s17, 38
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[62:63], 16
; SI-NEXT: v_writelane_b32 v21, s16, 35
; SI-NEXT: v_writelane_b32 v21, s17, 36
-; SI-NEXT: s_lshr_b64 s[16:17], s[60:61], 8
-; SI-NEXT: v_writelane_b32 v21, s16, 33
-; SI-NEXT: v_writelane_b32 v21, s17, 34
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 24
+; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 24
; SI-NEXT: v_writelane_b32 v21, s16, 43
; SI-NEXT: v_writelane_b32 v21, s17, 44
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 16
; SI-NEXT: v_writelane_b32 v21, s16, 41
; SI-NEXT: v_writelane_b32 v21, s17, 42
-; SI-NEXT: s_lshr_b64 s[16:17], s[56:57], 8
+; SI-NEXT: s_lshr_b64 s[16:17], s[58:59], 8
; SI-NEXT: s_add_i32 s42, s42, 0x30000
; SI-NEXT: v_writelane_b32 v21, s16, 39
; SI-NEXT: v_writelane_b32 v21, s17, 40
@@ -202865,17 +202076,21 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_writelane_b32 v22, s16, 17
; SI-NEXT: v_writelane_b32 v22, s17, 18
; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 24
+; SI-NEXT: v_writelane_b32 v22, s16, 27
+; SI-NEXT: v_writelane_b32 v22, s17, 28
+; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
; SI-NEXT: v_writelane_b32 v22, s16, 25
; SI-NEXT: v_writelane_b32 v22, s17, 26
; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 8
; SI-NEXT: s_lshr_b32 s35, s73, 16
-; SI-NEXT: s_lshr_b32 s34, s63, 16
-; SI-NEXT: s_lshr_b32 s31, s59, 16
+; SI-NEXT: s_lshr_b32 s34, s61, 16
+; SI-NEXT: s_lshr_b32 s31, s57, 16
; SI-NEXT: s_lshr_b32 s30, s47, 16
+; SI-NEXT: s_lshr_b32 s86, s45, 24
; SI-NEXT: s_lshr_b32 s95, s45, 16
-; SI-NEXT: s_lshr_b32 s94, s75, 16
-; SI-NEXT: s_lshr_b32 s92, s61, 16
-; SI-NEXT: s_lshr_b32 s93, s57, 16
+; SI-NEXT: s_lshr_b32 s93, s75, 16
+; SI-NEXT: s_lshr_b32 s92, s63, 16
+; SI-NEXT: s_lshr_b32 s94, s59, 16
; SI-NEXT: s_lshr_b32 s91, s43, 16
; SI-NEXT: s_lshr_b32 s90, s41, 16
; SI-NEXT: s_lshr_b32 s89, s15, 16
@@ -202884,13 +202099,12 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshr_b32 s78, s9, 16
; SI-NEXT: s_lshr_b32 s77, s7, 16
; SI-NEXT: s_lshr_b32 s76, s5, 16
-; SI-NEXT: s_lshr_b64 s[86:87], s[44:45], 24
; SI-NEXT: s_lshr_b64 s[96:97], s[44:45], 16
; SI-NEXT: s_lshr_b64 s[98:99], s[44:45], 8
; SI-NEXT: s_lshr_b64 s[80:81], s[74:75], 24
; SI-NEXT: s_lshr_b64 s[82:83], s[74:75], 16
; SI-NEXT: s_lshr_b64 s[84:85], s[74:75], 8
-; SI-NEXT: s_lshr_b64 s[70:71], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[70:71], s[62:63], 8
; SI-NEXT: v_writelane_b32 v22, s16, 23
; SI-NEXT: v_writelane_b32 v22, s17, 24
; SI-NEXT: .LBB99_3: ; %end
@@ -202908,13 +202122,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 28
+; SI-NEXT: v_readlane_b32 s17, v22, 30
; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s73, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s35, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 27
+; SI-NEXT: v_readlane_b32 s18, v22, 29
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -202926,7 +202140,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s17, v21, 16
; SI-NEXT: v_readlane_b32 s18, v21, 17
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_and_b32 s17, s62, 0xff
+; SI-NEXT: s_and_b32 s17, s60, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 18
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s18, 0xff
@@ -202936,13 +202150,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 30
+; SI-NEXT: v_readlane_b32 s17, v22, 32
; SI-NEXT: v_mov_b32_e32 v3, s16
-; SI-NEXT: s_and_b32 s16, s63, 0xff
+; SI-NEXT: s_and_b32 s16, s61, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s34, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 29
+; SI-NEXT: v_readlane_b32 s18, v22, 31
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -202954,7 +202168,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s17, v21, 22
; SI-NEXT: v_readlane_b32 s18, v21, 23
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_and_b32 s17, s58, 0xff
+; SI-NEXT: s_and_b32 s17, s56, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 24
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s18, 0xff
@@ -202964,13 +202178,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 32
+; SI-NEXT: v_readlane_b32 s17, v22, 34
; SI-NEXT: v_mov_b32_e32 v5, s16
-; SI-NEXT: s_and_b32 s16, s59, 0xff
+; SI-NEXT: s_and_b32 s16, s57, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s31, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 31
+; SI-NEXT: v_readlane_b32 s18, v22, 33
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -202992,37 +202206,38 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 34
+; SI-NEXT: v_readlane_b32 s17, v22, 36
; SI-NEXT: v_mov_b32_e32 v7, s16
; SI-NEXT: s_and_b32 s16, s47, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s30, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 33
+; SI-NEXT: v_readlane_b32 s18, v22, 35
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
+; SI-NEXT: v_readlane_b32 s19, v21, 32
; SI-NEXT: v_mov_b32_e32 v8, s16
; SI-NEXT: s_lshl_b32 s16, s98, 8
; SI-NEXT: s_and_b32 s17, s44, 0xff
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s96, 0xff
-; SI-NEXT: s_lshl_b32 s18, s86, 24
+; SI-NEXT: v_readlane_b32 s18, v21, 33
+; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 36
+; SI-NEXT: v_readlane_b32 s17, v22, 37
; SI-NEXT: v_mov_b32_e32 v9, s16
; SI-NEXT: s_and_b32 s16, s45, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s95, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 35
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: s_lshl_b32 s18, s86, 24
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -203036,25 +202251,23 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 38
+; SI-NEXT: v_readlane_b32 s17, v22, 39
; SI-NEXT: v_mov_b32_e32 v11, s16
; SI-NEXT: s_and_b32 s16, s75, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s94, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 37
+; SI-NEXT: s_and_b32 s17, s93, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 38
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
+; SI-NEXT: v_readlane_b32 s19, v21, 34
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v21, 32
-; SI-NEXT: v_mov_b32_e32 v12, s16
-; SI-NEXT: v_readlane_b32 s16, v21, 33
-; SI-NEXT: v_readlane_b32 s17, v21, 34
; SI-NEXT: v_readlane_b32 s18, v21, 35
-; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_and_b32 s17, s60, 0xff
+; SI-NEXT: v_mov_b32_e32 v12, s16
+; SI-NEXT: s_lshl_b32 s16, s70, 8
+; SI-NEXT: s_and_b32 s17, s62, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 36
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s18, 0xff
@@ -203064,13 +202277,13 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 40
+; SI-NEXT: v_readlane_b32 s17, v22, 41
; SI-NEXT: v_mov_b32_e32 v13, s16
-; SI-NEXT: s_and_b32 s16, s61, 0xff
+; SI-NEXT: s_and_b32 s16, s63, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s92, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 39
+; SI-NEXT: v_readlane_b32 s18, v22, 40
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_or_b32 s17, s18, s17
@@ -203082,7 +202295,7 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s17, v21, 40
; SI-NEXT: v_readlane_b32 s18, v21, 41
; SI-NEXT: s_lshl_b32 s16, s16, 8
-; SI-NEXT: s_and_b32 s17, s56, 0xff
+; SI-NEXT: s_and_b32 s17, s58, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 42
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s18, 0xff
@@ -203092,87 +202305,70 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 42
+; SI-NEXT: v_readlane_b32 s17, v22, 43
; SI-NEXT: v_mov_b32_e32 v15, s16
-; SI-NEXT: s_and_b32 s16, s57, 0xff
+; SI-NEXT: s_and_b32 s16, s59, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: s_and_b32 s17, s93, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 41
+; SI-NEXT: s_and_b32 s17, s94, 0xff
+; SI-NEXT: v_readlane_b32 s18, v22, 42
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: v_readlane_b32 s19, v21, 44
; SI-NEXT: v_mov_b32_e32 v16, s16
; SI-NEXT: v_readlane_b32 s16, v21, 45
-; SI-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: v_readlane_b32 s17, v21, 46
; SI-NEXT: v_readlane_b32 s18, v21, 47
-; SI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_lshl_b32 s16, s16, 8
; SI-NEXT: s_and_b32 s17, s42, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 48
-; SI-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_and_b32 s17, s18, 0xff
; SI-NEXT: v_readlane_b32 s18, v21, 49
-; SI-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_lshl_b32 s17, s17, 16
-; SI-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 44
-; SI-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_readlane_b32 s17, v22, 45
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s43, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
-; SI-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s91, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 43
+; SI-NEXT: v_readlane_b32 s18, v22, 44
; SI-NEXT: v_readlane_b32 s19, v21, 50
-; SI-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
-; SI-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: v_readlane_b32 s18, v21, 51
-; SI-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 60, v0
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: v_readlane_b32 s19, v21, 52
-; SI-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 64, v0
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_lshl_b32 s17, s18, 8
; SI-NEXT: v_readlane_b32 s18, v21, 53
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
; SI-NEXT: v_readlane_b32 s19, v21, 54
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -203182,26 +202378,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x44, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s17, v22, 46
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s17, v22, 47
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:68
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s90, 0xff
-; SI-NEXT: v_readlane_b32 s18, v22, 45
+; SI-NEXT: v_readlane_b32 s18, v22, 46
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x48, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: v_readlane_b32 s16, v21, 57
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: v_readlane_b32 s17, v21, 58
@@ -203216,26 +202410,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s17, s18, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x4c, v0
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:76
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
+; SI-NEXT: v_mov_b32_e32 v1, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
-; SI-NEXT: v_readlane_b32 s15, v22, 48
+; SI-NEXT: v_readlane_b32 s15, v22, 49
; SI-NEXT: s_lshl_b32 s15, s15, 8
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: s_and_b32 s15, s89, 0xff
-; SI-NEXT: v_readlane_b32 s16, v22, 47
+; SI-NEXT: v_readlane_b32 s16, v22, 48
; SI-NEXT: s_lshl_b32 s15, s15, 16
; SI-NEXT: s_lshl_b32 s16, s16, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s15, s16, s15
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x50, v0
; SI-NEXT: s_or_b32 s14, s14, s15
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:80
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s14
+; SI-NEXT: v_mov_b32_e32 v1, s14
; SI-NEXT: v_readlane_b32 s14, v21, 63
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: v_readlane_b32 s15, v22, 0
@@ -203249,26 +202441,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s15, s16, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0
; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:84
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: v_readlane_b32 s13, v22, 50
+; SI-NEXT: v_readlane_b32 s13, v22, 51
; SI-NEXT: s_lshl_b32 s13, s13, 8
; SI-NEXT: s_or_b32 s12, s12, s13
; SI-NEXT: s_and_b32 s13, s88, 0xff
-; SI-NEXT: v_readlane_b32 s14, v22, 49
+; SI-NEXT: v_readlane_b32 s14, v22, 50
; SI-NEXT: s_lshl_b32 s13, s13, 16
; SI-NEXT: s_lshl_b32 s14, s14, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x58, v0
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:88
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: v_readlane_b32 s12, v22, 5
; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: v_readlane_b32 s13, v22, 6
@@ -203282,26 +202472,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s13, s14, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x5c, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:92
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
-; SI-NEXT: v_readlane_b32 s11, v22, 52
+; SI-NEXT: v_readlane_b32 s11, v22, 53
; SI-NEXT: s_lshl_b32 s11, s11, 8
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: s_and_b32 s11, s79, 0xff
-; SI-NEXT: v_readlane_b32 s12, v22, 51
+; SI-NEXT: v_readlane_b32 s12, v22, 52
; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: s_lshl_b32 s12, s12, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:96
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: v_readlane_b32 s10, v22, 11
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: v_readlane_b32 s11, v22, 12
@@ -203315,26 +202503,24 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x64, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:100
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
-; SI-NEXT: v_readlane_b32 s9, v22, 54
+; SI-NEXT: v_readlane_b32 s9, v22, 55
; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s78, 0xff
-; SI-NEXT: v_readlane_b32 s10, v22, 53
+; SI-NEXT: v_readlane_b32 s10, v22, 54
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_lshl_b32 s10, s10, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x68, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:104
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: v_readlane_b32 s8, v22, 17
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: v_readlane_b32 s9, v22, 18
@@ -203348,56 +202534,54 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:108
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
-; SI-NEXT: v_readlane_b32 s7, v22, 56
+; SI-NEXT: v_readlane_b32 s7, v22, 57
; SI-NEXT: s_lshl_b32 s7, s7, 8
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: s_and_b32 s7, s77, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 55
+; SI-NEXT: v_readlane_b32 s8, v22, 56
; SI-NEXT: s_lshl_b32 s7, s7, 16
; SI-NEXT: s_lshl_b32 s8, s8, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x70, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: v_readlane_b32 s6, v22, 23
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: v_readlane_b32 s7, v22, 24
+; SI-NEXT: s_lshl_b32 s6, s6, 8
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: s_and_b32 s6, s70, 0xff
-; SI-NEXT: v_readlane_b32 s8, v22, 25
+; SI-NEXT: v_readlane_b32 s6, v22, 25
+; SI-NEXT: v_readlane_b32 s7, v22, 26
+; SI-NEXT: s_and_b32 s6, s6, 0xff
+; SI-NEXT: v_readlane_b32 s8, v22, 27
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s8, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x74, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:116
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
-; SI-NEXT: v_readlane_b32 s5, v22, 58
+; SI-NEXT: v_readlane_b32 s5, v22, 59
; SI-NEXT: s_lshl_b32 s5, s5, 8
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s76, 0xff
-; SI-NEXT: v_readlane_b32 s6, v22, 57
+; SI-NEXT: v_readlane_b32 s6, v22, 58
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 0x78, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 0x7c, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:120
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v20, 34
; SI-NEXT: v_readlane_b32 s19, v21, 62
@@ -203405,8 +202589,8 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: v_readlane_b32 s15, v22, 10
; SI-NEXT: v_readlane_b32 s13, v22, 16
; SI-NEXT: v_readlane_b32 s11, v22, 22
-; SI-NEXT: v_readlane_b32 s9, v22, 26
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: v_readlane_b32 s9, v22, 28
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; SI-NEXT: v_readlane_b32 s31, v20, 35
; SI-NEXT: v_readlane_b32 s99, v20, 33
; SI-NEXT: v_readlane_b32 s98, v20, 32
@@ -203451,24 +202635,28 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: s_setpc_b64 s[30:31]
; SI-NEXT: .LBB99_4:
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: s_mov_b32 s87, s70
; SI-NEXT: v_writelane_b32 v21, s4, 9
; SI-NEXT: v_writelane_b32 v21, s5, 10
; SI-NEXT: ; implicit-def: $sgpr4
+; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: v_writelane_b32 v21, s4, 11
+; SI-NEXT: v_writelane_b32 v21, s5, 12
+; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr62
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr84
; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr80
-; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr14
@@ -203476,9 +202664,6 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr6
-; SI-NEXT: v_writelane_b32 v21, s4, 11
-; SI-NEXT: v_writelane_b32 v21, s5, 12
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v21, s4, 13
; SI-NEXT: v_writelane_b32 v21, s5, 14
; SI-NEXT: ; implicit-def: $sgpr4
@@ -203571,8 +202756,6 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; kill: killed $sgpr4
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: ; kill: killed $sgpr4
-; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v21, s4, 33
; SI-NEXT: v_writelane_b32 v21, s5, 34
; SI-NEXT: ; implicit-def: $sgpr4
@@ -203654,13 +202837,16 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: v_writelane_b32 v22, s4, 21
; SI-NEXT: v_writelane_b32 v22, s5, 22
-; SI-NEXT: v_writelane_b32 v22, s70, 23
-; SI-NEXT: v_writelane_b32 v22, s71, 24
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: v_writelane_b32 v22, s86, 23
+; SI-NEXT: v_writelane_b32 v22, s87, 24
+; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: ; implicit-def: $sgpr4
-; SI-NEXT: v_writelane_b32 v22, s70, 25
-; SI-NEXT: v_writelane_b32 v22, s71, 26
-; SI-NEXT: ; implicit-def: $sgpr70
+; SI-NEXT: v_writelane_b32 v22, s86, 25
+; SI-NEXT: v_writelane_b32 v22, s87, 26
+; SI-NEXT: ; implicit-def: $sgpr86
+; SI-NEXT: v_writelane_b32 v22, s86, 27
+; SI-NEXT: v_writelane_b32 v22, s87, 28
+; SI-NEXT: ; implicit-def: $sgpr86
; SI-NEXT: s_branch .LBB99_2
;
; VI-LABEL: bitcast_v64i16_to_v128i8_scalar:
@@ -203759,110 +202945,110 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s25, 16
; VI-NEXT: v_writelane_b32 v33, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 8
; VI-NEXT: v_writelane_b32 v33, s46, 17
-; VI-NEXT: s_lshr_b32 s46, s23, 24
+; VI-NEXT: s_lshr_b32 s46, s24, 16
; VI-NEXT: v_writelane_b32 v33, s46, 18
-; VI-NEXT: s_lshr_b32 s46, s23, 16
+; VI-NEXT: s_lshr_b32 s46, s24, 8
; VI-NEXT: v_writelane_b32 v33, s46, 19
-; VI-NEXT: s_lshr_b32 s46, s22, 16
+; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: v_writelane_b32 v33, s46, 20
-; VI-NEXT: s_lshr_b32 s46, s21, 24
+; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: v_writelane_b32 v33, s46, 21
-; VI-NEXT: s_lshr_b32 s46, s21, 16
+; VI-NEXT: s_lshr_b32 s46, s22, 16
; VI-NEXT: v_writelane_b32 v33, s46, 22
-; VI-NEXT: s_lshr_b32 s46, s20, 16
+; VI-NEXT: s_lshr_b32 s46, s21, 24
; VI-NEXT: v_writelane_b32 v33, s46, 23
-; VI-NEXT: s_lshr_b32 s46, s19, 24
+; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: v_writelane_b32 v33, s46, 24
-; VI-NEXT: s_lshr_b32 s46, s19, 16
+; VI-NEXT: s_lshr_b32 s46, s20, 16
; VI-NEXT: v_writelane_b32 v33, s46, 25
-; VI-NEXT: s_lshr_b32 s46, s18, 16
+; VI-NEXT: s_lshr_b32 s46, s19, 24
; VI-NEXT: v_writelane_b32 v33, s46, 26
-; VI-NEXT: s_lshr_b32 s46, s17, 24
+; VI-NEXT: s_lshr_b32 s46, s19, 16
; VI-NEXT: v_writelane_b32 v33, s46, 27
-; VI-NEXT: s_lshr_b32 s46, s17, 16
+; VI-NEXT: s_lshr_b32 s46, s18, 16
; VI-NEXT: v_writelane_b32 v33, s46, 28
-; VI-NEXT: s_lshr_b32 s46, s16, 16
+; VI-NEXT: s_lshr_b32 s46, s17, 24
; VI-NEXT: v_writelane_b32 v33, s46, 29
-; VI-NEXT: s_lshr_b32 s46, s5, 24
+; VI-NEXT: s_lshr_b32 s46, s17, 16
; VI-NEXT: v_writelane_b32 v33, s46, 30
-; VI-NEXT: s_lshr_b32 s46, s5, 16
+; VI-NEXT: s_lshr_b32 s46, s16, 16
; VI-NEXT: v_writelane_b32 v33, s46, 31
-; VI-NEXT: s_lshr_b32 s46, s5, 8
+; VI-NEXT: s_lshr_b32 s46, s5, 24
; VI-NEXT: v_writelane_b32 v33, s46, 32
-; VI-NEXT: s_lshr_b32 s46, s4, 16
+; VI-NEXT: s_lshr_b32 s46, s5, 16
; VI-NEXT: v_writelane_b32 v33, s46, 33
-; VI-NEXT: s_lshr_b32 s46, s4, 8
+; VI-NEXT: s_lshr_b32 s46, s5, 8
; VI-NEXT: v_writelane_b32 v33, s46, 34
-; VI-NEXT: s_lshr_b32 s46, s7, 24
+; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: v_writelane_b32 v33, s46, 35
-; VI-NEXT: s_lshr_b32 s46, s7, 16
+; VI-NEXT: s_lshr_b32 s46, s4, 8
; VI-NEXT: v_writelane_b32 v33, s46, 36
-; VI-NEXT: s_lshr_b32 s46, s7, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 24
; VI-NEXT: v_writelane_b32 v33, s46, 37
-; VI-NEXT: s_lshr_b32 s46, s6, 16
+; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: v_writelane_b32 v33, s46, 38
-; VI-NEXT: s_lshr_b32 s46, s6, 8
+; VI-NEXT: s_lshr_b32 s46, s7, 8
; VI-NEXT: v_writelane_b32 v33, s46, 39
-; VI-NEXT: s_lshr_b32 s46, s9, 24
+; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: v_writelane_b32 v33, s46, 40
-; VI-NEXT: s_lshr_b32 s46, s9, 16
+; VI-NEXT: s_lshr_b32 s46, s6, 8
; VI-NEXT: v_writelane_b32 v33, s46, 41
-; VI-NEXT: s_lshr_b32 s46, s9, 8
+; VI-NEXT: s_lshr_b32 s46, s9, 24
; VI-NEXT: v_writelane_b32 v33, s46, 42
-; VI-NEXT: s_lshr_b32 s46, s8, 16
+; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: v_writelane_b32 v33, s46, 43
-; VI-NEXT: s_lshr_b32 s46, s8, 8
+; VI-NEXT: s_lshr_b32 s46, s9, 8
; VI-NEXT: v_writelane_b32 v33, s46, 44
-; VI-NEXT: s_lshr_b32 s46, s11, 24
+; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: v_writelane_b32 v33, s46, 45
-; VI-NEXT: s_lshr_b32 s46, s11, 16
+; VI-NEXT: s_lshr_b32 s46, s8, 8
; VI-NEXT: v_writelane_b32 v33, s46, 46
-; VI-NEXT: s_lshr_b32 s46, s11, 8
+; VI-NEXT: s_lshr_b32 s46, s11, 24
; VI-NEXT: v_writelane_b32 v33, s46, 47
-; VI-NEXT: s_lshr_b32 s46, s10, 16
+; VI-NEXT: s_lshr_b32 s46, s11, 16
; VI-NEXT: v_writelane_b32 v33, s46, 48
-; VI-NEXT: s_lshr_b32 s46, s10, 8
+; VI-NEXT: s_lshr_b32 s46, s11, 8
; VI-NEXT: v_writelane_b32 v33, s46, 49
-; VI-NEXT: s_lshr_b32 s46, s13, 24
+; VI-NEXT: s_lshr_b32 s46, s10, 16
; VI-NEXT: v_writelane_b32 v33, s46, 50
-; VI-NEXT: s_lshr_b32 s46, s13, 16
+; VI-NEXT: s_lshr_b32 s46, s10, 8
; VI-NEXT: v_writelane_b32 v33, s46, 51
-; VI-NEXT: s_lshr_b32 s46, s13, 8
+; VI-NEXT: s_lshr_b32 s46, s13, 24
; VI-NEXT: v_writelane_b32 v33, s46, 52
-; VI-NEXT: s_lshr_b32 s46, s12, 16
+; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: v_writelane_b32 v33, s46, 53
-; VI-NEXT: s_lshr_b32 s46, s12, 8
+; VI-NEXT: s_lshr_b32 s46, s13, 8
; VI-NEXT: v_writelane_b32 v33, s46, 54
-; VI-NEXT: s_lshr_b32 s46, s15, 24
+; VI-NEXT: s_lshr_b32 s46, s12, 16
; VI-NEXT: v_writelane_b32 v33, s46, 55
-; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s46, s12, 8
; VI-NEXT: v_writelane_b32 v33, s46, 56
-; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: s_lshr_b32 s71, s25, 8
-; VI-NEXT: s_lshr_b32 s87, s24, 8
-; VI-NEXT: s_lshr_b32 s86, s23, 8
-; VI-NEXT: s_lshr_b32 s64, s22, 8
-; VI-NEXT: s_lshr_b32 s66, s21, 8
-; VI-NEXT: s_lshr_b32 s54, s20, 8
-; VI-NEXT: s_lshr_b32 s82, s19, 8
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s66, s23, 8
+; VI-NEXT: s_lshr_b32 s87, s22, 8
+; VI-NEXT: s_lshr_b32 s51, s21, 8
+; VI-NEXT: s_lshr_b32 s50, s20, 8
+; VI-NEXT: s_lshr_b32 s53, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 8
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s68, s16, 8
-; VI-NEXT: s_lshr_b32 s69, s15, 8
+; VI-NEXT: s_lshr_b32 s69, s17, 8
+; VI-NEXT: s_lshr_b32 s84, s16, 8
+; VI-NEXT: s_lshr_b32 s71, s15, 24
; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b32 s83, s14, 8
-; VI-NEXT: s_lshr_b32 s84, s41, 24
-; VI-NEXT: s_lshr_b32 s80, s41, 16
-; VI-NEXT: s_lshr_b32 s51, s41, 8
-; VI-NEXT: s_lshr_b32 s50, s40, 16
-; VI-NEXT: s_lshr_b32 s85, s40, 8
-; VI-NEXT: s_lshr_b32 s55, s43, 24
-; VI-NEXT: s_lshr_b32 s65, s43, 16
-; VI-NEXT: s_lshr_b32 s52, s43, 8
-; VI-NEXT: s_lshr_b32 s53, s42, 16
-; VI-NEXT: s_lshr_b32 s70, s42, 8
+; VI-NEXT: s_lshr_b32 s83, s15, 8
+; VI-NEXT: s_lshr_b32 s80, s14, 16
+; VI-NEXT: s_lshr_b32 s82, s14, 8
+; VI-NEXT: s_lshr_b32 s86, s41, 24
+; VI-NEXT: s_lshr_b32 s52, s41, 16
+; VI-NEXT: s_lshr_b32 s85, s41, 8
+; VI-NEXT: s_lshr_b32 s65, s40, 16
+; VI-NEXT: s_lshr_b32 s54, s40, 8
+; VI-NEXT: s_lshr_b32 s64, s43, 24
+; VI-NEXT: s_lshr_b32 s67, s43, 16
+; VI-NEXT: s_lshr_b32 s68, s43, 8
+; VI-NEXT: s_lshr_b32 s70, s42, 16
+; VI-NEXT: s_lshr_b32 s55, s42, 8
; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
@@ -204047,138 +203233,138 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b32 s46, s26, 8
; VI-NEXT: v_writelane_b32 v33, s46, 14
; VI-NEXT: s_lshr_b32 s46, s25, 24
-; VI-NEXT: s_add_i32 s24, s24, 0x30000
; VI-NEXT: v_writelane_b32 v33, s46, 15
; VI-NEXT: s_lshr_b32 s46, s25, 16
-; VI-NEXT: s_add_i32 s23, s23, 0x30000
+; VI-NEXT: s_add_i32 s24, s24, 0x30000
; VI-NEXT: v_writelane_b32 v33, s46, 16
-; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: s_lshr_b32 s46, s25, 8
; VI-NEXT: v_writelane_b32 v33, s46, 17
+; VI-NEXT: s_lshr_b32 s46, s24, 16
+; VI-NEXT: s_add_i32 s23, s23, 0x30000
+; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: s_lshr_b32 s46, s24, 8
+; VI-NEXT: v_writelane_b32 v33, s46, 19
; VI-NEXT: s_lshr_b32 s46, s23, 24
; VI-NEXT: s_add_i32 s22, s22, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 18
+; VI-NEXT: v_writelane_b32 v33, s46, 20
; VI-NEXT: s_lshr_b32 s46, s23, 16
; VI-NEXT: s_add_i32 s21, s21, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 19
+; VI-NEXT: v_writelane_b32 v33, s46, 21
; VI-NEXT: s_lshr_b32 s46, s22, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 20
+; VI-NEXT: v_writelane_b32 v33, s46, 22
; VI-NEXT: s_lshr_b32 s46, s21, 24
; VI-NEXT: s_add_i32 s20, s20, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 21
+; VI-NEXT: v_writelane_b32 v33, s46, 23
; VI-NEXT: s_lshr_b32 s46, s21, 16
; VI-NEXT: s_add_i32 s19, s19, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 22
+; VI-NEXT: v_writelane_b32 v33, s46, 24
; VI-NEXT: s_lshr_b32 s46, s20, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 23
+; VI-NEXT: v_writelane_b32 v33, s46, 25
; VI-NEXT: s_lshr_b32 s46, s19, 24
; VI-NEXT: s_add_i32 s18, s18, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 24
+; VI-NEXT: v_writelane_b32 v33, s46, 26
; VI-NEXT: s_lshr_b32 s46, s19, 16
; VI-NEXT: s_add_i32 s17, s17, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 25
+; VI-NEXT: v_writelane_b32 v33, s46, 27
; VI-NEXT: s_lshr_b32 s46, s18, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 26
+; VI-NEXT: v_writelane_b32 v33, s46, 28
; VI-NEXT: s_lshr_b32 s46, s17, 24
; VI-NEXT: s_add_i32 s16, s16, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 27
+; VI-NEXT: v_writelane_b32 v33, s46, 29
; VI-NEXT: s_lshr_b32 s46, s17, 16
; VI-NEXT: s_add_i32 s5, s5, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 28
+; VI-NEXT: v_writelane_b32 v33, s46, 30
; VI-NEXT: s_lshr_b32 s46, s16, 16
-; VI-NEXT: v_writelane_b32 v33, s46, 29
+; VI-NEXT: v_writelane_b32 v33, s46, 31
; VI-NEXT: s_lshr_b32 s46, s5, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 30
+; VI-NEXT: v_writelane_b32 v33, s46, 32
; VI-NEXT: s_lshr_b32 s46, s5, 16
; VI-NEXT: s_add_i32 s4, s4, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 31
+; VI-NEXT: v_writelane_b32 v33, s46, 33
; VI-NEXT: s_lshr_b32 s46, s5, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 32
+; VI-NEXT: v_writelane_b32 v33, s46, 34
; VI-NEXT: s_lshr_b32 s46, s4, 16
; VI-NEXT: s_add_i32 s7, s7, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 33
+; VI-NEXT: v_writelane_b32 v33, s46, 35
; VI-NEXT: s_lshr_b32 s46, s4, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 34
+; VI-NEXT: v_writelane_b32 v33, s46, 36
; VI-NEXT: s_lshr_b32 s46, s7, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 35
+; VI-NEXT: v_writelane_b32 v33, s46, 37
; VI-NEXT: s_lshr_b32 s46, s7, 16
; VI-NEXT: s_add_i32 s6, s6, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 36
+; VI-NEXT: v_writelane_b32 v33, s46, 38
; VI-NEXT: s_lshr_b32 s46, s7, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 37
+; VI-NEXT: v_writelane_b32 v33, s46, 39
; VI-NEXT: s_lshr_b32 s46, s6, 16
; VI-NEXT: s_add_i32 s9, s9, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 38
+; VI-NEXT: v_writelane_b32 v33, s46, 40
; VI-NEXT: s_lshr_b32 s46, s6, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 39
+; VI-NEXT: v_writelane_b32 v33, s46, 41
; VI-NEXT: s_lshr_b32 s46, s9, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 40
+; VI-NEXT: v_writelane_b32 v33, s46, 42
; VI-NEXT: s_lshr_b32 s46, s9, 16
; VI-NEXT: s_add_i32 s8, s8, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 41
+; VI-NEXT: v_writelane_b32 v33, s46, 43
; VI-NEXT: s_lshr_b32 s46, s9, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 42
+; VI-NEXT: v_writelane_b32 v33, s46, 44
; VI-NEXT: s_lshr_b32 s46, s8, 16
; VI-NEXT: s_add_i32 s11, s11, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 43
+; VI-NEXT: v_writelane_b32 v33, s46, 45
; VI-NEXT: s_lshr_b32 s46, s8, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 44
+; VI-NEXT: v_writelane_b32 v33, s46, 46
; VI-NEXT: s_lshr_b32 s46, s11, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 45
+; VI-NEXT: v_writelane_b32 v33, s46, 47
; VI-NEXT: s_lshr_b32 s46, s11, 16
; VI-NEXT: s_add_i32 s10, s10, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 46
+; VI-NEXT: v_writelane_b32 v33, s46, 48
; VI-NEXT: s_lshr_b32 s46, s11, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 47
+; VI-NEXT: v_writelane_b32 v33, s46, 49
; VI-NEXT: s_lshr_b32 s46, s10, 16
; VI-NEXT: s_add_i32 s13, s13, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 48
+; VI-NEXT: v_writelane_b32 v33, s46, 50
; VI-NEXT: s_lshr_b32 s46, s10, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 49
+; VI-NEXT: v_writelane_b32 v33, s46, 51
; VI-NEXT: s_lshr_b32 s46, s13, 24
-; VI-NEXT: v_writelane_b32 v33, s46, 50
+; VI-NEXT: v_writelane_b32 v33, s46, 52
; VI-NEXT: s_lshr_b32 s46, s13, 16
; VI-NEXT: s_add_i32 s12, s12, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 51
+; VI-NEXT: v_writelane_b32 v33, s46, 53
; VI-NEXT: s_lshr_b32 s46, s13, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 52
+; VI-NEXT: v_writelane_b32 v33, s46, 54
; VI-NEXT: s_lshr_b32 s46, s12, 16
; VI-NEXT: s_add_i32 s15, s15, 0x30000
-; VI-NEXT: v_writelane_b32 v33, s46, 53
-; VI-NEXT: s_lshr_b32 s46, s12, 8
-; VI-NEXT: v_writelane_b32 v33, s46, 54
-; VI-NEXT: s_lshr_b32 s46, s15, 24
-; VI-NEXT: s_add_i32 s14, s14, 0x30000
; VI-NEXT: v_writelane_b32 v33, s46, 55
-; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s46, s12, 8
; VI-NEXT: s_add_i32 s43, s43, 0x30000
; VI-NEXT: s_add_i32 s42, s42, 0x30000
; VI-NEXT: s_add_i32 s41, s41, 0x30000
; VI-NEXT: s_add_i32 s40, s40, 0x30000
+; VI-NEXT: s_add_i32 s14, s14, 0x30000
; VI-NEXT: v_writelane_b32 v33, s46, 56
-; VI-NEXT: s_lshr_b32 s46, s14, 16
-; VI-NEXT: s_lshr_b32 s71, s25, 8
-; VI-NEXT: s_lshr_b32 s87, s24, 8
-; VI-NEXT: s_lshr_b32 s86, s23, 8
-; VI-NEXT: s_lshr_b32 s64, s22, 8
-; VI-NEXT: s_lshr_b32 s66, s21, 8
-; VI-NEXT: s_lshr_b32 s54, s20, 8
-; VI-NEXT: s_lshr_b32 s82, s19, 8
+; VI-NEXT: s_lshr_b32 s46, s15, 16
+; VI-NEXT: s_lshr_b32 s66, s23, 8
+; VI-NEXT: s_lshr_b32 s87, s22, 8
+; VI-NEXT: s_lshr_b32 s51, s21, 8
+; VI-NEXT: s_lshr_b32 s50, s20, 8
+; VI-NEXT: s_lshr_b32 s53, s19, 8
; VI-NEXT: s_lshr_b32 s81, s18, 8
-; VI-NEXT: s_lshr_b32 s67, s17, 8
-; VI-NEXT: s_lshr_b32 s68, s16, 8
-; VI-NEXT: s_lshr_b32 s69, s15, 8
+; VI-NEXT: s_lshr_b32 s69, s17, 8
+; VI-NEXT: s_lshr_b32 s84, s16, 8
+; VI-NEXT: s_lshr_b32 s71, s15, 24
; VI-NEXT: v_writelane_b32 v33, s46, 57
-; VI-NEXT: s_lshr_b32 s83, s14, 8
-; VI-NEXT: s_lshr_b32 s84, s41, 24
-; VI-NEXT: s_lshr_b32 s80, s41, 16
-; VI-NEXT: s_lshr_b32 s51, s41, 8
-; VI-NEXT: s_lshr_b32 s50, s40, 16
-; VI-NEXT: s_lshr_b32 s85, s40, 8
-; VI-NEXT: s_lshr_b32 s55, s43, 24
-; VI-NEXT: s_lshr_b32 s65, s43, 16
-; VI-NEXT: s_lshr_b32 s52, s43, 8
-; VI-NEXT: s_lshr_b32 s53, s42, 16
-; VI-NEXT: s_lshr_b32 s70, s42, 8
+; VI-NEXT: s_lshr_b32 s83, s15, 8
+; VI-NEXT: s_lshr_b32 s80, s14, 16
+; VI-NEXT: s_lshr_b32 s82, s14, 8
+; VI-NEXT: s_lshr_b32 s86, s41, 24
+; VI-NEXT: s_lshr_b32 s52, s41, 16
+; VI-NEXT: s_lshr_b32 s85, s41, 8
+; VI-NEXT: s_lshr_b32 s65, s40, 16
+; VI-NEXT: s_lshr_b32 s54, s40, 8
+; VI-NEXT: s_lshr_b32 s64, s43, 24
+; VI-NEXT: s_lshr_b32 s67, s43, 16
+; VI-NEXT: s_lshr_b32 s68, s43, 8
+; VI-NEXT: s_lshr_b32 s70, s42, 16
+; VI-NEXT: s_lshr_b32 s55, s42, 8
; VI-NEXT: s_lshr_b64 s[78:79], s[44:45], 24
; VI-NEXT: s_lshr_b64 s[88:89], s[28:29], 24
; VI-NEXT: s_lshr_b64 s[90:91], s[26:27], 24
@@ -204196,25 +203382,27 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: s_lshr_b64 s[74:75], s[40:41], 24
; VI-NEXT: s_lshr_b64 s[76:77], s[42:43], 24
; VI-NEXT: .LBB99_3: ; %end
-; VI-NEXT: v_mov_b32_e32 v2, s68
-; VI-NEXT: v_mov_b32_e32 v4, s67
+; VI-NEXT: v_mov_b32_e32 v2, s84
+; VI-NEXT: v_mov_b32_e32 v4, s69
; VI-NEXT: v_mov_b32_e32 v1, 0xc0c0004
; VI-NEXT: v_perm_b32 v3, s16, v2, v1
; VI-NEXT: v_perm_b32 v2, s17, v4, v1
; VI-NEXT: v_mov_b32_e32 v4, s81
-; VI-NEXT: v_mov_b32_e32 v6, s82
+; VI-NEXT: v_mov_b32_e32 v6, s53
; VI-NEXT: v_perm_b32 v5, s18, v4, v1
; VI-NEXT: v_perm_b32 v4, s19, v6, v1
-; VI-NEXT: v_mov_b32_e32 v6, s54
-; VI-NEXT: v_mov_b32_e32 v8, s66
+; VI-NEXT: v_mov_b32_e32 v6, s50
+; VI-NEXT: v_mov_b32_e32 v8, s51
; VI-NEXT: v_perm_b32 v7, s20, v6, v1
; VI-NEXT: v_perm_b32 v6, s21, v8, v1
-; VI-NEXT: v_mov_b32_e32 v8, s64
-; VI-NEXT: v_mov_b32_e32 v11, s86
+; VI-NEXT: v_mov_b32_e32 v8, s87
+; VI-NEXT: v_mov_b32_e32 v11, s66
+; VI-NEXT: v_readlane_b32 s16, v33, 19
; VI-NEXT: v_perm_b32 v9, s22, v8, v1
; VI-NEXT: v_perm_b32 v8, s23, v11, v1
-; VI-NEXT: v_mov_b32_e32 v11, s87
-; VI-NEXT: v_mov_b32_e32 v14, s71
+; VI-NEXT: v_mov_b32_e32 v11, s16
+; VI-NEXT: v_readlane_b32 s16, v33, 17
+; VI-NEXT: v_mov_b32_e32 v14, s16
; VI-NEXT: v_readlane_b32 s16, v33, 14
; VI-NEXT: v_perm_b32 v12, s24, v11, v1
; VI-NEXT: v_perm_b32 v11, s25, v14, v1
@@ -204228,122 +203416,108 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: v_readlane_b32 s16, v33, 7
; VI-NEXT: v_mov_b32_e32 v10, s48
; VI-NEXT: v_mov_b32_e32 v23, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 29
+; VI-NEXT: v_readlane_b32 s16, v33, 31
; VI-NEXT: v_perm_b32 v10, s16, v10, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 27
+; VI-NEXT: v_readlane_b32 s16, v33, 29
; VI-NEXT: v_mov_b32_e32 v24, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 28
+; VI-NEXT: v_readlane_b32 s16, v33, 30
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_perm_b32 v24, s16, v24, v1
; VI-NEXT: v_or_b32_e32 v3, v3, v10
; VI-NEXT: v_mov_b32_e32 v13, s38
-; VI-NEXT: v_readlane_b32 s16, v33, 26
+; VI-NEXT: v_readlane_b32 s16, v33, 28
; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v24
; VI-NEXT: v_perm_b32 v13, s16, v13, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 24
+; VI-NEXT: v_readlane_b32 s16, v33, 26
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
; VI-NEXT: v_mov_b32_e32 v25, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 25
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 27
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
; VI-NEXT: v_perm_b32 v25, s16, v25, v1
; VI-NEXT: v_or_b32_e32 v2, v5, v2
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
; VI-NEXT: v_mov_b32_e32 v16, s36
-; VI-NEXT: v_readlane_b32 s16, v33, 23
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 25
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
; VI-NEXT: v_perm_b32 v16, s16, v16, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 21
+; VI-NEXT: v_readlane_b32 s16, v33, 23
; VI-NEXT: v_or_b32_e32 v2, v4, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 12, v0
; VI-NEXT: v_mov_b32_e32 v26, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 22
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 24
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
; VI-NEXT: v_perm_b32 v26, s16, v26, v1
; VI-NEXT: v_or_b32_e32 v2, v7, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 16, v0
; VI-NEXT: v_mov_b32_e32 v19, s34
-; VI-NEXT: v_readlane_b32 s16, v33, 20
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 22
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
; VI-NEXT: v_perm_b32 v19, s16, v19, v1
-; VI-NEXT: v_readlane_b32 s16, v33, 18
+; VI-NEXT: v_readlane_b32 s16, v33, 20
; VI-NEXT: v_or_b32_e32 v2, v6, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 20, v0
; VI-NEXT: v_mov_b32_e32 v27, s16
-; VI-NEXT: v_readlane_b32 s16, v33, 19
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 21
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
; VI-NEXT: v_perm_b32 v27, s16, v27, v1
; VI-NEXT: v_or_b32_e32 v2, v9, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 24, v0
; VI-NEXT: v_mov_b32_e32 v20, s30
-; VI-NEXT: v_readlane_b32 s16, v33, 17
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s16, v33, 18
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v27
; VI-NEXT: v_perm_b32 v20, s16, v20, v1
; VI-NEXT: v_readlane_b32 s16, v33, 15
; VI-NEXT: v_or_b32_e32 v2, v8, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
; VI-NEXT: v_mov_b32_e32 v28, s16
; VI-NEXT: v_readlane_b32 s16, v33, 16
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
; VI-NEXT: v_perm_b32 v28, s16, v28, v1
; VI-NEXT: v_or_b32_e32 v2, v12, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 32, v0
; VI-NEXT: v_mov_b32_e32 v21, s90
; VI-NEXT: v_readlane_b32 s16, v33, 13
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v28
; VI-NEXT: v_perm_b32 v21, s16, v21, v1
; VI-NEXT: v_readlane_b32 s16, v33, 10
; VI-NEXT: v_or_b32_e32 v2, v11, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 36, v0
; VI-NEXT: v_mov_b32_e32 v29, s16
; VI-NEXT: v_readlane_b32 s16, v33, 11
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
; VI-NEXT: v_perm_b32 v29, s16, v29, v1
; VI-NEXT: v_or_b32_e32 v2, v15, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v0
; VI-NEXT: v_mov_b32_e32 v22, s88
; VI-NEXT: v_readlane_b32 s16, v33, 8
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
; VI-NEXT: v_perm_b32 v22, s16, v22, v1
; VI-NEXT: v_readlane_b32 s16, v33, 5
; VI-NEXT: v_or_b32_e32 v2, v14, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 44, v0
; VI-NEXT: v_perm_b32 v18, s28, v17, v1
; VI-NEXT: v_mov_b32_e32 v30, s16
; VI-NEXT: v_readlane_b32 s16, v33, 6
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; VI-NEXT: v_perm_b32 v30, s16, v30, v1
; VI-NEXT: v_readlane_b32 s16, v33, 4
; VI-NEXT: v_or_b32_e32 v2, v18, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 48, v0
; VI-NEXT: v_perm_b32 v17, s29, v23, v1
; VI-NEXT: v_mov_b32_e32 v23, s78
; VI-NEXT: v_mov_b32_e32 v31, s16
; VI-NEXT: v_readlane_b32 s16, v33, 3
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v30
; VI-NEXT: v_perm_b32 v3, s16, v23, v1
; VI-NEXT: v_or_b32_e32 v2, v17, v2
-; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_perm_b32 v2, s44, v31, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
; VI-NEXT: v_readlane_b32 s16, v33, 2
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_readlane_b32 s16, v33, 0
; VI-NEXT: v_mov_b32_e32 v3, s16
@@ -204352,165 +203526,146 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: v_perm_b32 v2, s45, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s76
-; VI-NEXT: v_mov_b32_e32 v2, s70
-; VI-NEXT: v_perm_b32 v3, s53, v3, v1
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:60
+; VI-NEXT: v_mov_b32_e32 v2, s55
+; VI-NEXT: v_perm_b32 v3, s70, v3, v1
; VI-NEXT: v_perm_b32 v2, s42, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 64, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v3, s55
-; VI-NEXT: v_mov_b32_e32 v2, s52
-; VI-NEXT: v_perm_b32 v3, s65, v3, v1
+; VI-NEXT: v_mov_b32_e32 v3, s64
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:64
+; VI-NEXT: v_mov_b32_e32 v2, s68
+; VI-NEXT: v_perm_b32 v3, s67, v3, v1
; VI-NEXT: v_perm_b32 v2, s43, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x44, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s74
-; VI-NEXT: v_mov_b32_e32 v2, s85
-; VI-NEXT: v_perm_b32 v3, s50, v3, v1
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
+; VI-NEXT: v_mov_b32_e32 v2, s54
+; VI-NEXT: v_perm_b32 v3, s65, v3, v1
; VI-NEXT: v_perm_b32 v2, s40, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x48, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v3, s84
-; VI-NEXT: v_mov_b32_e32 v2, s51
-; VI-NEXT: v_perm_b32 v3, s80, v3, v1
+; VI-NEXT: v_mov_b32_e32 v3, s86
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:72
+; VI-NEXT: v_mov_b32_e32 v2, s85
+; VI-NEXT: v_perm_b32 v3, s52, v3, v1
; VI-NEXT: v_perm_b32 v2, s41, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x4c, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v2, s83
-; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s72
-; VI-NEXT: v_readlane_b32 s14, v33, 57
-; VI-NEXT: v_perm_b32 v3, s14, v3, v1
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
+; VI-NEXT: v_mov_b32_e32 v2, s82
+; VI-NEXT: v_perm_b32 v3, s80, v3, v1
+; VI-NEXT: v_perm_b32 v2, s14, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x50, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 55
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_mov_b32_e32 v3, s14
-; VI-NEXT: v_readlane_b32 s14, v33, 56
-; VI-NEXT: v_mov_b32_e32 v2, s69
+; VI-NEXT: v_mov_b32_e32 v3, s71
+; VI-NEXT: v_readlane_b32 s14, v33, 57
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:80
+; VI-NEXT: v_mov_b32_e32 v2, s83
; VI-NEXT: v_perm_b32 v3, s14, v3, v1
; VI-NEXT: v_perm_b32 v2, s15, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x54, v0
-; VI-NEXT: v_readlane_b32 s14, v33, 54
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s14, v33, 56
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:84
; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_perm_b32 v2, s12, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s62
-; VI-NEXT: v_readlane_b32 s12, v33, 53
+; VI-NEXT: v_readlane_b32 s12, v33, 55
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 52
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s12, v33, 54
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
; VI-NEXT: v_mov_b32_e32 v2, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 50
+; VI-NEXT: v_readlane_b32 s12, v33, 52
; VI-NEXT: v_mov_b32_e32 v3, s12
-; VI-NEXT: v_readlane_b32 s12, v33, 51
+; VI-NEXT: v_readlane_b32 s12, v33, 53
; VI-NEXT: v_perm_b32 v3, s12, v3, v1
; VI-NEXT: v_perm_b32 v2, s13, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x5c, v0
-; VI-NEXT: v_readlane_b32 s12, v33, 49
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s12, v33, 51
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:92
; VI-NEXT: v_mov_b32_e32 v2, s12
; VI-NEXT: v_perm_b32 v2, s10, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s60
-; VI-NEXT: v_readlane_b32 s10, v33, 48
+; VI-NEXT: v_readlane_b32 s10, v33, 50
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x60, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 47
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s10, v33, 49
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
; VI-NEXT: v_mov_b32_e32 v2, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 45
+; VI-NEXT: v_readlane_b32 s10, v33, 47
; VI-NEXT: v_mov_b32_e32 v3, s10
-; VI-NEXT: v_readlane_b32 s10, v33, 46
+; VI-NEXT: v_readlane_b32 s10, v33, 48
; VI-NEXT: v_perm_b32 v3, s10, v3, v1
; VI-NEXT: v_perm_b32 v2, s11, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0
-; VI-NEXT: v_readlane_b32 s10, v33, 44
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s10, v33, 46
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:100
; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_perm_b32 v2, s8, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s58
-; VI-NEXT: v_readlane_b32 s8, v33, 43
+; VI-NEXT: v_readlane_b32 s8, v33, 45
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x68, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 42
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s8, v33, 44
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
; VI-NEXT: v_mov_b32_e32 v2, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 40
+; VI-NEXT: v_readlane_b32 s8, v33, 42
; VI-NEXT: v_mov_b32_e32 v3, s8
-; VI-NEXT: v_readlane_b32 s8, v33, 41
+; VI-NEXT: v_readlane_b32 s8, v33, 43
; VI-NEXT: v_perm_b32 v3, s8, v3, v1
; VI-NEXT: v_perm_b32 v2, s9, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x6c, v0
-; VI-NEXT: v_readlane_b32 s8, v33, 39
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s8, v33, 41
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:108
; VI-NEXT: v_mov_b32_e32 v2, s8
; VI-NEXT: v_perm_b32 v2, s6, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s56
-; VI-NEXT: v_readlane_b32 s6, v33, 38
+; VI-NEXT: v_readlane_b32 s6, v33, 40
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x70, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 37
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s6, v33, 39
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
; VI-NEXT: v_mov_b32_e32 v2, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 35
+; VI-NEXT: v_readlane_b32 s6, v33, 37
; VI-NEXT: v_mov_b32_e32 v3, s6
-; VI-NEXT: v_readlane_b32 s6, v33, 36
+; VI-NEXT: v_readlane_b32 s6, v33, 38
; VI-NEXT: v_perm_b32 v3, s6, v3, v1
; VI-NEXT: v_perm_b32 v2, s7, v2, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0
-; VI-NEXT: v_readlane_b32 s6, v33, 34
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s6, v33, 36
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_perm_b32 v2, s4, v2, v1
; VI-NEXT: v_mov_b32_e32 v3, s46
-; VI-NEXT: v_readlane_b32 s4, v33, 33
+; VI-NEXT: v_readlane_b32 s4, v33, 35
; VI-NEXT: v_perm_b32 v3, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 0x78, v0
-; VI-NEXT: v_readlane_b32 s4, v33, 32
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_readlane_b32 s4, v33, 34
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
; VI-NEXT: v_mov_b32_e32 v2, s4
-; VI-NEXT: v_readlane_b32 s4, v33, 30
+; VI-NEXT: v_readlane_b32 s4, v33, 32
; VI-NEXT: v_mov_b32_e32 v3, s4
-; VI-NEXT: v_readlane_b32 s4, v33, 31
+; VI-NEXT: v_readlane_b32 s4, v33, 33
; VI-NEXT: v_perm_b32 v2, s5, v2, v1
; VI-NEXT: v_perm_b32 v1, s4, v3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v0, vcc, 0x7c, v0
; VI-NEXT: v_readlane_b32 s30, v32, 30
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:124
; VI-NEXT: v_readlane_b32 s31, v32, 31
; VI-NEXT: v_readlane_b32 s87, v32, 29
; VI-NEXT: v_readlane_b32 s86, v32, 28
@@ -204553,28 +203708,28 @@ define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i3
; VI-NEXT: ; kill: killed $sgpr46
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: ; kill: killed $sgpr46
-; VI-NEXT: ; implicit-def: $sgpr68
-; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr84
+; VI-NEXT: ; implicit-def: $sgpr69
; VI-NEXT: ; implicit-def: $sgpr81
-; VI-NEXT: ; implicit-def: $sgpr82
-; VI-NEXT: ; implicit-def: $sgpr54
-; VI-NEXT: ; implicit-def: $sgpr66
-; VI-NEXT: ; implicit-def: $sgpr64
-; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr53
+; VI-NEXT: ; implicit-def: $sgpr50
+; VI-NEXT: ; implicit-def: $sgpr51
; VI-NEXT: ; implicit-def: $sgpr87
-; VI-NEXT: ; implicit-def: $sgpr71
+; VI-NEXT: ; implicit-def: $sgpr66
+; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr70
-; VI-NEXT: ; implicit-def: $sgpr53
-; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr68
+; VI-NEXT: ; implicit-def: $sgpr67
+; VI-NEXT: ; implicit-def: $sgpr64
+; VI-NEXT: ; implicit-def: $sgpr54
; VI-NEXT: ; implicit-def: $sgpr65
-; VI-NEXT: ; implicit-def: $sgpr55
; VI-NEXT: ; implicit-def: $sgpr85
-; VI-NEXT: ; implicit-def: $sgpr50
-; VI-NEXT: ; implicit-def: $sgpr51
+; VI-NEXT: ; implicit-def: $sgpr52
+; VI-NEXT: ; implicit-def: $sgpr86
+; VI-NEXT: ; implicit-def: $sgpr82
; VI-NEXT: ; implicit-def: $sgpr80
-; VI-NEXT: ; implicit-def: $sgpr84
; VI-NEXT: ; implicit-def: $sgpr83
-; VI-NEXT: ; implicit-def: $sgpr69
+; VI-NEXT: ; implicit-def: $sgpr71
; VI-NEXT: ; implicit-def: $sgpr48
; VI-NEXT: ; implicit-def: $sgpr38
; VI-NEXT: ; implicit-def: $sgpr36
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
index aba9755a4f357..8c4e9d42304f9 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
@@ -2392,7 +2392,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr37
@@ -2403,7 +2403,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr14
@@ -2431,7 +2431,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
@@ -2441,7 +2441,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -2475,7 +2475,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
@@ -2485,7 +2485,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -2516,11 +2516,10 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v32, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -2528,8 +2527,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
@@ -2540,8 +2538,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -2552,20 +2549,18 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
@@ -2576,8 +2571,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -2588,8 +2582,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v13
@@ -2600,8 +2593,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v19
@@ -2612,8 +2604,7 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -2741,56 +2732,47 @@ define <40 x i8> @bitcast_v10i32_to_v40i8(<10 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v2, v38, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v35, v14, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v3, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v1, v4, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v30, v13, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v1, v5, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v28, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v23, v22, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v1, v8, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -3359,13 +3341,11 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s42, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s19, 0xff
; SI-NEXT: s_lshl_b32 s7, s91, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -3374,11 +3354,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s89, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s20, 0xff
; SI-NEXT: s_lshl_b32 s7, s40, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -3387,11 +3366,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s21, 0xff
; SI-NEXT: s_lshl_b32 s7, s88, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -3400,11 +3378,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s78, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s22, 0xff
; SI-NEXT: s_lshl_b32 s7, s14, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -3413,11 +3390,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s23, 0xff
; SI-NEXT: s_lshl_b32 s7, s77, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -3426,11 +3402,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s9, s75, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s24, 0xff
; SI-NEXT: s_lshl_b32 s7, s8, 8
; SI-NEXT: s_and_b32 s6, s6, 0xff
@@ -3439,11 +3414,10 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s25, 0xff
; SI-NEXT: s_lshl_b32 s5, s74, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -3452,12 +3426,11 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s72, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
; SI-NEXT: .LBB13_4:
@@ -3586,72 +3559,63 @@ define inreg <40 x i8> @bitcast_v10i32_to_v40i8_scalar(<10 x i32> inreg %a, i32
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s59
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v3, s60, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_perm_b32 v3, s57, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s46
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s56
; VI-NEXT: v_perm_b32 v3, s47, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s45
; VI-NEXT: v_perm_b32 v3, s44, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s41
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v3, s42, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s40
; VI-NEXT: v_perm_b32 v3, s29, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s28
; VI-NEXT: v_mov_b32_e32 v3, s26
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_perm_b32 v2, s27, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
; VI-NEXT: .LBB13_4:
@@ -9027,7 +8991,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr37
@@ -9038,7 +9002,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr14
@@ -9066,7 +9030,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
@@ -9076,7 +9040,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -9110,7 +9074,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
@@ -9120,7 +9084,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -9151,11 +9115,10 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v32, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -9163,8 +9126,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
@@ -9175,8 +9137,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -9187,20 +9148,18 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
@@ -9211,8 +9170,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -9223,8 +9181,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v13
@@ -9235,8 +9192,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v19
@@ -9247,8 +9203,7 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -9376,56 +9331,47 @@ define <40 x i8> @bitcast_v10f32_to_v40i8(<10 x float> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v2, v38, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v35, v14, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v3, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v1, v4, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v30, v13, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v1, v5, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v28, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v23, v22, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v1, v8, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -9919,10 +9865,10 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: .LBB33_2: ; %cmp.true
; SI-NEXT: v_add_f32_e64 v5, s21, 1.0
; SI-NEXT: v_add_f32_e64 v6, s20, 1.0
-; SI-NEXT: v_add_f32_e64 v12, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v11, s17, 1.0
; SI-NEXT: v_add_f32_e64 v13, s16, 1.0
; SI-NEXT: v_add_f32_e64 v7, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v10, s18, 1.0
+; SI-NEXT: v_add_f32_e64 v8, s18, 1.0
; SI-NEXT: v_readfirstlane_b32 s16, v6
; SI-NEXT: v_readfirstlane_b32 s17, v5
; SI-NEXT: v_add_f32_e64 v3, s23, 1.0
@@ -9932,7 +9878,7 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[26:27], s[16:17], 24
; SI-NEXT: s_lshr_b64 s[28:29], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[40:41], s[16:17], 8
-; SI-NEXT: v_readfirstlane_b32 s16, v10
+; SI-NEXT: v_readfirstlane_b32 s16, v8
; SI-NEXT: v_readfirstlane_b32 s17, v7
; SI-NEXT: v_readfirstlane_b32 s8, v2
; SI-NEXT: v_readfirstlane_b32 s9, v1
@@ -9942,7 +9888,7 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[44:45], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[46:47], s[16:17], 8
; SI-NEXT: v_readfirstlane_b32 s16, v13
-; SI-NEXT: v_readfirstlane_b32 s17, v12
+; SI-NEXT: v_readfirstlane_b32 s17, v11
; SI-NEXT: s_lshr_b64 s[4:5], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[6:7], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[8:9], s[8:9], 8
@@ -9952,9 +9898,9 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[56:57], s[16:17], 24
; SI-NEXT: s_lshr_b64 s[58:59], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 8
-; SI-NEXT: v_lshrrev_b32_e32 v8, 24, v1
-; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v11, 8, v1
+; SI-NEXT: v_lshrrev_b32_e32 v9, 24, v1
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v12, 8, v1
; SI-NEXT: v_lshrrev_b32_e32 v14, 24, v3
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v3
@@ -9964,9 +9910,9 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v7
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v7
-; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v12
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v11
+; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11
+; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v11
; SI-NEXT: s_branch .LBB33_5
; SI-NEXT: .LBB33_3:
; SI-NEXT: ; implicit-def: $sgpr60
@@ -10002,8 +9948,8 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: s_branch .LBB33_2
; SI-NEXT: .LBB33_4:
; SI-NEXT: v_mov_b32_e32 v13, s16
-; SI-NEXT: v_mov_b32_e32 v12, s17
-; SI-NEXT: v_mov_b32_e32 v10, s18
+; SI-NEXT: v_mov_b32_e32 v11, s17
+; SI-NEXT: v_mov_b32_e32 v8, s18
; SI-NEXT: v_mov_b32_e32 v7, s19
; SI-NEXT: v_mov_b32_e32 v6, s20
; SI-NEXT: v_mov_b32_e32 v5, s21
@@ -10023,9 +9969,9 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v16, s92
; SI-NEXT: v_mov_b32_e32 v15, s90
; SI-NEXT: v_mov_b32_e32 v14, s88
-; SI-NEXT: v_mov_b32_e32 v11, s94
-; SI-NEXT: v_mov_b32_e32 v9, s93
-; SI-NEXT: v_mov_b32_e32 v8, s91
+; SI-NEXT: v_mov_b32_e32 v12, s94
+; SI-NEXT: v_mov_b32_e32 v10, s93
+; SI-NEXT: v_mov_b32_e32 v9, s91
; SI-NEXT: .LBB33_5: ; %end
; SI-NEXT: v_and_b32_e32 v13, 0xff, v13
; SI-NEXT: s_lshl_b32 s5, s60, 8
@@ -10036,115 +9982,106 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: s_or_b32 s5, s7, s5
; SI-NEXT: v_or_b32_e32 v13, s5, v13
-; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v25
-; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_and_b32_e32 v13, 0xff, v24
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: s_lshl_b32 s5, s46, 8
-; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_lshlrev_b32_e32 v23, 24, v23
-; SI-NEXT: v_or_b32_e32 v10, s5, v10
+; SI-NEXT: v_or_b32_e32 v8, s5, v8
; SI-NEXT: s_and_b32 s5, s44, 0xff
-; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v13, v23, v13
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s42, 24
-; SI-NEXT: v_or_b32_e32 v12, v12, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 4, v0
-; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v12, v13, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v10, s5, v10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v12, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v10, v12, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v22
-; SI-NEXT: v_or_b32_e32 v7, v7, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v21
+; SI-NEXT: v_or_b32_e32 v8, s5, v8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: s_lshl_b32 s5, s40, 8
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v20
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v25
; SI-NEXT: v_or_b32_e32 v6, s5, v6
; SI-NEXT: s_and_b32 s5, s28, 0xff
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v10, v12, v10
+; SI-NEXT: v_or_b32_e32 v11, v11, v13
+; SI-NEXT: v_and_b32_e32 v13, 0xff, v24
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s26, 24
-; SI-NEXT: v_or_b32_e32 v7, v7, v10
-; SI-NEXT: v_add_i32_e32 v10, vcc, 12, v0
+; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; SI-NEXT: v_lshlrev_b32_e32 v23, 24, v23
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v7, v10, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v6, s5, v6
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v6, v7, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v13, v23, v13
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v19
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v18
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v22
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: s_lshl_b32 s5, s14, 8
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v17
+; SI-NEXT: v_or_b32_e32 v11, v11, v13
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v21
; SI-NEXT: v_or_b32_e32 v4, s5, v4
; SI-NEXT: s_and_b32 s5, s12, 0xff
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v20
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s10, 24
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 20, v0
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v11, v8
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v19
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v18
; SI-NEXT: v_or_b32_e32 v4, s5, v4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v5, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v16
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v15
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_lshl_b32 s5, s8, 8
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v14
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v17
; SI-NEXT: v_or_b32_e32 v2, s5, v2
; SI-NEXT: s_and_b32 s5, s6, 0xff
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v16
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s4, s4, 24
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 28, v0
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v15
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v14
+; SI-NEXT: v_or_b32_e32 v2, s4, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v11
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v12
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v10
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v9
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -10311,56 +10248,47 @@ define inreg <40 x i8> @bitcast_v10f32_to_v40i8_scalar(<10 x float> inreg %a, i3
; VI-NEXT: v_perm_b32 v10, v36, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v9, v34, v14, s4
; VI-NEXT: v_perm_b32 v7, v7, v35, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v7, v8, v33, s4
; VI-NEXT: v_perm_b32 v8, v31, v32, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v7, v29, v13, s4
; VI-NEXT: v_perm_b32 v5, v5, v30, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v5, v6, v28, s4
; VI-NEXT: v_perm_b32 v6, v26, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v5, v24, v12, s4
; VI-NEXT: v_perm_b32 v3, v3, v25, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v3, v4, v23, s4
; VI-NEXT: v_perm_b32 v4, v21, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v3, v19, v11, s4
; VI-NEXT: v_perm_b32 v1, v1, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v2, v18, s4
; VI-NEXT: v_perm_b32 v2, v16, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -15099,16 +15027,16 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v5
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v4
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v4
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v1
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
; SI-NEXT: v_lshlrev_b32_e32 v44, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v43, 16, v23
; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v46, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v45, 16, v18
; SI-NEXT: s_waitcnt expcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v17
; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v15
@@ -15118,90 +15046,90 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v14
; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v12
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr18
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr54
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr16
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr14
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB48_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v30, v1, v44
+; SI-NEXT: v_or_b32_e32 v26, v1, v44
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v31, v1, v43
+; SI-NEXT: v_or_b32_e32 v27, v1, v43
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v22, v1, v46
+; SI-NEXT: v_or_b32_e32 v21, v1, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v21, v1, v45
+; SI-NEXT: v_or_b32_e32 v22, v1, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v20, v1, v56
+; SI-NEXT: v_or_b32_e32 v19, v1, v56
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v18, v1, v47
+; SI-NEXT: v_or_b32_e32 v20, v1, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v17, v1, v58
+; SI-NEXT: v_or_b32_e32 v16, v1, v58
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v16, v1, v57
+; SI-NEXT: v_or_b32_e32 v17, v1, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v14, v1, v60
+; SI-NEXT: v_or_b32_e32 v11, v1, v60
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v11, v1, v59
-; SI-NEXT: v_alignbit_b32 v35, v31, v30, 24
-; SI-NEXT: v_alignbit_b32 v38, v31, v30, 16
-; SI-NEXT: v_alignbit_b32 v50, v31, v30, 8
-; SI-NEXT: v_alignbit_b32 v34, v21, v22, 24
-; SI-NEXT: v_alignbit_b32 v36, v21, v22, 16
-; SI-NEXT: v_alignbit_b32 v39, v21, v22, 8
-; SI-NEXT: v_alignbit_b32 v29, v18, v20, 24
-; SI-NEXT: v_alignbit_b32 v32, v18, v20, 16
-; SI-NEXT: v_alignbit_b32 v37, v18, v20, 8
-; SI-NEXT: v_alignbit_b32 v26, v16, v17, 24
-; SI-NEXT: v_alignbit_b32 v27, v16, v17, 16
-; SI-NEXT: v_alignbit_b32 v33, v16, v17, 8
-; SI-NEXT: v_alignbit_b32 v23, v11, v14, 24
-; SI-NEXT: v_alignbit_b32 v25, v11, v14, 16
-; SI-NEXT: v_alignbit_b32 v28, v11, v14, 8
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v31
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v21
-; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v18
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
-; SI-NEXT: v_bfe_u32 v42, v24, 8, 8
-; SI-NEXT: v_bfe_u32 v40, v19, 8, 8
+; SI-NEXT: v_or_b32_e32 v14, v1, v59
+; SI-NEXT: v_alignbit_b32 v34, v27, v26, 24
+; SI-NEXT: v_alignbit_b32 v37, v27, v26, 16
+; SI-NEXT: v_alignbit_b32 v48, v27, v26, 8
+; SI-NEXT: v_alignbit_b32 v31, v22, v21, 24
+; SI-NEXT: v_alignbit_b32 v35, v22, v21, 16
+; SI-NEXT: v_alignbit_b32 v39, v22, v21, 8
+; SI-NEXT: v_alignbit_b32 v29, v20, v19, 24
+; SI-NEXT: v_alignbit_b32 v32, v20, v19, 16
+; SI-NEXT: v_alignbit_b32 v38, v20, v19, 8
+; SI-NEXT: v_alignbit_b32 v25, v17, v16, 24
+; SI-NEXT: v_alignbit_b32 v30, v17, v16, 16
+; SI-NEXT: v_alignbit_b32 v36, v17, v16, 8
+; SI-NEXT: v_alignbit_b32 v24, v14, v11, 24
+; SI-NEXT: v_alignbit_b32 v28, v14, v11, 16
+; SI-NEXT: v_alignbit_b32 v33, v14, v11, 8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v27
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v22
+; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v20
+; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v17
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v14
+; SI-NEXT: v_bfe_u32 v42, v23, 8, 8
+; SI-NEXT: v_bfe_u32 v40, v18, 8, 8
; SI-NEXT: v_bfe_u32 v54, v15, 8, 8
; SI-NEXT: v_bfe_u32 v52, v13, 8, 8
-; SI-NEXT: v_bfe_u32 v49, v12, 8, 8
+; SI-NEXT: v_bfe_u32 v50, v12, 8, 8
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr3
@@ -15242,15 +15170,15 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v5, v56, v5
; SI-NEXT: v_or_b32_e32 v3, v46, v3
; SI-NEXT: v_or_b32_e32 v1, v44, v1
-; SI-NEXT: v_add_i32_e32 v14, vcc, 0x30000, v9
+; SI-NEXT: v_add_i32_e32 v11, vcc, 0x30000, v9
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v10
-; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v7
+; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v7
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v8
-; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v5
+; SI-NEXT: v_add_i32_e32 v19, vcc, s6, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v6
-; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v3
+; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v3
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v4
-; SI-NEXT: v_add_i32_e32 v30, vcc, s6, v1
+; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
@@ -15262,92 +15190,89 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v5, v47, v5
; SI-NEXT: v_or_b32_e32 v3, v45, v3
; SI-NEXT: v_or_b32_e32 v1, v43, v1
-; SI-NEXT: v_add_i32_e32 v11, vcc, s6, v9
-; SI-NEXT: v_add_i32_e32 v16, vcc, s6, v7
-; SI-NEXT: v_add_i32_e32 v18, vcc, s6, v5
-; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v3
-; SI-NEXT: v_add_i32_e32 v31, vcc, s6, v1
-; SI-NEXT: v_alignbit_b32 v35, v31, v30, 24
-; SI-NEXT: v_alignbit_b32 v38, v31, v30, 16
-; SI-NEXT: v_alignbit_b32 v50, v31, v30, 8
-; SI-NEXT: v_alignbit_b32 v34, v21, v22, 24
-; SI-NEXT: v_alignbit_b32 v36, v21, v22, 16
-; SI-NEXT: v_alignbit_b32 v39, v21, v22, 8
-; SI-NEXT: v_alignbit_b32 v29, v18, v20, 24
-; SI-NEXT: v_alignbit_b32 v32, v18, v20, 16
-; SI-NEXT: v_alignbit_b32 v37, v18, v20, 8
-; SI-NEXT: v_alignbit_b32 v26, v16, v17, 24
-; SI-NEXT: v_alignbit_b32 v27, v16, v17, 16
-; SI-NEXT: v_alignbit_b32 v33, v16, v17, 8
-; SI-NEXT: v_alignbit_b32 v23, v11, v14, 24
-; SI-NEXT: v_alignbit_b32 v25, v11, v14, 16
-; SI-NEXT: v_alignbit_b32 v28, v11, v14, 8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v31
-; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v31
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v21
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v21
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v21
-; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v18
-; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v18
-; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v18
-; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v16
-; SI-NEXT: v_lshrrev_b32_e32 v49, 24, v11
-; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v11
+; SI-NEXT: v_add_i32_e32 v14, vcc, s6, v9
+; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v7
+; SI-NEXT: v_add_i32_e32 v20, vcc, s6, v5
+; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v3
+; SI-NEXT: v_add_i32_e32 v27, vcc, s6, v1
+; SI-NEXT: v_alignbit_b32 v34, v27, v26, 24
+; SI-NEXT: v_alignbit_b32 v37, v27, v26, 16
+; SI-NEXT: v_alignbit_b32 v48, v27, v26, 8
+; SI-NEXT: v_alignbit_b32 v31, v22, v21, 24
+; SI-NEXT: v_alignbit_b32 v35, v22, v21, 16
+; SI-NEXT: v_alignbit_b32 v39, v22, v21, 8
+; SI-NEXT: v_alignbit_b32 v29, v20, v19, 24
+; SI-NEXT: v_alignbit_b32 v32, v20, v19, 16
+; SI-NEXT: v_alignbit_b32 v38, v20, v19, 8
+; SI-NEXT: v_alignbit_b32 v25, v17, v16, 24
+; SI-NEXT: v_alignbit_b32 v30, v17, v16, 16
+; SI-NEXT: v_alignbit_b32 v36, v17, v16, 8
+; SI-NEXT: v_alignbit_b32 v24, v14, v11, 24
+; SI-NEXT: v_alignbit_b32 v28, v14, v11, 16
+; SI-NEXT: v_alignbit_b32 v33, v14, v11, 8
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v27
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v27
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v27
+; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v22
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v22
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v22
+; SI-NEXT: v_lshrrev_b32_e32 v54, 24, v20
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v20
+; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v20
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v17
+; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v17
+; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v17
+; SI-NEXT: v_lshrrev_b32_e32 v50, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v12, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v14
; SI-NEXT: .LBB48_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v38
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v37
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v34
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v24
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v34
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v31
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v40
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v38
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v32
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -15355,10 +15280,9 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
@@ -15367,22 +15291,20 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v33
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v25
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
@@ -15391,32 +15313,29 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v33
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v25
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v23
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v24
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v50
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: buffer_load_dword v60, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -15442,37 +15361,37 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v4
; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1
-; VI-NEXT: ; implicit-def: $vgpr33
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr15
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr15
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr38
-; VI-NEXT: ; implicit-def: $vgpr50
+; VI-NEXT: ; implicit-def: $vgpr49
; VI-NEXT: ; implicit-def: $vgpr14
-; VI-NEXT: ; implicit-def: $vgpr37
-; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr39
; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr51
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr13
-; VI-NEXT: ; implicit-def: $vgpr49
+; VI-NEXT: ; implicit-def: $vgpr50
; VI-NEXT: ; implicit-def: $vgpr34
-; VI-NEXT: ; implicit-def: $vgpr39
-; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr48
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr12
-; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr43
@@ -15480,7 +15399,7 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr11
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr30
+; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB48_2
@@ -15489,30 +15408,30 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v30, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v31, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v8
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v39, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
; VI-NEXT: v_lshrrev_b32_e32 v52, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v2
; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v1
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
-; VI-NEXT: v_mov_b32_e32 v33, v1
-; VI-NEXT: v_mov_b32_e32 v32, v2
+; VI-NEXT: v_mov_b32_e32 v32, v1
+; VI-NEXT: v_mov_b32_e32 v30, v2
; VI-NEXT: v_mov_b32_e32 v38, v3
-; VI-NEXT: v_mov_b32_e32 v37, v4
+; VI-NEXT: v_mov_b32_e32 v36, v4
; VI-NEXT: v_mov_b32_e32 v51, v5
-; VI-NEXT: v_mov_b32_e32 v49, v6
-; VI-NEXT: v_mov_b32_e32 v40, v7
-; VI-NEXT: v_mov_b32_e32 v54, v8
+; VI-NEXT: v_mov_b32_e32 v50, v6
+; VI-NEXT: v_mov_b32_e32 v41, v7
+; VI-NEXT: v_mov_b32_e32 v40, v8
; VI-NEXT: v_mov_b32_e32 v43, v9
; VI-NEXT: v_mov_b32_e32 v42, v10
; VI-NEXT: ; implicit-def: $vgpr1
@@ -15526,127 +15445,118 @@ define <40 x i8> @bitcast_v20i16_to_v40i8(<20 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v11, 3
; VI-NEXT: v_add_u16_sdwa v17, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v20, v9, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v22, v9, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v18, v8, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v22, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v23, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_e32 v42, 3, v10
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v17
; VI-NEXT: v_add_u16_e32 v43, 3, v9
-; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v20
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v22
; VI-NEXT: v_add_u16_sdwa v19, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v24, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v54, 3, v8
+; VI-NEXT: v_add_u16_e32 v40, 3, v8
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v18
-; VI-NEXT: v_add_u16_e32 v40, 3, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v22
+; VI-NEXT: v_add_u16_e32 v41, 3, v7
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v23
; VI-NEXT: v_or_b32_e32 v10, v42, v10
; VI-NEXT: v_or_b32_e32 v9, v43, v9
-; VI-NEXT: v_add_u16_sdwa v23, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v21, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v26, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v21, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v20, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v25, v3, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v49, 3, v6
+; VI-NEXT: v_add_u16_e32 v50, 3, v6
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v19
; VI-NEXT: v_add_u16_e32 v51, 3, v5
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v24
-; VI-NEXT: v_or_b32_e32 v8, v54, v8
-; VI-NEXT: v_or_b32_e32 v7, v40, v7
+; VI-NEXT: v_or_b32_e32 v8, v40, v8
+; VI-NEXT: v_or_b32_e32 v7, v41, v7
; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[9:10]
-; VI-NEXT: v_add_u16_e32 v37, 3, v4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v21
+; VI-NEXT: v_add_u16_e32 v36, 3, v4
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v20
; VI-NEXT: v_add_u16_e32 v38, 3, v3
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v25
-; VI-NEXT: v_or_b32_e32 v6, v49, v6
+; VI-NEXT: v_or_b32_e32 v6, v50, v6
; VI-NEXT: v_or_b32_e32 v5, v51, v5
; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[7:8]
-; VI-NEXT: v_add_u16_e32 v32, 3, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; VI-NEXT: v_add_u16_e32 v33, 3, v1
+; VI-NEXT: v_add_u16_e32 v30, 3, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
+; VI-NEXT: v_add_u16_e32 v32, 3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
-; VI-NEXT: v_or_b32_e32 v4, v37, v4
+; VI-NEXT: v_or_b32_e32 v4, v36, v4
; VI-NEXT: v_or_b32_e32 v3, v38, v3
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[5:6]
-; VI-NEXT: v_or_b32_e32 v2, v32, v2
-; VI-NEXT: v_or_b32_e32 v1, v33, v1
+; VI-NEXT: v_or_b32_e32 v2, v30, v2
+; VI-NEXT: v_or_b32_e32 v1, v32, v1
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v33, 8, v7
; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v1
-; VI-NEXT: v_bfe_u32 v30, v17, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v1
+; VI-NEXT: v_bfe_u32 v31, v17, 8, 8
; VI-NEXT: v_bfe_u32 v35, v18, 8, 8
-; VI-NEXT: v_bfe_u32 v39, v19, 8, 8
-; VI-NEXT: v_bfe_u32 v52, v21, 8, 8
-; VI-NEXT: v_bfe_u32 v41, v23, 8, 8
+; VI-NEXT: v_bfe_u32 v48, v19, 8, 8
+; VI-NEXT: v_bfe_u32 v52, v20, 8, 8
+; VI-NEXT: v_bfe_u32 v55, v21, 8, 8
; VI-NEXT: .LBB48_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v2, v26, v15, s4
-; VI-NEXT: v_perm_b32 v1, v33, v55, s4
+; VI-NEXT: v_perm_b32 v1, v32, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_perm_b32 v2, v23, v41, s4
+; VI-NEXT: v_perm_b32 v2, v21, v55, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v32, v53, s4
+; VI-NEXT: v_perm_b32 v1, v30, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v14, s4
-; VI-NEXT: v_perm_b32 v1, v38, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v38, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v21, v52, s4
-; VI-NEXT: v_perm_b32 v1, v37, v48, s4
+; VI-NEXT: v_perm_b32 v2, v20, v52, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v36, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v24, v13, s4
-; VI-NEXT: v_perm_b32 v1, v51, v36, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v51, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v19, v39, s4
-; VI-NEXT: v_perm_b32 v1, v49, v34, s4
+; VI-NEXT: v_perm_b32 v2, v19, v48, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v50, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v22, v12, s4
-; VI-NEXT: v_perm_b32 v1, v40, v31, s4
+; VI-NEXT: v_perm_b32 v2, v23, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v41, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v35, s4
-; VI-NEXT: v_perm_b32 v1, v54, v29, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v40, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: v_perm_b32 v2, v22, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v43, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v17, v30, s4
+; VI-NEXT: v_perm_b32 v2, v17, v31, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v42, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -16116,13 +16026,13 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_store_dword v3, off, s[0:3], s32 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v2, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_writelane_b32 v3, s34, 0
-; SI-NEXT: v_writelane_b32 v3, s35, 1
-; SI-NEXT: v_writelane_b32 v3, s30, 2
-; SI-NEXT: v_writelane_b32 v3, s31, 3
+; SI-NEXT: v_writelane_b32 v2, s34, 0
+; SI-NEXT: v_writelane_b32 v2, s35, 1
+; SI-NEXT: v_writelane_b32 v2, s30, 2
+; SI-NEXT: v_writelane_b32 v2, s31, 3
; SI-NEXT: s_lshr_b32 s90, s25, 16
; SI-NEXT: s_lshr_b32 s35, s24, 16
; SI-NEXT: s_lshr_b32 s91, s23, 16
@@ -16167,14 +16077,14 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_and_b32 s5, s25, 0xffff
; SI-NEXT: s_lshl_b32 s15, s90, 16
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
; SI-NEXT: s_or_b32 s5, s5, s15
; SI-NEXT: s_lshr_b32 s59, s13, 8
; SI-NEXT: s_lshr_b32 s47, s11, 8
@@ -16245,14 +16155,14 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_lshr_b64 s[14:15], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[26:27], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[44:45], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[40:41], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[46:47], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
@@ -16275,7 +16185,7 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b32 s27, s5, 8
; SI-NEXT: .LBB49_3: ; %end
; SI-NEXT: s_and_b32 s12, s12, 0xff
-; SI-NEXT: s_lshl_b32 s16, s44, 8
+; SI-NEXT: s_lshl_b32 s16, s40, 8
; SI-NEXT: s_or_b32 s12, s12, s16
; SI-NEXT: s_and_b32 s16, s26, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
@@ -16293,22 +16203,21 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: s_lshl_b32 s12, s58, 8
+; SI-NEXT: s_lshl_b32 s12, s46, 8
; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: s_and_b32 s12, s42, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s28, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
; SI-NEXT: s_lshl_b32 s11, s47, 8
; SI-NEXT: s_or_b32 s10, s10, s11
@@ -16317,24 +16226,22 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s12, s57, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s10, s10, s11
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s10
+; SI-NEXT: v_mov_b32_e32 v1, s10
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s10, s60, 8
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: s_and_b32 s10, s56, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s40, 24
+; SI-NEXT: s_lshl_b32 s11, s44, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
; SI-NEXT: s_lshl_b32 s9, s43, 8
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -16343,24 +16250,22 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s10, s45, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s8, s76, 8
; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_and_b32 s8, s72, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s46, 24
+; SI-NEXT: s_lshl_b32 s9, s58, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
; SI-NEXT: s_lshl_b32 s7, s29, 8
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -16369,11 +16274,10 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s8, s41, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s6, s78, 8
; SI-NEXT: s_or_b32 s4, s4, s6
@@ -16382,11 +16286,10 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s7, s62, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s27, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -16395,30 +16298,29 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s15, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: v_readlane_b32 s30, v3, 2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: v_readlane_b32 s31, v3, 3
-; SI-NEXT: v_readlane_b32 s35, v3, 1
-; SI-NEXT: v_readlane_b32 s34, v3, 0
+; SI-NEXT: v_readlane_b32 s30, v2, 2
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: v_readlane_b32 s31, v2, 3
+; SI-NEXT: v_readlane_b32 s35, v2, 1
+; SI-NEXT: v_readlane_b32 s34, v2, 0
; SI-NEXT: s_xor_saveexec_b64 s[4:5], -1
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: s_mov_b64 exec, s[4:5]
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
; SI-NEXT: .LBB49_4:
; SI-NEXT: ; implicit-def: $sgpr12
-; SI-NEXT: ; implicit-def: $sgpr44
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr26
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr28
; SI-NEXT: ; implicit-def: $sgpr47
@@ -16426,13 +16328,13 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr56
-; SI-NEXT: ; implicit-def: $sgpr40
+; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr29
; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr27
@@ -16576,72 +16478,63 @@ define inreg <40 x i8> @bitcast_v20i16_to_v40i8_scalar(<20 x i16> inreg %a, i32
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s59
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v3, s60, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_perm_b32 v3, s57, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s46
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s56
; VI-NEXT: v_perm_b32 v3, s47, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s45
; VI-NEXT: v_perm_b32 v3, s44, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s41
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v3, s42, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s40
; VI-NEXT: v_perm_b32 v3, s29, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s28
; VI-NEXT: v_mov_b32_e32 v3, s26
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_perm_b32 v2, s27, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
; VI-NEXT: .LBB49_4:
@@ -21396,40 +21289,40 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v1
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
-; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $vgpr31
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr33
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr24
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
@@ -21437,10 +21330,10 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v43
-; SI-NEXT: v_or_b32_e32 v27, v1, v11
+; SI-NEXT: v_or_b32_e32 v25, v1, v11
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; SI-NEXT: v_or_b32_e32 v25, v1, v2
+; SI-NEXT: v_or_b32_e32 v24, v1, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v44
; SI-NEXT: v_or_b32_e32 v22, v1, v2
@@ -21465,26 +21358,26 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
; SI-NEXT: v_or_b32_e32 v17, v1, v2
-; SI-NEXT: v_alignbit_b32 v32, v25, v27, 24
-; SI-NEXT: v_alignbit_b32 v37, v25, v27, 16
-; SI-NEXT: v_alignbit_b32 v49, v25, v27, 8
-; SI-NEXT: v_alignbit_b32 v31, v23, v22, 24
-; SI-NEXT: v_alignbit_b32 v35, v23, v22, 16
-; SI-NEXT: v_alignbit_b32 v48, v23, v22, 8
-; SI-NEXT: v_alignbit_b32 v29, v21, v20, 24
+; SI-NEXT: v_alignbit_b32 v26, v24, v25, 24
+; SI-NEXT: v_alignbit_b32 v31, v24, v25, 16
+; SI-NEXT: v_alignbit_b32 v36, v24, v25, 8
+; SI-NEXT: v_alignbit_b32 v27, v23, v22, 24
+; SI-NEXT: v_alignbit_b32 v32, v23, v22, 16
+; SI-NEXT: v_alignbit_b32 v37, v23, v22, 8
+; SI-NEXT: v_alignbit_b32 v28, v21, v20, 24
; SI-NEXT: v_alignbit_b32 v33, v21, v20, 16
-; SI-NEXT: v_alignbit_b32 v39, v21, v20, 8
-; SI-NEXT: v_alignbit_b32 v26, v19, v18, 24
-; SI-NEXT: v_alignbit_b32 v30, v19, v18, 16
-; SI-NEXT: v_alignbit_b32 v36, v19, v18, 8
-; SI-NEXT: v_alignbit_b32 v24, v17, v11, 24
-; SI-NEXT: v_alignbit_b32 v28, v17, v11, 16
-; SI-NEXT: v_alignbit_b32 v34, v17, v11, 8
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v25
+; SI-NEXT: v_alignbit_b32 v38, v21, v20, 8
+; SI-NEXT: v_alignbit_b32 v29, v19, v18, 24
+; SI-NEXT: v_alignbit_b32 v34, v19, v18, 16
+; SI-NEXT: v_alignbit_b32 v39, v19, v18, 8
+; SI-NEXT: v_alignbit_b32 v30, v17, v11, 24
+; SI-NEXT: v_alignbit_b32 v35, v17, v11, 16
+; SI-NEXT: v_alignbit_b32 v48, v17, v11, 8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v24
; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v23
; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v21
; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v19
-; SI-NEXT: v_lshrrev_b32_e32 v38, 8, v17
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v17
; SI-NEXT: v_bfe_u32 v42, v16, 8, 8
; SI-NEXT: v_bfe_u32 v40, v15, 8, 8
; SI-NEXT: v_bfe_u32 v54, v14, 8, 8
@@ -21586,29 +21479,29 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v27, v1, v3
+; SI-NEXT: v_or_b32_e32 v25, v1, v3
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v16
-; SI-NEXT: v_or_b32_e32 v25, v2, v1
-; SI-NEXT: v_alignbit_b32 v32, v25, v27, 24
-; SI-NEXT: v_alignbit_b32 v37, v25, v27, 16
-; SI-NEXT: v_alignbit_b32 v49, v25, v27, 8
-; SI-NEXT: v_alignbit_b32 v31, v23, v22, 24
-; SI-NEXT: v_alignbit_b32 v35, v23, v22, 16
-; SI-NEXT: v_alignbit_b32 v48, v23, v22, 8
-; SI-NEXT: v_alignbit_b32 v29, v21, v20, 24
+; SI-NEXT: v_or_b32_e32 v24, v2, v1
+; SI-NEXT: v_alignbit_b32 v26, v24, v25, 24
+; SI-NEXT: v_alignbit_b32 v31, v24, v25, 16
+; SI-NEXT: v_alignbit_b32 v36, v24, v25, 8
+; SI-NEXT: v_alignbit_b32 v27, v23, v22, 24
+; SI-NEXT: v_alignbit_b32 v32, v23, v22, 16
+; SI-NEXT: v_alignbit_b32 v37, v23, v22, 8
+; SI-NEXT: v_alignbit_b32 v28, v21, v20, 24
; SI-NEXT: v_alignbit_b32 v33, v21, v20, 16
-; SI-NEXT: v_alignbit_b32 v39, v21, v20, 8
-; SI-NEXT: v_alignbit_b32 v26, v19, v18, 24
-; SI-NEXT: v_alignbit_b32 v30, v19, v18, 16
-; SI-NEXT: v_alignbit_b32 v36, v19, v18, 8
-; SI-NEXT: v_alignbit_b32 v24, v17, v11, 24
-; SI-NEXT: v_alignbit_b32 v28, v17, v11, 16
-; SI-NEXT: v_alignbit_b32 v34, v17, v11, 8
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v25
+; SI-NEXT: v_alignbit_b32 v38, v21, v20, 8
+; SI-NEXT: v_alignbit_b32 v29, v19, v18, 24
+; SI-NEXT: v_alignbit_b32 v34, v19, v18, 16
+; SI-NEXT: v_alignbit_b32 v39, v19, v18, 8
+; SI-NEXT: v_alignbit_b32 v30, v17, v11, 24
+; SI-NEXT: v_alignbit_b32 v35, v17, v11, 16
+; SI-NEXT: v_alignbit_b32 v48, v17, v11, 8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v24
; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v23
; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v21
; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v19
-; SI-NEXT: v_lshrrev_b32_e32 v38, 8, v17
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v17
; SI-NEXT: v_bfe_u32 v42, v16, 8, 8
; SI-NEXT: v_bfe_u32 v40, v15, 8, 8
; SI-NEXT: v_bfe_u32 v54, v14, 8, 8
@@ -21616,18 +21509,18 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_bfe_u32 v50, v12, 8, 8
; SI-NEXT: .LBB60_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v37
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v32
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v16
@@ -21636,20 +21529,18 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v32
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v31
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v27
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
@@ -21660,20 +21551,18 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v20
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v38
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
@@ -21684,20 +21573,18 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v18
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v39
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v34
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v19
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
@@ -21708,23 +21595,21 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v24
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v30
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v38
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -21732,8 +21617,7 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -21750,14 +21634,14 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v9
; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v4
; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v1
; VI-NEXT: ; implicit-def: $vgpr16
; VI-NEXT: ; implicit-def: $vgpr15
@@ -21765,12 +21649,12 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr48
; VI-NEXT: ; implicit-def: $vgpr37
; VI-NEXT: ; implicit-def: $vgpr14
-; VI-NEXT: ; implicit-def: $vgpr36
+; VI-NEXT: ; implicit-def: $vgpr35
; VI-NEXT: ; implicit-def: $vgpr38
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr13
; VI-NEXT: ; implicit-def: $vgpr32
-; VI-NEXT: ; implicit-def: $vgpr35
+; VI-NEXT: ; implicit-def: $vgpr36
; VI-NEXT: ; implicit-def: $vgpr31
; VI-NEXT: ; implicit-def: $vgpr12
; VI-NEXT: ; implicit-def: $vgpr29
@@ -21794,11 +21678,11 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v36, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v5
; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v2
; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v2
@@ -21808,23 +21692,23 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: s_cbranch_execz .LBB60_4
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v11, 0x200
-; VI-NEXT: v_add_f16_sdwa v23, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v23
+; VI-NEXT: v_add_f16_sdwa v21, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v21
; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
; VI-NEXT: v_add_f16_sdwa v26, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v39, v2, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v26
; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
-; VI-NEXT: v_add_f16_sdwa v21, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v20, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v38, v1, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v21
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v20
; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
; VI-NEXT: v_add_f16_sdwa v25, v3, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v36, v4, v12
+; VI-NEXT: v_or_b32_e32 v37, v4, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v25
; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
; VI-NEXT: v_add_f16_sdwa v19, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v35, v3, v12
+; VI-NEXT: v_or_b32_e32 v36, v3, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v19
; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
; VI-NEXT: v_add_f16_sdwa v24, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
@@ -21835,23 +21719,23 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v33, v5, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v18
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_add_f16_sdwa v22, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v23, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v31, v8, v12
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v22
+; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v23
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
; VI-NEXT: v_add_f16_sdwa v17, v10, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_sdwa v20, v9, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v22, v9, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v30, v7, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v17
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v20
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v22
; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
; VI-NEXT: v_or_b32_e32 v29, v10, v12
; VI-NEXT: v_or_b32_e32 v28, v9, v11
; VI-NEXT: v_lshrrev_b64 v[11:12], 24, v[28:29]
; VI-NEXT: v_lshrrev_b64 v[12:13], 24, v[30:31]
; VI-NEXT: v_lshrrev_b64 v[13:14], 24, v[33:34]
-; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[35:36]
+; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[36:37]
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[38:39]
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v29
; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v28
@@ -21859,15 +21743,15 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v30
; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v34
; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v33
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v36
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v35
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v37
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v36
; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v39
; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v38
; VI-NEXT: v_bfe_u32 v30, v17, 8, 8
; VI-NEXT: v_bfe_u32 v33, v18, 8, 8
-; VI-NEXT: v_bfe_u32 v35, v19, 8, 8
-; VI-NEXT: v_bfe_u32 v38, v21, 8, 8
-; VI-NEXT: v_bfe_u32 v48, v23, 8, 8
+; VI-NEXT: v_bfe_u32 v36, v19, 8, 8
+; VI-NEXT: v_bfe_u32 v38, v20, 8, 8
+; VI-NEXT: v_bfe_u32 v48, v21, 8, 8
; VI-NEXT: .LBB60_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
@@ -21877,59 +21761,50 @@ define <40 x i8> @bitcast_v20f16_to_v40i8(<20 x half> %a, i32 %b) #0 {
; VI-NEXT: v_or_b32_e32 v1, v1, v15
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v1, v2, v39, s4
-; VI-NEXT: v_perm_b32 v2, v23, v48, s4
+; VI-NEXT: v_perm_b32 v2, v21, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v14, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v3, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v21, v38, s4
-; VI-NEXT: v_perm_b32 v1, v4, v36, s4
+; VI-NEXT: v_perm_b32 v2, v20, v38, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v35, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v24, v13, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v1, v5, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v19, v35, s4
+; VI-NEXT: v_perm_b32 v2, v19, v36, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v32, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v22, v12, s4
+; VI-NEXT: v_perm_b32 v2, v23, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v33, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v1, v8, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: v_perm_b32 v2, v22, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v17, v30, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -22450,11 +22325,11 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
; SI-NEXT: s_or_b32 s5, s5, s15
; SI-NEXT: s_lshr_b32 s43, s13, 8
; SI-NEXT: s_lshr_b32 s41, s11, 8
@@ -22466,9 +22341,9 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_bfe_u32 s57, s94, 0x80008
; SI-NEXT: s_bfe_u32 s59, s30, 0x80008
; SI-NEXT: s_bfe_u32 s61, s34, 0x80008
-; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8
; SI-NEXT: s_cbranch_execnz .LBB61_4
@@ -22578,14 +22453,14 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[40:41], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[28:29], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[42:43], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[58:59], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[46:47], s[10:11], 8
; SI-NEXT: s_lshr_b64 s[44:45], s[8:9], 24
-; SI-NEXT: s_lshr_b64 s[46:47], s[8:9], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[60:61], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[56:57], s[6:7], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[6:7], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[62:63], s[6:7], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[6:7], 8
-; SI-NEXT: s_lshr_b64 s[62:63], s[4:5], 24
+; SI-NEXT: s_lshr_b64 s[72:73], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[74:75], s[4:5], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[4:5], 8
; SI-NEXT: s_lshr_b32 s43, s13, 8
@@ -22607,21 +22482,21 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr45
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $sgpr58
+; SI-NEXT: ; implicit-def: $sgpr46
; SI-NEXT: ; implicit-def: $sgpr42
; SI-NEXT: ; implicit-def: $sgpr28
; SI-NEXT: ; implicit-def: $sgpr41
; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr60
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr29
; SI-NEXT: ; implicit-def: $sgpr57
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr72
-; SI-NEXT: ; implicit-def: $sgpr56
+; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr27
; SI-NEXT: ; implicit-def: $sgpr59
; SI-NEXT: ; implicit-def: $sgpr15
@@ -22629,7 +22504,7 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr62
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: s_branch .LBB61_2
; SI-NEXT: .LBB61_4:
; SI-NEXT: v_mov_b32_e32 v1, s34
@@ -22663,26 +22538,24 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v7, v10, v7
; SI-NEXT: v_or_b32_e32 v7, s12, v7
; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: s_lshl_b32 s12, s58, 8
+; SI-NEXT: s_lshl_b32 s12, s46, 8
; SI-NEXT: s_or_b32 s10, s10, s12
; SI-NEXT: s_and_b32 s12, s42, 0xff
; SI-NEXT: s_lshl_b32 s12, s12, 16
; SI-NEXT: s_lshl_b32 s13, s28, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v10, vcc, 4, v0
; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen
-; SI-NEXT: buffer_store_dword v7, v10, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 8, v0
-; SI-NEXT: v_mov_b32_e32 v10, s10
+; SI-NEXT: v_mov_b32_e32 v7, s10
; SI-NEXT: s_and_b32 s10, s11, 0xff
; SI-NEXT: s_lshl_b32 s11, s41, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: buffer_store_dword v10, v7, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v9
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v4, v7, v4
@@ -22690,23 +22563,22 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s10, s60, 8
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: s_and_b32 s10, s46, 0xff
+; SI-NEXT: s_and_b32 s10, s56, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: s_lshl_b32 s11, s44, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v7, vcc, 12, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v4, v7, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v4, vcc, 16, v0
-; SI-NEXT: v_mov_b32_e32 v7, s8
+; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
; SI-NEXT: s_lshl_b32 s9, s29, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: buffer_store_dword v7, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v8
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: v_or_b32_e32 v3, v4, v3
@@ -22714,23 +22586,22 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s6, s6, 0xff
; SI-NEXT: s_lshl_b32 s8, s76, 8
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: s_and_b32 s8, s72, 0xff
+; SI-NEXT: s_and_b32 s8, s62, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s56, 24
+; SI-NEXT: s_lshl_b32 s9, s58, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v4, vcc, 20, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 24, v0
-; SI-NEXT: v_mov_b32_e32 v4, s6
+; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
; SI-NEXT: s_lshl_b32 s7, s27, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: buffer_store_dword v4, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v6
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: v_or_b32_e32 v2, v3, v2
@@ -22740,28 +22611,27 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s74, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
-; SI-NEXT: s_lshl_b32 s7, s62, 24
+; SI-NEXT: s_lshl_b32 s7, s72, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v3, vcc, 28, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s15, 8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v5
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
; SI-NEXT: v_readlane_b32 s30, v12, 2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: v_readlane_b32 s31, v12, 3
; SI-NEXT: v_readlane_b32 s35, v12, 1
; SI-NEXT: v_readlane_b32 s34, v12, 0
@@ -22814,50 +22684,50 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; VI-NEXT: v_add_f16_e32 v7, s4, v1
; VI-NEXT: s_lshr_b32 s4, s16, 16
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
-; VI-NEXT: v_add_f16_e32 v14, s17, v1
-; VI-NEXT: v_add_f16_e32 v12, s4, v1
+; VI-NEXT: v_add_f16_e32 v12, s17, v1
+; VI-NEXT: v_add_f16_e32 v10, s4, v1
; VI-NEXT: s_lshr_b32 s4, s19, 16
-; VI-NEXT: v_or_b32_e32 v39, v14, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
-; VI-NEXT: v_add_f16_e32 v21, s16, v1
+; VI-NEXT: v_or_b32_e32 v39, v12, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_add_f16_e32 v17, s16, v1
; VI-NEXT: v_add_f16_e32 v8, s4, v1
; VI-NEXT: s_lshr_b32 s4, s18, 16
-; VI-NEXT: v_or_b32_e32 v38, v21, v2
+; VI-NEXT: v_or_b32_e32 v38, v17, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v8
-; VI-NEXT: v_add_f16_e32 v16, s19, v1
+; VI-NEXT: v_add_f16_e32 v15, s19, v1
; VI-NEXT: v_add_f16_e32 v13, s4, v1
; VI-NEXT: s_lshr_b32 s4, s21, 16
-; VI-NEXT: v_or_b32_e32 v36, v16, v2
+; VI-NEXT: v_or_b32_e32 v36, v15, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_add_f16_e32 v23, s18, v1
+; VI-NEXT: v_add_f16_e32 v22, s18, v1
; VI-NEXT: v_add_f16_e32 v9, s4, v1
; VI-NEXT: s_lshr_b32 s4, s20, 16
-; VI-NEXT: v_or_b32_e32 v35, v23, v2
+; VI-NEXT: v_or_b32_e32 v35, v22, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v9
; VI-NEXT: v_add_f16_e32 v18, s21, v1
-; VI-NEXT: v_add_f16_e32 v15, s4, v1
+; VI-NEXT: v_add_f16_e32 v16, s4, v1
; VI-NEXT: s_lshr_b32 s4, s23, 16
; VI-NEXT: v_or_b32_e32 v33, v18, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
; VI-NEXT: v_add_f16_e32 v24, s20, v1
-; VI-NEXT: v_add_f16_e32 v10, s4, v1
+; VI-NEXT: v_add_f16_e32 v11, s4, v1
; VI-NEXT: s_lshr_b32 s4, s22, 16
; VI-NEXT: v_or_b32_e32 v32, v24, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
; VI-NEXT: v_add_f16_e32 v20, s23, v1
-; VI-NEXT: v_add_f16_e32 v17, s4, v1
+; VI-NEXT: v_add_f16_e32 v19, s4, v1
; VI-NEXT: s_lshr_b32 s4, s25, 16
; VI-NEXT: v_or_b32_e32 v31, v20, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
; VI-NEXT: v_add_f16_e32 v25, s22, v1
-; VI-NEXT: v_add_f16_e32 v11, s4, v1
+; VI-NEXT: v_add_f16_e32 v14, s4, v1
; VI-NEXT: s_lshr_b32 s4, s24, 16
; VI-NEXT: v_or_b32_e32 v30, v25, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; VI-NEXT: v_add_f16_e32 v22, s25, v1
-; VI-NEXT: v_add_f16_e32 v19, s4, v1
-; VI-NEXT: v_or_b32_e32 v28, v22, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; VI-NEXT: v_add_f16_e32 v23, s25, v1
+; VI-NEXT: v_add_f16_e32 v21, s4, v1
+; VI-NEXT: v_or_b32_e32 v28, v23, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
; VI-NEXT: v_add_f16_e32 v26, s24, v1
; VI-NEXT: v_or_b32_e32 v27, v26, v2
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[27:28]
@@ -22875,8 +22745,8 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v35
; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v39
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v38
-; VI-NEXT: v_bfe_u32 v27, v11, 8, 8
-; VI-NEXT: v_bfe_u32 v30, v10, 8, 8
+; VI-NEXT: v_bfe_u32 v27, v14, 8, 8
+; VI-NEXT: v_bfe_u32 v30, v11, 8, 8
; VI-NEXT: v_bfe_u32 v32, v9, 8, 8
; VI-NEXT: v_bfe_u32 v35, v8, 8, 8
; VI-NEXT: v_bfe_u32 v38, v7, 8, 8
@@ -22914,26 +22784,26 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; VI-NEXT: ; implicit-def: $sgpr46
; VI-NEXT: s_branch .LBB61_2
; VI-NEXT: .LBB61_4:
-; VI-NEXT: v_mov_b32_e32 v12, s76
+; VI-NEXT: v_mov_b32_e32 v10, s76
; VI-NEXT: v_mov_b32_e32 v7, s75
; VI-NEXT: v_mov_b32_e32 v13, s74
; VI-NEXT: v_mov_b32_e32 v8, s73
-; VI-NEXT: v_mov_b32_e32 v15, s72
+; VI-NEXT: v_mov_b32_e32 v16, s72
; VI-NEXT: v_mov_b32_e32 v9, s63
-; VI-NEXT: v_mov_b32_e32 v17, s62
-; VI-NEXT: v_mov_b32_e32 v10, s61
-; VI-NEXT: v_mov_b32_e32 v19, s60
-; VI-NEXT: v_mov_b32_e32 v11, s59
-; VI-NEXT: v_mov_b32_e32 v21, s16
-; VI-NEXT: v_mov_b32_e32 v14, s17
-; VI-NEXT: v_mov_b32_e32 v23, s18
-; VI-NEXT: v_mov_b32_e32 v16, s19
+; VI-NEXT: v_mov_b32_e32 v19, s62
+; VI-NEXT: v_mov_b32_e32 v11, s61
+; VI-NEXT: v_mov_b32_e32 v21, s60
+; VI-NEXT: v_mov_b32_e32 v14, s59
+; VI-NEXT: v_mov_b32_e32 v17, s16
+; VI-NEXT: v_mov_b32_e32 v12, s17
+; VI-NEXT: v_mov_b32_e32 v22, s18
+; VI-NEXT: v_mov_b32_e32 v15, s19
; VI-NEXT: v_mov_b32_e32 v24, s20
; VI-NEXT: v_mov_b32_e32 v18, s21
; VI-NEXT: v_mov_b32_e32 v25, s22
; VI-NEXT: v_mov_b32_e32 v20, s23
; VI-NEXT: v_mov_b32_e32 v26, s24
-; VI-NEXT: v_mov_b32_e32 v22, s25
+; VI-NEXT: v_mov_b32_e32 v23, s25
; VI-NEXT: v_mov_b32_e32 v27, s46
; VI-NEXT: v_mov_b32_e32 v30, s47
; VI-NEXT: v_mov_b32_e32 v32, s56
@@ -22956,65 +22826,56 @@ define inreg <40 x i8> @bitcast_v20f16_to_v40i8_scalar(<20 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v5, s4
; VI-NEXT: .LBB61_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v5, v12, v5, s4
-; VI-NEXT: v_perm_b32 v12, v21, v48, s4
+; VI-NEXT: v_perm_b32 v5, v10, v5, s4
+; VI-NEXT: v_perm_b32 v10, v17, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
-; VI-NEXT: v_or_b32_e32 v5, v12, v5
+; VI-NEXT: v_or_b32_e32 v5, v10, v5
; VI-NEXT: v_perm_b32 v7, v7, v38, s4
; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v5, v14, v39, s4
+; VI-NEXT: v_perm_b32 v5, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 4, v0
; VI-NEXT: v_perm_b32 v4, v13, v4, s4
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v5, v23, v37, s4
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v5, v22, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v4, v5, v4
-; VI-NEXT: v_add_u32_e32 v5, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v5, v8, v35, s4
-; VI-NEXT: v_perm_b32 v4, v16, v36, s4
+; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v4, v15, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v4, v4, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 12, v0
-; VI-NEXT: v_perm_b32 v3, v15, v3, s4
-; VI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v3, v16, v3, s4
+; VI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v4, v24, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v3, v4, v3
-; VI-NEXT: v_add_u32_e32 v4, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v4, v9, v32, s4
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v3, v18, v33, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 20, v0
-; VI-NEXT: v_perm_b32 v2, v17, v2, s4
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v2, v19, v2, s4
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v3, v25, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v2, v3, v2
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v3, v10, v30, s4
+; VI-NEXT: v_perm_b32 v3, v11, v30, s4
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v2, v20, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: v_perm_b32 v1, v19, v1, s4
-; VI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; VI-NEXT: v_perm_b32 v1, v21, v1, s4
+; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v2, v26, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v11, v27, s4
-; VI-NEXT: v_perm_b32 v1, v22, v6, s4
+; VI-NEXT: v_perm_b32 v2, v14, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v23, v6, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -30035,7 +29896,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr37
@@ -30043,10 +29904,10 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr14
@@ -30056,7 +29917,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -30069,22 +29930,22 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v14, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v15, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v16, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v19, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v21, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v19, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -30108,22 +29969,22 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v14, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v15, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v16, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v19, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v21, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v19, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -30154,11 +30015,10 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v32, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -30166,8 +30026,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
@@ -30178,32 +30037,29 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v19
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
@@ -30214,8 +30070,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -30226,8 +30081,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v13
@@ -30238,11 +30092,10 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v19
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v20
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -30250,8 +30103,7 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -30374,56 +30226,47 @@ define <40 x i8> @bitcast_v5f64_to_v40i8(<5 x double> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v2, v38, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v35, v14, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v3, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v1, v4, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v30, v13, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v1, v5, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v28, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v23, v22, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v1, v8, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -30908,30 +30751,30 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[60:61], s[16:17], 8
; SI-NEXT: s_cbranch_execnz .LBB75_4
; SI-NEXT: .LBB75_2: ; %cmp.true
-; SI-NEXT: v_add_f64 v[8:9], s[20:21], 1.0
+; SI-NEXT: v_add_f64 v[7:8], s[20:21], 1.0
; SI-NEXT: v_add_f64 v[15:16], s[18:19], 1.0
-; SI-NEXT: v_lshr_b64 v[22:23], v[8:9], 8
; SI-NEXT: v_add_f64 v[1:2], s[24:25], 1.0
+; SI-NEXT: v_lshr_b64 v[22:23], v[7:8], 8
; SI-NEXT: v_lshr_b64 v[23:24], v[15:16], 24
; SI-NEXT: v_add_f64 v[3:4], s[22:23], 1.0
; SI-NEXT: v_add_f64 v[20:21], s[16:17], 1.0
+; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 16
; SI-NEXT: v_lshr_b64 v[24:25], v[15:16], 16
; SI-NEXT: v_lshr_b64 v[10:11], v[1:2], 8
; SI-NEXT: v_lshr_b64 v[25:26], v[15:16], 8
; SI-NEXT: v_lshr_b64 v[11:12], v[3:4], 24
; SI-NEXT: v_lshr_b64 v[26:27], v[20:21], 24
-; SI-NEXT: v_lshr_b64 v[5:6], v[1:2], 24
; SI-NEXT: v_lshr_b64 v[12:13], v[3:4], 16
-; SI-NEXT: v_lshr_b64 v[17:18], v[8:9], 24
+; SI-NEXT: v_lshr_b64 v[17:18], v[7:8], 24
; SI-NEXT: v_lshr_b64 v[27:28], v[20:21], 16
; SI-NEXT: v_readfirstlane_b32 s17, v21
; SI-NEXT: v_readfirstlane_b32 s19, v16
-; SI-NEXT: v_readfirstlane_b32 s21, v9
+; SI-NEXT: v_readfirstlane_b32 s21, v8
; SI-NEXT: v_readfirstlane_b32 s23, v4
; SI-NEXT: v_readfirstlane_b32 s25, v2
-; SI-NEXT: v_lshr_b64 v[6:7], v[1:2], 16
+; SI-NEXT: v_lshr_b64 v[5:6], v[1:2], 24
; SI-NEXT: v_lshr_b64 v[13:14], v[3:4], 8
-; SI-NEXT: v_lshr_b64 v[18:19], v[8:9], 16
+; SI-NEXT: v_lshr_b64 v[18:19], v[7:8], 16
; SI-NEXT: v_lshr_b64 v[28:29], v[20:21], 8
; SI-NEXT: s_lshr_b32 s72, s25, 24
; SI-NEXT: s_lshr_b32 s73, s25, 16
@@ -30984,7 +30827,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: .LBB75_4:
; SI-NEXT: v_mov_b32_e32 v20, s16
; SI-NEXT: v_mov_b32_e32 v15, s18
-; SI-NEXT: v_mov_b32_e32 v8, s20
+; SI-NEXT: v_mov_b32_e32 v7, s20
; SI-NEXT: v_mov_b32_e32 v3, s22
; SI-NEXT: v_mov_b32_e32 v1, s24
; SI-NEXT: v_mov_b32_e32 v28, s60
@@ -31000,7 +30843,7 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v12, s12
; SI-NEXT: v_mov_b32_e32 v11, s8
; SI-NEXT: v_mov_b32_e32 v10, s6
-; SI-NEXT: v_mov_b32_e32 v6, s4
+; SI-NEXT: v_mov_b32_e32 v9, s4
; SI-NEXT: v_mov_b32_e32 v5, s10
; SI-NEXT: .LBB75_5: ; %end
; SI-NEXT: v_and_b32_e32 v2, 0xff, v20
@@ -31011,11 +30854,11 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: v_and_b32_e32 v4, 0xff, v27
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s93, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v26
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s92, 24
-; SI-NEXT: v_or_b32_e32 v4, v7, v4
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
@@ -31023,11 +30866,10 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v25
; SI-NEXT: s_and_b32 s4, s19, 0xff
; SI-NEXT: s_lshl_b32 s5, s91, 8
@@ -31035,24 +30877,22 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: v_and_b32_e32 v4, 0xff, v24
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s90, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v23
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s89, 24
-; SI-NEXT: v_or_b32_e32 v4, v7, v4
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 8, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v8
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v22
; SI-NEXT: s_and_b32 s4, s21, 0xff
; SI-NEXT: s_lshl_b32 s5, s88, 8
@@ -31060,22 +30900,21 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: v_and_b32_e32 v4, 0xff, v18
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s79, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v17
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v17
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s78, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v4, v7, v4
+; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 16, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v13
; SI-NEXT: s_and_b32 s4, s23, 0xff
@@ -31085,7 +30924,6 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s76, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v11
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s75, 24
@@ -31094,23 +30932,21 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 24, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v10
; SI-NEXT: s_and_b32 s4, s25, 0xff
; SI-NEXT: s_lshl_b32 s5, s74, 8
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v6
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v9
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s73, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v5
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s72, 24
@@ -31119,13 +30955,11 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -31178,9 +31012,9 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; VI-NEXT: v_lshrrev_b64 v[14:15], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[9:10]
; VI-NEXT: v_lshrrev_b32_e32 v16, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v23, 24, v4
; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v4
@@ -31189,19 +31023,19 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; VI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v30, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v5
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v34, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v8
; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v7
; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v7
; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v9
; VI-NEXT: s_branch .LBB75_5
; VI-NEXT: .LBB75_3:
; VI-NEXT: ; implicit-def: $sgpr75
@@ -31246,27 +31080,27 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v6, s21
; VI-NEXT: v_mov_b32_e32 v8, s19
; VI-NEXT: v_mov_b32_e32 v10, s17
-; VI-NEXT: v_mov_b32_e32 v34, s76
-; VI-NEXT: v_mov_b32_e32 v36, s75
-; VI-NEXT: v_mov_b32_e32 v31, s74
+; VI-NEXT: v_mov_b32_e32 v33, s76
+; VI-NEXT: v_mov_b32_e32 v35, s75
+; VI-NEXT: v_mov_b32_e32 v30, s74
; VI-NEXT: v_mov_b32_e32 v32, s73
; VI-NEXT: v_mov_b32_e32 v26, s72
; VI-NEXT: v_mov_b32_e32 v27, s63
; VI-NEXT: v_mov_b32_e32 v21, s62
; VI-NEXT: v_mov_b32_e32 v22, s61
-; VI-NEXT: v_mov_b32_e32 v18, s60
+; VI-NEXT: v_mov_b32_e32 v17, s60
; VI-NEXT: v_mov_b32_e32 v19, s59
; VI-NEXT: v_mov_b32_e32 v16, s58
-; VI-NEXT: v_mov_b32_e32 v17, s57
+; VI-NEXT: v_mov_b32_e32 v18, s57
; VI-NEXT: v_mov_b32_e32 v20, s56
; VI-NEXT: v_mov_b32_e32 v23, s47
; VI-NEXT: v_mov_b32_e32 v24, s46
; VI-NEXT: v_mov_b32_e32 v25, s45
; VI-NEXT: v_mov_b32_e32 v28, s44
; VI-NEXT: v_mov_b32_e32 v29, s43
-; VI-NEXT: v_mov_b32_e32 v30, s42
-; VI-NEXT: v_mov_b32_e32 v33, s41
-; VI-NEXT: v_mov_b32_e32 v35, s40
+; VI-NEXT: v_mov_b32_e32 v31, s42
+; VI-NEXT: v_mov_b32_e32 v34, s41
+; VI-NEXT: v_mov_b32_e32 v36, s40
; VI-NEXT: v_mov_b32_e32 v37, s29
; VI-NEXT: v_mov_b32_e32 v38, s28
; VI-NEXT: v_mov_b32_e32 v39, s27
@@ -31278,8 +31112,8 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v11, s12
; VI-NEXT: .LBB75_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v15, v34, v15, s4
-; VI-NEXT: v_perm_b32 v9, v9, v36, s4
+; VI-NEXT: v_perm_b32 v15, v33, v15, s4
+; VI-NEXT: v_perm_b32 v9, v9, v35, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_or_b32_e32 v9, v9, v15
; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen
@@ -31287,56 +31121,47 @@ define inreg <40 x i8> @bitcast_v5f64_to_v40i8_scalar(<5 x double> inreg %a, i32
; VI-NEXT: v_perm_b32 v10, v39, v38, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v9, v31, v14, s4
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v9, v30, v14, s4
; VI-NEXT: v_perm_b32 v7, v7, v32, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v7, v8, v37, s4
-; VI-NEXT: v_perm_b32 v8, v35, v33, s4
+; VI-NEXT: v_perm_b32 v8, v36, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v7, v26, v13, s4
; VI-NEXT: v_perm_b32 v5, v5, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v5, v6, v30, s4
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v5, v6, v31, s4
; VI-NEXT: v_perm_b32 v6, v29, v28, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v5, v21, v12, s4
; VI-NEXT: v_perm_b32 v3, v3, v22, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v3, v4, v25, s4
; VI-NEXT: v_perm_b32 v4, v24, v23, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v3, v18, v11, s4
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v3, v17, v11, s4
; VI-NEXT: v_perm_b32 v1, v1, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v2, v20, s4
-; VI-NEXT: v_perm_b32 v2, v17, v16, s4
+; VI-NEXT: v_perm_b32 v2, v18, v16, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -33882,7 +33707,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr37
@@ -33890,10 +33715,10 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr14
@@ -33903,7 +33728,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr12
; SI-NEXT: ; implicit-def: $vgpr11
-; SI-NEXT: ; implicit-def: $vgpr19
+; SI-NEXT: ; implicit-def: $vgpr20
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -33916,22 +33741,22 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v14, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v15, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v16, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v19, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v21, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v19, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -33960,22 +33785,22 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v14, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v15, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v16, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v19, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v21, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v26, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v27, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v29, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v28, v4, v3, 8
; SI-NEXT: v_alignbit_b32 v32, v2, v1, 24
; SI-NEXT: v_alignbit_b32 v33, v2, v1, 16
; SI-NEXT: v_alignbit_b32 v35, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v10
-; SI-NEXT: v_lshrrev_b32_e32 v19, 8, v10
+; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v8
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v28, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v6
; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v6
; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v6
; SI-NEXT: v_lshrrev_b32_e32 v34, 24, v4
@@ -34006,11 +33831,10 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v32, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -34018,8 +33842,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
@@ -34030,32 +33853,29 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v20
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v19
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
@@ -34066,8 +33886,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -34078,8 +33897,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v13
@@ -34090,11 +33908,10 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v19
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v20
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -34102,8 +33919,7 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
@@ -34231,56 +34047,47 @@ define <40 x i8> @bitcast_v5i64_to_v40i8(<5 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_perm_b32 v2, v38, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v35, v14, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v1, v3, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v1, v4, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v30, v13, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_perm_b32 v1, v5, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v28, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v25, v12, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v23, v22, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v1, v8, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v20, v11, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v21, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v18, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
;
@@ -34855,13 +34662,11 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s42, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: s_waitcnt expcnt(1)
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s19, 0xff
; SI-NEXT: s_lshl_b32 s7, s91, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -34870,11 +34675,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s89, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s20, 0xff
; SI-NEXT: s_lshl_b32 s7, s40, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -34883,11 +34687,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s26, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s21, 0xff
; SI-NEXT: s_lshl_b32 s7, s88, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -34896,11 +34699,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s78, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s22, 0xff
; SI-NEXT: s_lshl_b32 s7, s14, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -34909,11 +34711,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s10, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s23, 0xff
; SI-NEXT: s_lshl_b32 s7, s77, 8
; SI-NEXT: s_or_b32 s5, s5, s7
@@ -34922,11 +34723,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s9, s75, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s5, s5, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s5
+; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_and_b32 s5, s24, 0xff
; SI-NEXT: s_lshl_b32 s7, s8, 8
; SI-NEXT: s_and_b32 s6, s6, 0xff
@@ -34935,11 +34735,10 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s4, s4, 24
; SI-NEXT: s_and_b32 s5, s5, 0xffff
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s4, s5, s4
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s25, 0xff
; SI-NEXT: s_lshl_b32 s5, s74, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -34948,12 +34747,11 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s6, s72, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 36, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
; SI-NEXT: .LBB79_4:
@@ -35082,72 +34880,63 @@ define inreg <40 x i8> @bitcast_v5i64_to_v40i8_scalar(<5 x i64> inreg %a, i32 in
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s59
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s61
; VI-NEXT: v_perm_b32 v3, s60, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_perm_b32 v3, s57, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s46
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s56
; VI-NEXT: v_perm_b32 v3, s47, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s45
; VI-NEXT: v_perm_b32 v3, s44, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s41
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s43
; VI-NEXT: v_perm_b32 v3, s42, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s40
; VI-NEXT: v_perm_b32 v3, s29, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s28
; VI-NEXT: v_mov_b32_e32 v3, s26
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_perm_b32 v2, s27, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: s_setpc_b64 s[30:31]
; VI-NEXT: .LBB79_4:
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
index d43b0226756d5..cf4f7ed80699b 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
@@ -8499,36 +8499,36 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr23
@@ -8538,13 +8538,13 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; kill: killed $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -8561,40 +8561,40 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v29, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v29, v10, v9, 16
; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v34, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v52, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v41, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -8637,40 +8637,40 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v29, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v29, v10, v9, 16
; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v34, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v52, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v41, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -8686,15 +8686,15 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: .LBB24_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v58
-; SI-NEXT: v_and_b32_e32 v56, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v1, v1, v58
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
-; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v46
-; SI-NEXT: v_or_b32_e32 v46, v46, v56
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v57
+; SI-NEXT: v_and_b32_e32 v47, 0xff, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v57
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v45
+; SI-NEXT: v_or_b32_e32 v45, v45, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v1, v1, v45
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
@@ -8706,20 +8706,18 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v17, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v55
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v61
@@ -8730,11 +8728,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -8742,68 +8739,62 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v56
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v34
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v43
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v40
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v29
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -8814,8 +8805,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
@@ -8826,8 +8816,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -8838,11 +8827,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v35
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -8850,8 +8838,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
@@ -8864,11 +8851,10 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v30
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -8876,8 +8862,7 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -8918,18 +8903,15 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
@@ -8958,12 +8940,14 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr17
@@ -8973,54 +8957,53 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v26, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: v_mov_b32_e32 v27, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
; VI-NEXT: .LBB24_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -9034,166 +9017,148 @@ define <64 x i8> @bitcast_v16i32_to_v64i8(<16 x i32> %a, i32 %b) #0 {
; VI-NEXT: v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT: v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4
-; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3
-; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
-; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT: v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
+; VI-NEXT: v_add_u32_e32 v8, vcc, 3, v8
+; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v7
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v4
+; VI-NEXT: v_add_u32_e32 v3, vcc, 3, v3
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT: v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT: v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT: v_add_u32_e32 v5, vcc, 3, v5
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: .LBB24_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v21, v30, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v1, v1, v21
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v28, v63, s4
-; VI-NEXT: v_perm_b32 v2, v2, v29, s4
+; VI-NEXT: v_perm_b32 v1, v63, v62, s4
+; VI-NEXT: v_perm_b32 v2, v2, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v61, v20, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v26, s4
-; VI-NEXT: v_perm_b32 v1, v5, v57, s4
+; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v6, v47, s4
+; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v25, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
+; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v7, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v41, v40, s4
-; VI-NEXT: v_perm_b32 v1, v8, v42, s4
+; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v54, v22, s4
-; VI-NEXT: v_perm_b32 v1, v9, v55, s4
+; VI-NEXT: v_perm_b32 v2, v53, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v9, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v52, v51, s4
-; VI-NEXT: v_perm_b32 v1, v10, v53, s4
+; VI-NEXT: v_perm_b32 v2, v51, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v49, v19, s4
-; VI-NEXT: v_perm_b32 v1, v11, v50, s4
+; VI-NEXT: v_perm_b32 v2, v48, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v11, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v38, s4
-; VI-NEXT: v_perm_b32 v1, v12, v48, s4
+; VI-NEXT: v_perm_b32 v2, v38, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
-; VI-NEXT: v_perm_b32 v1, v13, v37, s4
+; VI-NEXT: v_perm_b32 v2, v35, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v13, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v33, s4
-; VI-NEXT: v_perm_b32 v1, v14, v35, s4
+; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v14, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v15, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v17, s4
+; VI-NEXT: v_perm_b32 v2, v30, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v15, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v27, v24, s4
+; VI-NEXT: v_perm_b32 v2, v26, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -10141,28 +10106,24 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s80, 24
; SI-NEXT: s_or_b32 s9, s11, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s20, 0xff
; SI-NEXT: s_lshl_b32 s9, s78, 8
; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_and_b32 s9, s76, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_lshl_b32 s11, s74, 24
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s21, 0xff
; SI-NEXT: s_lshl_b32 s9, s71, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10171,11 +10132,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s69, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s22, 0xff
; SI-NEXT: s_lshl_b32 s9, s88, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10184,11 +10144,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s62, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s23, 0xff
; SI-NEXT: s_lshl_b32 s9, s68, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10197,11 +10156,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s66, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s24, 0xff
; SI-NEXT: s_lshl_b32 s9, s60, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10210,11 +10168,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s56, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s25, 0xff
; SI-NEXT: s_lshl_b32 s9, s65, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10223,11 +10180,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s55, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s26, 0xff
; SI-NEXT: s_lshl_b32 s9, s46, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10236,11 +10192,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s42, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s27, 0xff
; SI-NEXT: s_lshl_b32 s9, s54, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10249,11 +10204,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s52, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s28, 0xff
; SI-NEXT: s_lshl_b32 s9, s40, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10262,11 +10216,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s29, 0xff
; SI-NEXT: s_lshl_b32 s9, s51, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -10275,11 +10228,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s11, s49, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s7, s10, 8
; SI-NEXT: s_or_b32 s4, s4, s7
@@ -10288,11 +10240,10 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s48, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -10301,13 +10252,12 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s38, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v4, 28
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v4, 29
; SI-NEXT: v_readlane_b32 s85, v4, 27
; SI-NEXT: v_readlane_b32 s84, v4, 26
@@ -10554,121 +10504,106 @@ define inreg <64 x i8> @bitcast_v16i32_to_v64i8_scalar(<16 x i32> inreg %a, i32
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s42
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s54
; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s50
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s52
; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s40
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s49
; VI-NEXT: v_perm_b32 v3, s48, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s37
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s39
; VI-NEXT: v_perm_b32 v3, s38, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s36
; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s30
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s34
; VI-NEXT: v_perm_b32 v3, s31, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s91
; VI-NEXT: v_perm_b32 v3, s90, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s79
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s89
; VI-NEXT: v_perm_b32 v3, s88, v3, v2
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_mov_b32_e32 v1, s78
; VI-NEXT: v_perm_b32 v3, s77, v3, v2
; VI-NEXT: v_perm_b32 v1, s26, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_mov_b32_e32 v1, s76
; VI-NEXT: v_perm_b32 v3, s75, v3, v2
; VI-NEXT: v_perm_b32 v1, s27, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_mov_b32_e32 v1, s73
; VI-NEXT: v_perm_b32 v3, s72, v3, v2
; VI-NEXT: v_perm_b32 v1, s28, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s61
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s29, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_mov_b32_e32 v1, s60
; VI-NEXT: v_perm_b32 v3, s59, v3, v2
; VI-NEXT: v_perm_b32 v1, s4, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_mov_b32_e32 v3, s56
; VI-NEXT: v_perm_b32 v1, s5, v1, v2
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: v_readlane_b32 s30, v4, 18
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: v_readlane_b32 s31, v4, 19
; VI-NEXT: v_readlane_b32 s67, v4, 17
; VI-NEXT: v_readlane_b32 s66, v4, 16
@@ -23267,36 +23202,36 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr37
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr23
@@ -23306,13 +23241,13 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; kill: killed $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -23329,40 +23264,40 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v29, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v29, v10, v9, 16
; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v34, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v52, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v41, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -23405,40 +23340,40 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v29, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v29, v10, v9, 16
; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v34, v8, v7, 24
; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
-; SI-NEXT: v_alignbit_b32 v52, v6, v5, 8
+; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
-; SI-NEXT: v_alignbit_b32 v41, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
+; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v28, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v30, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; SI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
+; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -23454,15 +23389,15 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: .LBB48_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v58
-; SI-NEXT: v_and_b32_e32 v56, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v1, v1, v58
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
-; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v46
-; SI-NEXT: v_or_b32_e32 v46, v46, v56
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v57
+; SI-NEXT: v_and_b32_e32 v47, 0xff, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v57
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v45
+; SI-NEXT: v_or_b32_e32 v45, v45, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v1, v1, v45
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
@@ -23474,20 +23409,18 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v17, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v41
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v55
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v61
@@ -23498,11 +23431,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v52
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -23510,68 +23442,62 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v56
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v34
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v43
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v40
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v29
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v29
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v53
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -23582,8 +23508,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
@@ -23594,8 +23519,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -23606,11 +23530,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v35
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -23618,8 +23541,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
@@ -23632,11 +23554,10 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v28
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v30
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -23644,8 +23565,7 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -23686,18 +23606,15 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
@@ -23726,12 +23643,14 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr17
@@ -23741,54 +23660,53 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v26, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: v_mov_b32_e32 v27, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
; VI-NEXT: .LBB48_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -23802,166 +23720,148 @@ define <64 x i8> @bitcast_v16f32_to_v64i8(<16 x float> %a, i32 %b) #0 {
; VI-NEXT: v_add_f32_e32 v12, 1.0, v12
; VI-NEXT: v_add_f32_e32 v11, 1.0, v11
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_add_f32_e32 v4, 1.0, v4
-; VI-NEXT: v_add_f32_e32 v3, 1.0, v3
-; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
-; VI-NEXT: v_add_f32_e32 v7, 1.0, v7
; VI-NEXT: v_add_f32_e32 v10, 1.0, v10
; VI-NEXT: v_add_f32_e32 v9, 1.0, v9
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
+; VI-NEXT: v_add_f32_e32 v8, 1.0, v8
+; VI-NEXT: v_add_f32_e32 v7, 1.0, v7
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_add_f32_e32 v4, 1.0, v4
+; VI-NEXT: v_add_f32_e32 v3, 1.0, v3
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_add_f32_e32 v2, 1.0, v2
; VI-NEXT: v_add_f32_e32 v1, 1.0, v1
; VI-NEXT: v_add_f32_e32 v6, 1.0, v6
; VI-NEXT: v_add_f32_e32 v5, 1.0, v5
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: .LBB48_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v21, v30, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v1, v1, v21
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v28, v63, s4
-; VI-NEXT: v_perm_b32 v2, v2, v29, s4
+; VI-NEXT: v_perm_b32 v1, v63, v62, s4
+; VI-NEXT: v_perm_b32 v2, v2, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v61, v20, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v26, s4
-; VI-NEXT: v_perm_b32 v1, v5, v57, s4
+; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v6, v47, s4
+; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v25, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
+; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v7, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v41, v40, s4
-; VI-NEXT: v_perm_b32 v1, v8, v42, s4
+; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v54, v22, s4
-; VI-NEXT: v_perm_b32 v1, v9, v55, s4
+; VI-NEXT: v_perm_b32 v2, v53, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v9, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v52, v51, s4
-; VI-NEXT: v_perm_b32 v1, v10, v53, s4
+; VI-NEXT: v_perm_b32 v2, v51, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v49, v19, s4
-; VI-NEXT: v_perm_b32 v1, v11, v50, s4
+; VI-NEXT: v_perm_b32 v2, v48, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v11, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v38, s4
-; VI-NEXT: v_perm_b32 v1, v12, v48, s4
+; VI-NEXT: v_perm_b32 v2, v38, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
-; VI-NEXT: v_perm_b32 v1, v13, v37, s4
+; VI-NEXT: v_perm_b32 v2, v35, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v13, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v33, s4
-; VI-NEXT: v_perm_b32 v1, v14, v35, s4
+; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v14, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v15, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v17, s4
+; VI-NEXT: v_perm_b32 v2, v30, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v15, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v27, v24, s4
+; VI-NEXT: v_perm_b32 v2, v26, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -24776,12 +24676,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
@@ -24790,12 +24690,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
; SI-NEXT: s_cbranch_execnz .LBB49_4
; SI-NEXT: .LBB49_2: ; %cmp.true
-; SI-NEXT: v_add_f32_e64 v20, s17, 1.0
-; SI-NEXT: v_add_f32_e64 v22, s16, 1.0
-; SI-NEXT: v_add_f32_e64 v16, s19, 1.0
-; SI-NEXT: v_add_f32_e64 v18, s18, 1.0
+; SI-NEXT: v_add_f32_e64 v18, s17, 1.0
+; SI-NEXT: v_add_f32_e64 v20, s16, 1.0
+; SI-NEXT: v_add_f32_e64 v14, s19, 1.0
+; SI-NEXT: v_add_f32_e64 v17, s18, 1.0
; SI-NEXT: v_add_f32_e64 v11, s21, 1.0
-; SI-NEXT: v_add_f32_e64 v15, s20, 1.0
+; SI-NEXT: v_add_f32_e64 v12, s20, 1.0
; SI-NEXT: v_add_f32_e64 v9, s23, 1.0
; SI-NEXT: v_add_f32_e64 v10, s22, 1.0
; SI-NEXT: v_add_f32_e64 v7, s25, 1.0
@@ -24806,11 +24706,11 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_add_f32_e64 v4, s28, 1.0
; SI-NEXT: v_add_f32_e64 v1, s37, 1.0
; SI-NEXT: v_add_f32_e64 v2, s36, 1.0
-; SI-NEXT: v_readfirstlane_b32 s16, v22
-; SI-NEXT: v_readfirstlane_b32 s17, v20
-; SI-NEXT: v_readfirstlane_b32 s18, v18
-; SI-NEXT: v_readfirstlane_b32 s19, v16
-; SI-NEXT: v_readfirstlane_b32 s20, v15
+; SI-NEXT: v_readfirstlane_b32 s16, v20
+; SI-NEXT: v_readfirstlane_b32 s17, v18
+; SI-NEXT: v_readfirstlane_b32 s18, v17
+; SI-NEXT: v_readfirstlane_b32 s19, v14
+; SI-NEXT: v_readfirstlane_b32 s20, v12
; SI-NEXT: v_readfirstlane_b32 s21, v11
; SI-NEXT: v_readfirstlane_b32 s22, v10
; SI-NEXT: v_readfirstlane_b32 s23, v9
@@ -24834,24 +24734,24 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: s_lshr_b64 s[46:47], s[24:25], 24
; SI-NEXT: s_lshr_b64 s[56:57], s[24:25], 16
; SI-NEXT: s_lshr_b64 s[58:59], s[24:25], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[22:23], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[22:23], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[22:23], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[22:23], 8
; SI-NEXT: s_lshr_b64 s[60:61], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[62:63], s[20:21], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[20:21], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[20:21], 8
; SI-NEXT: s_lshr_b64 s[88:89], s[18:19], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT: s_lshr_b64 s[92:93], s[18:19], 8
; SI-NEXT: s_lshr_b64 s[94:95], s[16:17], 24
; SI-NEXT: s_lshr_b64 s[30:31], s[16:17], 16
; SI-NEXT: s_lshr_b64 s[34:35], s[16:17], 8
-; SI-NEXT: v_lshrrev_b32_e32 v12, 24, v1
-; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v1
-; SI-NEXT: v_lshrrev_b32_e32 v14, 8, v1
-; SI-NEXT: v_lshrrev_b32_e32 v17, 24, v3
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v21, 8, v3
+; SI-NEXT: v_lshrrev_b32_e32 v13, 24, v1
+; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v1
+; SI-NEXT: v_lshrrev_b32_e32 v16, 8, v1
+; SI-NEXT: v_lshrrev_b32_e32 v19, 24, v3
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v3
+; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v5
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v25, 8, v5
@@ -24864,12 +24764,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v11
; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v11
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
-; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v20
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v20
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v20
+; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v14
+; SI-NEXT: v_lshrrev_b32_e32 v36, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v37, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v18
+; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v18
+; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v18
; SI-NEXT: s_branch .LBB49_5
; SI-NEXT: .LBB49_3:
; SI-NEXT: ; implicit-def: $sgpr34
@@ -24884,7 +24784,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr55
@@ -24907,7 +24807,7 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr82
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr46
@@ -24922,11 +24822,11 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: s_branch .LBB49_2
; SI-NEXT: .LBB49_4:
-; SI-NEXT: v_mov_b32_e32 v22, s16
-; SI-NEXT: v_mov_b32_e32 v20, s17
-; SI-NEXT: v_mov_b32_e32 v18, s18
-; SI-NEXT: v_mov_b32_e32 v16, s19
-; SI-NEXT: v_mov_b32_e32 v15, s20
+; SI-NEXT: v_mov_b32_e32 v20, s16
+; SI-NEXT: v_mov_b32_e32 v18, s17
+; SI-NEXT: v_mov_b32_e32 v17, s18
+; SI-NEXT: v_mov_b32_e32 v14, s19
+; SI-NEXT: v_mov_b32_e32 v12, s20
; SI-NEXT: v_mov_b32_e32 v11, s21
; SI-NEXT: v_mov_b32_e32 v10, s22
; SI-NEXT: v_mov_b32_e32 v9, s23
@@ -24956,204 +24856,189 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; SI-NEXT: v_mov_b32_e32 v25, s80
; SI-NEXT: v_mov_b32_e32 v24, s70
; SI-NEXT: v_mov_b32_e32 v23, s68
-; SI-NEXT: v_mov_b32_e32 v21, s83
-; SI-NEXT: v_mov_b32_e32 v19, s81
-; SI-NEXT: v_mov_b32_e32 v17, s71
-; SI-NEXT: v_mov_b32_e32 v14, s85
-; SI-NEXT: v_mov_b32_e32 v13, s84
-; SI-NEXT: v_mov_b32_e32 v12, s82
+; SI-NEXT: v_mov_b32_e32 v22, s83
+; SI-NEXT: v_mov_b32_e32 v21, s81
+; SI-NEXT: v_mov_b32_e32 v19, s71
+; SI-NEXT: v_mov_b32_e32 v16, s85
+; SI-NEXT: v_mov_b32_e32 v15, s84
+; SI-NEXT: v_mov_b32_e32 v13, s82
; SI-NEXT: .LBB49_5: ; %end
-; SI-NEXT: v_and_b32_e32 v22, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
; SI-NEXT: s_lshl_b32 s5, s34, 8
-; SI-NEXT: v_or_b32_e32 v22, s5, v22
+; SI-NEXT: v_or_b32_e32 v20, s5, v20
; SI-NEXT: s_and_b32 s5, s30, 0xff
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s94, 24
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: v_or_b32_e32 v22, s5, v22
-; SI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v48
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_and_b32_e32 v22, 0xff, v39
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
+; SI-NEXT: v_or_b32_e32 v20, s5, v20
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
; SI-NEXT: s_lshl_b32 s5, s92, 8
-; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v38
-; SI-NEXT: v_or_b32_e32 v18, s5, v18
+; SI-NEXT: v_or_b32_e32 v17, s5, v17
; SI-NEXT: s_and_b32 s5, s90, 0xff
-; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
-; SI-NEXT: v_or_b32_e32 v22, v38, v22
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s88, 24
-; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_add_i32_e32 v22, vcc, 4, v0
-; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v20, v22, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v18, s5, v18
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v20, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v18, v20, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v16, 0xff, v16
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v37
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
-; SI-NEXT: v_and_b32_e32 v18, 0xff, v36
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v15
-; SI-NEXT: s_lshl_b32 s5, s74, 8
-; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v18
-; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v35
-; SI-NEXT: v_or_b32_e32 v15, s5, v15
+; SI-NEXT: v_or_b32_e32 v17, s5, v17
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v12
+; SI-NEXT: s_lshl_b32 s5, s72, 8
+; SI-NEXT: v_or_b32_e32 v12, s5, v12
; SI-NEXT: s_and_b32 s5, s62, 0xff
-; SI-NEXT: v_and_b32_e32 v16, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v18, v20, v18
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s60, 24
-; SI-NEXT: v_or_b32_e32 v16, v16, v18
-; SI-NEXT: v_add_i32_e32 v18, vcc, 12, v0
-; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; SI-NEXT: v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v16, v18, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v15, s5, v15
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v16, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen
+; SI-NEXT: v_and_b32_e32 v18, 0xff, v18
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v34
-; SI-NEXT: v_or_b32_e32 v11, v11, v15
-; SI-NEXT: v_and_b32_e32 v15, 0xff, v33
+; SI-NEXT: v_lshlrev_b32_e32 v20, 8, v48
+; SI-NEXT: v_or_b32_e32 v12, s5, v12
; SI-NEXT: v_and_b32_e32 v10, 0xff, v10
; SI-NEXT: s_lshl_b32 s5, s78, 8
-; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; SI-NEXT: v_lshlrev_b32_e32 v16, 24, v32
+; SI-NEXT: v_or_b32_e32 v18, v18, v20
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v39
; SI-NEXT: v_or_b32_e32 v10, s5, v10
; SI-NEXT: s_and_b32 s5, s76, 0xff
-; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v15, v16, v15
+; SI-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v38, 24, v38
; SI-NEXT: s_lshl_b32 s5, s5, 16
-; SI-NEXT: s_lshl_b32 s7, s72, 24
-; SI-NEXT: v_or_b32_e32 v11, v11, v15
-; SI-NEXT: v_add_i32_e32 v15, vcc, 20, v0
+; SI-NEXT: s_lshl_b32 s7, s74, 24
+; SI-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; SI-NEXT: v_or_b32_e32 v20, v38, v20
+; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: v_and_b32_e32 v14, 0xff, v14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v17, 8, v37
; SI-NEXT: v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v11, v15, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v18, v18, v20
+; SI-NEXT: v_or_b32_e32 v14, v14, v17
+; SI-NEXT: v_and_b32_e32 v17, 0xff, v36
; SI-NEXT: v_or_b32_e32 v10, s5, v10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v11, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v10, v11, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v31
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xff, v30
; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
; SI-NEXT: s_lshl_b32 s5, s58, 8
-; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v29
+; SI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v35
; SI-NEXT: v_or_b32_e32 v8, s5, v8
; SI-NEXT: s_and_b32 s5, s56, 0xff
-; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; SI-NEXT: v_or_b32_e32 v17, v18, v17
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:16
+; SI-NEXT: v_and_b32_e32 v11, 0xff, v11
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v34
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s46, 24
-; SI-NEXT: v_or_b32_e32 v9, v9, v10
-; SI-NEXT: v_add_i32_e32 v10, vcc, 28, v0
+; SI-NEXT: v_or_b32_e32 v14, v14, v17
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_and_b32_e32 v12, 0xff, v33
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v8, s5, v8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v8, v9, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
+; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v28
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_and_b32_e32 v8, 0xff, v27
+; SI-NEXT: v_lshlrev_b32_e32 v14, 24, v32
+; SI-NEXT: v_or_b32_e32 v8, s5, v8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
; SI-NEXT: s_lshl_b32 s5, s44, 8
-; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v26
+; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; SI-NEXT: v_or_b32_e32 v12, v14, v12
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v31
; SI-NEXT: v_or_b32_e32 v6, s5, v6
; SI-NEXT: s_and_b32 s5, s42, 0xff
-; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: v_or_b32_e32 v11, v11, v12
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_and_b32_e32 v10, 0xff, v30
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s40, 24
-; SI-NEXT: v_or_b32_e32 v7, v7, v8
-; SI-NEXT: v_add_i32_e32 v8, vcc, 36, v0
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v11, 24, v29
; SI-NEXT: v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v6, s5, v6
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v7, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v6, v7, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; SI-NEXT: v_or_b32_e32 v10, v11, v10
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: v_and_b32_e32 v7, 0xff, v7
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v25
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_and_b32_e32 v6, 0xff, v24
+; SI-NEXT: v_lshlrev_b32_e32 v8, 8, v28
+; SI-NEXT: v_or_b32_e32 v6, s5, v6
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
; SI-NEXT: s_lshl_b32 s5, s14, 8
-; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23
+; SI-NEXT: v_or_b32_e32 v9, v9, v10
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v27
; SI-NEXT: v_or_b32_e32 v4, s5, v4
; SI-NEXT: s_and_b32 s5, s12, 0xff
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v26
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s7, s10, 24
-; SI-NEXT: v_or_b32_e32 v5, v5, v6
-; SI-NEXT: v_add_i32_e32 v6, vcc, 44, v0
+; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
+; SI-NEXT: v_or_b32_e32 v8, v9, v8
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v25
; SI-NEXT: v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT: s_or_b32 s5, s7, s5
-; SI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v7, v7, v8
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
+; SI-NEXT: v_and_b32_e32 v6, 0xff, v24
; SI-NEXT: v_or_b32_e32 v4, s5, v4
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v5, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v21
-; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v19
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: s_lshl_b32 s5, s8, 8
-; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v17
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v7, 24, v23
; SI-NEXT: v_or_b32_e32 v2, s5, v2
; SI-NEXT: s_and_b32 s5, s6, 0xff
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
+; SI-NEXT: v_or_b32_e32 v6, v7, v6
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v22
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s4, s4, 24
+; SI-NEXT: v_or_b32_e32 v5, v5, v6
; SI-NEXT: v_or_b32_e32 v3, v3, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 52, v0
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v21
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; SI-NEXT: v_or_b32_e32 v2, s4, v2
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v19
+; SI-NEXT: v_or_b32_e32 v2, s4, v2
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; SI-NEXT: v_or_b32_e32 v4, v5, v4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v14
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v16
+; SI-NEXT: v_or_b32_e32 v3, v3, v4
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v15
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v13
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
; SI-NEXT: v_readlane_b32 s30, v40, 28
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v40, 29
; SI-NEXT: v_readlane_b32 s85, v40, 27
; SI-NEXT: v_readlane_b32 s84, v40, 26
@@ -25292,30 +25177,30 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_add_f32_e64 v1, s4, 1.0
; VI-NEXT: v_add_f32_e64 v8, s25, 1.0
; VI-NEXT: v_add_f32_e64 v7, s24, 1.0
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[5:6]
; VI-NEXT: v_add_f32_e64 v10, s23, 1.0
; VI-NEXT: v_add_f32_e64 v9, s22, 1.0
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_add_f32_e64 v12, s21, 1.0
; VI-NEXT: v_add_f32_e64 v11, s20, 1.0
; VI-NEXT: v_add_f32_e64 v4, s29, 1.0
; VI-NEXT: v_add_f32_e64 v3, s28, 1.0
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[9:10]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
; VI-NEXT: v_add_f32_e64 v14, s19, 1.0
; VI-NEXT: v_add_f32_e64 v13, s18, 1.0
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12]
-; VI-NEXT: v_add_f32_e64 v16, s17, 1.0
-; VI-NEXT: v_add_f32_e64 v15, s16, 1.0
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16]
+; VI-NEXT: v_lshrrev_b64 v[15:16], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[11:12]
+; VI-NEXT: v_add_f32_e64 v19, s17, 1.0
+; VI-NEXT: v_add_f32_e64 v18, s16, 1.0
+; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[13:14]
+; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[18:19]
; VI-NEXT: v_lshrrev_b32_e32 v26, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
@@ -25347,13 +25232,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v14
; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v14
; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v13
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v19
+; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v18
; VI-NEXT: s_branch .LBB49_5
; VI-NEXT: .LBB49_3:
; VI-NEXT: ; implicit-def: $sgpr67
@@ -25406,12 +25291,12 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: ; implicit-def: $sgpr56
; VI-NEXT: s_branch .LBB49_2
; VI-NEXT: .LBB49_4:
-; VI-NEXT: v_mov_b32_e32 v19, s44
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v19, s42
-; VI-NEXT: v_mov_b32_e32 v15, s16
-; VI-NEXT: v_mov_b32_e32 v16, s17
+; VI-NEXT: v_mov_b32_e32 v20, s44
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v20, s42
+; VI-NEXT: v_mov_b32_e32 v18, s16
+; VI-NEXT: v_mov_b32_e32 v19, s17
; VI-NEXT: v_mov_b32_e32 v13, s18
; VI-NEXT: v_mov_b32_e32 v14, s19
; VI-NEXT: v_mov_b32_e32 v11, s20
@@ -25426,13 +25311,13 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v4, s29
; VI-NEXT: v_mov_b32_e32 v1, s4
; VI-NEXT: v_mov_b32_e32 v2, s5
-; VI-NEXT: v_mov_b32_e32 v17, s67
-; VI-NEXT: v_mov_b32_e32 v18, s65
+; VI-NEXT: v_mov_b32_e32 v15, s67
+; VI-NEXT: v_mov_b32_e32 v16, s65
; VI-NEXT: v_mov_b32_e32 v62, s66
-; VI-NEXT: v_mov_b32_e32 v60, s64
-; VI-NEXT: v_mov_b32_e32 v61, s55
+; VI-NEXT: v_mov_b32_e32 v59, s64
+; VI-NEXT: v_mov_b32_e32 v60, s55
; VI-NEXT: v_mov_b32_e32 v58, s54
-; VI-NEXT: v_mov_b32_e32 v59, s52
+; VI-NEXT: v_mov_b32_e32 v61, s52
; VI-NEXT: v_mov_b32_e32 v57, s53
; VI-NEXT: v_mov_b32_e32 v47, s51
; VI-NEXT: v_mov_b32_e32 v56, s50
@@ -25464,89 +25349,78 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_mov_b32_e32 v29, s60
; VI-NEXT: v_mov_b32_e32 v28, s58
; VI-NEXT: v_mov_b32_e32 v27, s59
-; VI-NEXT: v_mov_b32_e32 v25, s57
+; VI-NEXT: v_mov_b32_e32 v17, s57
; VI-NEXT: v_mov_b32_e32 v26, s56
-; VI-NEXT: v_mov_b32_e32 v21, s12
-; VI-NEXT: v_mov_b32_e32 v22, s10
-; VI-NEXT: v_mov_b32_e32 v23, s8
-; VI-NEXT: v_mov_b32_e32 v24, s6
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v19, s40
-; VI-NEXT: v_mov_b32_e32 v20, s14
+; VI-NEXT: v_mov_b32_e32 v22, s12
+; VI-NEXT: v_mov_b32_e32 v23, s10
+; VI-NEXT: v_mov_b32_e32 v24, s8
+; VI-NEXT: v_mov_b32_e32 v25, s6
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: v_mov_b32_e32 v20, s40
+; VI-NEXT: v_mov_b32_e32 v21, s14
; VI-NEXT: .LBB49_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v18, v18, v24, s4
-; VI-NEXT: v_perm_b32 v15, v15, v17, s4
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v18
-; VI-NEXT: v_or_b32_e32 v15, v15, v17
+; VI-NEXT: v_perm_b32 v16, v16, v25, s4
+; VI-NEXT: v_perm_b32 v15, v18, v15, s4
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; VI-NEXT: v_or_b32_e32 v15, v15, v16
; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v15, v60, v61, s4
-; VI-NEXT: v_perm_b32 v16, v16, v62, s4
+; VI-NEXT: v_perm_b32 v15, v59, v60, s4
+; VI-NEXT: v_perm_b32 v18, v19, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_add_u32_e32 v16, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v15, v59, v23, s4
+; VI-NEXT: v_perm_b32 v19, v61, v24, s4
+; VI-NEXT: v_or_b32_e32 v15, v18, v15
+; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_perm_b32 v13, v13, v58, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v19
; VI-NEXT: v_or_b32_e32 v13, v13, v15
-; VI-NEXT: v_add_u32_e32 v15, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v13, v14, v57, s4
; VI-NEXT: v_perm_b32 v14, v47, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_add_u32_e32 v14, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v13, v45, v22, s4
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v13, v45, v23, s4
; VI-NEXT: v_perm_b32 v11, v11, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; VI-NEXT: v_or_b32_e32 v11, v11, v13
-; VI-NEXT: v_add_u32_e32 v13, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v11, v12, v44, s4
; VI-NEXT: v_perm_b32 v12, v42, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_add_u32_e32 v12, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v11, v40, v21, s4
+; VI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v11, v40, v22, s4
; VI-NEXT: v_perm_b32 v9, v9, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; VI-NEXT: v_or_b32_e32 v9, v9, v11
-; VI-NEXT: v_add_u32_e32 v11, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v9, v11, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_perm_b32 v9, v10, v55, s4
; VI-NEXT: v_perm_b32 v10, v53, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; VI-NEXT: v_or_b32_e32 v9, v9, v10
-; VI-NEXT: v_add_u32_e32 v10, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v9, v51, v20, s4
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v9, v51, v21, s4
; VI-NEXT: v_perm_b32 v7, v7, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; VI-NEXT: v_or_b32_e32 v7, v7, v9
-; VI-NEXT: v_add_u32_e32 v9, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v7, v9, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v7, v8, v50, s4
; VI-NEXT: v_perm_b32 v8, v48, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v7, v38, v19, s4
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v7, v38, v20, s4
; VI-NEXT: v_perm_b32 v5, v5, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_perm_b32 v5, v6, v37, s4
; VI-NEXT: v_perm_b32 v6, v35, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:44
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v3, v34, s4
@@ -25575,28 +25449,24 @@ define inreg <64 x i8> @bitcast_v16f32_to_v64i8_scalar(<16 x float> inreg %a, i3
; VI-NEXT: v_perm_b32 v5, v33, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_perm_b32 v3, v4, v32, s4
; VI-NEXT: v_perm_b32 v4, v30, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:52
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v3, v28, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_perm_b32 v1, v2, v27, s4
-; VI-NEXT: v_perm_b32 v2, v25, v26, s4
+; VI-NEXT: v_perm_b32 v2, v17, v26, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -37392,14 +37262,14 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
-; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr61
@@ -37407,40 +37277,40 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr58
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; kill: killed $vgpr26
+; SI-NEXT: ; kill: killed $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB68_2
@@ -37455,40 +37325,40 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
-; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
-; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
+; SI-NEXT: v_alignbit_b32 v26, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v30, v10, v9, 8
+; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v35, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v48, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
+; SI-NEXT: v_alignbit_b32 v41, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
+; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -37531,40 +37401,40 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
-; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
-; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
+; SI-NEXT: v_alignbit_b32 v26, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v30, v10, v9, 8
+; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v35, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v48, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
-; SI-NEXT: s_waitcnt expcnt(6)
-; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
+; SI-NEXT: v_alignbit_b32 v41, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v45, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v47, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v57, v2, v1, 8
+; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
-; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v6
+; SI-NEXT: v_lshrrev_b32_e32 v56, 16, v6
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshrrev_b32_e32 v58, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -37580,15 +37450,15 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: .LBB68_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: s_waitcnt expcnt(5)
-; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v58
-; SI-NEXT: v_and_b32_e32 v56, 0xff, v56
-; SI-NEXT: v_or_b32_e32 v1, v1, v58
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
-; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v46
-; SI-NEXT: v_or_b32_e32 v46, v46, v56
+; SI-NEXT: s_waitcnt expcnt(6)
+; SI-NEXT: v_lshlrev_b32_e32 v57, 8, v57
+; SI-NEXT: v_and_b32_e32 v47, 0xff, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v57
+; SI-NEXT: v_lshlrev_b32_e32 v47, 16, v47
+; SI-NEXT: v_lshlrev_b32_e32 v45, 24, v45
+; SI-NEXT: v_or_b32_e32 v45, v45, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v46
+; SI-NEXT: v_or_b32_e32 v1, v1, v45
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
@@ -37600,11 +37470,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v17, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -37612,8 +37481,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v61
@@ -37624,68 +37492,62 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v58
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v56
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v33
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v43
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v30
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54
@@ -37696,8 +37558,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -37708,11 +37569,10 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v39
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -37720,8 +37580,7 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -37732,20 +37591,18 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v34
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v32
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
@@ -37758,20 +37615,18 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v29
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v27
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -37812,18 +37667,15 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
@@ -37852,12 +37704,14 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr17
@@ -37867,54 +37721,53 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v26, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: v_mov_b32_e32 v27, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
; VI-NEXT: .LBB68_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -37939,155 +37792,137 @@ define <64 x i8> @bitcast_v8i64_to_v64i8(<8 x i64> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: .LBB68_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v21, v30, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v1, v1, v21
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v28, v63, s4
-; VI-NEXT: v_perm_b32 v2, v2, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v61, v20, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
+; VI-NEXT: v_perm_b32 v1, v63, v62, s4
+; VI-NEXT: v_perm_b32 v2, v2, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v26, s4
-; VI-NEXT: v_perm_b32 v1, v5, v57, s4
+; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v6, v47, s4
+; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v25, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
+; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v7, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v41, v40, s4
-; VI-NEXT: v_perm_b32 v1, v8, v42, s4
+; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v54, v22, s4
-; VI-NEXT: v_perm_b32 v1, v9, v55, s4
+; VI-NEXT: v_perm_b32 v2, v53, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v9, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v52, v51, s4
-; VI-NEXT: v_perm_b32 v1, v10, v53, s4
+; VI-NEXT: v_perm_b32 v2, v51, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v49, v19, s4
-; VI-NEXT: v_perm_b32 v1, v11, v50, s4
+; VI-NEXT: v_perm_b32 v2, v48, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v11, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v38, s4
-; VI-NEXT: v_perm_b32 v1, v12, v48, s4
+; VI-NEXT: v_perm_b32 v2, v38, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
-; VI-NEXT: v_perm_b32 v1, v13, v37, s4
+; VI-NEXT: v_perm_b32 v2, v35, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v13, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v33, s4
-; VI-NEXT: v_perm_b32 v1, v14, v35, s4
+; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v14, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v15, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v17, s4
+; VI-NEXT: v_perm_b32 v2, v30, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v15, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v27, v24, s4
+; VI-NEXT: v_perm_b32 v2, v26, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -39045,28 +38880,24 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s80, 24
; SI-NEXT: s_or_b32 s9, s11, s9
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:8
+; SI-NEXT: s_waitcnt expcnt(2)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s20, 0xff
; SI-NEXT: s_lshl_b32 s9, s76, 8
; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_and_b32 s9, s72, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
; SI-NEXT: s_lshl_b32 s11, s62, 24
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s21, 0xff
; SI-NEXT: s_lshl_b32 s9, s71, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39075,11 +38906,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s69, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s22, 0xff
; SI-NEXT: s_lshl_b32 s9, s88, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39088,11 +38918,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s74, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s23, 0xff
; SI-NEXT: s_lshl_b32 s9, s68, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39101,11 +38930,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s66, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s24, 0xff
; SI-NEXT: s_lshl_b32 s9, s60, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39114,11 +38942,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s56, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s25, 0xff
; SI-NEXT: s_lshl_b32 s9, s65, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39127,11 +38954,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s55, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s26, 0xff
; SI-NEXT: s_lshl_b32 s9, s46, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39140,11 +38966,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s42, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s27, 0xff
; SI-NEXT: s_lshl_b32 s9, s54, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39153,11 +38978,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s52, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s28, 0xff
; SI-NEXT: s_lshl_b32 s9, s40, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39166,11 +38990,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s12, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s29, 0xff
; SI-NEXT: s_lshl_b32 s9, s51, 8
; SI-NEXT: s_or_b32 s7, s7, s9
@@ -39179,11 +39002,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s11, s49, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s9, s11, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
; SI-NEXT: s_or_b32 s7, s7, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s4, s4, 0xff
; SI-NEXT: s_lshl_b32 s7, s10, 8
; SI-NEXT: s_or_b32 s4, s4, s7
@@ -39192,11 +39014,10 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s6, s6, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s48, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -39205,13 +39026,12 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; SI-NEXT: s_lshl_b32 s6, s38, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v4, 28
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v4, 29
; SI-NEXT: v_readlane_b32 s85, v4, 27
; SI-NEXT: v_readlane_b32 s84, v4, 26
@@ -39458,121 +39278,106 @@ define inreg <64 x i8> @bitcast_v8i64_to_v64i8_scalar(<8 x i64> inreg %a, i32 in
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s42
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s54
; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s50
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s52
; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s40
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s49
; VI-NEXT: v_perm_b32 v3, s48, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s37
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s39
; VI-NEXT: v_perm_b32 v3, s38, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s36
; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s30
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s34
; VI-NEXT: v_perm_b32 v3, s31, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s91
; VI-NEXT: v_perm_b32 v3, s90, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s79
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s89
; VI-NEXT: v_perm_b32 v3, s88, v3, v2
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_mov_b32_e32 v1, s78
; VI-NEXT: v_perm_b32 v3, s77, v3, v2
; VI-NEXT: v_perm_b32 v1, s26, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_mov_b32_e32 v1, s76
; VI-NEXT: v_perm_b32 v3, s75, v3, v2
; VI-NEXT: v_perm_b32 v1, s27, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_mov_b32_e32 v1, s73
; VI-NEXT: v_perm_b32 v3, s72, v3, v2
; VI-NEXT: v_perm_b32 v1, s28, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s61
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s29, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_mov_b32_e32 v1, s60
; VI-NEXT: v_perm_b32 v3, s59, v3, v2
; VI-NEXT: v_perm_b32 v1, s4, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_mov_b32_e32 v3, s56
; VI-NEXT: v_perm_b32 v1, s5, v1, v2
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: v_readlane_b32 s30, v4, 18
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: v_readlane_b32 s31, v4, 19
; VI-NEXT: v_readlane_b32 s67, v4, 17
; VI-NEXT: v_readlane_b32 s66, v4, 16
@@ -50598,14 +50403,14 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
; SI-NEXT: ; implicit-def: $vgpr61
@@ -50613,40 +50418,40 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr56
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr57
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr44
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr30
; SI-NEXT: ; implicit-def: $vgpr28
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr52
; SI-NEXT: ; implicit-def: $vgpr25
; SI-NEXT: ; implicit-def: $vgpr24
; SI-NEXT: ; implicit-def: $vgpr23
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr20
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr19
; SI-NEXT: ; implicit-def: $vgpr18
-; SI-NEXT: ; kill: killed $vgpr26
+; SI-NEXT: ; kill: killed $vgpr27
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB84_2
@@ -50661,40 +50466,40 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
-; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
-; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
+; SI-NEXT: v_alignbit_b32 v26, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v30, v10, v9, 8
+; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v35, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v48, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v47, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v57, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
; SI-NEXT: s_waitcnt expcnt(6)
; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -50729,40 +50534,40 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_alignbit_b32 v23, v12, v11, 24
; SI-NEXT: v_alignbit_b32 v24, v12, v11, 16
; SI-NEXT: v_alignbit_b32 v25, v12, v11, 8
-; SI-NEXT: v_alignbit_b32 v28, v10, v9, 24
-; SI-NEXT: v_alignbit_b32 v30, v10, v9, 16
-; SI-NEXT: v_alignbit_b32 v31, v10, v9, 8
-; SI-NEXT: v_alignbit_b32 v35, v8, v7, 24
-; SI-NEXT: v_alignbit_b32 v36, v8, v7, 16
+; SI-NEXT: v_alignbit_b32 v26, v10, v9, 24
+; SI-NEXT: v_alignbit_b32 v28, v10, v9, 16
+; SI-NEXT: v_alignbit_b32 v30, v10, v9, 8
+; SI-NEXT: v_alignbit_b32 v33, v8, v7, 24
+; SI-NEXT: v_alignbit_b32 v35, v8, v7, 16
; SI-NEXT: v_alignbit_b32 v37, v8, v7, 8
-; SI-NEXT: v_alignbit_b32 v49, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v48, v6, v5, 24
; SI-NEXT: v_alignbit_b32 v50, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v51, v6, v5, 8
; SI-NEXT: v_alignbit_b32 v55, v4, v3, 24
; SI-NEXT: v_alignbit_b32 v40, v4, v3, 16
-; SI-NEXT: v_alignbit_b32 v43, v4, v3, 8
-; SI-NEXT: v_alignbit_b32 v47, v2, v1, 24
-; SI-NEXT: v_alignbit_b32 v57, v2, v1, 16
+; SI-NEXT: v_alignbit_b32 v42, v4, v3, 8
+; SI-NEXT: v_alignbit_b32 v46, v2, v1, 24
+; SI-NEXT: v_alignbit_b32 v56, v2, v1, 16
; SI-NEXT: s_waitcnt expcnt(6)
; SI-NEXT: v_alignbit_b32 v58, v2, v1, 8
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v16
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v29, 8, v16
+; SI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
+; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
+; SI-NEXT: v_lshrrev_b32_e32 v31, 8, v16
; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
-; SI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; SI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
+; SI-NEXT: v_lshrrev_b32_e32 v36, 8, v14
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v12
; SI-NEXT: v_lshrrev_b32_e32 v52, 24, v10
; SI-NEXT: v_lshrrev_b32_e32 v53, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v54, 8, v10
; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
-; SI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
+; SI-NEXT: v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v8
; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; SI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v47, 16, v6
+; SI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v4
; SI-NEXT: s_waitcnt expcnt(4)
@@ -50780,13 +50585,13 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: s_waitcnt expcnt(5)
; SI-NEXT: v_lshlrev_b32_e32 v58, 8, v58
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: v_and_b32_e32 v57, 0xff, v57
+; SI-NEXT: v_and_b32_e32 v56, 0xff, v56
; SI-NEXT: v_or_b32_e32 v1, v1, v58
-; SI-NEXT: v_lshlrev_b32_e32 v57, 16, v57
-; SI-NEXT: v_lshlrev_b32_e32 v47, 24, v47
-; SI-NEXT: v_or_b32_e32 v47, v47, v57
+; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v56
+; SI-NEXT: v_lshlrev_b32_e32 v46, 24, v46
+; SI-NEXT: v_or_b32_e32 v46, v46, v56
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v1, v1, v47
+; SI-NEXT: v_or_b32_e32 v1, v1, v46
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v2
@@ -50798,11 +50603,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v17, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v3
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v40
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -50810,8 +50614,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v4
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v61
@@ -50822,68 +50625,62 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v50
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v49
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v48
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v6
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v56
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v57
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v46
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v47
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v37
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v36
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v35
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v33
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v8
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v42
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v43
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v9
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v30
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v28
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v10
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v54
@@ -50894,8 +50691,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v11
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v25
@@ -50906,11 +50702,10 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v39
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
@@ -50918,8 +50713,7 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v22
@@ -50930,20 +50724,18 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v14
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v36
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v33
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v34
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v32
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v15
@@ -50956,20 +50748,18 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v16
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v29
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v31
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v27
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v29
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v26
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v27
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -51010,18 +50800,15 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
@@ -51050,12 +50837,14 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr17
@@ -51065,54 +50854,53 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v26, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: v_mov_b32_e32 v27, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
; VI-NEXT: .LBB84_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -51121,163 +50909,145 @@ define <64 x i8> @bitcast_v8f64_to_v64i8(<8 x double> %a, i32 %b) #0 {
; VI-NEXT: v_add_f64 v[15:16], v[15:16], 1.0
; VI-NEXT: v_add_f64 v[13:14], v[13:14], 1.0
; VI-NEXT: v_add_f64 v[11:12], v[11:12], 1.0
-; VI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
-; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
; VI-NEXT: v_add_f64 v[9:10], v[9:10], 1.0
+; VI-NEXT: v_add_f64 v[7:8], v[7:8], 1.0
+; VI-NEXT: v_add_f64 v[3:4], v[3:4], 1.0
; VI-NEXT: v_add_f64 v[1:2], v[1:2], 1.0
; VI-NEXT: v_add_f64 v[5:6], v[5:6], 1.0
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: .LBB84_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v21, v30, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v1, v1, v21
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v28, v63, s4
-; VI-NEXT: v_perm_b32 v2, v2, v29, s4
+; VI-NEXT: v_perm_b32 v1, v63, v62, s4
+; VI-NEXT: v_perm_b32 v2, v2, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v61, v20, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v26, s4
-; VI-NEXT: v_perm_b32 v1, v5, v57, s4
+; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v6, v47, s4
+; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v25, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
+; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v7, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v41, v40, s4
-; VI-NEXT: v_perm_b32 v1, v8, v42, s4
+; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v54, v22, s4
-; VI-NEXT: v_perm_b32 v1, v9, v55, s4
+; VI-NEXT: v_perm_b32 v2, v53, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v9, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v52, v51, s4
-; VI-NEXT: v_perm_b32 v1, v10, v53, s4
+; VI-NEXT: v_perm_b32 v2, v51, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v49, v19, s4
-; VI-NEXT: v_perm_b32 v1, v11, v50, s4
+; VI-NEXT: v_perm_b32 v2, v48, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v11, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v38, s4
-; VI-NEXT: v_perm_b32 v1, v12, v48, s4
+; VI-NEXT: v_perm_b32 v2, v38, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
-; VI-NEXT: v_perm_b32 v1, v13, v37, s4
+; VI-NEXT: v_perm_b32 v2, v35, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v13, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v33, s4
-; VI-NEXT: v_perm_b32 v1, v14, v35, s4
+; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v14, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v15, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v17, s4
+; VI-NEXT: v_perm_b32 v2, v30, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v15, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v27, v24, s4
+; VI-NEXT: v_perm_b32 v2, v26, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -52100,46 +51870,46 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[74:75], s[16:17], 8
; SI-NEXT: s_cbranch_execnz .LBB85_4
; SI-NEXT: .LBB85_2: ; %cmp.true
-; SI-NEXT: v_add_f64 v[28:29], s[18:19], 1.0
-; SI-NEXT: v_add_f64 v[5:6], s[26:27], 1.0
; SI-NEXT: v_add_f64 v[13:14], s[22:23], 1.0
-; SI-NEXT: v_add_f64 v[3:4], s[28:29], 1.0
-; SI-NEXT: v_lshr_b64 v[48:49], v[28:29], 24
+; SI-NEXT: v_add_f64 v[26:27], s[18:19], 1.0
+; SI-NEXT: v_add_f64 v[5:6], s[26:27], 1.0
+; SI-NEXT: v_lshr_b64 v[33:34], v[13:14], 24
+; SI-NEXT: v_lshr_b64 v[48:49], v[26:27], 24
; SI-NEXT: v_add_f64 v[1:2], s[4:5], 1.0
-; SI-NEXT: v_add_f64 v[7:8], s[24:25], 1.0
-; SI-NEXT: v_add_f64 v[20:21], s[20:21], 1.0
-; SI-NEXT: v_add_f64 v[32:33], s[16:17], 1.0
-; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16
+; SI-NEXT: v_add_f64 v[3:4], s[28:29], 1.0
+; SI-NEXT: v_add_f64 v[19:20], s[20:21], 1.0
+; SI-NEXT: v_add_f64 v[31:32], s[16:17], 1.0
; SI-NEXT: v_lshr_b64 v[34:35], v[13:14], 16
-; SI-NEXT: v_lshr_b64 v[49:50], v[28:29], 16
-; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 24
-; SI-NEXT: v_lshr_b64 v[23:24], v[5:6], 8
+; SI-NEXT: v_lshr_b64 v[49:50], v[26:27], 16
+; SI-NEXT: v_add_f64 v[7:8], s[24:25], 1.0
+; SI-NEXT: v_lshr_b64 v[21:22], v[5:6], 24
; SI-NEXT: v_lshr_b64 v[35:36], v[13:14], 8
-; SI-NEXT: v_lshr_b64 v[50:51], v[28:29], 8
+; SI-NEXT: v_lshr_b64 v[50:51], v[26:27], 8
; SI-NEXT: v_lshr_b64 v[9:10], v[1:2], 24
-; SI-NEXT: v_lshr_b64 v[16:17], v[3:4], 16
-; SI-NEXT: v_lshr_b64 v[24:25], v[7:8], 24
-; SI-NEXT: v_lshr_b64 v[36:37], v[20:21], 24
-; SI-NEXT: v_lshr_b64 v[51:52], v[32:33], 24
+; SI-NEXT: v_lshr_b64 v[15:16], v[3:4], 24
+; SI-NEXT: v_lshr_b64 v[22:23], v[5:6], 16
+; SI-NEXT: v_lshr_b64 v[36:37], v[19:20], 24
+; SI-NEXT: v_lshr_b64 v[51:52], v[31:32], 24
; SI-NEXT: v_lshr_b64 v[10:11], v[1:2], 16
-; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 8
-; SI-NEXT: v_lshr_b64 v[25:26], v[7:8], 16
-; SI-NEXT: v_lshr_b64 v[37:38], v[20:21], 16
-; SI-NEXT: v_lshr_b64 v[52:53], v[32:33], 16
-; SI-NEXT: v_readfirstlane_b32 s17, v33
-; SI-NEXT: v_readfirstlane_b32 s19, v29
-; SI-NEXT: v_readfirstlane_b32 s21, v21
+; SI-NEXT: v_lshr_b64 v[16:17], v[3:4], 16
+; SI-NEXT: v_lshr_b64 v[23:24], v[5:6], 8
+; SI-NEXT: v_lshr_b64 v[28:29], v[7:8], 16
+; SI-NEXT: v_lshr_b64 v[37:38], v[19:20], 16
+; SI-NEXT: v_lshr_b64 v[52:53], v[31:32], 16
+; SI-NEXT: v_readfirstlane_b32 s17, v32
+; SI-NEXT: v_readfirstlane_b32 s19, v27
+; SI-NEXT: v_readfirstlane_b32 s21, v20
; SI-NEXT: v_readfirstlane_b32 s23, v14
; SI-NEXT: v_readfirstlane_b32 s25, v8
; SI-NEXT: v_readfirstlane_b32 s27, v6
; SI-NEXT: v_readfirstlane_b32 s29, v4
; SI-NEXT: v_readfirstlane_b32 s5, v2
; SI-NEXT: v_lshr_b64 v[11:12], v[1:2], 8
-; SI-NEXT: v_lshr_b64 v[18:19], v[5:6], 24
-; SI-NEXT: v_lshr_b64 v[26:27], v[7:8], 8
-; SI-NEXT: v_lshr_b64 v[30:31], v[13:14], 24
-; SI-NEXT: v_lshr_b64 v[38:39], v[20:21], 8
-; SI-NEXT: v_lshr_b64 v[53:54], v[32:33], 8
+; SI-NEXT: v_lshr_b64 v[17:18], v[3:4], 8
+; SI-NEXT: v_lshr_b64 v[24:25], v[7:8], 24
+; SI-NEXT: v_lshr_b64 v[29:30], v[7:8], 8
+; SI-NEXT: v_lshr_b64 v[38:39], v[19:20], 8
+; SI-NEXT: v_lshr_b64 v[53:54], v[31:32], 8
; SI-NEXT: s_lshr_b32 s48, s5, 24
; SI-NEXT: s_lshr_b32 s49, s5, 16
; SI-NEXT: s_lshr_b32 s50, s5, 8
@@ -52216,9 +51986,9 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: s_branch .LBB85_2
; SI-NEXT: .LBB85_4:
-; SI-NEXT: v_mov_b32_e32 v32, s16
-; SI-NEXT: v_mov_b32_e32 v28, s18
-; SI-NEXT: v_mov_b32_e32 v20, s20
+; SI-NEXT: v_mov_b32_e32 v31, s16
+; SI-NEXT: v_mov_b32_e32 v26, s18
+; SI-NEXT: v_mov_b32_e32 v19, s20
; SI-NEXT: v_mov_b32_e32 v13, s22
; SI-NEXT: v_mov_b32_e32 v7, s24
; SI-NEXT: v_mov_b32_e32 v5, s26
@@ -52235,13 +52005,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v36, s8
; SI-NEXT: v_mov_b32_e32 v35, s38
; SI-NEXT: v_mov_b32_e32 v34, s36
-; SI-NEXT: v_mov_b32_e32 v30, s34
-; SI-NEXT: v_mov_b32_e32 v26, s30
-; SI-NEXT: v_mov_b32_e32 v25, s94
+; SI-NEXT: v_mov_b32_e32 v33, s34
+; SI-NEXT: v_mov_b32_e32 v29, s30
+; SI-NEXT: v_mov_b32_e32 v28, s94
; SI-NEXT: v_mov_b32_e32 v24, s92
; SI-NEXT: v_mov_b32_e32 v23, s88
; SI-NEXT: v_mov_b32_e32 v22, s78
-; SI-NEXT: v_mov_b32_e32 v18, s76
+; SI-NEXT: v_mov_b32_e32 v21, s76
; SI-NEXT: v_mov_b32_e32 v17, s72
; SI-NEXT: v_mov_b32_e32 v16, s60
; SI-NEXT: v_mov_b32_e32 v15, s46
@@ -52249,7 +52019,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v10, s10
; SI-NEXT: v_mov_b32_e32 v9, s6
; SI-NEXT: .LBB85_5: ; %end
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v32
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v31
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v53
; SI-NEXT: s_and_b32 s4, s17, 0xff
; SI-NEXT: s_lshl_b32 s6, s87, 8
@@ -52269,11 +52039,10 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v28
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v26
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v50
; SI-NEXT: s_and_b32 s4, s19, 0xff
; SI-NEXT: s_lshl_b32 s6, s84, 8
@@ -52290,15 +52059,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 8, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v20
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v38
; SI-NEXT: s_and_b32 s4, s21, 0xff
; SI-NEXT: s_lshl_b32 s6, s81, 8
@@ -52315,15 +52082,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 16, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v13
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v35
; SI-NEXT: s_and_b32 s4, s23, 0xff
; SI-NEXT: s_lshl_b32 s6, s70, 8
@@ -52331,7 +52096,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: v_and_b32_e32 v4, 0xff, v34
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s69, 0xff
-; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v30
+; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v33
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s68, 24
@@ -52340,20 +52105,18 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 24, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v26
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v7
+; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v29
; SI-NEXT: s_and_b32 s4, s25, 0xff
; SI-NEXT: s_lshl_b32 s6, s67, 8
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_and_b32_e32 v4, 0xff, v25
+; SI-NEXT: v_and_b32_e32 v4, 0xff, v28
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s66, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
@@ -52365,15 +52128,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 32, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v5
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v23
; SI-NEXT: s_and_b32 s4, s27, 0xff
; SI-NEXT: s_lshl_b32 s6, s64, 8
@@ -52382,7 +52143,7 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s55, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v18
+; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v21
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s54, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
@@ -52390,13 +52151,12 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: v_mov_b32_e32 v4, s4
-; SI-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v17
; SI-NEXT: s_and_b32 s4, s29, 0xff
@@ -52406,7 +52166,6 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s52, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s51, 24
@@ -52415,14 +52174,13 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
; SI-NEXT: v_or_b32_e32 v2, v2, v3
-; SI-NEXT: v_add_i32_e32 v3, vcc, 48, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
+; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v11
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s50, 8
@@ -52431,7 +52189,6 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s49, 0xff
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v9
; SI-NEXT: s_lshl_b32 s5, s5, 16
; SI-NEXT: s_lshl_b32 s6, s48, 24
@@ -52440,14 +52197,12 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v40, 30
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v40, 31
; SI-NEXT: v_readlane_b32 s87, v40, 29
; SI-NEXT: v_readlane_b32 s86, v40, 28
@@ -52582,16 +52337,16 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: s_lshr_b64 s[6:7], s[16:17], 24
; VI-NEXT: s_cbranch_execnz .LBB85_4
; VI-NEXT: .LBB85_2: ; %cmp.true
-; VI-NEXT: v_add_f64 v[9:10], s[4:5], 1.0
+; VI-NEXT: v_add_f64 v[11:12], s[4:5], 1.0
; VI-NEXT: v_add_f64 v[1:2], s[28:29], 1.0
; VI-NEXT: v_add_f64 v[5:6], s[24:25], 1.0
; VI-NEXT: v_add_f64 v[7:8], s[22:23], 1.0
-; VI-NEXT: v_add_f64 v[11:12], s[20:21], 1.0
+; VI-NEXT: v_add_f64 v[9:10], s[20:21], 1.0
; VI-NEXT: v_add_f64 v[3:4], s[26:27], 1.0
; VI-NEXT: v_add_f64 v[13:14], s[18:19], 1.0
; VI-NEXT: v_add_f64 v[15:16], s[16:17], 1.0
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v10
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b32_e32 v19, 24, v12
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[1:2]
@@ -52600,50 +52355,50 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[13:14]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[15:16]
-; VI-NEXT: v_lshrrev_b32_e32 v25, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v28, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v2
; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v2
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v3
; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v52, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v6
; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v41, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v14
; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v14
; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v13
; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v16
; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v16
; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v15
; VI-NEXT: s_branch .LBB85_5
; VI-NEXT: .LBB85_3:
; VI-NEXT: ; implicit-def: $sgpr66
@@ -52696,61 +52451,61 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: ; implicit-def: $sgpr35
; VI-NEXT: s_branch .LBB85_2
; VI-NEXT: .LBB85_4:
-; VI-NEXT: v_mov_b32_e32 v26, s35
+; VI-NEXT: v_mov_b32_e32 v26, s37
; VI-NEXT: v_mov_b32_e32 v25, s40
; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v25, s42
; VI-NEXT: v_mov_b32_e32 v15, s16
; VI-NEXT: v_mov_b32_e32 v13, s18
-; VI-NEXT: v_mov_b32_e32 v11, s20
+; VI-NEXT: v_mov_b32_e32 v9, s20
; VI-NEXT: v_mov_b32_e32 v7, s22
; VI-NEXT: v_mov_b32_e32 v5, s24
; VI-NEXT: v_mov_b32_e32 v3, s26
; VI-NEXT: v_mov_b32_e32 v1, s28
-; VI-NEXT: v_mov_b32_e32 v9, s4
-; VI-NEXT: v_mov_b32_e32 v10, s5
+; VI-NEXT: v_mov_b32_e32 v11, s4
+; VI-NEXT: v_mov_b32_e32 v12, s5
; VI-NEXT: v_mov_b32_e32 v2, s29
; VI-NEXT: v_mov_b32_e32 v4, s27
; VI-NEXT: v_mov_b32_e32 v6, s25
; VI-NEXT: v_mov_b32_e32 v8, s23
-; VI-NEXT: v_mov_b32_e32 v12, s21
+; VI-NEXT: v_mov_b32_e32 v10, s21
; VI-NEXT: v_mov_b32_e32 v14, s19
; VI-NEXT: v_mov_b32_e32 v16, s17
; VI-NEXT: v_mov_b32_e32 v57, s67
-; VI-NEXT: v_mov_b32_e32 v58, s66
-; VI-NEXT: v_mov_b32_e32 v44, s65
-; VI-NEXT: v_mov_b32_e32 v45, s64
-; VI-NEXT: v_mov_b32_e32 v55, s55
-; VI-NEXT: v_mov_b32_e32 v40, s54
+; VI-NEXT: v_mov_b32_e32 v59, s66
+; VI-NEXT: v_mov_b32_e32 v56, s65
+; VI-NEXT: v_mov_b32_e32 v47, s64
+; VI-NEXT: v_mov_b32_e32 v42, s55
+; VI-NEXT: v_mov_b32_e32 v43, s54
; VI-NEXT: v_mov_b32_e32 v50, s53
-; VI-NEXT: v_mov_b32_e32 v52, s52
-; VI-NEXT: v_mov_b32_e32 v39, s51
-; VI-NEXT: v_mov_b32_e32 v49, s50
+; VI-NEXT: v_mov_b32_e32 v51, s52
+; VI-NEXT: v_mov_b32_e32 v38, s51
+; VI-NEXT: v_mov_b32_e32 v48, s50
; VI-NEXT: v_mov_b32_e32 v35, s49
; VI-NEXT: v_mov_b32_e32 v36, s48
; VI-NEXT: v_mov_b32_e32 v30, s39
; VI-NEXT: v_mov_b32_e32 v31, s38
-; VI-NEXT: v_mov_b32_e32 v19, s37
-; VI-NEXT: v_mov_b32_e32 v28, s36
-; VI-NEXT: v_mov_b32_e32 v27, s34
+; VI-NEXT: v_mov_b32_e32 v27, s36
+; VI-NEXT: v_mov_b32_e32 v19, s35
+; VI-NEXT: v_mov_b32_e32 v28, s34
; VI-NEXT: v_mov_b32_e32 v29, s31
; VI-NEXT: v_mov_b32_e32 v32, s30
; VI-NEXT: v_mov_b32_e32 v33, s91
; VI-NEXT: v_mov_b32_e32 v34, s90
; VI-NEXT: v_mov_b32_e32 v37, s89
-; VI-NEXT: v_mov_b32_e32 v38, s88
-; VI-NEXT: v_mov_b32_e32 v48, s79
-; VI-NEXT: v_mov_b32_e32 v51, s78
+; VI-NEXT: v_mov_b32_e32 v39, s88
+; VI-NEXT: v_mov_b32_e32 v49, s79
+; VI-NEXT: v_mov_b32_e32 v52, s78
; VI-NEXT: v_mov_b32_e32 v53, s77
; VI-NEXT: v_mov_b32_e32 v54, s76
-; VI-NEXT: v_mov_b32_e32 v41, s75
-; VI-NEXT: v_mov_b32_e32 v42, s74
-; VI-NEXT: v_mov_b32_e32 v43, s73
-; VI-NEXT: v_mov_b32_e32 v46, s72
-; VI-NEXT: v_mov_b32_e32 v47, s63
-; VI-NEXT: v_mov_b32_e32 v56, s62
-; VI-NEXT: v_mov_b32_e32 v59, s61
+; VI-NEXT: v_mov_b32_e32 v55, s75
+; VI-NEXT: v_mov_b32_e32 v40, s74
+; VI-NEXT: v_mov_b32_e32 v41, s73
+; VI-NEXT: v_mov_b32_e32 v44, s72
+; VI-NEXT: v_mov_b32_e32 v45, s63
+; VI-NEXT: v_mov_b32_e32 v46, s62
+; VI-NEXT: v_mov_b32_e32 v58, s61
; VI-NEXT: v_mov_b32_e32 v60, s60
; VI-NEXT: v_mov_b32_e32 v61, s59
; VI-NEXT: v_mov_b32_e32 v62, s58
@@ -52766,68 +52521,58 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v25, s44
; VI-NEXT: buffer_store_dword v25, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v26, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v25, s35
; VI-NEXT: .LBB85_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v24, v57, v24, s4
-; VI-NEXT: v_perm_b32 v15, v15, v58, s4
+; VI-NEXT: v_perm_b32 v15, v15, v59, s4
; VI-NEXT: v_perm_b32 v16, v16, v18, s4
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v24
-; VI-NEXT: v_or_b32_e32 v15, v15, v18
+; VI-NEXT: v_perm_b32 v18, v56, v23, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v24
+; VI-NEXT: v_or_b32_e32 v15, v15, v23
; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v15, v17, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; VI-NEXT: v_or_b32_e32 v15, v16, v15
-; VI-NEXT: v_add_u32_e32 v16, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v15, v44, v23, s4
-; VI-NEXT: v_perm_b32 v13, v13, v45, s4
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; VI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v13, v13, v47, s4
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v18
; VI-NEXT: v_or_b32_e32 v13, v13, v15
-; VI-NEXT: v_add_u32_e32 v15, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v13, v15, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_perm_b32 v13, v14, v61, s4
-; VI-NEXT: v_perm_b32 v14, v60, v59, s4
+; VI-NEXT: v_perm_b32 v14, v60, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; VI-NEXT: v_or_b32_e32 v13, v13, v14
-; VI-NEXT: v_add_u32_e32 v14, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v13, v55, v22, s4
-; VI-NEXT: v_perm_b32 v11, v11, v40, s4
+; VI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v13, v42, v22, s4
+; VI-NEXT: v_perm_b32 v9, v9, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; VI-NEXT: v_or_b32_e32 v11, v11, v13
-; VI-NEXT: v_add_u32_e32 v13, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v11, v12, v56, s4
-; VI-NEXT: v_perm_b32 v12, v47, v46, s4
-; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_or_b32_e32 v11, v11, v12
-; VI-NEXT: v_add_u32_e32 v12, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v11, v50, v21, s4
-; VI-NEXT: v_perm_b32 v7, v7, v52, s4
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_or_b32_e32 v7, v7, v11
-; VI-NEXT: v_add_u32_e32 v11, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v7, v11, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v7, v8, v43, s4
-; VI-NEXT: v_perm_b32 v8, v42, v41, s4
+; VI-NEXT: v_or_b32_e32 v9, v9, v13
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v9, v10, v46, s4
+; VI-NEXT: v_perm_b32 v10, v45, v44, s4
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; VI-NEXT: v_or_b32_e32 v9, v9, v10
+; VI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v9, v50, v21, s4
+; VI-NEXT: v_perm_b32 v7, v7, v51, s4
+; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; VI-NEXT: v_or_b32_e32 v7, v7, v9
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v7, v8, v41, s4
+; VI-NEXT: v_perm_b32 v8, v40, v55, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v7, v7, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v7, v39, v20, s4
-; VI-NEXT: v_perm_b32 v5, v5, v49, s4
+; VI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v7, v38, v20, s4
+; VI-NEXT: v_perm_b32 v5, v5, v48, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v5, v5, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v5, v6, v54, s4
-; VI-NEXT: v_perm_b32 v6, v53, v51, s4
+; VI-NEXT: v_perm_b32 v6, v53, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v5, v5, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:36
; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v3, v3, v36, s4
@@ -52856,43 +52601,37 @@ define inreg <64 x i8> @bitcast_v8f64_to_v64i8_scalar(<8 x double> inreg %a, i32
; VI-NEXT: v_perm_b32 v5, v35, v5, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v3, v3, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v3, v5, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v3, v4, v48, s4
-; VI-NEXT: v_perm_b32 v4, v38, v37, s4
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v3, v4, v49, s4
+; VI-NEXT: v_perm_b32 v4, v39, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v3, v3, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_perm_b32 v3, v30, v3, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_perm_b32 v1, v2, v34, s4
; VI-NEXT: v_perm_b32 v2, v33, v32, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v9, v28, s4
+; VI-NEXT: v_perm_b32 v1, v11, v27, s4
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v19, v2, s4
+; VI-NEXT: v_perm_b32 v2, v26, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v27, v25, s4
-; VI-NEXT: v_perm_b32 v1, v10, v29, s4
+; VI-NEXT: v_perm_b32 v2, v28, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: v_perm_b32 v1, v12, v29, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -63498,21 +63237,19 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: v_lshlrev_b32_e32 v40, 16, v21
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v12
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v11
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v10
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v9
; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v8
; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v7
@@ -63520,57 +63257,59 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v4
; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v1
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; kill: killed $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: s_waitcnt expcnt(4)
; SI-NEXT: v_lshlrev_b32_e32 v59, 16, v31
-; SI-NEXT: v_lshlrev_b32_e32 v56, 16, v44
+; SI-NEXT: v_lshlrev_b32_e32 v58, 16, v52
; SI-NEXT: s_waitcnt expcnt(2)
; SI-NEXT: v_lshlrev_b32_e32 v61, 16, v29
; SI-NEXT: v_lshlrev_b32_e32 v60, 16, v35
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v63, 16, v28
; SI-NEXT: v_lshlrev_b32_e32 v62, 16, v30
-; SI-NEXT: v_lshlrev_b32_e32 v37, 16, v26
-; SI-NEXT: v_lshlrev_b32_e32 v36, 16, v27
-; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v25
-; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v23
-; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v24
-; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v20
-; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v22
-; SI-NEXT: v_lshlrev_b32_e32 v52, 16, v19
-; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v21
-; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v39, 16, v26
+; SI-NEXT: v_lshlrev_b32_e32 v38, 16, v27
+; SI-NEXT: v_lshlrev_b32_e32 v49, 16, v25
+; SI-NEXT: v_lshlrev_b32_e32 v48, 16, v22
+; SI-NEXT: v_lshlrev_b32_e32 v51, 16, v24
+; SI-NEXT: v_lshlrev_b32_e32 v50, 16, v20
+; SI-NEXT: v_lshlrev_b32_e32 v54, 16, v23
+; SI-NEXT: v_lshlrev_b32_e32 v53, 16, v19
+; SI-NEXT: v_lshlrev_b32_e32 v55, 16, v18
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr46
-; SI-NEXT: ; implicit-def: $vgpr47
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr34
+; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr42
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr43
; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr29
+; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr22
-; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr40
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; kill: killed $vgpr21
+; SI-NEXT: ; implicit-def: $vgpr21
; SI-NEXT: ; kill: killed $vgpr41
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
@@ -63578,142 +63317,142 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB96_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_or_b32_e32 v58, v1, v59
+; SI-NEXT: v_or_b32_e32 v57, v1, v59
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v2
-; SI-NEXT: v_or_b32_e32 v57, v1, v56
-; SI-NEXT: v_alignbit_b32 v1, v57, v58, 24
+; SI-NEXT: v_or_b32_e32 v45, v1, v58
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v57, v58, 16
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
-; SI-NEXT: v_or_b32_e32 v51, v1, v61
+; SI-NEXT: v_or_b32_e32 v37, v1, v61
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v4
-; SI-NEXT: v_or_b32_e32 v39, v1, v60
-; SI-NEXT: v_alignbit_b32 v1, v39, v51, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v36, v1, v60
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v51, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
-; SI-NEXT: v_or_b32_e32 v34, v1, v63
+; SI-NEXT: v_or_b32_e32 v33, v1, v63
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v6
-; SI-NEXT: v_or_b32_e32 v33, v1, v62
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v34, v1, v62
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 16
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
-; SI-NEXT: v_or_b32_e32 v32, v1, v37
+; SI-NEXT: v_or_b32_e32 v31, v1, v39
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v8
-; SI-NEXT: v_or_b32_e32 v31, v1, v36
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v32, v1, v38
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 16
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
-; SI-NEXT: v_or_b32_e32 v29, v1, v48
+; SI-NEXT: v_or_b32_e32 v28, v1, v49
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v10
-; SI-NEXT: v_or_b32_e32 v28, v1, v38
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v29, v1, v48
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 16
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
-; SI-NEXT: v_or_b32_e32 v26, v1, v50
+; SI-NEXT: v_or_b32_e32 v25, v1, v51
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12
-; SI-NEXT: v_or_b32_e32 v25, v1, v49
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v26, v1, v50
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 16
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
-; SI-NEXT: v_or_b32_e32 v24, v1, v53
+; SI-NEXT: v_or_b32_e32 v23, v1, v54
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14
-; SI-NEXT: v_or_b32_e32 v22, v1, v52
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v24, v1, v53
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
-; SI-NEXT: v_or_b32_e32 v21, v1, v55
+; SI-NEXT: v_or_b32_e32 v17, v1, v40
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16
-; SI-NEXT: v_or_b32_e32 v17, v1, v54
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 24
+; SI-NEXT: v_or_b32_e32 v21, v1, v55
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_bfe_u32 v1, v27, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v23, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v1, v22, 8, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_bfe_u32 v1, v20, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_bfe_u32 v1, v19, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_bfe_u32 v1, v18, 8, 8
-; SI-NEXT: v_alignbit_b32 v41, v57, v58, 8
-; SI-NEXT: v_alignbit_b32 v40, v39, v51, 8
-; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v57
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v39
-; SI-NEXT: v_bfe_u32 v47, v44, 8, 8
-; SI-NEXT: v_bfe_u32 v45, v35, 8, 8
-; SI-NEXT: v_bfe_u32 v42, v30, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v47, 8, v45
+; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v42, 8, v34
+; SI-NEXT: v_bfe_u32 v56, v52, 8, 8
+; SI-NEXT: v_bfe_u32 v46, v35, 8, 8
+; SI-NEXT: v_bfe_u32 v43, v30, 8, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v41, v18, 8, 8
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr3
@@ -63731,21 +63470,21 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr16
; SI-NEXT: ; implicit-def: $vgpr59
-; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr58
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: .LBB96_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB96_4
@@ -63754,242 +63493,243 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_mov_b32 s6, 0x30000
-; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT: v_or_b32_e32 v1, v59, v1
-; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_add_i32_e32 v58, vcc, s6, v1
+; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v3
+; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, 3, v2
-; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
-; SI-NEXT: v_or_b32_e32 v3, v61, v3
+; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
-; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_add_i32_e32 v51, vcc, s6, v3
+; SI-NEXT: v_or_b32_e32 v3, v61, v3
+; SI-NEXT: v_or_b32_e32 v1, v58, v1
+; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v5
+; SI-NEXT: v_add_i32_e32 v37, vcc, s6, v3
; SI-NEXT: v_add_i32_e32 v3, vcc, 3, v4
-; SI-NEXT: v_or_b32_e32 v1, v56, v1
-; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_add_i32_e32 v45, vcc, s6, v1
+; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_and_b32_e32 v3, 0xffff, v3
-; SI-NEXT: v_add_i32_e32 v57, vcc, s6, v1
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 24
+; SI-NEXT: v_or_b32_e32 v5, v63, v5
+; SI-NEXT: v_or_b32_e32 v3, v60, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 16
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v7
-; SI-NEXT: v_add_i32_e32 v34, vcc, s6, v5
+; SI-NEXT: v_add_i32_e32 v33, vcc, s6, v5
; SI-NEXT: v_add_i32_e32 v5, vcc, 3, v6
-; SI-NEXT: v_or_b32_e32 v3, v60, v3
-; SI-NEXT: v_alignbit_b32 v1, v57, v58, 24
+; SI-NEXT: v_add_i32_e32 v36, vcc, s6, v3
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_alignbit_b32 v1, v45, v57, 8
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
-; SI-NEXT: v_add_i32_e32 v39, vcc, s6, v3
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v57, v58, 16
-; SI-NEXT: v_or_b32_e32 v7, v37, v7
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 24
+; SI-NEXT: v_or_b32_e32 v7, v39, v7
; SI-NEXT: v_or_b32_e32 v5, v62, v5
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v51, 24
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 16
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v9
-; SI-NEXT: v_add_i32_e32 v32, vcc, s6, v7
+; SI-NEXT: v_add_i32_e32 v31, vcc, s6, v7
; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v8
-; SI-NEXT: v_add_i32_e32 v33, vcc, s6, v5
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_add_i32_e32 v34, vcc, s6, v5
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v39, v51, 16
+; SI-NEXT: v_alignbit_b32 v1, v36, v37, 8
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT: v_and_b32_e32 v7, 0xffff, v7
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 24
-; SI-NEXT: v_or_b32_e32 v9, v48, v9
-; SI-NEXT: v_or_b32_e32 v7, v36, v7
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 24
+; SI-NEXT: v_or_b32_e32 v9, v49, v9
+; SI-NEXT: v_or_b32_e32 v7, v38, v7
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 16
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 16
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v11
-; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v9
+; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v9
; SI-NEXT: v_add_i32_e32 v9, vcc, 3, v10
-; SI-NEXT: v_add_i32_e32 v31, vcc, s6, v7
+; SI-NEXT: v_add_i32_e32 v32, vcc, s6, v7
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v33, v34, 8
+; SI-NEXT: v_alignbit_b32 v1, v34, v33, 8
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT: v_and_b32_e32 v9, 0xffff, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 24
-; SI-NEXT: v_or_b32_e32 v11, v50, v11
-; SI-NEXT: v_or_b32_e32 v9, v38, v9
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 24
+; SI-NEXT: v_or_b32_e32 v11, v51, v11
+; SI-NEXT: v_or_b32_e32 v9, v48, v9
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 16
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 16
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v13
-; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v11
+; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v11
; SI-NEXT: v_add_i32_e32 v11, vcc, 3, v12
-; SI-NEXT: v_add_i32_e32 v28, vcc, s6, v9
+; SI-NEXT: v_add_i32_e32 v29, vcc, s6, v9
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v31, v32, 8
+; SI-NEXT: v_alignbit_b32 v1, v32, v31, 8
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 24
-; SI-NEXT: v_or_b32_e32 v13, v53, v13
-; SI-NEXT: v_or_b32_e32 v11, v49, v11
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 24
+; SI-NEXT: v_or_b32_e32 v13, v54, v13
+; SI-NEXT: v_or_b32_e32 v11, v50, v11
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 16
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 16
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v15
-; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v13
+; SI-NEXT: v_add_i32_e32 v23, vcc, s6, v13
; SI-NEXT: v_add_i32_e32 v13, vcc, 3, v14
-; SI-NEXT: v_add_i32_e32 v25, vcc, s6, v11
+; SI-NEXT: v_add_i32_e32 v26, vcc, s6, v11
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v28, v29, 8
+; SI-NEXT: v_alignbit_b32 v1, v29, v28, 8
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT: v_and_b32_e32 v13, 0xffff, v13
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 24
-; SI-NEXT: v_or_b32_e32 v15, v55, v15
-; SI-NEXT: v_or_b32_e32 v13, v52, v13
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 24
+; SI-NEXT: v_or_b32_e32 v15, v40, v15
+; SI-NEXT: v_or_b32_e32 v13, v53, v13
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 16
-; SI-NEXT: v_add_i32_e32 v21, vcc, 0x30000, v15
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 16
+; SI-NEXT: v_add_i32_e32 v17, vcc, 0x30000, v15
; SI-NEXT: v_add_i32_e32 v15, vcc, 3, v16
-; SI-NEXT: v_add_i32_e32 v22, vcc, s6, v13
+; SI-NEXT: v_add_i32_e32 v24, vcc, s6, v13
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v26, 8
+; SI-NEXT: v_alignbit_b32 v1, v26, v25, 8
; SI-NEXT: v_and_b32_e32 v15, 0xffff, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 24
-; SI-NEXT: v_or_b32_e32 v15, v54, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 24
+; SI-NEXT: v_or_b32_e32 v15, v55, v15
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 16
-; SI-NEXT: v_add_i32_e32 v17, vcc, s6, v15
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 16
+; SI-NEXT: v_add_i32_e32 v21, vcc, s6, v15
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v22, v24, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v24, v23, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 24
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v17, v21, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v21, v17, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v33
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v32
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v31
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v32
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v31
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v29
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v28
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v29
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v28
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v26
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
+; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v22
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v24
+; SI-NEXT: v_lshrrev_b32_e32 v56, 24, v45
+; SI-NEXT: v_lshrrev_b32_e32 v52, 16, v45
+; SI-NEXT: v_lshrrev_b32_e32 v47, 8, v45
+; SI-NEXT: v_lshrrev_b32_e32 v46, 24, v36
+; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v44, 8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v43, 24, v34
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v34
+; SI-NEXT: v_lshrrev_b32_e32 v42, 8, v34
+; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v29
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v26
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v41, 24, v21
+; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v21
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v22
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v21
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 24, v17
-; SI-NEXT: v_alignbit_b32 v41, v57, v58, 8
-; SI-NEXT: v_alignbit_b32 v40, v39, v51, 8
-; SI-NEXT: v_lshrrev_b32_e32 v47, 24, v57
-; SI-NEXT: v_lshrrev_b32_e32 v44, 16, v57
-; SI-NEXT: v_lshrrev_b32_e32 v46, 8, v57
-; SI-NEXT: v_lshrrev_b32_e32 v45, 24, v39
-; SI-NEXT: v_lshrrev_b32_e32 v35, 16, v39
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v39
-; SI-NEXT: v_lshrrev_b32_e32 v42, 24, v33
-; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v33
-; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v31
-; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v25
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v22
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v17
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v17
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: .LBB96_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v58
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v57
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v57
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v46
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v47
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v44
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v52
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v47
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v56
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v51
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v40
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v44
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v35
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v45
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64002,26 +63742,22 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v42
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v43
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64034,12 +63770,11 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64050,12 +63785,11 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64068,28 +63802,26 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v23
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v22
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64102,12 +63834,11 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64118,16 +63849,15 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v23
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -64136,12 +63866,11 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v22
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v24
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -64152,16 +63881,15 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -64170,24 +63898,20 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
-; SI-NEXT: s_waitcnt vmcnt(1)
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v21
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v41
+; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v18
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -64226,81 +63950,81 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr45
; VI-NEXT: ; implicit-def: $vgpr19
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; kill: killed $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr19
+; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v15
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v13
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v13
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v10
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v11
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v10
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v4
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v8
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v7
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v4
; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v1
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; kill: killed $vgpr19
; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: ; implicit-def: $vgpr55
-; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: ; implicit-def: $vgpr44
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr56
-; VI-NEXT: ; implicit-def: $vgpr42
-; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; implicit-def: $vgpr41
+; VI-NEXT: ; implicit-def: $vgpr17
; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr59
-; VI-NEXT: ; implicit-def: $vgpr40
-; VI-NEXT: ; implicit-def: $vgpr52
; VI-NEXT: ; implicit-def: $vgpr50
-; VI-NEXT: ; implicit-def: $vgpr43
-; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr45
-; VI-NEXT: ; implicit-def: $vgpr54
-; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr51
+; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr58
+; VI-NEXT: ; implicit-def: $vgpr54
+; VI-NEXT: ; implicit-def: $vgpr40
+; VI-NEXT: ; implicit-def: $vgpr57
; VI-NEXT: ; implicit-def: $vgpr62
+; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr53
+; VI-NEXT: ; implicit-def: $vgpr52
+; VI-NEXT: ; implicit-def: $vgpr42
+; VI-NEXT: ; implicit-def: $vgpr55
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr46
+; VI-NEXT: ; kill: killed $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr18
+; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; kill: killed $vgpr19
; VI-NEXT: ; implicit-def: $vgpr25
; VI-NEXT: ; implicit-def: $vgpr24
@@ -64309,79 +64033,79 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
-; VI-NEXT: ; implicit-def: $vgpr17
+; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT: s_cbranch_execz .LBB96_2
; VI-NEXT: ; %bb.1: ; %cmp.false
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v4
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v15
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v14
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v14
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v13
-; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v12
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v11
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v10
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v7
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v9
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v6
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v16
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v8
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v18, 8, v5
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v12
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v6
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v1
-; VI-NEXT: v_mov_b32_e32 v25, v50
-; VI-NEXT: v_mov_b32_e32 v55, v1
-; VI-NEXT: v_mov_b32_e32 v53, v2
-; VI-NEXT: v_mov_b32_e32 v56, v3
-; VI-NEXT: v_mov_b32_e32 v46, v4
-; VI-NEXT: v_mov_b32_e32 v61, v5
-; VI-NEXT: v_mov_b32_e32 v59, v6
-; VI-NEXT: v_mov_b32_e32 v52, v7
-; VI-NEXT: v_mov_b32_e32 v50, v8
-; VI-NEXT: v_mov_b32_e32 v43, v9
-; VI-NEXT: v_mov_b32_e32 v41, v10
-; VI-NEXT: v_mov_b32_e32 v47, v11
-; VI-NEXT: v_mov_b32_e32 v45, v12
-; VI-NEXT: v_mov_b32_e32 v60, v13
-; VI-NEXT: v_mov_b32_e32 v58, v14
-; VI-NEXT: v_mov_b32_e32 v51, v15
-; VI-NEXT: v_mov_b32_e32 v62, v16
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 24, v6
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v16
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v6
+; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
+; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v1
+; VI-NEXT: v_mov_b32_e32 v25, v18
+; VI-NEXT: v_mov_b32_e32 v43, v1
+; VI-NEXT: v_mov_b32_e32 v41, v2
+; VI-NEXT: v_mov_b32_e32 v50, v3
+; VI-NEXT: v_mov_b32_e32 v63, v4
+; VI-NEXT: v_mov_b32_e32 v54, v5
+; VI-NEXT: v_mov_b32_e32 v57, v6
+; VI-NEXT: v_mov_b32_e32 v62, v7
+; VI-NEXT: v_mov_b32_e32 v60, v8
+; VI-NEXT: v_mov_b32_e32 v53, v9
+; VI-NEXT: v_mov_b32_e32 v52, v10
+; VI-NEXT: v_mov_b32_e32 v42, v11
+; VI-NEXT: v_mov_b32_e32 v55, v12
+; VI-NEXT: v_mov_b32_e32 v47, v13
+; VI-NEXT: v_mov_b32_e32 v46, v14
+; VI-NEXT: v_mov_b32_e32 v18, v15
+; VI-NEXT: v_mov_b32_e32 v59, v16
; VI-NEXT: ; implicit-def: $vgpr1
; VI-NEXT: ; implicit-def: $vgpr3
; VI-NEXT: ; implicit-def: $vgpr5
@@ -64395,112 +64119,113 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: s_cbranch_execz .LBB96_4
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v17, 3
-; VI-NEXT: v_add_u16_sdwa v28, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v33, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v26, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v29, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v30, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v32, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v59, 3, v16
+; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v26
+; VI-NEXT: v_add_u16_e32 v18, 3, v15
+; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v32
+; VI-NEXT: v_or_b32_e32 v16, v59, v16
+; VI-NEXT: v_or_b32_e32 v15, v18, v15
+; VI-NEXT: v_add_u16_sdwa v27, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v33, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[15:16]
+; VI-NEXT: v_add_u16_e32 v46, 3, v14
+; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v27
+; VI-NEXT: v_add_u16_e32 v47, 3, v13
+; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v33
+; VI-NEXT: v_or_b32_e32 v14, v46, v14
+; VI-NEXT: v_or_b32_e32 v13, v47, v13
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v28, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v34, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[13:14]
+; VI-NEXT: v_add_u16_sdwa v29, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_add_u16_sdwa v35, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v45, 3, v12
+; VI-NEXT: v_add_u16_e32 v55, 3, v12
; VI-NEXT: v_lshlrev_b32_e32 v12, 16, v28
-; VI-NEXT: v_add_u16_e32 v47, 3, v11
-; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v33
-; VI-NEXT: v_add_u16_e32 v62, 3, v16
-; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v26
-; VI-NEXT: v_add_u16_e32 v51, 3, v15
-; VI-NEXT: v_lshlrev_b32_e32 v15, 16, v29
-; VI-NEXT: v_add_u16_sdwa v32, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v37, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v41, 3, v10
-; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v30
-; VI-NEXT: v_add_u16_e32 v43, 3, v9
+; VI-NEXT: v_add_u16_e32 v42, 3, v11
+; VI-NEXT: v_lshlrev_b32_e32 v11, 16, v34
+; VI-NEXT: v_add_u16_sdwa v30, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v36, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v52, 3, v10
+; VI-NEXT: v_lshlrev_b32_e32 v10, 16, v29
+; VI-NEXT: v_add_u16_e32 v53, 3, v9
; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v35
-; VI-NEXT: v_or_b32_e32 v12, v45, v12
-; VI-NEXT: v_or_b32_e32 v11, v47, v11
-; VI-NEXT: v_or_b32_e32 v16, v62, v16
-; VI-NEXT: v_or_b32_e32 v15, v51, v15
-; VI-NEXT: v_add_u16_sdwa v38, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v49, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v36, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v48, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v34, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v39, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_e32 v50, 3, v8
-; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v32
-; VI-NEXT: v_add_u16_e32 v52, 3, v7
-; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v37
-; VI-NEXT: v_or_b32_e32 v10, v41, v10
-; VI-NEXT: v_or_b32_e32 v9, v43, v9
-; VI-NEXT: v_add_u16_sdwa v27, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_u16_sdwa v31, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
+; VI-NEXT: v_or_b32_e32 v12, v55, v12
+; VI-NEXT: v_or_b32_e32 v11, v42, v11
+; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; VI-NEXT: v_add_u16_sdwa v31, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v37, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v60, 3, v8
+; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v30
+; VI-NEXT: v_add_u16_e32 v62, 3, v7
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v36
+; VI-NEXT: v_or_b32_e32 v10, v52, v10
+; VI-NEXT: v_or_b32_e32 v9, v53, v9
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_add_u16_e32 v59, 3, v6
-; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v34
-; VI-NEXT: v_add_u16_e32 v61, 3, v5
-; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v39
-; VI-NEXT: v_or_b32_e32 v8, v50, v8
-; VI-NEXT: v_or_b32_e32 v7, v52, v7
-; VI-NEXT: v_add_u16_e32 v58, 3, v14
-; VI-NEXT: v_lshlrev_b32_e32 v14, 16, v27
-; VI-NEXT: v_add_u16_e32 v60, 3, v13
-; VI-NEXT: v_lshlrev_b32_e32 v13, 16, v31
+; VI-NEXT: v_add_u16_sdwa v38, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v48, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v57, 3, v6
+; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v31
+; VI-NEXT: v_add_u16_e32 v54, 3, v5
+; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v37
+; VI-NEXT: v_or_b32_e32 v8, v60, v8
+; VI-NEXT: v_or_b32_e32 v7, v62, v7
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_add_u16_e32 v46, 3, v4
-; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v36
-; VI-NEXT: v_add_u16_e32 v56, 3, v3
+; VI-NEXT: v_add_u16_sdwa v39, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_sdwa v49, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_u16_e32 v63, 3, v4
+; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v38
+; VI-NEXT: v_add_u16_e32 v50, 3, v3
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v48
-; VI-NEXT: v_or_b32_e32 v6, v59, v6
-; VI-NEXT: v_or_b32_e32 v5, v61, v5
-; VI-NEXT: v_or_b32_e32 v14, v58, v14
-; VI-NEXT: v_or_b32_e32 v13, v60, v13
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_or_b32_e32 v6, v57, v6
+; VI-NEXT: v_or_b32_e32 v5, v54, v5
; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
-; VI-NEXT: v_add_u16_e32 v53, 3, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v38
-; VI-NEXT: v_add_u16_e32 v55, 3, v1
+; VI-NEXT: v_add_u16_e32 v41, 3, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v39
+; VI-NEXT: v_add_u16_e32 v43, 3, v1
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v49
-; VI-NEXT: v_or_b32_e32 v4, v46, v4
-; VI-NEXT: v_or_b32_e32 v3, v56, v3
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; VI-NEXT: v_or_b32_e32 v4, v63, v4
+; VI-NEXT: v_or_b32_e32 v3, v50, v3
; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[5:6]
-; VI-NEXT: v_or_b32_e32 v2, v53, v2
-; VI-NEXT: v_or_b32_e32 v1, v55, v1
+; VI-NEXT: v_or_b32_e32 v2, v41, v2
+; VI-NEXT: v_or_b32_e32 v1, v43, v1
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v1
+; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
+; VI-NEXT: v_bfe_u32 v1, v27, 8, 8
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v28, 8, 8
; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v12
-; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[3:4]
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v29, 8, 8
; VI-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v1
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[1:2]
-; VI-NEXT: v_bfe_u32 v1, v27, 8, 8
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; VI-NEXT: v_bfe_u32 v1, v30, 8, 8
; VI-NEXT: v_lshrrev_b32_e32 v16, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v15
; VI-NEXT: v_lshrrev_b32_e32 v14, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v8
-; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v5, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v2
+; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v11, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v7, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v2
; VI-NEXT: v_bfe_u32 v25, v26, 8, 8
-; VI-NEXT: v_bfe_u32 v54, v28, 8, 8
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
-; VI-NEXT: v_bfe_u32 v1, v32, 8, 8
-; VI-NEXT: v_bfe_u32 v40, v34, 8, 8
-; VI-NEXT: v_bfe_u32 v18, v36, 8, 8
-; VI-NEXT: v_bfe_u32 v63, v38, 8, 8
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: v_bfe_u32 v1, v31, 8, 8
+; VI-NEXT: v_bfe_u32 v58, v38, 8, 8
+; VI-NEXT: v_bfe_u32 v61, v39, 8, 8
; VI-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v15, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
@@ -64508,140 +64233,124 @@ define <64 x i8> @bitcast_v32i16_to_v64i8(<32 x i16> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
-; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; VI-NEXT: .LBB96_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
; VI-NEXT: v_perm_b32 v1, v49, v24, s4
-; VI-NEXT: v_perm_b32 v2, v55, v57, s4
+; VI-NEXT: v_perm_b32 v3, v43, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_perm_b32 v2, v38, v63, s4
+; VI-NEXT: v_or_b32_e32 v1, v3, v1
+; VI-NEXT: v_perm_b32 v3, v39, v61, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v53, v44, s4
+; VI-NEXT: v_perm_b32 v1, v41, v17, s4
+; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; VI-NEXT: v_perm_b32 v2, v48, v23, s4
+; VI-NEXT: v_or_b32_e32 v1, v1, v3
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v50, v51, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v48, v23, s4
-; VI-NEXT: v_perm_b32 v2, v56, v42, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
+; VI-NEXT: v_perm_b32 v2, v38, v58, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v63, v45, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v46, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v39, v22, s4
+; VI-NEXT: v_perm_b32 v2, v37, v22, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v54, v40, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v61, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v34, v40, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v57, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v59, v1, s4
+; VI-NEXT: v_perm_b32 v2, v31, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v37, v21, s4
+; VI-NEXT: v_perm_b32 v2, v36, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v62, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v52, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v50, v17, s4
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v60, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v32, v2, s4
+; VI-NEXT: v_perm_b32 v2, v30, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v35, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v43, v1, s4
+; VI-NEXT: v_perm_b32 v1, v53, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v41, v1, s4
+; VI-NEXT: v_perm_b32 v1, v52, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v30, v2, s4
+; VI-NEXT: v_perm_b32 v2, v29, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v33, v19, s4
+; VI-NEXT: v_perm_b32 v2, v34, v19, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v47, v1, s4
+; VI-NEXT: v_perm_b32 v1, v42, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v28, v54, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; VI-NEXT: s_waitcnt vmcnt(1)
+; VI-NEXT: v_perm_b32 v1, v55, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v45, v1, s4
+; VI-NEXT: v_perm_b32 v2, v28, v2, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v31, v2, s4
-; VI-NEXT: v_perm_b32 v1, v60, v1, s4
+; VI-NEXT: v_perm_b32 v2, v33, v2, s4
+; VI-NEXT: v_perm_b32 v1, v47, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v1, v58, v1, s4
+; VI-NEXT: v_perm_b32 v1, v46, v1, s4
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v2, v27, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v29, v2, s4
-; VI-NEXT: v_perm_b32 v1, v51, v1, s4
+; VI-NEXT: v_perm_b32 v2, v32, v2, s4
+; VI-NEXT: v_perm_b32 v1, v18, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v26, v25, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v1, v62, v1, s4
+; VI-NEXT: v_perm_b32 v1, v59, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -65468,9 +65177,12 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s43, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 24
; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_writelane_b32 v5, s4, 4
+; SI-NEXT: v_writelane_b32 v5, s5, 5
+; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16
; SI-NEXT: v_writelane_b32 v5, s4, 2
; SI-NEXT: v_writelane_b32 v5, s5, 3
-; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[4:5], s[42:43], 8
; SI-NEXT: v_writelane_b32 v5, s4, 0
; SI-NEXT: v_writelane_b32 v5, s5, 1
; SI-NEXT: s_and_b32 s4, s18, 0xffff
@@ -65480,17 +65192,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s5, s82, 16
; SI-NEXT: s_or_b32 s41, s4, s5
; SI-NEXT: s_lshr_b64 s[4:5], s[40:41], 24
-; SI-NEXT: v_writelane_b32 v5, s4, 4
-; SI-NEXT: v_writelane_b32 v5, s5, 5
+; SI-NEXT: v_writelane_b32 v5, s4, 6
+; SI-NEXT: v_writelane_b32 v5, s5, 7
; SI-NEXT: s_and_b32 s4, s20, 0xffff
; SI-NEXT: s_lshl_b32 s5, s86, 16
; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s21, 0xffff
; SI-NEXT: s_lshl_b32 s5, s81, 16
; SI-NEXT: s_or_b32 s13, s4, s5
-; SI-NEXT: s_lshr_b64 s[4:5], s[12:13], 24
-; SI-NEXT: v_writelane_b32 v5, s4, 6
-; SI-NEXT: v_writelane_b32 v5, s5, 7
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s8, s4, s5
@@ -65520,10 +65229,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: s_and_b32 s5, s46, 0xffff
; SI-NEXT: s_lshl_b32 s45, s69, 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
@@ -65548,15 +65257,15 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_bfe_u32 s59, s68, 0x80008
; SI-NEXT: s_bfe_u32 s47, s69, 0x80008
; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 8
; SI-NEXT: s_cbranch_execnz .LBB97_3
; SI-NEXT: .LBB97_2: ; %cmp.true
; SI-NEXT: s_add_i32 s58, s58, 3
@@ -65632,27 +65341,27 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_or_b32 s16, s17, s16
; SI-NEXT: s_add_i32 s43, s16, 0x30000
; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 24
+; SI-NEXT: v_writelane_b32 v5, s16, 4
+; SI-NEXT: v_writelane_b32 v5, s17, 5
+; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
; SI-NEXT: v_writelane_b32 v5, s16, 2
; SI-NEXT: v_writelane_b32 v5, s17, 3
-; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 16
-; SI-NEXT: v_writelane_b32 v5, s16, 0
-; SI-NEXT: v_writelane_b32 v5, s17, 1
-; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
+; SI-NEXT: s_lshr_b64 s[16:17], s[42:43], 8
; SI-NEXT: s_add_i32 s8, s8, 0x30000
; SI-NEXT: s_add_i32 s9, s9, 0x30000
; SI-NEXT: s_add_i32 s12, s12, 0x30000
; SI-NEXT: s_add_i32 s13, s13, 0x30000
-; SI-NEXT: v_writelane_b32 v5, s16, 4
+; SI-NEXT: v_writelane_b32 v5, s16, 0
; SI-NEXT: s_add_i32 s4, s4, 0x30000
; SI-NEXT: s_add_i32 s5, s5, 0x30000
; SI-NEXT: s_add_i32 s6, s6, 0x30000
; SI-NEXT: s_add_i32 s7, s7, 0x30000
-; SI-NEXT: s_lshr_b64 s[62:63], s[42:43], 8
-; SI-NEXT: v_writelane_b32 v5, s17, 5
+; SI-NEXT: v_writelane_b32 v5, s17, 1
+; SI-NEXT: s_lshr_b64 s[16:17], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
-; SI-NEXT: s_lshr_b64 s[16:17], s[12:13], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[62:63], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[74:75], s[12:13], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[12:13], 8
; SI-NEXT: s_lshr_b64 s[78:79], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[90:91], s[8:9], 16
@@ -65661,15 +65370,15 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshr_b64 s[92:93], s[14:15], 16
; SI-NEXT: v_writelane_b32 v5, s16, 6
; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[10:11], 24
; SI-NEXT: s_lshr_b64 s[54:55], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 8
; SI-NEXT: s_lshr_b32 s99, s43, 24
; SI-NEXT: s_lshr_b32 s83, s43, 16
; SI-NEXT: s_lshr_b32 s98, s43, 8
@@ -65697,12 +65406,14 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: v_writelane_b32 v5, s17, 7
; SI-NEXT: .LBB97_3: ; %end
; SI-NEXT: v_readlane_b32 s18, v5, 0
-; SI-NEXT: s_and_b32 s16, s42, 0xff
-; SI-NEXT: s_lshl_b32 s17, s62, 8
; SI-NEXT: v_readlane_b32 s19, v5, 1
+; SI-NEXT: s_lshl_b32 s17, s18, 8
+; SI-NEXT: v_readlane_b32 s18, v5, 2
+; SI-NEXT: s_and_b32 s16, s42, 0xff
+; SI-NEXT: v_readlane_b32 s19, v5, 3
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s18, 0xff
-; SI-NEXT: v_readlane_b32 s18, v5, 2
+; SI-NEXT: v_readlane_b32 s18, v5, 4
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
@@ -65718,24 +65429,23 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v5, 3
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_readlane_b32 s19, v5, 5
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s74, 8
+; SI-NEXT: s_lshl_b32 s17, s72, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s60, 0xff
-; SI-NEXT: v_readlane_b32 s18, v5, 4
+; SI-NEXT: v_readlane_b32 s18, v5, 6
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s18, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
; SI-NEXT: s_lshl_b32 s17, s93, 8
; SI-NEXT: s_or_b32 s16, s16, s17
@@ -65744,26 +65454,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s18, s95, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_readlane_b32 s19, v5, 5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s16
+; SI-NEXT: v_mov_b32_e32 v1, s16
; SI-NEXT: s_and_b32 s12, s12, 0xff
; SI-NEXT: s_lshl_b32 s16, s76, 8
; SI-NEXT: s_or_b32 s12, s12, s16
-; SI-NEXT: s_and_b32 s16, s72, 0xff
-; SI-NEXT: v_readlane_b32 s18, v5, 6
+; SI-NEXT: s_and_b32 s16, s74, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
-; SI-NEXT: s_lshl_b32 s17, s18, 24
+; SI-NEXT: s_lshl_b32 s17, s62, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
; SI-NEXT: s_or_b32 s12, s12, s16
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s12, s13, 0xff
; SI-NEXT: s_lshl_b32 s13, s89, 8
; SI-NEXT: s_or_b32 s12, s12, s13
@@ -65772,11 +65478,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s16, s91, 24
; SI-NEXT: s_and_b32 s12, s12, 0xffff
; SI-NEXT: s_or_b32 s13, s16, s13
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s12, s12, s13
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s12
+; SI-NEXT: v_mov_b32_e32 v1, s12
; SI-NEXT: s_and_b32 s8, s8, 0xff
; SI-NEXT: s_lshl_b32 s12, s94, 8
; SI-NEXT: s_or_b32 s8, s8, s12
@@ -65785,11 +65490,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s13, s78, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
; SI-NEXT: s_or_b32 s8, s8, s12
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
; SI-NEXT: s_lshl_b32 s9, s77, 8
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -65798,11 +65502,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s12, s79, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s14, 0xff
; SI-NEXT: s_lshl_b32 s9, s66, 8
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -65811,11 +65514,10 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s12, s88, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s15, 0xff
; SI-NEXT: s_lshl_b32 s9, s73, 8
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -65824,24 +65526,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s12, s75, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s12, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s10, 0xff
; SI-NEXT: s_lshl_b32 s9, s64, 8
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_and_b32 s9, s54, 0xff
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: s_lshl_b32 s10, s52, 24
+; SI-NEXT: s_lshl_b32 s10, s50, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 36, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s8, s11, 0xff
; SI-NEXT: s_lshl_b32 s9, s61, 8
; SI-NEXT: s_or_b32 s8, s8, s9
@@ -65850,24 +65550,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s10, s63, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s9, s10, s9
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
; SI-NEXT: s_or_b32 s8, s8, s9
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s8
+; SI-NEXT: v_mov_b32_e32 v1, s8
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s8, s50, 8
+; SI-NEXT: s_lshl_b32 s8, s52, 8
; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_and_b32 s8, s48, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s38, 24
+; SI-NEXT: s_lshl_b32 s9, s36, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v1, vcc, 44, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
; SI-NEXT: s_lshl_b32 s7, s57, 8
; SI-NEXT: s_or_b32 s6, s6, s7
@@ -65876,24 +65574,22 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s8, s59, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s8, s7
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s36, 8
+; SI-NEXT: s_lshl_b32 s6, s38, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s34, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s30, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v1, vcc, 52, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_mov_b32_e32 v2, s4
+; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s45, 8
; SI-NEXT: s_or_b32 s4, s4, s5
@@ -65902,14 +65598,13 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: s_lshl_b32 s6, s47, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s5, s6, s5
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
; SI-NEXT: s_or_b32 s4, s4, s5
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s4
; SI-NEXT: v_readlane_b32 s30, v4, 34
; SI-NEXT: v_readlane_b32 s19, v5, 7
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v4, 35
; SI-NEXT: v_readlane_b32 s99, v4, 33
; SI-NEXT: v_readlane_b32 s98, v4, 32
@@ -65958,17 +65653,17 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: v_writelane_b32 v5, s5, 1
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $sgpr42
-; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr99
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr93
; SI-NEXT: ; implicit-def: $sgpr95
; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr89
; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr8
@@ -65992,12 +65687,12 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: v_writelane_b32 v5, s4, 2
@@ -66236,121 +65931,106 @@ define inreg <64 x i8> @bitcast_v32i16_to_v64i8_scalar(<32 x i16> inreg %a, i32
; VI-NEXT: v_perm_b32 v1, s17, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s42
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
; VI-NEXT: v_mov_b32_e32 v1, s54
; VI-NEXT: v_perm_b32 v3, s53, v3, v2
; VI-NEXT: v_perm_b32 v1, s18, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s50
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; VI-NEXT: v_mov_b32_e32 v1, s52
; VI-NEXT: v_perm_b32 v3, s51, v3, v2
; VI-NEXT: v_perm_b32 v1, s19, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s40
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
; VI-NEXT: v_mov_b32_e32 v1, s49
; VI-NEXT: v_perm_b32 v3, s48, v3, v2
; VI-NEXT: v_perm_b32 v1, s20, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s37
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_mov_b32_e32 v1, s39
; VI-NEXT: v_perm_b32 v3, s38, v3, v2
; VI-NEXT: v_perm_b32 v1, s21, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s14
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_mov_b32_e32 v1, s36
; VI-NEXT: v_perm_b32 v3, s35, v3, v2
; VI-NEXT: v_perm_b32 v1, s22, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s30
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; VI-NEXT: v_mov_b32_e32 v1, s34
; VI-NEXT: v_perm_b32 v3, s31, v3, v2
; VI-NEXT: v_perm_b32 v1, s23, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s12
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_mov_b32_e32 v1, s91
; VI-NEXT: v_perm_b32 v3, s90, v3, v2
; VI-NEXT: v_perm_b32 v1, s24, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s79
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_mov_b32_e32 v1, s89
; VI-NEXT: v_perm_b32 v3, s88, v3, v2
; VI-NEXT: v_perm_b32 v1, s25, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s10
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_mov_b32_e32 v1, s78
; VI-NEXT: v_perm_b32 v3, s77, v3, v2
; VI-NEXT: v_perm_b32 v1, s26, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s74
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_mov_b32_e32 v1, s76
; VI-NEXT: v_perm_b32 v3, s75, v3, v2
; VI-NEXT: v_perm_b32 v1, s27, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s8
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_mov_b32_e32 v1, s73
; VI-NEXT: v_perm_b32 v3, s72, v3, v2
; VI-NEXT: v_perm_b32 v1, s28, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s61
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_mov_b32_e32 v1, s63
; VI-NEXT: v_perm_b32 v3, s62, v3, v2
; VI-NEXT: v_perm_b32 v1, s29, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
; VI-NEXT: v_mov_b32_e32 v3, s6
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: v_mov_b32_e32 v1, s60
; VI-NEXT: v_perm_b32 v3, s59, v3, v2
; VI-NEXT: v_perm_b32 v1, s4, v1, v2
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: v_mov_b32_e32 v1, s58
; VI-NEXT: v_mov_b32_e32 v3, s56
; VI-NEXT: v_perm_b32 v1, s5, v1, v2
; VI-NEXT: v_perm_b32 v2, s57, v3, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: v_readlane_b32 s30, v4, 18
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: v_readlane_b32 s31, v4, 19
; VI-NEXT: v_readlane_b32 s67, v4, 17
; VI-NEXT: v_readlane_b32 s66, v4, 16
@@ -76235,18 +75915,18 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr25
+; SI-NEXT: ; kill: killed $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr26
; SI-NEXT: v_lshrrev_b32_e32 v18, 16, v16
-; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v15
+; SI-NEXT: v_lshrrev_b32_e32 v49, 16, v15
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v14
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v13
+; SI-NEXT: v_lshrrev_b32_e32 v48, 16, v13
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v12
-; SI-NEXT: v_lshrrev_b32_e32 v39, 16, v11
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v63, 16, v11
; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v10
; SI-NEXT: v_lshrrev_b32_e32 v62, 16, v9
; SI-NEXT: v_lshrrev_b32_e32 v22, 16, v8
@@ -76255,65 +75935,65 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshrrev_b32_e32 v60, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v24, 16, v4
; SI-NEXT: v_lshrrev_b32_e32 v59, 16, v3
-; SI-NEXT: v_lshrrev_b32_e32 v26, 16, v2
+; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v2
; SI-NEXT: v_lshrrev_b32_e32 v58, 16, v1
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr57
-; SI-NEXT: ; implicit-def: $vgpr45
-; SI-NEXT: ; implicit-def: $vgpr47
+; SI-NEXT: ; kill: killed $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr56
+; SI-NEXT: ; implicit-def: $vgpr57
; SI-NEXT: ; implicit-def: $vgpr38
; SI-NEXT: ; implicit-def: $vgpr37
-; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr46
+; SI-NEXT: ; implicit-def: $vgpr45
+; SI-NEXT: ; implicit-def: $vgpr47
; SI-NEXT: ; implicit-def: $vgpr35
; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr41
-; SI-NEXT: ; implicit-def: $vgpr44
+; SI-NEXT: ; implicit-def: $vgpr43
+; SI-NEXT: ; implicit-def: $vgpr46
; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr42
+; SI-NEXT: ; implicit-def: $vgpr41
+; SI-NEXT: ; implicit-def: $vgpr44
; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr32
-; SI-NEXT: ; implicit-def: $vgpr53
-; SI-NEXT: ; implicit-def: $vgpr40
+; SI-NEXT: ; implicit-def: $vgpr55
+; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $vgpr30
-; SI-NEXT: ; implicit-def: $vgpr51
-; SI-NEXT: ; implicit-def: $vgpr54
+; SI-NEXT: ; implicit-def: $vgpr52
+; SI-NEXT: ; implicit-def: $vgpr40
; SI-NEXT: ; implicit-def: $vgpr27
; SI-NEXT: ; kill: killed $vgpr17
; SI-NEXT: ; implicit-def: $vgpr28
-; SI-NEXT: ; implicit-def: $vgpr49
-; SI-NEXT: ; implicit-def: $vgpr52
-; SI-NEXT: ; implicit-def: $vgpr17
-; SI-NEXT: ; kill: killed $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; kill: killed $vgpr50
; SI-NEXT: ; implicit-def: $vgpr50
+; SI-NEXT: ; implicit-def: $vgpr53
+; SI-NEXT: ; implicit-def: $vgpr17
+; SI-NEXT: ; kill: killed $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; kill: killed $vgpr51
+; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT: s_cbranch_execz .LBB104_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v58
-; SI-NEXT: v_or_b32_e32 v57, v1, v17
+; SI-NEXT: v_or_b32_e32 v54, v1, v17
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v2
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; SI-NEXT: v_or_b32_e32 v45, v1, v2
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
+; SI-NEXT: v_or_b32_e32 v39, v1, v2
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v59
@@ -76322,13 +76002,13 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v24
; SI-NEXT: v_or_b32_e32 v37, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v60
@@ -76337,13 +76017,13 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v23
; SI-NEXT: v_or_b32_e32 v36, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v7
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v61
@@ -76352,13 +76032,13 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
; SI-NEXT: v_or_b32_e32 v34, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v62
@@ -76367,16 +76047,16 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
; SI-NEXT: v_or_b32_e32 v32, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v11
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v39
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63
; SI-NEXT: v_or_b32_e32 v29, v1, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v12
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
@@ -76385,58 +76065,58 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v30, v29, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v30, v29, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v13
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v63
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
; SI-NEXT: v_or_b32_e32 v27, v1, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v14
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
; SI-NEXT: v_or_b32_e32 v28, v1, v2
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v15
-; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v48
+; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v49
; SI-NEXT: v_or_b32_e32 v17, v1, v2
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v16
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v18
-; SI-NEXT: v_or_b32_e32 v25, v1, v2
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v26, v1, v2
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; SI-NEXT: v_lshrrev_b32_e32 v47, 8, v45
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v37
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v36
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v34
-; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v32
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v28
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
-; SI-NEXT: v_bfe_u32 v56, v26, 8, 8
-; SI-NEXT: v_bfe_u32 v46, v24, 8, 8
-; SI-NEXT: v_bfe_u32 v44, v23, 8, 8
-; SI-NEXT: v_bfe_u32 v42, v22, 8, 8
-; SI-NEXT: v_bfe_u32 v40, v21, 8, 8
-; SI-NEXT: v_bfe_u32 v54, v20, 8, 8
-; SI-NEXT: v_bfe_u32 v52, v19, 8, 8
-; SI-NEXT: v_bfe_u32 v50, v18, 8, 8
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
+; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v39
+; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v37
+; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v34
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v32
+; SI-NEXT: v_lshrrev_b32_e32 v52, 8, v30
+; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v28
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_bfe_u32 v57, v25, 8, 8
+; SI-NEXT: v_bfe_u32 v47, v24, 8, 8
+; SI-NEXT: v_bfe_u32 v46, v23, 8, 8
+; SI-NEXT: v_bfe_u32 v44, v22, 8, 8
+; SI-NEXT: v_bfe_u32 v42, v21, 8, 8
+; SI-NEXT: v_bfe_u32 v40, v20, 8, 8
+; SI-NEXT: v_bfe_u32 v53, v19, 8, 8
+; SI-NEXT: v_bfe_u32 v51, v18, 8, 8
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr2
; SI-NEXT: ; implicit-def: $vgpr3
@@ -76458,14 +76138,14 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr62
-; SI-NEXT: ; implicit-def: $vgpr39
; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr48
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: .LBB104_2: ; %Flow
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB104_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_cvt_f32_f16_e32 v17, v48
+; SI-NEXT: v_cvt_f32_f16_e32 v17, v49
; SI-NEXT: v_cvt_f32_f16_e32 v15, v15
; SI-NEXT: v_cvt_f32_f16_e32 v18, v18
; SI-NEXT: v_cvt_f32_f16_e32 v16, v16
@@ -76477,22 +76157,22 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT: v_cvt_f16_f32_e32 v18, v18
; SI-NEXT: v_or_b32_e32 v17, v15, v17
-; SI-NEXT: v_cvt_f32_f16_e32 v15, v63
+; SI-NEXT: v_cvt_f32_f16_e32 v15, v48
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_cvt_f32_f16_e32 v13, v13
; SI-NEXT: v_cvt_f16_f32_e32 v16, v16
; SI-NEXT: v_add_f32_e32 v15, 0x38000000, v15
-; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v18
+; SI-NEXT: v_lshlrev_b32_e32 v26, 16, v18
; SI-NEXT: v_cvt_f16_f32_e32 v15, v15
; SI-NEXT: v_add_f32_e32 v13, 0x38000000, v13
-; SI-NEXT: v_or_b32_e32 v25, v16, v25
+; SI-NEXT: v_or_b32_e32 v26, v16, v26
; SI-NEXT: v_cvt_f32_f16_e32 v16, v19
; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f32_f16_e32 v14, v14
; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT: v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT: v_or_b32_e32 v27, v13, v15
-; SI-NEXT: v_cvt_f32_f16_e32 v15, v39
+; SI-NEXT: v_cvt_f32_f16_e32 v15, v63
; SI-NEXT: v_cvt_f16_f32_e32 v19, v16
; SI-NEXT: v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
@@ -76580,119 +76260,119 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v37, v4, v5
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v1, v1
-; SI-NEXT: v_cvt_f32_f16_e32 v4, v26
+; SI-NEXT: v_cvt_f32_f16_e32 v4, v25
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT: v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
-; SI-NEXT: v_cvt_f16_f32_e32 v26, v4
+; SI-NEXT: v_cvt_f16_f32_e32 v25, v4
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_or_b32_e32 v57, v1, v3
-; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v26
-; SI-NEXT: v_or_b32_e32 v45, v2, v1
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: v_or_b32_e32 v54, v1, v3
+; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v25
+; SI-NEXT: v_or_b32_e32 v39, v2, v1
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v45, v57, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v39, v54, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v37, v38, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v36, v35, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v34, v33, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v32, v31, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v30, v29, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v30, v29, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v30, v29, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v28, v27, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v25, v17, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
-; SI-NEXT: v_lshrrev_b32_e32 v47, 8, v45
-; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v37
-; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v36
-; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v34
-; SI-NEXT: v_lshrrev_b32_e32 v53, 8, v32
-; SI-NEXT: v_lshrrev_b32_e32 v51, 8, v30
-; SI-NEXT: v_lshrrev_b32_e32 v49, 8, v28
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v25
-; SI-NEXT: v_bfe_u32 v56, v26, 8, 8
-; SI-NEXT: v_bfe_u32 v46, v24, 8, 8
-; SI-NEXT: v_bfe_u32 v44, v23, 8, 8
-; SI-NEXT: v_bfe_u32 v42, v22, 8, 8
-; SI-NEXT: v_bfe_u32 v40, v21, 8, 8
-; SI-NEXT: v_bfe_u32 v54, v20, 8, 8
-; SI-NEXT: v_bfe_u32 v52, v19, 8, 8
-; SI-NEXT: v_bfe_u32 v50, v18, 8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v26, v17, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v56, 8, v39
+; SI-NEXT: v_lshrrev_b32_e32 v45, 8, v37
+; SI-NEXT: v_lshrrev_b32_e32 v43, 8, v36
+; SI-NEXT: v_lshrrev_b32_e32 v41, 8, v34
+; SI-NEXT: v_lshrrev_b32_e32 v55, 8, v32
+; SI-NEXT: v_lshrrev_b32_e32 v52, 8, v30
+; SI-NEXT: v_lshrrev_b32_e32 v50, 8, v28
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v26
+; SI-NEXT: v_bfe_u32 v57, v25, 8, 8
+; SI-NEXT: v_bfe_u32 v47, v24, 8, 8
+; SI-NEXT: v_bfe_u32 v46, v23, 8, 8
+; SI-NEXT: v_bfe_u32 v44, v22, 8, 8
+; SI-NEXT: v_bfe_u32 v42, v21, 8, 8
+; SI-NEXT: v_bfe_u32 v40, v20, 8, 8
+; SI-NEXT: v_bfe_u32 v53, v19, 8, 8
+; SI-NEXT: v_bfe_u32 v51, v18, 8, 8
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: .LBB104_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v57
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v54
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76703,25 +76383,24 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v45
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v47
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v39
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v56
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_and_b32_e32 v2, 0xff, v26
+; SI-NEXT: v_and_b32_e32 v2, 0xff, v25
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v56
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v57
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v38
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76730,28 +76409,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v37
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v45
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v47
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v35
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76760,28 +76437,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v36
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v43
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v23
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v44
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v46
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v33
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76790,24 +76465,22 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v34
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v41
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v22
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v44
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v31
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -76820,28 +76493,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v32
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v53
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v55
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v21
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v40
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v42
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v29
; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76850,28 +76521,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v30
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v51
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v52
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v20
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v54
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v40
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v27
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76880,28 +76549,26 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v28
-; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v49
+; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v50
; SI-NEXT: v_or_b32_e32 v1, v1, v2
; SI-NEXT: v_and_b32_e32 v2, 0xff, v19
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v52
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v53
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v1, 0xff, v17
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
@@ -76910,13 +76577,11 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v1, 0xff, v25
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v50
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: v_and_b32_e32 v1, 0xff, v26
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v51
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
@@ -76925,7 +76590,7 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v2
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -76967,50 +76632,50 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
; VI-NEXT: v_lshrrev_b32_e32 v29, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v15
; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v32, 16, v10
; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v37, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v4
; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v50, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v1
; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr17
; VI-NEXT: ; implicit-def: $vgpr26
-; VI-NEXT: ; implicit-def: $vgpr22
-; VI-NEXT: ; implicit-def: $vgpr63
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr53
; VI-NEXT: ; implicit-def: $vgpr54
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr60
-; VI-NEXT: ; implicit-def: $vgpr53
-; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr47
-; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr59
+; VI-NEXT: ; implicit-def: $vgpr47
+; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr44
; VI-NEXT: ; implicit-def: $vgpr43
; VI-NEXT: ; implicit-def: $vgpr56
; VI-NEXT: ; implicit-def: $vgpr42
; VI-NEXT: ; implicit-def: $vgpr41
-; VI-NEXT: ; implicit-def: $vgpr45
+; VI-NEXT: ; implicit-def: $vgpr46
; VI-NEXT: ; implicit-def: $vgpr40
; VI-NEXT: ; implicit-def: $vgpr55
; VI-NEXT: ; implicit-def: $vgpr28
; VI-NEXT: ; kill: killed $vgpr17
; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr24
+; VI-NEXT: ; implicit-def: $vgpr21
; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
@@ -77027,237 +76692,222 @@ define <64 x i8> @bitcast_v32f16_to_v64i8(<32 x half> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b32_e32 v27, 24, v16
; VI-NEXT: v_lshrrev_b32_e32 v28, 24, v14
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v14
; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v46, 24, v12
; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v12
; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v11
; VI-NEXT: v_lshrrev_b32_e32 v56, 24, v10
; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v10
; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v8
; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v61, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v59, 24, v6
; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
; VI-NEXT: v_lshrrev_b32_e32 v54, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v2
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[1:2]
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v2
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v1
; VI-NEXT: .LBB104_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT: s_cbranch_execz .LBB104_4
; VI-NEXT: ; %bb.3: ; %cmp.true
; VI-NEXT: v_mov_b32_e32 v17, 0x200
-; VI-NEXT: v_add_f16_sdwa v49, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v49
+; VI-NEXT: v_add_f16_sdwa v50, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v50
; VI-NEXT: v_add_f16_e32 v2, 0x200, v2
; VI-NEXT: v_add_f16_sdwa v52, v1, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v28, v2, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v52
; VI-NEXT: v_add_f16_e32 v1, 0x200, v1
-; VI-NEXT: v_add_f16_sdwa v39, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v48, v4, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v27, v1, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v39
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v48
; VI-NEXT: v_add_f16_e32 v4, 0x200, v4
; VI-NEXT: v_add_f16_sdwa v51, v3, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v23, v4, v18
+; VI-NEXT: v_or_b32_e32 v24, v4, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v51
; VI-NEXT: v_add_f16_e32 v3, 0x200, v3
-; VI-NEXT: v_add_f16_sdwa v37, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v22, v3, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v37
+; VI-NEXT: v_add_f16_sdwa v34, v6, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v23, v3, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v34
; VI-NEXT: v_add_f16_e32 v6, 0x200, v6
-; VI-NEXT: v_add_f16_sdwa v50, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v54, v6, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v50
+; VI-NEXT: v_add_f16_sdwa v49, v5, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v26, v6, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v49
; VI-NEXT: v_add_f16_e32 v5, 0x200, v5
-; VI-NEXT: v_add_f16_sdwa v35, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v53, v5, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v35
+; VI-NEXT: v_add_f16_sdwa v33, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v25, v5, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33
; VI-NEXT: v_add_f16_e32 v8, 0x200, v8
-; VI-NEXT: v_add_f16_sdwa v48, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v25, v8, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v48
+; VI-NEXT: v_add_f16_sdwa v39, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v54, v8, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v39
; VI-NEXT: v_add_f16_e32 v7, 0x200, v7
-; VI-NEXT: v_add_f16_sdwa v33, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v24, v7, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v33
+; VI-NEXT: v_add_f16_sdwa v32, v10, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v53, v7, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v32
; VI-NEXT: v_add_f16_e32 v10, 0x200, v10
; VI-NEXT: v_add_f16_sdwa v38, v9, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v46, v10, v18
+; VI-NEXT: v_or_b32_e32 v22, v10, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v38
; VI-NEXT: v_add_f16_e32 v9, 0x200, v9
; VI-NEXT: v_add_f16_sdwa v31, v12, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v45, v9, v18
+; VI-NEXT: v_or_b32_e32 v21, v9, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v31
; VI-NEXT: v_add_f16_e32 v12, 0x200, v12
-; VI-NEXT: v_add_f16_sdwa v36, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v21, v12, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v36
+; VI-NEXT: v_add_f16_sdwa v37, v11, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_or_b32_e32 v44, v12, v18
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v37
; VI-NEXT: v_add_f16_e32 v11, 0x200, v11
; VI-NEXT: v_add_f16_sdwa v30, v14, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_or_b32_e32 v20, v11, v18
+; VI-NEXT: v_or_b32_e32 v43, v11, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v30
; VI-NEXT: v_add_f16_e32 v14, 0x200, v14
-; VI-NEXT: v_add_f16_sdwa v34, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v36, v13, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v41, v14, v18
-; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v34
+; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v36
; VI-NEXT: v_add_f16_e32 v13, 0x200, v13
; VI-NEXT: v_add_f16_sdwa v29, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-; VI-NEXT: v_add_f16_sdwa v32, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+; VI-NEXT: v_add_f16_sdwa v35, v15, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_or_b32_e32 v40, v13, v18
; VI-NEXT: v_lshlrev_b32_e32 v18, 16, v29
; VI-NEXT: v_add_f16_e32 v16, 0x200, v16
-; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v32
+; VI-NEXT: v_lshlrev_b32_e32 v17, 16, v35
; VI-NEXT: v_add_f16_e32 v15, 0x200, v15
-; VI-NEXT: v_or_b32_e32 v43, v16, v18
-; VI-NEXT: v_or_b32_e32 v42, v15, v17
-; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[42:43]
+; VI-NEXT: v_or_b32_e32 v46, v16, v18
+; VI-NEXT: v_or_b32_e32 v45, v15, v17
+; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[45:46]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[40:41]
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v43
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v46
; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v42
+; VI-NEXT: v_lshrrev_b32_e32 v19, 8, v45
; VI-NEXT: buffer_store_dword v19, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v20
-; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[20:21]
+; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[43:44]
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v41
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[45:46]
-; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v46
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v25
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v24
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[24:25]
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v22
-; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[22:23]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[53:54]
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v23
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[27:28]
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v44
+; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v21
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[21:22]
+; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v43
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v22
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[53:54]
+; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[23:24]
+; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v26
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v25
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[25:26]
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v24
+; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[27:28]
; VI-NEXT: v_lshrrev_b32_e32 v40, 8, v40
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v45
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v54
-; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v53
-; VI-NEXT: v_lshrrev_b32_e32 v63, 8, v28
+; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v54
+; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v53
+; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v28
; VI-NEXT: v_lshrrev_b32_e32 v26, 8, v27
; VI-NEXT: v_bfe_u32 v27, v29, 8, 8
; VI-NEXT: v_bfe_u32 v28, v30, 8, 8
-; VI-NEXT: v_bfe_u32 v45, v31, 8, 8
-; VI-NEXT: v_bfe_u32 v56, v33, 8, 8
-; VI-NEXT: v_bfe_u32 v59, v35, 8, 8
-; VI-NEXT: v_bfe_u32 v61, v37, 8, 8
-; VI-NEXT: v_bfe_u32 v53, v39, 8, 8
-; VI-NEXT: v_bfe_u32 v54, v49, 8, 8
+; VI-NEXT: v_bfe_u32 v46, v31, 8, 8
+; VI-NEXT: v_bfe_u32 v56, v32, 8, 8
+; VI-NEXT: v_bfe_u32 v58, v33, 8, 8
+; VI-NEXT: v_bfe_u32 v59, v34, 8, 8
+; VI-NEXT: v_bfe_u32 v63, v48, 8, 8
+; VI-NEXT: v_bfe_u32 v54, v50, 8, 8
; VI-NEXT: .LBB104_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v22, v52, v22, s4
+; VI-NEXT: v_perm_b32 v23, v52, v23, s4
; VI-NEXT: v_perm_b32 v1, v1, v26, s4
-; VI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
-; VI-NEXT: v_or_b32_e32 v1, v1, v22
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v49, v54, s4
-; VI-NEXT: v_perm_b32 v2, v2, v63, s4
+; VI-NEXT: v_perm_b32 v1, v50, v54, s4
+; VI-NEXT: v_perm_b32 v2, v2, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v51, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v51, v21, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v53, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v62, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v48, v63, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v50, v25, s4
-; VI-NEXT: v_perm_b32 v1, v5, v58, s4
+; VI-NEXT: v_perm_b32 v2, v49, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v60, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v37, v61, s4
+; VI-NEXT: v_perm_b32 v2, v34, v59, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; VI-NEXT: v_perm_b32 v1, v6, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v48, v24, s4
+; VI-NEXT: v_perm_b32 v2, v39, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; VI-NEXT: v_perm_b32 v1, v7, v47, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v35, v59, s4
-; VI-NEXT: v_perm_b32 v1, v8, v46, s4
+; VI-NEXT: v_perm_b32 v2, v33, v58, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v45, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v38, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
; VI-NEXT: v_perm_b32 v1, v9, v44, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v33, v56, s4
+; VI-NEXT: v_perm_b32 v2, v32, v56, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; VI-NEXT: v_perm_b32 v1, v10, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v19, s4
+; VI-NEXT: v_perm_b32 v2, v37, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
; VI-NEXT: v_perm_b32 v1, v11, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v31, v45, s4
+; VI-NEXT: v_perm_b32 v2, v31, v46, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; VI-NEXT: v_perm_b32 v1, v12, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v18, s4
+; VI-NEXT: v_perm_b32 v2, v36, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; VI-NEXT: v_perm_b32 v1, v13, v40, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v30, v28, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; VI-NEXT: v_perm_b32 v1, v14, v55, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v32, v17, s4
+; VI-NEXT: v_perm_b32 v2, v35, v17, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v15, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT: v_perm_b32 v2, v29, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -78110,16 +77760,16 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_or_b32 s15, s4, s5
; SI-NEXT: s_and_b32 s4, s22, 0xffff
; SI-NEXT: s_lshl_b32 s5, s83, 16
-; SI-NEXT: s_or_b32 s12, s4, s5
+; SI-NEXT: s_or_b32 s10, s4, s5
; SI-NEXT: s_and_b32 s4, s23, 0xffff
; SI-NEXT: s_lshl_b32 s5, s82, 16
-; SI-NEXT: s_or_b32 s13, s4, s5
+; SI-NEXT: s_or_b32 s11, s4, s5
; SI-NEXT: s_and_b32 s4, s24, 0xffff
; SI-NEXT: s_lshl_b32 s5, s85, 16
-; SI-NEXT: s_or_b32 s10, s4, s5
+; SI-NEXT: s_or_b32 s12, s4, s5
; SI-NEXT: s_and_b32 s4, s25, 0xffff
; SI-NEXT: s_lshl_b32 s5, s84, 16
-; SI-NEXT: s_or_b32 s11, s4, s5
+; SI-NEXT: s_or_b32 s13, s4, s5
; SI-NEXT: s_and_b32 s4, s26, 0xffff
; SI-NEXT: s_lshl_b32 s5, s87, 16
; SI-NEXT: s_or_b32 s8, s4, s5
@@ -78138,21 +77788,21 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_and_b32 s5, s98, 0xffff
; SI-NEXT: s_lshl_b32 s45, s99, 16
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
; SI-NEXT: s_or_b32 s5, s5, s45
; SI-NEXT: s_lshr_b32 s75, s43, 8
; SI-NEXT: s_lshr_b32 s73, s41, 8
; SI-NEXT: s_lshr_b32 s63, s15, 8
-; SI-NEXT: s_lshr_b32 s61, s13, 8
-; SI-NEXT: s_lshr_b32 s59, s11, 8
+; SI-NEXT: s_lshr_b32 s61, s11, 8
+; SI-NEXT: s_lshr_b32 s59, s13, 8
; SI-NEXT: s_lshr_b32 s57, s9, 8
; SI-NEXT: s_lshr_b32 s47, s7, 8
; SI-NEXT: s_lshr_b32 s45, s5, 8
@@ -78164,22 +77814,22 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_bfe_u32 s95, s86, 0x80008
; SI-NEXT: s_bfe_u32 s56, s96, 0x80008
; SI-NEXT: s_bfe_u32 s58, s99, 0x80008
-; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 8
; SI-NEXT: s_cbranch_execnz .LBB105_4
; SI-NEXT: .LBB105_2: ; %cmp.true
; SI-NEXT: v_cvt_f32_f16_e32 v2, s44
; SI-NEXT: v_cvt_f32_f16_e32 v1, s46
; SI-NEXT: v_cvt_f32_f16_e32 v3, s99
-; SI-NEXT: v_cvt_f32_f16_e32 v10, s16
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s69
; SI-NEXT: v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v1, 0x38000000, v1
@@ -78254,33 +77904,33 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
+; SI-NEXT: s_or_b32 s12, s11, s10
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
-; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_readfirstlane_b32 s12, v5
+; SI-NEXT: v_readfirstlane_b32 s11, v5
; SI-NEXT: v_cvt_f32_f16_e32 v5, s22
-; SI-NEXT: v_readfirstlane_b32 s11, v4
-; SI-NEXT: s_lshl_b32 s11, s11, 16
-; SI-NEXT: s_or_b32 s11, s12, s11
-; SI-NEXT: v_readfirstlane_b32 s12, v6
+; SI-NEXT: v_readfirstlane_b32 s10, v4
+; SI-NEXT: s_lshl_b32 s10, s10, 16
+; SI-NEXT: s_or_b32 s13, s11, s10
+; SI-NEXT: v_readfirstlane_b32 s10, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s82
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT: v_cvt_f16_f32_e32 v7, v5
-; SI-NEXT: s_lshl_b32 s12, s12, 16
+; SI-NEXT: s_lshl_b32 s10, s10, 16
; SI-NEXT: v_add_f32_e32 v5, 0x38000000, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s23
-; SI-NEXT: v_readfirstlane_b32 s13, v7
+; SI-NEXT: v_readfirstlane_b32 s11, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s81
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_readfirstlane_b32 s13, v5
-; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_or_b32 s10, s11, s10
+; SI-NEXT: v_readfirstlane_b32 s11, v5
+; SI-NEXT: s_lshl_b32 s11, s11, 16
; SI-NEXT: v_readfirstlane_b32 s14, v6
; SI-NEXT: v_cvt_f32_f16_e32 v6, s20
-; SI-NEXT: s_or_b32 s13, s14, s13
+; SI-NEXT: s_or_b32 s11, s14, s11
; SI-NEXT: v_readfirstlane_b32 s14, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s80
; SI-NEXT: v_add_f32_e32 v6, 0x38000000, v6
@@ -78298,36 +77948,36 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_or_b32 s14, s15, s14
; SI-NEXT: v_readfirstlane_b32 s20, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s18
-; SI-NEXT: v_readfirstlane_b32 s18, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s70
; SI-NEXT: v_readfirstlane_b32 s15, v6
+; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: v_readfirstlane_b32 s18, v8
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: s_lshl_b32 s15, s15, 16
+; SI-NEXT: v_cvt_f32_f16_e32 v8, s70
; SI-NEXT: s_or_b32 s15, s20, s15
-; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
+; SI-NEXT: v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT: v_readfirstlane_b32 s20, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, s19
-; SI-NEXT: v_cvt_f16_f32_e32 v9, v8
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s69
-; SI-NEXT: s_lshl_b32 s18, s18, 16
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
-; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
+; SI-NEXT: v_cvt_f32_f16_e32 v10, s16
+; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v7
+; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
+; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
+; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: s_or_b32 s40, s20, s18
-; SI-NEXT: v_readfirstlane_b32 s18, v9
+; SI-NEXT: v_readfirstlane_b32 s18, v8
; SI-NEXT: s_lshl_b32 s18, s18, 16
; SI-NEXT: v_readfirstlane_b32 s16, v7
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v10
; SI-NEXT: s_or_b32 s41, s16, s18
-; SI-NEXT: v_readfirstlane_b32 s16, v8
+; SI-NEXT: v_readfirstlane_b32 s16, v9
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
-; SI-NEXT: v_cvt_f32_f16_e32 v8, s68
+; SI-NEXT: v_cvt_f32_f16_e32 v9, s68
; SI-NEXT: v_cvt_f32_f16_e32 v10, s17
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: v_readfirstlane_b32 s17, v7
-; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v8
+; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v9
; SI-NEXT: v_cvt_f16_f32_e32 v12, v7
; SI-NEXT: v_add_f32_e32 v7, 0x38000000, v10
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
@@ -78337,44 +77987,44 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_readfirstlane_b32 s17, v7
; SI-NEXT: s_or_b32 s43, s17, s16
; SI-NEXT: s_lshr_b64 s[60:61], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[74:75], s[40:41], 8
+; SI-NEXT: s_lshr_b64 s[72:73], s[40:41], 8
; SI-NEXT: s_lshr_b64 s[62:63], s[14:15], 24
-; SI-NEXT: s_lshr_b64 s[72:73], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[74:75], s[14:15], 16
; SI-NEXT: s_lshr_b64 s[18:19], s[42:43], 24
; SI-NEXT: s_lshr_b64 s[20:21], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[24:25], s[42:43], 8
; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 24
; SI-NEXT: s_lshr_b64 s[76:77], s[14:15], 8
-; SI-NEXT: s_lshr_b64 s[78:79], s[12:13], 24
-; SI-NEXT: s_lshr_b64 s[90:91], s[12:13], 16
-; SI-NEXT: s_lshr_b64 s[94:95], s[12:13], 8
-; SI-NEXT: s_lshr_b64 s[88:89], s[10:11], 24
-; SI-NEXT: s_lshr_b64 s[92:93], s[10:11], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[10:11], 8
-; SI-NEXT: s_lshr_b64 s[52:53], s[8:9], 24
+; SI-NEXT: s_lshr_b64 s[78:79], s[10:11], 24
+; SI-NEXT: s_lshr_b64 s[90:91], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[94:95], s[10:11], 8
+; SI-NEXT: s_lshr_b64 s[88:89], s[12:13], 24
+; SI-NEXT: s_lshr_b64 s[92:93], s[12:13], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[12:13], 8
+; SI-NEXT: s_lshr_b64 s[50:51], s[8:9], 24
; SI-NEXT: s_lshr_b64 s[54:55], s[8:9], 16
; SI-NEXT: s_lshr_b64 s[64:65], s[8:9], 8
-; SI-NEXT: s_lshr_b64 s[38:39], s[6:7], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[6:7], 24
; SI-NEXT: s_lshr_b64 s[48:49], s[6:7], 16
-; SI-NEXT: s_lshr_b64 s[50:51], s[6:7], 8
+; SI-NEXT: s_lshr_b64 s[52:53], s[6:7], 8
; SI-NEXT: s_lshr_b64 s[30:31], s[4:5], 24
; SI-NEXT: s_lshr_b64 s[34:35], s[4:5], 16
-; SI-NEXT: s_lshr_b64 s[36:37], s[4:5], 8
+; SI-NEXT: s_lshr_b64 s[38:39], s[4:5], 8
; SI-NEXT: s_lshr_b32 s75, s43, 8
; SI-NEXT: s_lshr_b32 s73, s41, 8
; SI-NEXT: s_lshr_b32 s63, s15, 8
-; SI-NEXT: s_lshr_b32 s61, s13, 8
-; SI-NEXT: s_lshr_b32 s59, s11, 8
+; SI-NEXT: s_lshr_b32 s61, s11, 8
+; SI-NEXT: s_lshr_b32 s59, s13, 8
; SI-NEXT: s_lshr_b32 s57, s9, 8
; SI-NEXT: s_lshr_b32 s47, s7, 8
; SI-NEXT: s_lshr_b32 s45, s5, 8
; SI-NEXT: v_bfe_u32 v16, v12, 8, 8
-; SI-NEXT: v_bfe_u32 v15, v9, 8, 8
+; SI-NEXT: v_bfe_u32 v15, v8, 8, 8
; SI-NEXT: v_bfe_u32 v14, v6, 8, 8
; SI-NEXT: v_bfe_u32 v13, v5, 8, 8
; SI-NEXT: v_bfe_u32 v11, v4, 8, 8
; SI-NEXT: v_bfe_u32 v10, v3, 8, 8
-; SI-NEXT: v_bfe_u32 v8, v2, 8, 8
+; SI-NEXT: v_bfe_u32 v9, v2, 8, 8
; SI-NEXT: v_bfe_u32 v7, v1, 8, 8
; SI-NEXT: s_branch .LBB105_5
; SI-NEXT: .LBB105_3:
@@ -78387,17 +78037,17 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr75
; SI-NEXT: ; implicit-def: $sgpr77
; SI-NEXT: ; implicit-def: $sgpr40
-; SI-NEXT: ; implicit-def: $sgpr74
+; SI-NEXT: ; implicit-def: $sgpr72
; SI-NEXT: ; implicit-def: $sgpr60
; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $sgpr79
; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr76
-; SI-NEXT: ; implicit-def: $sgpr72
+; SI-NEXT: ; implicit-def: $sgpr74
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr63
; SI-NEXT: ; implicit-def: $sgpr89
-; SI-NEXT: ; implicit-def: $sgpr12
+; SI-NEXT: ; implicit-def: $sgpr10
; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $sgpr91
; SI-NEXT: ; implicit-def: $sgpr59
@@ -78411,19 +78061,19 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: ; implicit-def: $sgpr94
; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr78
-; SI-NEXT: ; implicit-def: $sgpr10
+; SI-NEXT: ; implicit-def: $sgpr12
; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: ; implicit-def: $sgpr8
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr54
-; SI-NEXT: ; implicit-def: $sgpr52
-; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr50
+; SI-NEXT: ; implicit-def: $sgpr6
+; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr36
+; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: v_writelane_b32 v19, s4, 2
@@ -78447,10 +78097,10 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_mov_b32_e32 v4, s84
; SI-NEXT: v_mov_b32_e32 v5, s82
; SI-NEXT: v_mov_b32_e32 v6, s80
-; SI-NEXT: v_mov_b32_e32 v9, s70
+; SI-NEXT: v_mov_b32_e32 v8, s70
; SI-NEXT: v_mov_b32_e32 v12, s68
; SI-NEXT: v_mov_b32_e32 v7, s58
-; SI-NEXT: v_mov_b32_e32 v8, s56
+; SI-NEXT: v_mov_b32_e32 v9, s56
; SI-NEXT: v_mov_b32_e32 v10, s95
; SI-NEXT: v_mov_b32_e32 v11, s93
; SI-NEXT: v_mov_b32_e32 v13, s91
@@ -78482,98 +78132,93 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: v_or_b32_e32 v12, v16, v12
; SI-NEXT: v_or_b32_e32 v12, s16, v12
; SI-NEXT: s_and_b32 s16, s40, 0xff
-; SI-NEXT: s_lshl_b32 s17, s74, 8
+; SI-NEXT: s_lshl_b32 s17, s72, 8
; SI-NEXT: s_or_b32 s16, s16, s17
; SI-NEXT: s_and_b32 s17, s60, 0xff
; SI-NEXT: s_lshl_b32 s17, s17, 16
; SI-NEXT: s_lshl_b32 s18, s22, 24
; SI-NEXT: s_and_b32 s16, s16, 0xffff
; SI-NEXT: s_or_b32 s17, s18, s17
-; SI-NEXT: v_add_i32_e32 v16, vcc, 4, v0
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen
-; SI-NEXT: buffer_store_dword v12, v16, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v12, vcc, 8, v0
-; SI-NEXT: v_mov_b32_e32 v16, s16
+; SI-NEXT: v_mov_b32_e32 v12, s16
; SI-NEXT: s_and_b32 s16, s41, 0xff
; SI-NEXT: s_lshl_b32 s17, s73, 8
-; SI-NEXT: v_and_b32_e32 v9, 0xff, v9
-; SI-NEXT: buffer_store_dword v16, v12, s[0:3], 0 offen
+; SI-NEXT: v_and_b32_e32 v8, 0xff, v8
+; SI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_or_b32 s16, s16, s17
-; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v15
; SI-NEXT: s_and_b32 s16, s16, 0xffff
-; SI-NEXT: v_or_b32_e32 v9, v12, v9
-; SI-NEXT: v_or_b32_e32 v9, s16, v9
+; SI-NEXT: v_or_b32_e32 v8, v12, v8
+; SI-NEXT: v_or_b32_e32 v8, s16, v8
; SI-NEXT: s_and_b32 s14, s14, 0xff
; SI-NEXT: s_lshl_b32 s16, s76, 8
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: s_and_b32 s16, s72, 0xff
+; SI-NEXT: s_and_b32 s16, s74, 0xff
; SI-NEXT: s_lshl_b32 s16, s16, 16
; SI-NEXT: s_lshl_b32 s17, s62, 24
; SI-NEXT: s_and_b32 s14, s14, 0xffff
; SI-NEXT: s_or_b32 s16, s17, s16
-; SI-NEXT: v_add_i32_e32 v12, vcc, 12, v0
; SI-NEXT: s_or_b32 s14, s14, s16
-; SI-NEXT: buffer_store_dword v9, v12, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v9, vcc, 16, v0
-; SI-NEXT: v_mov_b32_e32 v12, s14
+; SI-NEXT: v_mov_b32_e32 v8, s14
; SI-NEXT: s_and_b32 s14, s15, 0xff
; SI-NEXT: s_lshl_b32 s15, s63, 8
; SI-NEXT: v_and_b32_e32 v6, 0xff, v6
-; SI-NEXT: buffer_store_dword v12, v9, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_or_b32 s14, s14, s15
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v14
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v14
; SI-NEXT: s_and_b32 s14, s14, 0xffff
-; SI-NEXT: v_or_b32_e32 v6, v9, v6
+; SI-NEXT: v_or_b32_e32 v6, v8, v6
; SI-NEXT: v_or_b32_e32 v6, s14, v6
-; SI-NEXT: s_and_b32 s12, s12, 0xff
+; SI-NEXT: s_and_b32 s10, s10, 0xff
; SI-NEXT: s_lshl_b32 s14, s94, 8
-; SI-NEXT: s_or_b32 s12, s12, s14
+; SI-NEXT: s_or_b32 s10, s10, s14
; SI-NEXT: s_and_b32 s14, s90, 0xff
; SI-NEXT: s_lshl_b32 s14, s14, 16
; SI-NEXT: s_lshl_b32 s15, s78, 24
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: s_or_b32 s14, s15, s14
-; SI-NEXT: v_add_i32_e32 v9, vcc, 20, v0
-; SI-NEXT: s_or_b32 s12, s12, s14
-; SI-NEXT: buffer_store_dword v6, v9, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s10, s10, s14
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v6, vcc, 24, v0
-; SI-NEXT: v_mov_b32_e32 v9, s12
-; SI-NEXT: s_and_b32 s12, s13, 0xff
-; SI-NEXT: s_lshl_b32 s13, s61, 8
+; SI-NEXT: v_mov_b32_e32 v6, s10
+; SI-NEXT: s_and_b32 s10, s11, 0xff
+; SI-NEXT: s_lshl_b32 s11, s61, 8
; SI-NEXT: v_and_b32_e32 v5, 0xff, v5
-; SI-NEXT: buffer_store_dword v9, v6, s[0:3], 0 offen
-; SI-NEXT: s_or_b32 s12, s12, s13
+; SI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:24
+; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 24, v13
-; SI-NEXT: s_and_b32 s12, s12, 0xffff
+; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v5, v6, v5
-; SI-NEXT: v_or_b32_e32 v5, s12, v5
-; SI-NEXT: s_and_b32 s10, s10, 0xff
-; SI-NEXT: s_lshl_b32 s12, s66, 8
-; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: s_and_b32 s12, s92, 0xff
-; SI-NEXT: s_lshl_b32 s12, s12, 16
-; SI-NEXT: s_lshl_b32 s13, s88, 24
+; SI-NEXT: v_or_b32_e32 v5, s10, v5
+; SI-NEXT: s_and_b32 s10, s12, 0xff
+; SI-NEXT: s_lshl_b32 s11, s66, 8
+; SI-NEXT: s_or_b32 s10, s10, s11
+; SI-NEXT: s_and_b32 s11, s92, 0xff
+; SI-NEXT: s_lshl_b32 s11, s11, 16
+; SI-NEXT: s_lshl_b32 s12, s88, 24
; SI-NEXT: s_and_b32 s10, s10, 0xffff
-; SI-NEXT: s_or_b32 s12, s13, s12
-; SI-NEXT: v_add_i32_e32 v6, vcc, 28, v0
-; SI-NEXT: s_or_b32 s10, s10, s12
-; SI-NEXT: buffer_store_dword v5, v6, s[0:3], 0 offen
+; SI-NEXT: s_or_b32 s11, s12, s11
+; SI-NEXT: s_or_b32 s10, s10, s11
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v5, vcc, 32, v0
-; SI-NEXT: v_mov_b32_e32 v6, s10
-; SI-NEXT: s_and_b32 s10, s11, 0xff
+; SI-NEXT: v_mov_b32_e32 v5, s10
+; SI-NEXT: s_and_b32 s10, s13, 0xff
; SI-NEXT: s_lshl_b32 s11, s59, 8
; SI-NEXT: v_and_b32_e32 v4, 0xff, v4
-; SI-NEXT: buffer_store_dword v6, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_or_b32 s10, s10, s11
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v11
; SI-NEXT: s_and_b32 s10, s10, 0xffff
; SI-NEXT: v_or_b32_e32 v4, v5, v4
@@ -78583,76 +78228,73 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; SI-NEXT: s_or_b32 s8, s8, s10
; SI-NEXT: s_and_b32 s10, s54, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: s_lshl_b32 s11, s52, 24
+; SI-NEXT: s_lshl_b32 s11, s50, 24
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: s_or_b32 s10, s11, s10
-; SI-NEXT: v_add_i32_e32 v5, vcc, 36, v0
; SI-NEXT: s_or_b32 s8, s8, s10
-; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v4, vcc, 40, v0
-; SI-NEXT: v_mov_b32_e32 v5, s8
+; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: s_and_b32 s8, s9, 0xff
; SI-NEXT: s_lshl_b32 s9, s57, 8
; SI-NEXT: v_and_b32_e32 v3, 0xff, v3
-; SI-NEXT: buffer_store_dword v5, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v4, 24, v10
; SI-NEXT: s_and_b32 s8, s8, 0xffff
; SI-NEXT: v_or_b32_e32 v3, v4, v3
; SI-NEXT: v_or_b32_e32 v3, s8, v3
; SI-NEXT: s_and_b32 s6, s6, 0xff
-; SI-NEXT: s_lshl_b32 s8, s50, 8
+; SI-NEXT: s_lshl_b32 s8, s52, 8
; SI-NEXT: s_or_b32 s6, s6, s8
; SI-NEXT: s_and_b32 s8, s48, 0xff
; SI-NEXT: s_lshl_b32 s8, s8, 16
-; SI-NEXT: s_lshl_b32 s9, s38, 24
+; SI-NEXT: s_lshl_b32 s9, s36, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s8, s9, s8
-; SI-NEXT: v_add_i32_e32 v4, vcc, 44, v0
; SI-NEXT: s_or_b32 s6, s6, s8
-; SI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v3, vcc, 48, v0
-; SI-NEXT: v_mov_b32_e32 v4, s6
+; SI-NEXT: v_mov_b32_e32 v3, s6
; SI-NEXT: s_and_b32 s6, s7, 0xff
; SI-NEXT: s_lshl_b32 s7, s47, 8
; SI-NEXT: v_and_b32_e32 v2, 0xff, v2
-; SI-NEXT: buffer_store_dword v4, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_or_b32 s6, s6, s7
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v8
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v9
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: v_or_b32_e32 v2, v3, v2
; SI-NEXT: v_or_b32_e32 v2, s6, v2
; SI-NEXT: s_and_b32 s4, s4, 0xff
-; SI-NEXT: s_lshl_b32 s6, s36, 8
+; SI-NEXT: s_lshl_b32 s6, s38, 8
; SI-NEXT: s_or_b32 s4, s4, s6
; SI-NEXT: s_and_b32 s6, s34, 0xff
; SI-NEXT: s_lshl_b32 s6, s6, 16
; SI-NEXT: s_lshl_b32 s7, s30, 24
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: s_or_b32 s6, s7, s6
-; SI-NEXT: v_add_i32_e32 v3, vcc, 52, v0
; SI-NEXT: s_or_b32 s4, s4, s6
-; SI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; SI-NEXT: v_mov_b32_e32 v3, s4
+; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: s_and_b32 s4, s5, 0xff
; SI-NEXT: s_lshl_b32 s5, s45, 8
; SI-NEXT: v_and_b32_e32 v1, 0xff, v1
-; SI-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s4, s4, s5
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v2, 24, v7
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, v2, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
; SI-NEXT: v_readlane_b32 s30, v18, 34
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v18, 35
; SI-NEXT: v_readlane_b32 s99, v18, 33
; SI-NEXT: v_readlane_b32 s98, v18, 32
@@ -78794,85 +78436,85 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: .LBB105_2: ; %cmp.true
; VI-NEXT: s_lshr_b32 s6, s17, 16
; VI-NEXT: v_mov_b32_e32 v1, 0x200
-; VI-NEXT: v_add_f16_e32 v11, s6, v1
+; VI-NEXT: v_add_f16_e32 v25, s6, v1
; VI-NEXT: s_lshr_b32 s6, s16, 16
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
-; VI-NEXT: v_add_f16_e32 v25, s17, v1
-; VI-NEXT: v_add_f16_e32 v18, s6, v1
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v25
+; VI-NEXT: v_add_f16_e32 v35, s17, v1
+; VI-NEXT: v_add_f16_e32 v37, s6, v1
; VI-NEXT: s_lshr_b32 s6, s19, 16
-; VI-NEXT: v_or_b32_e32 v10, v25, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v18
-; VI-NEXT: v_add_f16_e32 v33, s16, v1
-; VI-NEXT: v_add_f16_e32 v12, s6, v1
+; VI-NEXT: v_or_b32_e32 v10, v35, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v37
+; VI-NEXT: v_add_f16_e32 v48, s16, v1
+; VI-NEXT: v_add_f16_e32 v29, s6, v1
; VI-NEXT: s_lshr_b32 s6, s18, 16
-; VI-NEXT: v_or_b32_e32 v9, v33, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
-; VI-NEXT: v_add_f16_e32 v27, s19, v1
-; VI-NEXT: v_add_f16_e32 v20, s6, v1
+; VI-NEXT: v_or_b32_e32 v9, v48, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
+; VI-NEXT: v_add_f16_e32 v39, s19, v1
+; VI-NEXT: v_add_f16_e32 v38, s6, v1
; VI-NEXT: s_lshr_b32 s6, s21, 16
-; VI-NEXT: v_or_b32_e32 v52, v27, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
-; VI-NEXT: v_add_f16_e32 v35, s18, v1
-; VI-NEXT: v_add_f16_e32 v13, s6, v1
+; VI-NEXT: v_or_b32_e32 v52, v39, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v38
+; VI-NEXT: v_add_f16_e32 v49, s18, v1
+; VI-NEXT: v_add_f16_e32 v11, s6, v1
; VI-NEXT: s_lshr_b32 s6, s20, 16
-; VI-NEXT: v_or_b32_e32 v51, v35, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
-; VI-NEXT: v_add_f16_e32 v28, s21, v1
-; VI-NEXT: v_add_f16_e32 v21, s6, v1
+; VI-NEXT: v_or_b32_e32 v51, v49, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v11
+; VI-NEXT: v_add_f16_e32 v18, s21, v1
+; VI-NEXT: v_add_f16_e32 v24, s6, v1
; VI-NEXT: s_lshr_b32 s6, s23, 16
-; VI-NEXT: v_or_b32_e32 v8, v28, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v21
-; VI-NEXT: v_add_f16_e32 v37, s20, v1
-; VI-NEXT: v_add_f16_e32 v14, s6, v1
+; VI-NEXT: v_or_b32_e32 v8, v18, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v24
+; VI-NEXT: v_add_f16_e32 v50, s20, v1
+; VI-NEXT: v_add_f16_e32 v12, s6, v1
; VI-NEXT: s_lshr_b32 s6, s22, 16
-; VI-NEXT: v_or_b32_e32 v7, v37, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
-; VI-NEXT: v_add_f16_e32 v30, s23, v1
-; VI-NEXT: v_add_f16_e32 v22, s6, v1
-; VI-NEXT: s_lshr_b32 s6, s25, 16
-; VI-NEXT: v_or_b32_e32 v57, v30, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; VI-NEXT: v_add_f16_e32 v38, s22, v1
+; VI-NEXT: v_or_b32_e32 v7, v50, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v12
+; VI-NEXT: v_add_f16_e32 v21, s23, v1
; VI-NEXT: v_add_f16_e32 v15, s6, v1
-; VI-NEXT: s_lshr_b32 s6, s24, 16
-; VI-NEXT: v_or_b32_e32 v56, v38, v2
+; VI-NEXT: s_lshr_b32 s6, s25, 16
+; VI-NEXT: v_or_b32_e32 v57, v21, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v15
-; VI-NEXT: v_add_f16_e32 v31, s25, v1
-; VI-NEXT: v_add_f16_e32 v23, s6, v1
+; VI-NEXT: v_add_f16_e32 v28, s22, v1
+; VI-NEXT: v_add_f16_e32 v13, s6, v1
+; VI-NEXT: s_lshr_b32 s6, s24, 16
+; VI-NEXT: v_or_b32_e32 v56, v28, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v13
+; VI-NEXT: v_add_f16_e32 v23, s25, v1
+; VI-NEXT: v_add_f16_e32 v17, s6, v1
; VI-NEXT: s_lshr_b32 s6, s27, 16
-; VI-NEXT: v_or_b32_e32 v6, v31, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v23
-; VI-NEXT: v_add_f16_e32 v39, s24, v1
-; VI-NEXT: v_add_f16_e32 v16, s6, v1
+; VI-NEXT: v_or_b32_e32 v6, v23, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; VI-NEXT: v_add_f16_e32 v31, s24, v1
+; VI-NEXT: v_add_f16_e32 v14, s6, v1
; VI-NEXT: s_lshr_b32 s6, s26, 16
-; VI-NEXT: v_or_b32_e32 v5, v39, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
-; VI-NEXT: v_add_f16_e32 v32, s27, v1
-; VI-NEXT: v_add_f16_e32 v24, s6, v1
+; VI-NEXT: v_or_b32_e32 v5, v31, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v14
+; VI-NEXT: v_add_f16_e32 v27, s27, v1
+; VI-NEXT: v_add_f16_e32 v20, s6, v1
; VI-NEXT: s_lshr_b32 s6, s29, 16
-; VI-NEXT: v_or_b32_e32 v42, v32, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v24
-; VI-NEXT: v_add_f16_e32 v48, s26, v1
-; VI-NEXT: v_add_f16_e32 v17, s6, v1
+; VI-NEXT: v_or_b32_e32 v42, v27, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v20
+; VI-NEXT: v_add_f16_e32 v33, s26, v1
+; VI-NEXT: v_add_f16_e32 v16, s6, v1
; VI-NEXT: s_lshr_b32 s6, s28, 16
-; VI-NEXT: v_or_b32_e32 v41, v48, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v17
-; VI-NEXT: v_add_f16_e32 v34, s29, v1
-; VI-NEXT: v_add_f16_e32 v26, s6, v1
+; VI-NEXT: v_or_b32_e32 v41, v33, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v16
+; VI-NEXT: v_add_f16_e32 v30, s29, v1
+; VI-NEXT: v_add_f16_e32 v22, s6, v1
; VI-NEXT: s_lshr_b32 s6, s5, 16
-; VI-NEXT: v_or_b32_e32 v55, v34, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
-; VI-NEXT: v_add_f16_e32 v49, s28, v1
+; VI-NEXT: v_or_b32_e32 v55, v30, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_add_f16_e32 v34, s28, v1
; VI-NEXT: v_add_f16_e32 v19, s6, v1
-; VI-NEXT: v_add_f16_e32 v36, s5, v1
+; VI-NEXT: v_add_f16_e32 v32, s5, v1
; VI-NEXT: s_lshr_b32 s5, s4, 16
-; VI-NEXT: v_or_b32_e32 v54, v49, v2
+; VI-NEXT: v_or_b32_e32 v54, v34, v2
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v19
-; VI-NEXT: v_add_f16_e32 v29, s5, v1
-; VI-NEXT: v_or_b32_e32 v44, v36, v2
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v29
-; VI-NEXT: v_add_f16_e32 v50, s4, v1
-; VI-NEXT: v_or_b32_e32 v43, v50, v2
+; VI-NEXT: v_add_f16_e32 v26, s5, v1
+; VI-NEXT: v_or_b32_e32 v44, v32, v2
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v26
+; VI-NEXT: v_add_f16_e32 v36, s4, v1
+; VI-NEXT: v_or_b32_e32 v43, v36, v2
; VI-NEXT: v_lshrrev_b64 v[1:2], 24, v[43:44]
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
@@ -78880,8 +78522,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_lshrrev_b32_e32 v3, 8, v43
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[3:4], 24, v[41:42]
-; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v5
; VI-NEXT: v_lshrrev_b64 v[4:5], 24, v[5:6]
; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v55
; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v42
@@ -78889,6 +78530,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_lshrrev_b64 v[5:6], 24, v[56:57]
; VI-NEXT: v_lshrrev_b32_e32 v58, 8, v7
; VI-NEXT: v_lshrrev_b64 v[6:7], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v44
; VI-NEXT: v_lshrrev_b32_e32 v45, 8, v57
; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v8
; VI-NEXT: v_lshrrev_b64 v[7:8], 24, v[51:52]
@@ -78902,13 +78544,13 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v51
; VI-NEXT: v_lshrrev_b32_e32 v51, 8, v10
; VI-NEXT: v_bfe_u32 v9, v19, 8, 8
-; VI-NEXT: v_bfe_u32 v10, v17, 8, 8
-; VI-NEXT: v_bfe_u32 v41, v16, 8, 8
-; VI-NEXT: v_bfe_u32 v43, v15, 8, 8
-; VI-NEXT: v_bfe_u32 v46, v14, 8, 8
-; VI-NEXT: v_bfe_u32 v56, v13, 8, 8
-; VI-NEXT: v_bfe_u32 v59, v12, 8, 8
-; VI-NEXT: v_bfe_u32 v62, v11, 8, 8
+; VI-NEXT: v_bfe_u32 v10, v16, 8, 8
+; VI-NEXT: v_bfe_u32 v41, v14, 8, 8
+; VI-NEXT: v_bfe_u32 v44, v13, 8, 8
+; VI-NEXT: v_bfe_u32 v46, v12, 8, 8
+; VI-NEXT: v_bfe_u32 v56, v11, 8, 8
+; VI-NEXT: v_bfe_u32 v59, v29, 8, 8
+; VI-NEXT: v_bfe_u32 v62, v25, 8, 8
; VI-NEXT: s_branch .LBB105_5
; VI-NEXT: .LBB105_3:
; VI-NEXT: ; implicit-def: $sgpr72
@@ -78965,42 +78607,42 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v1, s79
; VI-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v18, s67
-; VI-NEXT: v_mov_b32_e32 v11, s66
-; VI-NEXT: v_mov_b32_e32 v20, s65
-; VI-NEXT: v_mov_b32_e32 v12, s64
-; VI-NEXT: v_mov_b32_e32 v21, s55
-; VI-NEXT: v_mov_b32_e32 v13, s54
-; VI-NEXT: v_mov_b32_e32 v22, s53
-; VI-NEXT: v_mov_b32_e32 v14, s52
-; VI-NEXT: v_mov_b32_e32 v23, s51
-; VI-NEXT: v_mov_b32_e32 v15, s50
-; VI-NEXT: v_mov_b32_e32 v24, s49
-; VI-NEXT: v_mov_b32_e32 v16, s48
-; VI-NEXT: v_mov_b32_e32 v26, s39
-; VI-NEXT: v_mov_b32_e32 v17, s38
-; VI-NEXT: v_mov_b32_e32 v29, s37
+; VI-NEXT: v_mov_b32_e32 v37, s67
+; VI-NEXT: v_mov_b32_e32 v25, s66
+; VI-NEXT: v_mov_b32_e32 v38, s65
+; VI-NEXT: v_mov_b32_e32 v29, s64
+; VI-NEXT: v_mov_b32_e32 v24, s55
+; VI-NEXT: v_mov_b32_e32 v11, s54
+; VI-NEXT: v_mov_b32_e32 v15, s53
+; VI-NEXT: v_mov_b32_e32 v12, s52
+; VI-NEXT: v_mov_b32_e32 v17, s51
+; VI-NEXT: v_mov_b32_e32 v13, s50
+; VI-NEXT: v_mov_b32_e32 v20, s49
+; VI-NEXT: v_mov_b32_e32 v14, s48
+; VI-NEXT: v_mov_b32_e32 v22, s39
+; VI-NEXT: v_mov_b32_e32 v16, s38
+; VI-NEXT: v_mov_b32_e32 v26, s37
; VI-NEXT: v_mov_b32_e32 v19, s36
-; VI-NEXT: v_mov_b32_e32 v33, s16
-; VI-NEXT: v_mov_b32_e32 v25, s17
-; VI-NEXT: v_mov_b32_e32 v35, s18
-; VI-NEXT: v_mov_b32_e32 v27, s19
-; VI-NEXT: v_mov_b32_e32 v37, s20
-; VI-NEXT: v_mov_b32_e32 v28, s21
-; VI-NEXT: v_mov_b32_e32 v38, s22
-; VI-NEXT: v_mov_b32_e32 v30, s23
-; VI-NEXT: v_mov_b32_e32 v39, s24
-; VI-NEXT: v_mov_b32_e32 v31, s25
-; VI-NEXT: v_mov_b32_e32 v48, s26
-; VI-NEXT: v_mov_b32_e32 v32, s27
-; VI-NEXT: v_mov_b32_e32 v49, s28
-; VI-NEXT: v_mov_b32_e32 v34, s29
-; VI-NEXT: v_mov_b32_e32 v50, s4
-; VI-NEXT: v_mov_b32_e32 v36, s5
+; VI-NEXT: v_mov_b32_e32 v48, s16
+; VI-NEXT: v_mov_b32_e32 v35, s17
+; VI-NEXT: v_mov_b32_e32 v49, s18
+; VI-NEXT: v_mov_b32_e32 v39, s19
+; VI-NEXT: v_mov_b32_e32 v50, s20
+; VI-NEXT: v_mov_b32_e32 v18, s21
+; VI-NEXT: v_mov_b32_e32 v28, s22
+; VI-NEXT: v_mov_b32_e32 v21, s23
+; VI-NEXT: v_mov_b32_e32 v31, s24
+; VI-NEXT: v_mov_b32_e32 v23, s25
+; VI-NEXT: v_mov_b32_e32 v33, s26
+; VI-NEXT: v_mov_b32_e32 v27, s27
+; VI-NEXT: v_mov_b32_e32 v34, s28
+; VI-NEXT: v_mov_b32_e32 v30, s29
+; VI-NEXT: v_mov_b32_e32 v36, s4
+; VI-NEXT: v_mov_b32_e32 v32, s5
; VI-NEXT: v_mov_b32_e32 v9, s88
; VI-NEXT: v_mov_b32_e32 v10, s89
; VI-NEXT: v_mov_b32_e32 v41, s90
-; VI-NEXT: v_mov_b32_e32 v43, s91
+; VI-NEXT: v_mov_b32_e32 v44, s91
; VI-NEXT: v_mov_b32_e32 v46, s30
; VI-NEXT: v_mov_b32_e32 v56, s31
; VI-NEXT: v_mov_b32_e32 v59, s34
@@ -79011,7 +78653,7 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v53, s62
; VI-NEXT: v_mov_b32_e32 v40, s77
; VI-NEXT: v_mov_b32_e32 v55, s61
-; VI-NEXT: v_mov_b32_e32 v44, s76
+; VI-NEXT: v_mov_b32_e32 v43, s76
; VI-NEXT: v_mov_b32_e32 v42, s60
; VI-NEXT: v_mov_b32_e32 v47, s75
; VI-NEXT: v_mov_b32_e32 v45, s59
@@ -79030,89 +78672,76 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_mov_b32_e32 v8, s6
; VI-NEXT: .LBB105_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v8, v18, v8, s4
-; VI-NEXT: v_perm_b32 v1, v33, v1, s4
+; VI-NEXT: v_perm_b32 v8, v37, v8, s4
+; VI-NEXT: v_perm_b32 v1, v48, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; VI-NEXT: v_or_b32_e32 v1, v1, v8
-; VI-NEXT: v_perm_b32 v8, v11, v62, s4
+; VI-NEXT: v_perm_b32 v8, v25, v62, s4
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v25, v51, s4
+; VI-NEXT: v_perm_b32 v1, v35, v51, s4
; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; VI-NEXT: v_perm_b32 v7, v38, v7, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v8
-; VI-NEXT: v_add_u32_e32 v8, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v8, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v20, v7, s4
-; VI-NEXT: v_perm_b32 v7, v35, v61, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v7, v1
-; VI-NEXT: v_add_u32_e32 v7, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v7, v12, v59, s4
-; VI-NEXT: v_perm_b32 v1, v27, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v49, v61, s4
; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; VI-NEXT: v_or_b32_e32 v1, v1, v7
-; VI-NEXT: v_add_u32_e32 v7, vcc, 12, v0
-; VI-NEXT: v_perm_b32 v6, v21, v6, s4
-; VI-NEXT: buffer_store_dword v1, v7, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v37, v58, s4
+; VI-NEXT: v_perm_b32 v7, v29, v59, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v39, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; VI-NEXT: v_or_b32_e32 v1, v1, v7
+; VI-NEXT: v_perm_b32 v6, v24, v6, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v50, v58, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v1, v1, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v6, v13, v56, s4
-; VI-NEXT: v_perm_b32 v1, v28, v57, s4
+; VI-NEXT: v_perm_b32 v6, v11, v56, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v18, v57, s4
; VI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; VI-NEXT: v_or_b32_e32 v1, v1, v6
-; VI-NEXT: v_add_u32_e32 v6, vcc, 20, v0
-; VI-NEXT: v_perm_b32 v5, v22, v5, s4
-; VI-NEXT: buffer_store_dword v1, v6, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v38, v47, s4
+; VI-NEXT: v_perm_b32 v5, v15, v5, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v28, v47, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v1, v1, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v5, v14, v46, s4
-; VI-NEXT: v_perm_b32 v1, v30, v45, s4
+; VI-NEXT: v_perm_b32 v5, v12, v46, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v21, v45, s4
; VI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; VI-NEXT: v_or_b32_e32 v1, v1, v5
-; VI-NEXT: v_add_u32_e32 v5, vcc, 28, v0
-; VI-NEXT: v_perm_b32 v4, v23, v4, s4
-; VI-NEXT: buffer_store_dword v1, v5, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v39, v44, s4
+; VI-NEXT: v_perm_b32 v4, v17, v4, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v31, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v1, v1, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v4, v15, v43, s4
-; VI-NEXT: v_perm_b32 v1, v31, v42, s4
+; VI-NEXT: v_perm_b32 v4, v13, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v23, v42, s4
; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; VI-NEXT: v_or_b32_e32 v1, v1, v4
-; VI-NEXT: v_add_u32_e32 v4, vcc, 36, v0
-; VI-NEXT: v_perm_b32 v3, v24, v3, s4
-; VI-NEXT: buffer_store_dword v1, v4, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v48, v40, s4
+; VI-NEXT: v_perm_b32 v3, v20, v3, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v33, v40, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v3, v16, v41, s4
-; VI-NEXT: v_perm_b32 v1, v32, v55, s4
+; VI-NEXT: v_perm_b32 v3, v14, v41, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v27, v55, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v1, v1, v3
-; VI-NEXT: v_add_u32_e32 v3, vcc, 44, v0
-; VI-NEXT: v_perm_b32 v2, v26, v2, s4
-; VI-NEXT: buffer_store_dword v1, v3, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v49, v54, s4
+; VI-NEXT: v_perm_b32 v2, v22, v2, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v34, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v17, v10, s4
-; VI-NEXT: v_perm_b32 v1, v34, v53, s4
+; VI-NEXT: v_perm_b32 v2, v16, v10, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v30, v53, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
@@ -79137,18 +78766,16 @@ define inreg <64 x i8> @bitcast_v32f16_to_v64i8_scalar(<32 x half> inreg %a, i32
; VI-NEXT: v_readlane_b32 s35, v63, 1
; VI-NEXT: v_readlane_b32 s34, v63, 0
; VI-NEXT: s_waitcnt vmcnt(1)
-; VI-NEXT: v_perm_b32 v2, v29, v2, s4
-; VI-NEXT: v_perm_b32 v1, v50, v1, s4
+; VI-NEXT: v_perm_b32 v2, v26, v2, s4
+; VI-NEXT: v_perm_b32 v1, v36, v1, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v19, v9, s4
-; VI-NEXT: v_perm_b32 v1, v36, v52, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
+; VI-NEXT: v_perm_b32 v1, v32, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -84457,53 +84084,53 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v13
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v12
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v12
; SI-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v11
+; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v11
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; SI-NEXT: v_and_b32_e32 v30, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v10
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v9
+; SI-NEXT: v_and_b32_e32 v36, 0xffff0000, v9
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v8
; SI-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_and_b32_e32 v39, 0xffff0000, v7
+; SI-NEXT: v_and_b32_e32 v37, 0xffff0000, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v6
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; SI-NEXT: v_and_b32_e32 v34, 0xffff0000, v5
+; SI-NEXT: v_and_b32_e32 v35, 0xffff0000, v5
; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT: v_and_b32_e32 v24, 0xffff0000, v4
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; SI-NEXT: v_and_b32_e32 v31, 0xffff0000, v3
+; SI-NEXT: v_and_b32_e32 v32, 0xffff0000, v3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v2
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v2
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; SI-NEXT: v_mul_f32_e32 v28, 1.0, v27
-; SI-NEXT: v_mul_f32_e32 v22, 1.0, v22
+; SI-NEXT: v_mul_f32_e32 v23, 1.0, v23
; SI-NEXT: v_mul_f32_e32 v27, 1.0, v2
-; SI-NEXT: v_mul_f32_e32 v32, 1.0, v31
-; SI-NEXT: v_mul_f32_e32 v33, 1.0, v3
+; SI-NEXT: v_mul_f32_e32 v33, 1.0, v32
+; SI-NEXT: v_mul_f32_e32 v34, 1.0, v3
; SI-NEXT: v_mul_f32_e32 v24, 1.0, v24
-; SI-NEXT: v_mul_f32_e32 v31, 1.0, v4
-; SI-NEXT: v_mul_f32_e32 v36, 1.0, v34
-; SI-NEXT: v_mul_f32_e32 v38, 1.0, v5
+; SI-NEXT: v_mul_f32_e32 v32, 1.0, v4
+; SI-NEXT: v_mul_f32_e32 v39, 1.0, v35
+; SI-NEXT: v_mul_f32_e32 v48, 1.0, v5
; SI-NEXT: v_mul_f32_e32 v25, 1.0, v25
-; SI-NEXT: v_mul_f32_e32 v34, 1.0, v6
-; SI-NEXT: v_mul_f32_e32 v49, 1.0, v39
+; SI-NEXT: v_mul_f32_e32 v35, 1.0, v6
+; SI-NEXT: v_mul_f32_e32 v50, 1.0, v37
; SI-NEXT: v_mul_f32_e32 v51, 1.0, v7
; SI-NEXT: v_mul_f32_e32 v26, 1.0, v26
-; SI-NEXT: v_mul_f32_e32 v39, 1.0, v8
-; SI-NEXT: v_mul_f32_e32 v54, 1.0, v37
+; SI-NEXT: v_mul_f32_e32 v49, 1.0, v8
+; SI-NEXT: v_mul_f32_e32 v54, 1.0, v36
; SI-NEXT: v_mul_f32_e32 v55, 1.0, v9
-; SI-NEXT: v_mul_f32_e32 v30, 1.0, v30
+; SI-NEXT: v_mul_f32_e32 v31, 1.0, v31
; SI-NEXT: v_mul_f32_e32 v53, 1.0, v10
-; SI-NEXT: v_mul_f32_e32 v42, 1.0, v35
+; SI-NEXT: v_mul_f32_e32 v42, 1.0, v30
; SI-NEXT: v_mul_f32_e32 v43, 1.0, v11
-; SI-NEXT: v_mul_f32_e32 v35, 1.0, v23
+; SI-NEXT: v_mul_f32_e32 v36, 1.0, v22
; SI-NEXT: v_mul_f32_e32 v41, 1.0, v12
; SI-NEXT: v_mul_f32_e32 v45, 1.0, v21
; SI-NEXT: v_mul_f32_e32 v46, 1.0, v13
@@ -84517,29 +84144,29 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: ; kill: killed $vgpr1
; SI-NEXT: ; implicit-def: $vgpr1
; SI-NEXT: ; implicit-def: $vgpr58
-; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $vgpr50
-; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr37
+; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr22
; SI-NEXT: ; implicit-def: $vgpr20
-; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr21
-; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr19
-; SI-NEXT: ; implicit-def: $vgpr62
+; SI-NEXT: ; implicit-def: $vgpr61
; SI-NEXT: ; implicit-def: $vgpr17
; SI-NEXT: ; implicit-def: $vgpr18
; SI-NEXT: ; implicit-def: $vgpr16
-; SI-NEXT: ; implicit-def: $vgpr60
+; SI-NEXT: ; implicit-def: $vgpr59
; SI-NEXT: ; implicit-def: $vgpr14
; SI-NEXT: ; implicit-def: $vgpr15
; SI-NEXT: ; implicit-def: $vgpr13
; SI-NEXT: ; implicit-def: $vgpr11
; SI-NEXT: ; implicit-def: $vgpr12
-; SI-NEXT: ; implicit-def: $vgpr61
+; SI-NEXT: ; implicit-def: $vgpr63
; SI-NEXT: ; implicit-def: $vgpr10
; SI-NEXT: ; implicit-def: $vgpr8
; SI-NEXT: ; implicit-def: $vgpr9
+; SI-NEXT: ; implicit-def: $vgpr60
; SI-NEXT: ; implicit-def: $vgpr7
; SI-NEXT: ; implicit-def: $vgpr5
; SI-NEXT: ; implicit-def: $vgpr6
@@ -84555,165 +84182,165 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_cbranch_execz .LBB108_2
; SI-NEXT: ; %bb.1: ; %cmp.false
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v28
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_alignbit_b32 v48, v1, v29, 16
-; SI-NEXT: v_alignbit_b32 v50, v37, v27, 16
-; SI-NEXT: v_alignbit_b32 v1, v50, v48, 24
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v23
+; SI-NEXT: v_alignbit_b32 v37, v1, v29, 16
+; SI-NEXT: v_alignbit_b32 v38, v30, v27, 16
+; SI-NEXT: v_alignbit_b32 v1, v38, v37, 24
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v50, v48, 16
+; SI-NEXT: v_alignbit_b32 v1, v38, v37, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v50, v48, 8
+; SI-NEXT: v_alignbit_b32 v1, v38, v37, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v32
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v33
; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24
-; SI-NEXT: v_alignbit_b32 v23, v1, v33, 16
-; SI-NEXT: v_alignbit_b32 v21, v19, v31, 16
-; SI-NEXT: v_alignbit_b32 v1, v21, v23, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v20, v1, v34, 16
+; SI-NEXT: v_alignbit_b32 v21, v19, v32, 16
+; SI-NEXT: v_alignbit_b32 v1, v21, v20, 24
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v21, v23, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v1, v21, v20, 16
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v1, v21, v23, 8
+; SI-NEXT: v_alignbit_b32 v1, v21, v20, 8
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v36
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v39
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v25
-; SI-NEXT: v_alignbit_b32 v17, v1, v38, 16
-; SI-NEXT: v_alignbit_b32 v18, v16, v34, 16
+; SI-NEXT: v_alignbit_b32 v17, v1, v48, 16
+; SI-NEXT: v_alignbit_b32 v18, v16, v35, 16
; SI-NEXT: v_alignbit_b32 v1, v18, v17, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v18, v17, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v18, v17, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v49
+; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v50
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v26
; SI-NEXT: v_alignbit_b32 v14, v1, v51, 16
-; SI-NEXT: v_alignbit_b32 v15, v13, v39, 16
+; SI-NEXT: v_alignbit_b32 v15, v13, v49, 16
; SI-NEXT: v_alignbit_b32 v1, v15, v14, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v15, v14, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v15, v14, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v54
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v30
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v31
; SI-NEXT: v_alignbit_b32 v11, v1, v55, 16
; SI-NEXT: v_alignbit_b32 v12, v10, v53, 16
; SI-NEXT: v_alignbit_b32 v1, v12, v11, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v12, v11, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v12, v11, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v42
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v35
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v36
; SI-NEXT: v_alignbit_b32 v8, v1, v43, 16
; SI-NEXT: v_alignbit_b32 v9, v7, v41, 16
; SI-NEXT: v_alignbit_b32 v1, v9, v8, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v9, v8, 16
; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v9, v8, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v45
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v52
; SI-NEXT: v_alignbit_b32 v5, v1, v46, 16
; SI-NEXT: v_alignbit_b32 v6, v4, v44, 16
; SI-NEXT: v_alignbit_b32 v1, v6, v5, 24
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v6, v5, 16
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_alignbit_b32 v1, v6, v5, 8
-; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v56
; SI-NEXT: v_alignbit_b32 v2, v1, v57, 16
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
; SI-NEXT: v_alignbit_b32 v3, v1, v47, 16
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 24
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 24
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 16
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 8
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 8
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v22
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v18
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v21
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v26
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v18
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v15
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v30
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v15
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v35
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v31
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v40
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v36
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v9
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v40
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v6
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v6
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
-; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v50
-; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v24
-; SI-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v3
+; SI-NEXT: v_lshrrev_b32_e32 v62, 8, v38
+; SI-NEXT: v_lshrrev_b32_e32 v61, 24, v24
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v25
; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v52
-; SI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v60, 8, v9
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: ; implicit-def: $vgpr28
; SI-NEXT: ; implicit-def: $vgpr29
-; SI-NEXT: ; implicit-def: $vgpr22
+; SI-NEXT: ; implicit-def: $vgpr23
; SI-NEXT: ; implicit-def: $vgpr27
-; SI-NEXT: ; implicit-def: $vgpr32
; SI-NEXT: ; implicit-def: $vgpr33
+; SI-NEXT: ; implicit-def: $vgpr34
; SI-NEXT: ; implicit-def: $vgpr24
-; SI-NEXT: ; implicit-def: $vgpr31
-; SI-NEXT: ; implicit-def: $vgpr36
-; SI-NEXT: ; implicit-def: $vgpr38
+; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr48
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $vgpr34
-; SI-NEXT: ; implicit-def: $vgpr49
+; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr50
; SI-NEXT: ; implicit-def: $vgpr51
; SI-NEXT: ; implicit-def: $vgpr26
-; SI-NEXT: ; implicit-def: $vgpr39
+; SI-NEXT: ; implicit-def: $vgpr49
; SI-NEXT: ; implicit-def: $vgpr54
; SI-NEXT: ; implicit-def: $vgpr55
-; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $vgpr53
; SI-NEXT: ; implicit-def: $vgpr42
; SI-NEXT: ; implicit-def: $vgpr43
-; SI-NEXT: ; implicit-def: $vgpr35
+; SI-NEXT: ; implicit-def: $vgpr36
; SI-NEXT: ; implicit-def: $vgpr41
; SI-NEXT: ; implicit-def: $vgpr45
; SI-NEXT: ; implicit-def: $vgpr46
@@ -84727,214 +84354,215 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT: s_cbranch_execz .LBB108_4
; SI-NEXT: ; %bb.3: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v32
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v33
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; SI-NEXT: v_alignbit_b32 v23, v20, v19, 16
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v19
-; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v24
-; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v19
-; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24
; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
-; SI-NEXT: v_alignbit_b32 v21, v19, v20, 16
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v29
+; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v33
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v29
; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v34
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
+; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_lshrrev_b32_e32 v28, 16, v28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
-; SI-NEXT: v_alignbit_b32 v48, v28, v20, 16
-; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v27
+; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
+; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
+; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
+; SI-NEXT: v_alignbit_b32 v37, v28, v22, 16
+; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v27
+; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
+; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v39
+; SI-NEXT: v_alignbit_b32 v20, v20, v19, 16
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
-; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v36
-; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
-; SI-NEXT: v_lshrrev_b32_e32 v37, 16, v22
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v38
+; SI-NEXT: v_lshrrev_b32_e32 v30, 16, v23
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v48
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
-; SI-NEXT: v_alignbit_b32 v50, v37, v20, 16
+; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v19
+; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v24
+; SI-NEXT: v_alignbit_b32 v38, v30, v22, 16
; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; SI-NEXT: v_alignbit_b32 v20, v50, v48, 24
-; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v49
+; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v19
+; SI-NEXT: v_alignbit_b32 v22, v38, v37, 24
+; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v50
; SI-NEXT: v_alignbit_b32 v17, v17, v16, 16
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v34
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v35
+; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v24
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v50, v48, 16
+; SI-NEXT: v_alignbit_b32 v22, v38, v37, 16
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v51
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v16
; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v25
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v21, v19, v21, 16
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v50, v48, 8
+; SI-NEXT: v_alignbit_b32 v22, v38, v37, 8
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v21, v23, 24
+; SI-NEXT: v_alignbit_b32 v22, v21, v20, 24
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v54
; SI-NEXT: v_alignbit_b32 v14, v14, v13, 16
-; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v39
+; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v49
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v25
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v21, v23, 16
+; SI-NEXT: v_alignbit_b32 v22, v21, v20, 16
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v55
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v13
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v26
; SI-NEXT: v_alignbit_b32 v18, v16, v18, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v21, v23, 8
+; SI-NEXT: v_alignbit_b32 v22, v21, v20, 8
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v13
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v18, v17, 24
+; SI-NEXT: v_alignbit_b32 v22, v18, v17, 24
; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v42
; SI-NEXT: v_alignbit_b32 v11, v11, v10, 16
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v53
; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v26
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v18, v17, 16
+; SI-NEXT: v_alignbit_b32 v22, v18, v17, 16
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v43
; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v10
-; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v30
+; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v31
; SI-NEXT: v_alignbit_b32 v15, v13, v15, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v18, v17, 8
+; SI-NEXT: v_alignbit_b32 v22, v18, v17, 8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; SI-NEXT: v_add_f32_e32 v30, 0x40c00000, v10
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v31, 0x40c00000, v10
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v15, v14, 24
+; SI-NEXT: v_alignbit_b32 v22, v15, v14, 24
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v45
; SI-NEXT: v_alignbit_b32 v8, v8, v7, 16
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v41
-; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v30
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v10, 16, v31
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v15, v14, 16
+; SI-NEXT: v_alignbit_b32 v22, v15, v14, 16
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v46
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v7
-; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v35
+; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v36
; SI-NEXT: v_alignbit_b32 v12, v10, v12, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v15, v14, 8
+; SI-NEXT: v_alignbit_b32 v22, v15, v14, 8
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
-; SI-NEXT: v_add_f32_e32 v35, 0x40c00000, v7
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
+; SI-NEXT: v_add_f32_e32 v36, 0x40c00000, v7
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v12, v11, 24
+; SI-NEXT: v_alignbit_b32 v22, v12, v11, 24
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v56
; SI-NEXT: v_alignbit_b32 v5, v5, v4, 16
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v44
-; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v35
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v36
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v12, v11, 16
+; SI-NEXT: v_alignbit_b32 v22, v12, v11, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v57
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v4
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v52
; SI-NEXT: v_alignbit_b32 v9, v7, v9, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v12, v11, 8
+; SI-NEXT: v_alignbit_b32 v22, v12, v11, 8
; SI-NEXT: v_add_f32_e32 v1, 0x40c00000, v1
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; SI-NEXT: v_add_f32_e32 v52, 0x40c00000, v4
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v9, v8, 24
+; SI-NEXT: v_alignbit_b32 v22, v9, v8, 24
; SI-NEXT: v_alignbit_b32 v2, v2, v1, 16
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v47
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v52
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v9, v8, 16
+; SI-NEXT: v_alignbit_b32 v22, v9, v8, 16
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v1
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v40
; SI-NEXT: v_alignbit_b32 v6, v4, v6, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v9, v8, 8
+; SI-NEXT: v_alignbit_b32 v22, v9, v8, 8
; SI-NEXT: v_add_f32_e32 v40, 0x40c00000, v1
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 24
+; SI-NEXT: v_alignbit_b32 v22, v6, v5, 24
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v40
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 16
+; SI-NEXT: v_alignbit_b32 v22, v6, v5, 16
; SI-NEXT: v_alignbit_b32 v3, v1, v3, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v6, v5, 8
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v6, v5, 8
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 24
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 24
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 16
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 16
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_alignbit_b32 v20, v3, v2, 8
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; SI-NEXT: v_alignbit_b32 v22, v3, v2, 8
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v18
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v21
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v20, 8, v15
-; SI-NEXT: buffer_store_dword v20, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v18
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v20, 24, v22
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v26
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v15
+; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v30
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v23
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v26
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v35
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v31
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 24, v40
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v36
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v9
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 24, v40
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v6
-; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v50
-; SI-NEXT: v_lshrrev_b32_e32 v59, 8, v21
-; SI-NEXT: v_lshrrev_b32_e32 v62, 24, v24
-; SI-NEXT: v_lshrrev_b32_e32 v60, 24, v25
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v6
+; SI-NEXT: v_lshrrev_b32_e32 v62, 8, v38
+; SI-NEXT: v_lshrrev_b32_e32 v61, 24, v24
+; SI-NEXT: v_lshrrev_b32_e32 v59, 24, v25
; SI-NEXT: v_lshrrev_b32_e32 v58, 24, v52
-; SI-NEXT: v_lshrrev_b32_e32 v61, 8, v12
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v63, 8, v12
+; SI-NEXT: v_lshrrev_b32_e32 v60, 8, v9
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_lshrrev_b32_e32 v22, 8, v3
-; SI-NEXT: buffer_store_dword v22, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
+; SI-NEXT: v_lshrrev_b32_e32 v23, 8, v3
+; SI-NEXT: buffer_store_dword v23, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT: .LBB108_4: ; %end
; SI-NEXT: s_or_b64 exec, exec, s[4:5]
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xff, v48
-; SI-NEXT: v_lshlrev_b32_e32 v20, 24, v20
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v37
+; SI-NEXT: v_lshlrev_b32_e32 v22, 24, v22
+; SI-NEXT: v_and_b32_e32 v20, 0xff, v20
; SI-NEXT: v_and_b32_e32 v19, 0xff, v19
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_and_b32_e32 v17, 0xff, v17
@@ -84958,36 +84586,34 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v24
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
; SI-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v25, 24, v25
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_and_b32_e32 v24, 0xff, v24
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT: v_or_b32_e32 v24, v25, v24
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v22, 0xff, v50
-; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v63
-; SI-NEXT: v_or_b32_e32 v22, v22, v24
-; SI-NEXT: v_and_b32_e32 v24, 0xff, v37
+; SI-NEXT: v_and_b32_e32 v23, 0xff, v38
+; SI-NEXT: v_lshlrev_b32_e32 v24, 8, v62
+; SI-NEXT: v_or_b32_e32 v23, v23, v24
+; SI-NEXT: v_and_b32_e32 v24, 0xff, v30
; SI-NEXT: v_lshlrev_b32_e32 v24, 16, v24
-; SI-NEXT: v_and_b32_e32 v22, 0xffff, v22
-; SI-NEXT: v_or_b32_e32 v20, v20, v24
-; SI-NEXT: v_or_b32_e32 v20, v22, v20
-; SI-NEXT: v_add_i32_e32 v22, vcc, 4, v0
-; SI-NEXT: buffer_store_dword v20, v22, s[0:3], 0 offen
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: v_and_b32_e32 v23, 0xffff, v23
+; SI-NEXT: v_or_b32_e32 v22, v22, v24
+; SI-NEXT: v_or_b32_e32 v22, v23, v22
+; SI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:4
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_and_b32_e32 v20, 0xff, v23
-; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v22, 8, v22
; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v23, 24, v23
@@ -84996,21 +84622,21 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT: v_or_b32_e32 v22, v23, v22
; SI-NEXT: v_or_b32_e32 v20, v20, v22
-; SI-NEXT: v_add_i32_e32 v22, vcc, 8, v0
-; SI-NEXT: buffer_store_dword v20, v22, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v20, 0xff, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v59
+; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
+; SI-NEXT: s_waitcnt vmcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v21, 8, v21
; SI-NEXT: v_or_b32_e32 v20, v20, v21
-; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v62
+; SI-NEXT: v_lshlrev_b32_e32 v21, 24, v61
; SI-NEXT: v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT: v_or_b32_e32 v19, v21, v19
; SI-NEXT: v_or_b32_e32 v19, v20, v19
-; SI-NEXT: v_add_i32_e32 v20, vcc, 12, v0
-; SI-NEXT: buffer_store_dword v19, v20, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:12
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v19, 8, v19
; SI-NEXT: v_or_b32_e32 v17, v17, v19
@@ -85023,23 +84649,21 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT: v_or_b32_e32 v19, v20, v19
; SI-NEXT: v_or_b32_e32 v17, v17, v19
-; SI-NEXT: v_add_i32_e32 v19, vcc, 16, v0
-; SI-NEXT: buffer_store_dword v17, v19, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v17, 0xff, v18
-; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v18, 8, v18
; SI-NEXT: v_or_b32_e32 v17, v17, v18
-; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v60
+; SI-NEXT: v_lshlrev_b32_e32 v18, 24, v59
; SI-NEXT: v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT: v_or_b32_e32 v16, v18, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
-; SI-NEXT: v_add_i32_e32 v17, vcc, 20, v0
-; SI-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v16, 8, v16
; SI-NEXT: v_or_b32_e32 v14, v14, v16
@@ -85052,25 +84676,23 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT: v_or_b32_e32 v16, v17, v16
; SI-NEXT: v_or_b32_e32 v14, v14, v16
-; SI-NEXT: v_add_i32_e32 v16, vcc, 24, v0
-; SI-NEXT: buffer_store_dword v14, v16, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v14, 0xff, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v15, 8, v15
; SI-NEXT: v_or_b32_e32 v14, v14, v15
-; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; SI-NEXT: v_or_b32_e32 v13, v15, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
-; SI-NEXT: v_add_i32_e32 v14, vcc, 28, v0
-; SI-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:28
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v14, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v13, 8, v13
; SI-NEXT: v_or_b32_e32 v11, v11, v13
@@ -85083,11 +84705,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT: v_or_b32_e32 v13, v14, v13
; SI-NEXT: v_or_b32_e32 v11, v11, v13
-; SI-NEXT: v_add_i32_e32 v13, vcc, 32, v0
-; SI-NEXT: buffer_store_dword v11, v13, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v11, 0xff, v12
-; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v61
+; SI-NEXT: v_lshlrev_b32_e32 v12, 8, v63
; SI-NEXT: v_or_b32_e32 v11, v11, v12
; SI-NEXT: buffer_load_dword v12, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v11, 0xffff, v11
@@ -85095,11 +84716,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; SI-NEXT: v_or_b32_e32 v10, v12, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
-; SI-NEXT: v_add_i32_e32 v11, vcc, 36, v0
-; SI-NEXT: buffer_store_dword v10, v11, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:36
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v10, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; SI-NEXT: v_or_b32_e32 v8, v8, v10
@@ -85112,13 +84732,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT: v_or_b32_e32 v10, v11, v10
; SI-NEXT: v_or_b32_e32 v8, v8, v10
-; SI-NEXT: v_add_i32_e32 v10, vcc, 40, v0
-; SI-NEXT: buffer_store_dword v8, v10, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v8, 0xff, v9
-; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
-; SI-NEXT: s_waitcnt vmcnt(0)
-; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v9
+; SI-NEXT: v_lshlrev_b32_e32 v9, 8, v60
; SI-NEXT: v_or_b32_e32 v8, v8, v9
; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v8, 0xffff, v8
@@ -85126,15 +84743,14 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; SI-NEXT: v_or_b32_e32 v7, v9, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
-; SI-NEXT: v_add_i32_e32 v8, vcc, 44, v0
-; SI-NEXT: buffer_store_dword v7, v8, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
-; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v7, 8, v7
; SI-NEXT: v_or_b32_e32 v5, v5, v7
-; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v8, 24, v8
@@ -85143,11 +84759,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT: v_or_b32_e32 v7, v8, v7
; SI-NEXT: v_or_b32_e32 v5, v5, v7
-; SI-NEXT: v_add_i32_e32 v7, vcc, 48, v0
-; SI-NEXT: buffer_store_dword v5, v7, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v5, 0xff, v6
-; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; SI-NEXT: v_or_b32_e32 v5, v5, v6
@@ -85155,15 +84770,14 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT: v_or_b32_e32 v4, v6, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
-; SI-NEXT: v_add_i32_e32 v5, vcc, 52, v0
-; SI-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
+; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT: v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshlrev_b32_e32 v5, 24, v5
@@ -85172,12 +84786,10 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT: v_or_b32_e32 v4, v5, v4
; SI-NEXT: v_or_b32_e32 v2, v2, v4
-; SI-NEXT: v_add_i32_e32 v4, vcc, 56, v0
-; SI-NEXT: buffer_store_dword v2, v4, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0xff, v3
-; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
+; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; SI-NEXT: v_or_b32_e32 v2, v2, v3
@@ -85187,7 +84799,7 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; SI-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; SI-NEXT: v_or_b32_e32 v1, v3, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -85228,18 +84840,15 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v17
; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr31
-; VI-NEXT: ; implicit-def: $vgpr30
-; VI-NEXT: ; implicit-def: $vgpr23
; VI-NEXT: ; implicit-def: $vgpr29
; VI-NEXT: ; implicit-def: $vgpr28
+; VI-NEXT: ; implicit-def: $vgpr23
+; VI-NEXT: ; implicit-def: $vgpr27
; VI-NEXT: ; implicit-def: $vgpr63
; VI-NEXT: ; implicit-def: $vgpr62
-; VI-NEXT: ; implicit-def: $vgpr61
-; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr60
+; VI-NEXT: ; implicit-def: $vgpr61
+; VI-NEXT: ; implicit-def: $vgpr22
; VI-NEXT: ; implicit-def: $vgpr59
; VI-NEXT: ; implicit-def: $vgpr58
; VI-NEXT: ; implicit-def: $vgpr57
@@ -85268,12 +84877,14 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; implicit-def: $vgpr34
; VI-NEXT: ; implicit-def: $vgpr33
; VI-NEXT: ; implicit-def: $vgpr32
+; VI-NEXT: ; implicit-def: $vgpr31
+; VI-NEXT: ; implicit-def: $vgpr30
; VI-NEXT: ; kill: killed $vgpr17
-; VI-NEXT: ; implicit-def: $vgpr27
-; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr26
+; VI-NEXT: ; implicit-def: $vgpr24
; VI-NEXT: ; implicit-def: $vgpr25
-; VI-NEXT: ; implicit-def: $vgpr22
+; VI-NEXT: ; implicit-def: $vgpr21
+; VI-NEXT: ; implicit-def: $vgpr20
; VI-NEXT: ; implicit-def: $vgpr19
; VI-NEXT: ; implicit-def: $vgpr18
; VI-NEXT: ; implicit-def: $vgpr17
@@ -85283,54 +84894,53 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: ; %bb.1: ; %cmp.false
; VI-NEXT: v_lshrrev_b32_e32 v17, 8, v16
; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v15
-; VI-NEXT: buffer_store_dword v17, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v16
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v16
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
+; VI-NEXT: v_mov_b32_e32 v26, v23
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: v_mov_b32_e32 v27, v21
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
; VI-NEXT: .LBB108_2: ; %Flow
; VI-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
@@ -85628,155 +85238,137 @@ define <64 x i8> @bitcast_v32bf16_to_v64i8(<32 x bfloat> %a, i32 %b) #0 {
; VI-NEXT: v_lshrrev_b64 v[17:18], 24, v[15:16]
; VI-NEXT: v_lshrrev_b64 v[18:19], 24, v[13:14]
; VI-NEXT: v_lshrrev_b64 v[19:20], 24, v[11:12]
-; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[9:10]
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[7:8]
-; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[3:4]
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[5:6]
+; VI-NEXT: v_lshrrev_b64 v[20:21], 24, v[9:10]
+; VI-NEXT: v_lshrrev_b64 v[21:22], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 24, v[3:4]
+; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[5:6]
; VI-NEXT: v_lshrrev_b64 v[23:24], 24, v[1:2]
-; VI-NEXT: v_lshrrev_b32_e32 v21, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v16
; VI-NEXT: v_lshrrev_b32_e32 v24, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v16
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v15
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v15
-; VI-NEXT: v_lshrrev_b32_e32 v33, 24, v14
-; VI-NEXT: v_lshrrev_b32_e32 v34, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v35, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v38, 24, v12
-; VI-NEXT: v_lshrrev_b32_e32 v39, 16, v12
-; VI-NEXT: v_lshrrev_b32_e32 v48, 8, v12
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v51, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v52, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v53, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v9
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v9
-; VI-NEXT: v_lshrrev_b32_e32 v40, 24, v8
-; VI-NEXT: v_lshrrev_b32_e32 v41, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v42, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 24, v6
-; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v6
-; VI-NEXT: v_lshrrev_b32_e32 v47, 8, v6
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v58, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v16
+; VI-NEXT: buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v15
+; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v15
+; VI-NEXT: v_lshrrev_b32_e32 v32, 24, v14
+; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v35, 16, v13
+; VI-NEXT: v_lshrrev_b32_e32 v36, 8, v13
+; VI-NEXT: v_lshrrev_b32_e32 v37, 24, v12
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v48, 16, v11
+; VI-NEXT: v_lshrrev_b32_e32 v49, 8, v11
+; VI-NEXT: v_lshrrev_b32_e32 v50, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v53, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v54, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v55, 24, v8
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v8
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v8
+; VI-NEXT: v_lshrrev_b32_e32 v42, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v43, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v6
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v6
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v6
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v3
-; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v3
-; VI-NEXT: v_lshrrev_b32_e32 v63, 24, v2
-; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v2
-; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v2
-; VI-NEXT: v_lshrrev_b32_e32 v30, 16, v1
-; VI-NEXT: v_lshrrev_b32_e32 v31, 8, v1
-; VI-NEXT: buffer_store_dword v21, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; VI-NEXT: v_lshrrev_b32_e32 v60, 8, v3
+; VI-NEXT: v_lshrrev_b32_e32 v62, 24, v2
+; VI-NEXT: v_lshrrev_b32_e32 v63, 16, v2
+; VI-NEXT: v_lshrrev_b32_e32 v27, 8, v2
+; VI-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v29, 8, v1
; VI-NEXT: .LBB108_4: ; %end
; VI-NEXT: s_or_b64 exec, exec, s[4:5]
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v21, v30, v23, s4
-; VI-NEXT: v_perm_b32 v1, v1, v31, s4
-; VI-NEXT: v_lshlrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_or_b32_e32 v1, v1, v21
+; VI-NEXT: v_perm_b32 v23, v28, v23, s4
+; VI-NEXT: v_perm_b32 v1, v1, v29, s4
+; VI-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; VI-NEXT: v_or_b32_e32 v1, v1, v23
; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v28, v63, s4
-; VI-NEXT: v_perm_b32 v2, v2, v29, s4
-; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
-; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v1, v61, v20, s4
-; VI-NEXT: v_perm_b32 v2, v3, v62, s4
+; VI-NEXT: v_perm_b32 v1, v63, v62, s4
+; VI-NEXT: v_perm_b32 v2, v2, v27, s4
; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v22, v61, v22, s4
; VI-NEXT: v_or_b32_e32 v1, v2, v1
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v59, v58, s4
-; VI-NEXT: v_perm_b32 v1, v4, v60, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_perm_b32 v1, v3, v60, s4
+; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v22
+; VI-NEXT: v_or_b32_e32 v1, v1, v2
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v4, v59, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v26, s4
-; VI-NEXT: v_perm_b32 v1, v5, v57, s4
+; VI-NEXT: v_perm_b32 v2, v47, v25, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_perm_b32 v1, v5, v56, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v46, v45, s4
-; VI-NEXT: v_perm_b32 v1, v6, v47, s4
+; VI-NEXT: v_perm_b32 v2, v45, v44, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v6, v46, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v25, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
+; VI-NEXT: v_perm_b32 v2, v42, v21, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v7, v43, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v41, v40, s4
-; VI-NEXT: v_perm_b32 v1, v8, v42, s4
+; VI-NEXT: v_perm_b32 v2, v40, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v8, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v54, v22, s4
-; VI-NEXT: v_perm_b32 v1, v9, v55, s4
+; VI-NEXT: v_perm_b32 v2, v53, v20, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v9, v54, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v52, v51, s4
-; VI-NEXT: v_perm_b32 v1, v10, v53, s4
+; VI-NEXT: v_perm_b32 v2, v51, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v49, v19, s4
-; VI-NEXT: v_perm_b32 v1, v11, v50, s4
+; VI-NEXT: v_perm_b32 v2, v48, v19, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v11, v49, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v39, v38, s4
-; VI-NEXT: v_perm_b32 v1, v12, v48, s4
+; VI-NEXT: v_perm_b32 v2, v38, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v12, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v36, v18, s4
-; VI-NEXT: v_perm_b32 v1, v13, v37, s4
+; VI-NEXT: v_perm_b32 v2, v35, v18, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v13, v36, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v34, v33, s4
-; VI-NEXT: v_perm_b32 v1, v14, v35, s4
+; VI-NEXT: v_perm_b32 v2, v33, v32, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v14, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v15, v32, s4
-; VI-NEXT: s_waitcnt vmcnt(0)
-; VI-NEXT: v_perm_b32 v2, v2, v17, s4
+; VI-NEXT: v_perm_b32 v2, v30, v17, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v15, v31, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v2, v27, v24, s4
+; VI-NEXT: v_perm_b32 v2, v26, v24, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_perm_b32 v1, v16, v1, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
@@ -87457,13 +87049,13 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_mul_f32_e64 v24, 1.0, s11
; SI-NEXT: v_mul_f32_e64 v21, 1.0, s8
; SI-NEXT: v_mul_f32_e64 v22, 1.0, s9
-; SI-NEXT: v_mul_f32_e64 v29, 1.0, s6
-; SI-NEXT: v_mul_f32_e64 v31, 1.0, s7
-; SI-NEXT: v_mul_f32_e64 v27, 1.0, s4
-; SI-NEXT: v_mul_f32_e64 v28, 1.0, s5
-; SI-NEXT: v_mul_f32_e64 v36, 1.0, s45
+; SI-NEXT: v_mul_f32_e64 v28, 1.0, s6
+; SI-NEXT: v_mul_f32_e64 v30, 1.0, s7
+; SI-NEXT: v_mul_f32_e64 v26, 1.0, s4
+; SI-NEXT: v_mul_f32_e64 v27, 1.0, s5
+; SI-NEXT: v_mul_f32_e64 v35, 1.0, s45
; SI-NEXT: v_mul_f32_e64 v37, 1.0, s44
-; SI-NEXT: v_mul_f32_e64 v33, 1.0, s43
+; SI-NEXT: v_mul_f32_e64 v32, 1.0, s43
; SI-NEXT: v_mul_f32_e64 v34, 1.0, s42
; SI-NEXT: ; implicit-def: $vgpr41 : SGPR spill to VGPR lane
; SI-NEXT: s_cbranch_scc0 .LBB109_4
@@ -87484,80 +87076,80 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s4, v7
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v8
-; SI-NEXT: s_lshr_b64 s[60:61], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v5
-; SI-NEXT: s_lshr_b32 s59, s4, 16
+; SI-NEXT: s_lshr_b32 s61, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v12
-; SI-NEXT: s_lshr_b64 s[46:47], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: s_lshr_b32 s45, s4, 16
+; SI-NEXT: s_lshr_b32 s47, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v15
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v16
-; SI-NEXT: s_lshr_b64 s[26:27], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[24:25], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: s_lshr_b32 s25, s4, 16
+; SI-NEXT: s_lshr_b32 s27, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v20
-; SI-NEXT: s_lshr_b64 s[16:17], s[4:5], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: s_lshr_b32 s41, s4, 16
+; SI-NEXT: s_lshr_b32 s43, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v23
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v24
; SI-NEXT: s_lshr_b64 s[20:21], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v21
; SI-NEXT: s_lshr_b32 s19, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_readfirstlane_b32 s4, v28
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v31
+; SI-NEXT: v_readfirstlane_b32 s4, v30
; SI-NEXT: s_lshr_b64 s[12:13], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v27
+; SI-NEXT: v_readfirstlane_b32 s4, v26
; SI-NEXT: s_lshr_b32 s11, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v36
+; SI-NEXT: v_readfirstlane_b32 s4, v35
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v37
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16
-; SI-NEXT: v_readfirstlane_b32 s4, v33
-; SI-NEXT: v_readfirstlane_b32 s58, v6
-; SI-NEXT: v_readfirstlane_b32 s44, v10
-; SI-NEXT: v_readfirstlane_b32 s24, v14
-; SI-NEXT: v_readfirstlane_b32 s40, v18
+; SI-NEXT: v_readfirstlane_b32 s4, v32
+; SI-NEXT: v_readfirstlane_b32 s60, v6
+; SI-NEXT: v_readfirstlane_b32 s46, v10
+; SI-NEXT: v_readfirstlane_b32 s26, v14
+; SI-NEXT: v_readfirstlane_b32 s42, v18
; SI-NEXT: v_readfirstlane_b32 s18, v22
-; SI-NEXT: v_readfirstlane_b32 s10, v28
+; SI-NEXT: v_readfirstlane_b32 s10, v27
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v34
-; SI-NEXT: s_lshr_b64 s[62:63], s[58:59], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[60:61], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[22:23], s[42:43], 16
; SI-NEXT: s_lshr_b64 s[28:29], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
-; SI-NEXT: s_mov_b32 s61, s62
-; SI-NEXT: s_mov_b32 s47, s56
-; SI-NEXT: s_mov_b32 s27, s42
-; SI-NEXT: s_mov_b32 s17, s22
+; SI-NEXT: s_mov_b32 s59, s62
+; SI-NEXT: s_mov_b32 s45, s56
+; SI-NEXT: s_mov_b32 s25, s40
+; SI-NEXT: s_mov_b32 s15, s22
; SI-NEXT: s_mov_b32 s21, s28
-; SI-NEXT: s_mov_b32 s13, s14
+; SI-NEXT: s_mov_b32 s13, s16
; SI-NEXT: s_mov_b32 s7, s8
; SI-NEXT: s_lshr_b64 s[88:89], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[74:75], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
-; SI-NEXT: s_lshr_b64 s[94:95], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[60:61], 8
-; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 24
-; SI-NEXT: s_lshr_b64 s[36:37], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[38:39], s[46:47], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[64:65], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[16:17], 8
+; SI-NEXT: s_lshr_b64 s[90:91], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[48:49], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[68:69], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[70:71], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[80:81], s[20:21], 8
@@ -87566,16 +87158,16 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshr_b32 s23, s76, 8
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v9
; SI-NEXT: s_lshr_b32 s21, s62, 8
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v13
; SI-NEXT: s_lshr_b32 s18, s56, 8
-; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v17
-; SI-NEXT: s_lshr_b32 s17, s42, 8
-; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v21
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v17
+; SI-NEXT: s_lshr_b32 s17, s40, 8
+; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v21
; SI-NEXT: s_lshr_b32 s15, s22, 8
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v27
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v26
; SI-NEXT: s_lshr_b32 s10, s28, 8
-; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v33
-; SI-NEXT: s_lshr_b32 s9, s14, 8
+; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v32
+; SI-NEXT: s_lshr_b32 s9, s16, 8
; SI-NEXT: s_lshr_b32 s4, s8, 8
; SI-NEXT: s_lshr_b64 s[96:97], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[98:99], s[12:13], 16
@@ -87585,34 +87177,32 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 8
; SI-NEXT: s_cbranch_execnz .LBB109_3
; SI-NEXT: .LBB109_2: ; %cmp.true
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v36
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v35
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v37
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
-; SI-NEXT: v_readfirstlane_b32 s4, v26
+; SI-NEXT: v_readfirstlane_b32 s4, v29
; SI-NEXT: s_lshr_b32 s5, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v34
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v25
-; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v33
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v25
+; SI-NEXT: v_and_b32_e32 v25, 0xffff0000, v32
; SI-NEXT: v_add_f32_e32 v25, 0x40c00000, v25
; SI-NEXT: s_lshr_b64 s[6:7], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v25
+; SI-NEXT: v_and_b32_e32 v28, 0xffff0000, v28
; SI-NEXT: s_lshr_b32 s5, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s4, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v31
-; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
-; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v29
-; SI-NEXT: v_readfirstlane_b32 s10, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v28
-; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
-; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v26
-; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v27
-; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
; SI-NEXT: v_readfirstlane_b32 s4, v29
+; SI-NEXT: v_and_b32_e32 v29, 0xffff0000, v30
+; SI-NEXT: v_add_f32_e32 v28, 0x40c00000, v28
+; SI-NEXT: v_and_b32_e32 v26, 0xffff0000, v26
+; SI-NEXT: s_lshr_b64 s[8:9], s[4:5], 16
+; SI-NEXT: v_add_f32_e32 v29, 0x40c00000, v29
+; SI-NEXT: v_readfirstlane_b32 s4, v28
; SI-NEXT: v_add_f32_e32 v26, 0x40c00000, v26
; SI-NEXT: v_and_b32_e32 v23, 0xffff0000, v23
; SI-NEXT: s_lshr_b32 s11, s4, 16
+; SI-NEXT: v_readfirstlane_b32 s10, v29
; SI-NEXT: v_readfirstlane_b32 s4, v26
; SI-NEXT: v_add_f32_e32 v23, 0x40c00000, v23
; SI-NEXT: v_and_b32_e32 v21, 0xffff0000, v21
@@ -87623,58 +87213,46 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_add_f32_e32 v21, 0x40c00000, v21
; SI-NEXT: v_and_b32_e32 v19, 0xffff0000, v19
; SI-NEXT: v_add_f32_e32 v24, 0x40c00000, v24
-; SI-NEXT: s_lshr_b32 s17, s4, 16
+; SI-NEXT: s_lshr_b32 s15, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v21
; SI-NEXT: v_add_f32_e32 v19, 0x40c00000, v19
; SI-NEXT: v_and_b32_e32 v17, 0xffff0000, v17
-; SI-NEXT: v_readfirstlane_b32 s16, v24
+; SI-NEXT: v_readfirstlane_b32 s14, v24
; SI-NEXT: s_lshr_b32 s19, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v19
; SI-NEXT: v_add_f32_e32 v17, 0x40c00000, v17
; SI-NEXT: v_and_b32_e32 v15, 0xffff0000, v15
-; SI-NEXT: s_lshr_b64 s[20:21], s[16:17], 16
-; SI-NEXT: s_lshr_b32 s17, s4, 16
+; SI-NEXT: s_lshr_b64 s[20:21], s[14:15], 16
+; SI-NEXT: s_lshr_b32 s15, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v17
-; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_add_f32_e32 v15, 0x40c00000, v15
; SI-NEXT: v_and_b32_e32 v13, 0xffff0000, v13
-; SI-NEXT: s_lshr_b32 s41, s4, 16
-; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
+; SI-NEXT: s_lshr_b32 s43, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v15
; SI-NEXT: v_add_f32_e32 v13, 0x40c00000, v13
; SI-NEXT: v_and_b32_e32 v11, 0xffff0000, v11
; SI-NEXT: s_lshr_b32 s25, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s24, v16
; SI-NEXT: v_readfirstlane_b32 s4, v13
-; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; SI-NEXT: v_add_f32_e32 v11, 0x40c00000, v11
; SI-NEXT: v_and_b32_e32 v9, 0xffff0000, v9
-; SI-NEXT: s_lshr_b64 s[26:27], s[24:25], 16
-; SI-NEXT: s_lshr_b32 s25, s4, 16
-; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
+; SI-NEXT: s_lshr_b32 s27, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v11
; SI-NEXT: v_add_f32_e32 v9, 0x40c00000, v9
; SI-NEXT: v_and_b32_e32 v7, 0xffff0000, v7
; SI-NEXT: s_lshr_b32 s45, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s44, v12
; SI-NEXT: v_readfirstlane_b32 s4, v9
-; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_add_f32_e32 v7, 0x40c00000, v7
; SI-NEXT: v_and_b32_e32 v5, 0xffff0000, v5
-; SI-NEXT: s_lshr_b64 s[46:47], s[44:45], 16
-; SI-NEXT: s_lshr_b32 s45, s4, 16
-; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
+; SI-NEXT: s_lshr_b32 s47, s4, 16
; SI-NEXT: v_readfirstlane_b32 s4, v7
; SI-NEXT: v_add_f32_e32 v5, 0x40c00000, v5
; SI-NEXT: v_and_b32_e32 v3, 0xffff0000, v3
; SI-NEXT: s_lshr_b32 s59, s4, 16
-; SI-NEXT: v_readfirstlane_b32 s58, v8
; SI-NEXT: v_readfirstlane_b32 s4, v5
; SI-NEXT: v_and_b32_e32 v4, 0xffff0000, v4
; SI-NEXT: v_add_f32_e32 v3, 0x40c00000, v3
; SI-NEXT: v_and_b32_e32 v1, 0xffff0000, v1
-; SI-NEXT: s_lshr_b64 s[60:61], s[58:59], 16
-; SI-NEXT: s_lshr_b32 s59, s4, 16
+; SI-NEXT: s_lshr_b32 s61, s4, 16
; SI-NEXT: v_add_f32_e32 v4, 0x40c00000, v4
; SI-NEXT: v_readfirstlane_b32 s4, v3
; SI-NEXT: v_and_b32_e32 v2, 0xffff0000, v2
@@ -87683,79 +87261,93 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: v_readfirstlane_b32 s72, v4
; SI-NEXT: v_add_f32_e32 v2, 0x40c00000, v2
; SI-NEXT: v_readfirstlane_b32 s4, v1
+; SI-NEXT: v_and_b32_e32 v27, 0xffff0000, v27
; SI-NEXT: v_and_b32_e32 v22, 0xffff0000, v22
; SI-NEXT: v_and_b32_e32 v20, 0xffff0000, v20
; SI-NEXT: v_and_b32_e32 v18, 0xffff0000, v18
+; SI-NEXT: v_and_b32_e32 v16, 0xffff0000, v16
; SI-NEXT: v_and_b32_e32 v14, 0xffff0000, v14
+; SI-NEXT: v_and_b32_e32 v12, 0xffff0000, v12
; SI-NEXT: v_and_b32_e32 v10, 0xffff0000, v10
+; SI-NEXT: v_and_b32_e32 v8, 0xffff0000, v8
; SI-NEXT: v_and_b32_e32 v6, 0xffff0000, v6
; SI-NEXT: s_lshr_b64 s[74:75], s[72:73], 16
; SI-NEXT: s_lshr_b32 s73, s4, 16
; SI-NEXT: v_readfirstlane_b32 s72, v2
+; SI-NEXT: v_add_f32_e32 v27, 0x40c00000, v27
; SI-NEXT: v_add_f32_e32 v22, 0x40c00000, v22
; SI-NEXT: v_add_f32_e32 v20, 0x40c00000, v20
; SI-NEXT: v_add_f32_e32 v18, 0x40c00000, v18
+; SI-NEXT: v_add_f32_e32 v16, 0x40c00000, v16
; SI-NEXT: v_add_f32_e32 v14, 0x40c00000, v14
+; SI-NEXT: v_add_f32_e32 v12, 0x40c00000, v12
; SI-NEXT: v_add_f32_e32 v10, 0x40c00000, v10
+; SI-NEXT: v_add_f32_e32 v8, 0x40c00000, v8
; SI-NEXT: v_add_f32_e32 v6, 0x40c00000, v6
; SI-NEXT: s_lshr_b64 s[76:77], s[72:73], 16
-; SI-NEXT: v_readfirstlane_b32 s10, v28
+; SI-NEXT: v_readfirstlane_b32 s10, v27
; SI-NEXT: v_readfirstlane_b32 s18, v22
-; SI-NEXT: v_readfirstlane_b32 s16, v20
-; SI-NEXT: v_readfirstlane_b32 s40, v18
-; SI-NEXT: v_readfirstlane_b32 s24, v14
-; SI-NEXT: v_readfirstlane_b32 s44, v10
-; SI-NEXT: v_readfirstlane_b32 s58, v6
+; SI-NEXT: v_readfirstlane_b32 s14, v20
+; SI-NEXT: v_readfirstlane_b32 s42, v18
+; SI-NEXT: v_readfirstlane_b32 s24, v16
+; SI-NEXT: v_readfirstlane_b32 s26, v14
+; SI-NEXT: v_readfirstlane_b32 s44, v12
+; SI-NEXT: v_readfirstlane_b32 s46, v10
+; SI-NEXT: v_readfirstlane_b32 s58, v8
+; SI-NEXT: v_readfirstlane_b32 s60, v6
; SI-NEXT: s_mov_b32 s75, s76
-; SI-NEXT: s_lshr_b64 s[14:15], s[10:11], 16
+; SI-NEXT: s_lshr_b64 s[16:17], s[10:11], 16
; SI-NEXT: s_lshr_b64 s[28:29], s[18:19], 16
-; SI-NEXT: s_lshr_b64 s[16:17], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[22:23], s[40:41], 16
-; SI-NEXT: s_lshr_b64 s[42:43], s[24:25], 16
-; SI-NEXT: s_lshr_b64 s[56:57], s[44:45], 16
-; SI-NEXT: s_lshr_b64 s[62:63], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[14:15], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[22:23], s[42:43], 16
+; SI-NEXT: s_lshr_b64 s[24:25], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[40:41], s[26:27], 16
+; SI-NEXT: s_lshr_b64 s[44:45], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[56:57], s[46:47], 16
+; SI-NEXT: s_lshr_b64 s[58:59], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[62:63], s[60:61], 16
; SI-NEXT: s_lshr_b64 s[78:79], s[74:75], 24
; SI-NEXT: s_mov_b32 s7, s8
-; SI-NEXT: s_mov_b32 s13, s14
+; SI-NEXT: s_mov_b32 s13, s16
; SI-NEXT: s_mov_b32 s21, s28
-; SI-NEXT: s_mov_b32 s17, s22
-; SI-NEXT: s_mov_b32 s27, s42
-; SI-NEXT: s_mov_b32 s47, s56
-; SI-NEXT: s_mov_b32 s61, s62
+; SI-NEXT: s_mov_b32 s15, s22
+; SI-NEXT: s_mov_b32 s25, s40
+; SI-NEXT: s_mov_b32 s45, s56
+; SI-NEXT: s_mov_b32 s59, s62
; SI-NEXT: v_writelane_b32 v41, s78, 0
; SI-NEXT: v_writelane_b32 v41, s79, 1
; SI-NEXT: s_lshr_b64 s[88:89], s[74:75], 16
-; SI-NEXT: s_lshr_b64 s[92:93], s[74:75], 8
-; SI-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
-; SI-NEXT: s_lshr_b64 s[94:95], s[60:61], 16
-; SI-NEXT: s_lshr_b64 s[30:31], s[60:61], 8
-; SI-NEXT: s_lshr_b64 s[34:35], s[46:47], 24
-; SI-NEXT: s_lshr_b64 s[36:37], s[46:47], 16
-; SI-NEXT: s_lshr_b64 s[38:39], s[46:47], 8
-; SI-NEXT: s_lshr_b64 s[48:49], s[26:27], 24
-; SI-NEXT: s_lshr_b64 s[50:51], s[26:27], 16
-; SI-NEXT: s_lshr_b64 s[52:53], s[26:27], 8
-; SI-NEXT: s_lshr_b64 s[54:55], s[16:17], 24
-; SI-NEXT: s_lshr_b64 s[64:65], s[16:17], 16
-; SI-NEXT: s_lshr_b64 s[66:67], s[16:17], 8
+; SI-NEXT: s_lshr_b64 s[90:91], s[74:75], 8
+; SI-NEXT: s_lshr_b64 s[92:93], s[58:59], 24
+; SI-NEXT: s_lshr_b64 s[94:95], s[58:59], 16
+; SI-NEXT: s_lshr_b64 s[30:31], s[58:59], 8
+; SI-NEXT: s_lshr_b64 s[34:35], s[44:45], 24
+; SI-NEXT: s_lshr_b64 s[36:37], s[44:45], 16
+; SI-NEXT: s_lshr_b64 s[38:39], s[44:45], 8
+; SI-NEXT: s_lshr_b64 s[48:49], s[24:25], 24
+; SI-NEXT: s_lshr_b64 s[50:51], s[24:25], 16
+; SI-NEXT: s_lshr_b64 s[52:53], s[24:25], 8
+; SI-NEXT: s_lshr_b64 s[54:55], s[14:15], 24
+; SI-NEXT: s_lshr_b64 s[64:65], s[14:15], 16
+; SI-NEXT: s_lshr_b64 s[66:67], s[14:15], 8
; SI-NEXT: s_lshr_b64 s[68:69], s[20:21], 24
; SI-NEXT: s_lshr_b64 s[70:71], s[20:21], 16
; SI-NEXT: s_lshr_b64 s[80:81], s[20:21], 8
; SI-NEXT: s_lshr_b32 s23, s76, 8
; SI-NEXT: s_lshr_b32 s21, s62, 8
; SI-NEXT: s_lshr_b32 s18, s56, 8
-; SI-NEXT: s_lshr_b32 s17, s42, 8
+; SI-NEXT: s_lshr_b32 s17, s40, 8
; SI-NEXT: s_lshr_b32 s15, s22, 8
; SI-NEXT: s_lshr_b32 s10, s28, 8
-; SI-NEXT: s_lshr_b32 s9, s14, 8
+; SI-NEXT: s_lshr_b32 s9, s16, 8
; SI-NEXT: s_lshr_b32 s4, s8, 8
; SI-NEXT: v_lshrrev_b32_e32 v48, 24, v1
; SI-NEXT: v_lshrrev_b32_e32 v39, 24, v5
; SI-NEXT: v_lshrrev_b32_e32 v38, 24, v9
-; SI-NEXT: v_lshrrev_b32_e32 v35, 24, v13
-; SI-NEXT: v_lshrrev_b32_e32 v32, 24, v17
-; SI-NEXT: v_lshrrev_b32_e32 v30, 24, v21
-; SI-NEXT: v_lshrrev_b32_e32 v26, 24, v26
+; SI-NEXT: v_lshrrev_b32_e32 v36, 24, v13
+; SI-NEXT: v_lshrrev_b32_e32 v33, 24, v17
+; SI-NEXT: v_lshrrev_b32_e32 v31, 24, v21
+; SI-NEXT: v_lshrrev_b32_e32 v29, 24, v26
; SI-NEXT: v_lshrrev_b32_e32 v25, 24, v25
; SI-NEXT: s_lshr_b64 s[96:97], s[12:13], 24
; SI-NEXT: s_lshr_b64 s[98:99], s[12:13], 16
@@ -87765,13 +87357,13 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshr_b64 s[86:87], s[6:7], 8
; SI-NEXT: .LBB109_3: ; %end
; SI-NEXT: s_and_b32 s7, s74, 0xff
-; SI-NEXT: s_lshl_b32 s13, s92, 8
+; SI-NEXT: s_lshl_b32 s13, s90, 8
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s88, 0xff
; SI-NEXT: v_readlane_b32 s74, v41, 0
-; SI-NEXT: s_lshl_b32 s24, s74, 24
+; SI-NEXT: s_lshl_b32 s25, s74, 24
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_or_b32 s13, s24, s13
+; SI-NEXT: s_or_b32 s13, s25, s13
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: v_mov_b32_e32 v1, s7
@@ -87786,31 +87378,30 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_or_b32_e32 v1, s7, v2
-; SI-NEXT: s_and_b32 s7, s60, 0xff
+; SI-NEXT: s_and_b32 s7, s58, 0xff
; SI-NEXT: s_lshl_b32 s13, s30, 8
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s94, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s23, s90, 24
+; SI-NEXT: s_lshl_b32 s23, s92, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s13, s23, s13
-; SI-NEXT: v_add_i32_e32 v2, vcc, 4, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s62, 0xff
; SI-NEXT: s_lshl_b32 s13, s21, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s59, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s13, s61, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v39
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s13, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
-; SI-NEXT: s_and_b32 s7, s46, 0xff
+; SI-NEXT: s_and_b32 s7, s44, 0xff
; SI-NEXT: s_lshl_b32 s13, s38, 8
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s36, 0xff
@@ -87818,24 +87409,22 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshl_b32 s21, s34, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s13, s21, s13
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s56, 0xff
; SI-NEXT: s_lshl_b32 s13, s18, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s45, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s13, s47, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
; SI-NEXT: s_lshl_b32 s13, s13, 16
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v38
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s13, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
-; SI-NEXT: s_and_b32 s7, s26, 0xff
+; SI-NEXT: s_and_b32 s7, s24, 0xff
; SI-NEXT: s_lshl_b32 s13, s52, 8
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s50, 0xff
@@ -87843,45 +87432,41 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshl_b32 s18, s48, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s13, s18, s13
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 20, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
-; SI-NEXT: s_and_b32 s7, s42, 0xff
-; SI-NEXT: s_lshl_b32 s13, s17, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
+; SI-NEXT: v_mov_b32_e32 v1, s7
+; SI-NEXT: s_and_b32 s7, s40, 0xff
+; SI-NEXT: s_lshl_b32 s13, s17, 8
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s25, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s13, s27, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v35
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v36
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s13, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
-; SI-NEXT: s_and_b32 s7, s16, 0xff
+; SI-NEXT: s_and_b32 s7, s14, 0xff
; SI-NEXT: s_lshl_b32 s13, s66, 8
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s64, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s16, s54, 24
+; SI-NEXT: s_lshl_b32 s14, s54, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s13, s16, s13
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 28, v0
+; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s22, 0xff
; SI-NEXT: s_lshl_b32 s13, s15, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: s_and_b32 s13, s41, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: s_and_b32 s13, s43, 0xff
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v32
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v33
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s13, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -87890,23 +87475,21 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_or_b32 s7, s7, s13
; SI-NEXT: s_and_b32 s13, s70, 0xff
; SI-NEXT: s_lshl_b32 s13, s13, 16
-; SI-NEXT: s_lshl_b32 s15, s68, 24
+; SI-NEXT: s_lshl_b32 s14, s68, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
-; SI-NEXT: s_or_b32 s13, s15, s13
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 36, v0
+; SI-NEXT: s_or_b32 s13, s14, s13
; SI-NEXT: s_or_b32 s7, s7, s13
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: s_and_b32 s7, s28, 0xff
; SI-NEXT: s_lshl_b32 s10, s10, 8
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 40, v0
; SI-NEXT: s_or_b32 s7, s7, s10
; SI-NEXT: s_and_b32 s10, s19, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
; SI-NEXT: s_lshl_b32 s10, s10, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v30
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v31
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s10, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -87918,20 +87501,18 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshl_b32 s12, s96, 24
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: s_or_b32 s10, s12, s10
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 44, v0
; SI-NEXT: s_or_b32 s7, s7, s10
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; SI-NEXT: v_mov_b32_e32 v2, s7
-; SI-NEXT: s_and_b32 s7, s14, 0xff
-; SI-NEXT: s_lshl_b32 s9, s9, 8
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 48, v0
+; SI-NEXT: v_mov_b32_e32 v1, s7
+; SI-NEXT: s_and_b32 s7, s16, 0xff
+; SI-NEXT: s_lshl_b32 s9, s9, 8
; SI-NEXT: s_or_b32 s7, s7, s9
; SI-NEXT: s_and_b32 s9, s11, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
; SI-NEXT: s_lshl_b32 s9, s9, 16
-; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v26
+; SI-NEXT: s_waitcnt expcnt(0)
+; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v29
; SI-NEXT: s_and_b32 s7, s7, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s9, v1
; SI-NEXT: v_or_b32_e32 v1, s7, v1
@@ -87943,27 +87524,24 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_lshl_b32 s9, s82, 24
; SI-NEXT: s_and_b32 s6, s6, 0xffff
; SI-NEXT: s_or_b32 s7, s9, s7
-; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v2, vcc, 52, v0
; SI-NEXT: s_or_b32 s6, s6, s7
-; SI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
; SI-NEXT: s_waitcnt expcnt(0)
-; SI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
-; SI-NEXT: v_mov_b32_e32 v2, s6
+; SI-NEXT: v_mov_b32_e32 v1, s6
; SI-NEXT: s_and_b32 s6, s8, 0xff
; SI-NEXT: s_lshl_b32 s4, s4, 8
; SI-NEXT: s_and_b32 s5, s5, 0xff
-; SI-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; SI-NEXT: s_or_b32 s4, s6, s4
; SI-NEXT: s_lshl_b32 s5, s5, 16
+; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_lshlrev_b32_e32 v1, 24, v25
; SI-NEXT: s_and_b32 s4, s4, 0xffff
; SI-NEXT: v_or_b32_e32 v1, s5, v1
; SI-NEXT: v_or_b32_e32 v1, s4, v1
-; SI-NEXT: v_add_i32_e32 v0, vcc, 60, v0
; SI-NEXT: v_readlane_b32 s30, v40, 34
; SI-NEXT: v_readlane_b32 s75, v41, 1
-; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; SI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; SI-NEXT: v_readlane_b32 s31, v40, 35
; SI-NEXT: v_readlane_b32 s99, v40, 33
; SI-NEXT: v_readlane_b32 s98, v40, 32
@@ -88010,51 +87588,51 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_writelane_b32 v41, s4, 0
; SI-NEXT: ; implicit-def: $sgpr74
-; SI-NEXT: ; implicit-def: $sgpr92
+; SI-NEXT: ; implicit-def: $sgpr90
; SI-NEXT: ; implicit-def: $sgpr88
; SI-NEXT: v_writelane_b32 v41, s5, 1
; SI-NEXT: ; implicit-def: $sgpr76
; SI-NEXT: ; implicit-def: $sgpr23
; SI-NEXT: ; implicit-def: $sgpr73
; SI-NEXT: ; implicit-def: $vgpr48
-; SI-NEXT: ; implicit-def: $sgpr60
+; SI-NEXT: ; implicit-def: $sgpr58
; SI-NEXT: ; implicit-def: $sgpr30
; SI-NEXT: ; implicit-def: $sgpr94
-; SI-NEXT: ; implicit-def: $sgpr90
+; SI-NEXT: ; implicit-def: $sgpr92
; SI-NEXT: ; implicit-def: $sgpr62
; SI-NEXT: ; implicit-def: $sgpr21
-; SI-NEXT: ; implicit-def: $sgpr59
+; SI-NEXT: ; implicit-def: $sgpr61
; SI-NEXT: ; implicit-def: $vgpr39
-; SI-NEXT: ; implicit-def: $sgpr46
+; SI-NEXT: ; implicit-def: $sgpr44
; SI-NEXT: ; implicit-def: $sgpr38
; SI-NEXT: ; implicit-def: $sgpr36
; SI-NEXT: ; implicit-def: $sgpr34
; SI-NEXT: ; implicit-def: $sgpr56
; SI-NEXT: ; implicit-def: $sgpr18
-; SI-NEXT: ; implicit-def: $sgpr45
+; SI-NEXT: ; implicit-def: $sgpr47
; SI-NEXT: ; implicit-def: $vgpr38
-; SI-NEXT: ; implicit-def: $sgpr26
+; SI-NEXT: ; implicit-def: $sgpr24
; SI-NEXT: ; implicit-def: $sgpr52
; SI-NEXT: ; implicit-def: $sgpr50
; SI-NEXT: ; implicit-def: $sgpr48
-; SI-NEXT: ; implicit-def: $sgpr42
+; SI-NEXT: ; implicit-def: $sgpr40
; SI-NEXT: ; implicit-def: $sgpr17
-; SI-NEXT: ; implicit-def: $sgpr25
-; SI-NEXT: ; implicit-def: $vgpr35
-; SI-NEXT: ; implicit-def: $sgpr16
+; SI-NEXT: ; implicit-def: $sgpr27
+; SI-NEXT: ; implicit-def: $vgpr36
+; SI-NEXT: ; implicit-def: $sgpr14
; SI-NEXT: ; implicit-def: $sgpr66
; SI-NEXT: ; implicit-def: $sgpr64
; SI-NEXT: ; implicit-def: $sgpr54
; SI-NEXT: ; implicit-def: $sgpr22
; SI-NEXT: ; implicit-def: $sgpr15
-; SI-NEXT: ; implicit-def: $vgpr32
+; SI-NEXT: ; implicit-def: $vgpr33
; SI-NEXT: ; implicit-def: $sgpr10
-; SI-NEXT: ; implicit-def: $vgpr30
+; SI-NEXT: ; implicit-def: $vgpr31
; SI-NEXT: ; implicit-def: $sgpr9
-; SI-NEXT: ; implicit-def: $vgpr26
+; SI-NEXT: ; implicit-def: $vgpr29
; SI-NEXT: ; implicit-def: $sgpr4
; SI-NEXT: ; implicit-def: $vgpr25
-; SI-NEXT: ; implicit-def: $sgpr41
+; SI-NEXT: ; implicit-def: $sgpr43
; SI-NEXT: ; implicit-def: $sgpr20
; SI-NEXT: ; implicit-def: $sgpr80
; SI-NEXT: ; implicit-def: $sgpr70
@@ -88065,7 +87643,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; SI-NEXT: ; implicit-def: $sgpr78
; SI-NEXT: ; implicit-def: $sgpr98
; SI-NEXT: ; implicit-def: $sgpr96
-; SI-NEXT: ; implicit-def: $sgpr14
+; SI-NEXT: ; implicit-def: $sgpr16
; SI-NEXT: ; implicit-def: $sgpr11
; SI-NEXT: ; implicit-def: $sgpr6
; SI-NEXT: ; implicit-def: $sgpr86
@@ -88173,8 +87751,8 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: s_cbranch_execnz .LBB109_4
; VI-NEXT: .LBB109_2: ; %cmp.true
; VI-NEXT: s_lshl_b32 s6, s17, 16
-; VI-NEXT: v_mov_b32_e32 v24, 0x40c00000
-; VI-NEXT: v_add_f32_e32 v1, s6, v24
+; VI-NEXT: v_mov_b32_e32 v26, 0x40c00000
+; VI-NEXT: v_add_f32_e32 v1, s6, v26
; VI-NEXT: v_bfe_u32 v2, v1, 16, 1
; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v1
; VI-NEXT: v_add_u32_e32 v2, vcc, 0x7fff, v2
@@ -88182,7 +87760,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_cmp_u_f32_e32 vcc, v1, v1
; VI-NEXT: s_and_b32 s6, s17, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
-; VI-NEXT: v_add_f32_e32 v2, s6, v24
+; VI-NEXT: v_add_f32_e32 v2, s6, v26
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -88192,7 +87770,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: v_lshrrev_b64 v[1:2], 16, v[1:2]
; VI-NEXT: s_lshl_b32 s6, s16, 16
-; VI-NEXT: v_add_f32_e32 v2, s6, v24
+; VI-NEXT: v_add_f32_e32 v2, s6, v26
; VI-NEXT: v_bfe_u32 v3, v2, 16, 1
; VI-NEXT: v_add_u32_e32 v3, vcc, v3, v2
; VI-NEXT: v_add_u32_e32 v3, vcc, 0x7fff, v3
@@ -88200,7 +87778,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_cmp_u_f32_e32 vcc, v2, v2
; VI-NEXT: s_and_b32 s6, s16, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc
-; VI-NEXT: v_add_f32_e32 v3, s6, v24
+; VI-NEXT: v_add_f32_e32 v3, s6, v26
; VI-NEXT: v_bfe_u32 v4, v3, 16, 1
; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v3
; VI-NEXT: v_add_u32_e32 v4, vcc, 0x7fff, v4
@@ -88208,7 +87786,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_cmp_u_f32_e32 vcc, v3, v3
; VI-NEXT: s_lshl_b32 s6, s19, 16
; VI-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
-; VI-NEXT: v_add_f32_e32 v4, s6, v24
+; VI-NEXT: v_add_f32_e32 v4, s6, v26
; VI-NEXT: v_bfe_u32 v5, v4, 16, 1
; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v4
; VI-NEXT: v_add_u32_e32 v5, vcc, 0x7fff, v5
@@ -88216,7 +87794,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_cmp_u_f32_e32 vcc, v4, v4
; VI-NEXT: s_and_b32 s6, s19, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v4, v5, v6, vcc
-; VI-NEXT: v_add_f32_e32 v5, s6, v24
+; VI-NEXT: v_add_f32_e32 v5, s6, v26
; VI-NEXT: v_bfe_u32 v6, v5, 16, 1
; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6
@@ -88226,7 +87804,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; VI-NEXT: v_lshrrev_b64 v[4:5], 16, v[4:5]
; VI-NEXT: s_lshl_b32 s6, s18, 16
-; VI-NEXT: v_add_f32_e32 v5, s6, v24
+; VI-NEXT: v_add_f32_e32 v5, s6, v26
; VI-NEXT: v_bfe_u32 v6, v5, 16, 1
; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5
; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6
@@ -88234,288 +87812,288 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: s_and_b32 s6, s18, 0xffff0000
; VI-NEXT: v_cndmask_b32_e32 v5, v6, v7, vcc
-; VI-NEXT: v_add_f32_e32 v6, s6, v24
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
; VI-NEXT: v_bfe_u32 v7, v6, 16, 1
; VI-NEXT: v_add_u32_e32 v7, vcc, v7, v6
; VI-NEXT: v_add_u32_e32 v7, vcc, 0x7fff, v7
; VI-NEXT: v_or_b32_e32 v8, 0x400000, v6
; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
-; VI-NEXT: s_lshl_b32 s6, s21, 16
; VI-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc
-; VI-NEXT: v_add_f32_e32 v7, s6, v24
-; VI-NEXT: v_bfe_u32 v8, v7, 16, 1
-; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v7
-; VI-NEXT: v_add_u32_e32 v8, vcc, 0x7fff, v8
-; VI-NEXT: v_or_b32_e32 v9, 0x400000, v7
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v7, v7
+; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; VI-NEXT: s_lshl_b32 s6, s21, 16
+; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[5:6]
+; VI-NEXT: v_add_f32_e32 v5, s6, v26
+; VI-NEXT: v_bfe_u32 v6, v5, 16, 1
+; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5
+; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6
+; VI-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: s_and_b32 s6, s21, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v7, v8, v9, vcc
-; VI-NEXT: v_add_f32_e32 v8, s6, v24
-; VI-NEXT: v_bfe_u32 v9, v8, 16, 1
-; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8
+; VI-NEXT: v_cndmask_b32_e32 v5, v6, v9, vcc
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v9, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v6
; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
-; VI-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v8
-; VI-NEXT: v_lshrrev_b64 v[7:8], 16, v[7:8]
+; VI-NEXT: v_or_b32_e32 v10, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v9, v10, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; VI-NEXT: s_lshl_b32 s6, s20, 16
-; VI-NEXT: v_add_f32_e32 v8, s6, v24
-; VI-NEXT: v_bfe_u32 v9, v8, 16, 1
-; VI-NEXT: v_add_u32_e32 v9, vcc, v9, v8
-; VI-NEXT: v_add_u32_e32 v9, vcc, 0x7fff, v9
-; VI-NEXT: v_or_b32_e32 v10, 0x400000, v8
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v8, v8
+; VI-NEXT: v_lshrrev_b64 v[9:10], 16, v[5:6]
+; VI-NEXT: v_add_f32_e32 v5, s6, v26
+; VI-NEXT: v_bfe_u32 v6, v5, 16, 1
+; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5
+; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6
+; VI-NEXT: v_or_b32_e32 v10, 0x400000, v5
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: s_and_b32 s6, s20, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v8, v9, v10, vcc
-; VI-NEXT: v_add_f32_e32 v9, s6, v24
-; VI-NEXT: v_bfe_u32 v10, v9, 16, 1
-; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v9
+; VI-NEXT: v_cndmask_b32_e32 v5, v6, v10, vcc
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v10, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v6
; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10
-; VI-NEXT: v_or_b32_e32 v11, 0x400000, v9
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v9, v9
+; VI-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v10, v11, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; VI-NEXT: s_lshl_b32 s6, s23, 16
-; VI-NEXT: v_cndmask_b32_e32 v9, v10, v11, vcc
-; VI-NEXT: v_add_f32_e32 v10, s6, v24
-; VI-NEXT: v_bfe_u32 v11, v10, 16, 1
-; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v10
-; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
-; VI-NEXT: v_or_b32_e32 v12, 0x400000, v10
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v10, v10
+; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[5:6]
+; VI-NEXT: v_add_f32_e32 v5, s6, v26
+; VI-NEXT: v_bfe_u32 v6, v5, 16, 1
+; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v5
+; VI-NEXT: v_add_u32_e32 v6, vcc, 0x7fff, v6
+; VI-NEXT: v_or_b32_e32 v10, 0x400000, v5
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v5, v5
; VI-NEXT: s_and_b32 s6, s23, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v10, v11, v12, vcc
-; VI-NEXT: v_add_f32_e32 v11, s6, v24
-; VI-NEXT: v_bfe_u32 v12, v11, 16, 1
-; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11
-; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12
-; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
-; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v11
-; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[10:11]
+; VI-NEXT: v_cndmask_b32_e32 v5, v6, v10, vcc
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v10, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v6
+; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10
+; VI-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v10, v11, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[5:6]
; VI-NEXT: s_lshl_b32 s6, s22, 16
-; VI-NEXT: v_add_f32_e32 v11, s6, v24
-; VI-NEXT: v_bfe_u32 v12, v11, 16, 1
-; VI-NEXT: v_add_u32_e32 v12, vcc, v12, v11
-; VI-NEXT: v_add_u32_e32 v12, vcc, 0x7fff, v12
-; VI-NEXT: v_or_b32_e32 v13, 0x400000, v11
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v11, v11
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v10, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v6
+; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10
; VI-NEXT: s_and_b32 s6, s22, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v11, v12, v13, vcc
-; VI-NEXT: v_add_f32_e32 v12, s6, v24
-; VI-NEXT: v_bfe_u32 v13, v12, 16, 1
-; VI-NEXT: v_add_u32_e32 v13, vcc, v13, v12
-; VI-NEXT: v_add_u32_e32 v13, vcc, 0x7fff, v13
-; VI-NEXT: v_or_b32_e32 v14, 0x400000, v12
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v12, v12
+; VI-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v12, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v12, vcc
; VI-NEXT: s_lshl_b32 s6, s25, 16
-; VI-NEXT: v_cndmask_b32_e32 v12, v13, v14, vcc
-; VI-NEXT: v_add_f32_e32 v13, s6, v24
-; VI-NEXT: v_bfe_u32 v14, v13, 16, 1
-; VI-NEXT: v_add_u32_e32 v14, vcc, v14, v13
-; VI-NEXT: v_add_u32_e32 v14, vcc, 0x7fff, v14
-; VI-NEXT: v_or_b32_e32 v15, 0x400000, v13
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v13, v13
+; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_lshrrev_b64 v[12:13], 16, v[10:11]
+; VI-NEXT: v_bfe_u32 v10, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v10, vcc, v10, v6
+; VI-NEXT: v_add_u32_e32 v10, vcc, 0x7fff, v10
; VI-NEXT: s_and_b32 s6, s25, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v13, v14, v15, vcc
-; VI-NEXT: v_add_f32_e32 v14, s6, v24
-; VI-NEXT: v_bfe_u32 v15, v14, 16, 1
-; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
-; VI-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v14
-; VI-NEXT: v_lshrrev_b64 v[13:14], 16, v[13:14]
+; VI-NEXT: v_or_b32_e32 v11, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v10, v10, v11, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v16, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v16, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v6
; VI-NEXT: s_lshl_b32 s6, s24, 16
-; VI-NEXT: v_add_f32_e32 v14, s6, v24
-; VI-NEXT: v_bfe_u32 v15, v14, 16, 1
-; VI-NEXT: v_add_u32_e32 v15, vcc, v15, v14
-; VI-NEXT: v_add_u32_e32 v15, vcc, 0x7fff, v15
-; VI-NEXT: v_or_b32_e32 v16, 0x400000, v14
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v14, v14
+; VI-NEXT: v_lshrrev_b64 v[10:11], 16, v[10:11]
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s6, s24, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc
-; VI-NEXT: v_add_f32_e32 v15, s6, v24
-; VI-NEXT: v_bfe_u32 v16, v15, 16, 1
-; VI-NEXT: v_add_u32_e32 v16, vcc, v16, v15
-; VI-NEXT: v_add_u32_e32 v16, vcc, 0x7fff, v16
-; VI-NEXT: v_or_b32_e32 v17, 0x400000, v15
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v15, v15
+; VI-NEXT: v_or_b32_e32 v16, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v16, v11, v16, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v17, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v17, vcc
; VI-NEXT: s_lshl_b32 s6, s27, 16
-; VI-NEXT: v_cndmask_b32_e32 v15, v16, v17, vcc
-; VI-NEXT: v_add_f32_e32 v16, s6, v24
-; VI-NEXT: v_bfe_u32 v17, v16, 16, 1
-; VI-NEXT: v_add_u32_e32 v17, vcc, v17, v16
-; VI-NEXT: v_add_u32_e32 v17, vcc, 0x7fff, v17
-; VI-NEXT: v_or_b32_e32 v18, 0x400000, v16
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s6, s27, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v16, v17, v18, vcc
-; VI-NEXT: v_add_f32_e32 v17, s6, v24
-; VI-NEXT: v_bfe_u32 v18, v17, 16, 1
-; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
-; VI-NEXT: v_or_b32_e32 v19, 0x400000, v17
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
-; VI-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v17
-; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17]
+; VI-NEXT: v_or_b32_e32 v18, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v18, v11, v18, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v19, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v19, vcc
; VI-NEXT: s_lshl_b32 s6, s26, 16
-; VI-NEXT: v_add_f32_e32 v17, s6, v24
-; VI-NEXT: v_bfe_u32 v18, v17, 16, 1
-; VI-NEXT: v_add_u32_e32 v18, vcc, v18, v17
-; VI-NEXT: v_add_u32_e32 v18, vcc, 0x7fff, v18
-; VI-NEXT: v_or_b32_e32 v19, 0x400000, v17
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v17, v17
+; VI-NEXT: v_lshrrev_b32_e32 v19, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_lshrrev_b64 v[18:19], 16, v[18:19]
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s6, s26, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v17, v18, v19, vcc
-; VI-NEXT: v_add_f32_e32 v18, s6, v24
-; VI-NEXT: v_bfe_u32 v19, v18, 16, 1
-; VI-NEXT: v_add_u32_e32 v19, vcc, v19, v18
-; VI-NEXT: v_add_u32_e32 v19, vcc, 0x7fff, v19
-; VI-NEXT: v_or_b32_e32 v20, 0x400000, v18
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v18, v18
+; VI-NEXT: v_or_b32_e32 v19, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v19, v11, v19, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v20, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v20, vcc
; VI-NEXT: s_lshl_b32 s6, s29, 16
-; VI-NEXT: v_cndmask_b32_e32 v18, v19, v20, vcc
-; VI-NEXT: v_add_f32_e32 v19, s6, v24
-; VI-NEXT: v_bfe_u32 v20, v19, 16, 1
-; VI-NEXT: v_add_u32_e32 v20, vcc, v20, v19
-; VI-NEXT: v_add_u32_e32 v20, vcc, 0x7fff, v20
-; VI-NEXT: v_or_b32_e32 v21, 0x400000, v19
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v19, v19
+; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s6, s29, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v19, v20, v21, vcc
-; VI-NEXT: v_add_f32_e32 v20, s6, v24
-; VI-NEXT: v_bfe_u32 v21, v20, 16, 1
-; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v20
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
-; VI-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
-; VI-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v20
-; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[19:20]
+; VI-NEXT: v_or_b32_e32 v21, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v21, v11, v21, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v22, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v22, vcc
; VI-NEXT: s_lshl_b32 s6, s28, 16
-; VI-NEXT: v_add_f32_e32 v20, s6, v24
-; VI-NEXT: v_bfe_u32 v21, v20, 16, 1
-; VI-NEXT: v_add_u32_e32 v21, vcc, v21, v20
-; VI-NEXT: v_add_u32_e32 v21, vcc, 0x7fff, v21
-; VI-NEXT: v_or_b32_e32 v22, 0x400000, v20
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v20, v20
+; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_lshrrev_b64 v[21:22], 16, v[21:22]
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s6, s28, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v20, v21, v22, vcc
-; VI-NEXT: v_add_f32_e32 v21, s6, v24
-; VI-NEXT: v_bfe_u32 v22, v21, 16, 1
-; VI-NEXT: v_add_u32_e32 v22, vcc, v22, v21
-; VI-NEXT: v_add_u32_e32 v22, vcc, 0x7fff, v22
-; VI-NEXT: v_or_b32_e32 v23, 0x400000, v21
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v21, v21
+; VI-NEXT: v_or_b32_e32 v22, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_cndmask_b32_e32 v22, v11, v22, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v23, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v23, vcc
; VI-NEXT: s_lshl_b32 s6, s5, 16
-; VI-NEXT: v_cndmask_b32_e32 v21, v22, v23, vcc
-; VI-NEXT: v_add_f32_e32 v22, s6, v24
-; VI-NEXT: v_bfe_u32 v23, v22, 16, 1
-; VI-NEXT: v_add_u32_e32 v23, vcc, v23, v22
-; VI-NEXT: v_add_u32_e32 v23, vcc, 0x7fff, v23
-; VI-NEXT: v_or_b32_e32 v25, 0x400000, v22
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v22, v22
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s6, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s5, s5, 0xffff0000
-; VI-NEXT: v_cndmask_b32_e32 v22, v23, v25, vcc
-; VI-NEXT: v_add_f32_e32 v23, s5, v24
-; VI-NEXT: v_bfe_u32 v25, v23, 16, 1
-; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
-; VI-NEXT: v_or_b32_e32 v26, 0x400000, v23
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; VI-NEXT: v_cndmask_b32_e32 v23, v25, v26, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v23
-; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[22:23]
+; VI-NEXT: v_or_b32_e32 v24, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s5, v26
+; VI-NEXT: v_cndmask_b32_e32 v24, v11, v24, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v25, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v25, vcc
; VI-NEXT: s_lshl_b32 s5, s4, 16
-; VI-NEXT: v_add_f32_e32 v23, s5, v24
-; VI-NEXT: v_bfe_u32 v25, v23, 16, 1
-; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v23
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
+; VI-NEXT: v_lshrrev_b32_e32 v25, 16, v6
+; VI-NEXT: v_add_f32_e32 v6, s5, v26
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_lshrrev_b64 v[24:25], 16, v[24:25]
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
; VI-NEXT: s_and_b32 s4, s4, 0xffff0000
-; VI-NEXT: v_or_b32_e32 v26, 0x400000, v23
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v23, v23
-; VI-NEXT: v_add_f32_e32 v24, s4, v24
-; VI-NEXT: v_cndmask_b32_e32 v23, v25, v26, vcc
-; VI-NEXT: v_bfe_u32 v25, v24, 16, 1
-; VI-NEXT: v_add_u32_e32 v25, vcc, v25, v24
-; VI-NEXT: v_add_u32_e32 v25, vcc, 0x7fff, v25
-; VI-NEXT: v_or_b32_e32 v26, 0x400000, v24
-; VI-NEXT: v_cmp_u_f32_e32 vcc, v24, v24
-; VI-NEXT: v_cndmask_b32_e32 v24, v25, v26, vcc
-; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v24
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v21
-; VI-NEXT: v_lshrrev_b64 v[23:24], 16, v[23:24]
-; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v18
-; VI-NEXT: v_lshrrev_b64 v[20:21], 16, v[20:21]
-; VI-NEXT: v_mov_b32_e32 v24, v22
-; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v15
-; VI-NEXT: v_lshrrev_b64 v[17:18], 16, v[17:18]
-; VI-NEXT: v_mov_b32_e32 v21, v19
-; VI-NEXT: v_lshrrev_b64 v[24:25], 24, v[23:24]
-; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v12
-; VI-NEXT: v_lshrrev_b64 v[14:15], 16, v[14:15]
-; VI-NEXT: v_mov_b32_e32 v18, v16
-; VI-NEXT: v_lshrrev_b64 v[25:26], 24, v[20:21]
-; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v9
-; VI-NEXT: v_lshrrev_b64 v[11:12], 16, v[11:12]
-; VI-NEXT: v_mov_b32_e32 v15, v13
-; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[17:18]
-; VI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
-; VI-NEXT: v_lshrrev_b64 v[8:9], 16, v[8:9]
-; VI-NEXT: v_mov_b32_e32 v12, v10
-; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[14:15]
+; VI-NEXT: v_or_b32_e32 v25, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_add_f32_e32 v6, s4, v26
+; VI-NEXT: v_cndmask_b32_e32 v25, v11, v25, vcc
+; VI-NEXT: v_bfe_u32 v11, v6, 16, 1
+; VI-NEXT: v_add_u32_e32 v11, vcc, v11, v6
+; VI-NEXT: v_add_u32_e32 v11, vcc, 0x7fff, v11
+; VI-NEXT: v_or_b32_e32 v26, 0x400000, v6
+; VI-NEXT: v_cmp_u_f32_e32 vcc, v6, v6
+; VI-NEXT: v_cndmask_b32_e32 v6, v11, v26, vcc
+; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v6
+; VI-NEXT: v_lshrrev_b64 v[25:26], 16, v[25:26]
+; VI-NEXT: v_lshrrev_b64 v[22:23], 16, v[22:23]
+; VI-NEXT: v_mov_b32_e32 v26, v24
+; VI-NEXT: v_lshrrev_b64 v[19:20], 16, v[19:20]
+; VI-NEXT: v_mov_b32_e32 v23, v21
+; VI-NEXT: v_lshrrev_b64 v[26:27], 24, v[25:26]
+; VI-NEXT: v_lshrrev_b64 v[16:17], 16, v[16:17]
+; VI-NEXT: v_mov_b32_e32 v20, v18
+; VI-NEXT: v_lshrrev_b64 v[27:28], 24, v[22:23]
+; VI-NEXT: v_mov_b32_e32 v17, v10
+; VI-NEXT: v_lshrrev_b64 v[28:29], 24, v[19:20]
+; VI-NEXT: v_mov_b32_e32 v13, v5
+; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[16:17]
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
-; VI-NEXT: v_lshrrev_b64 v[5:6], 16, v[5:6]
-; VI-NEXT: v_mov_b32_e32 v9, v7
-; VI-NEXT: v_lshrrev_b64 v[28:29], 24, v[11:12]
+; VI-NEXT: v_mov_b32_e32 v15, v9
+; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[12:13]
; VI-NEXT: v_lshrrev_b64 v[2:3], 16, v[2:3]
-; VI-NEXT: v_mov_b32_e32 v6, v4
-; VI-NEXT: v_lshrrev_b64 v[29:30], 24, v[8:9]
+; VI-NEXT: v_mov_b32_e32 v8, v4
+; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[14:15]
; VI-NEXT: v_mov_b32_e32 v3, v1
-; VI-NEXT: v_lshrrev_b64 v[30:31], 24, v[5:6]
-; VI-NEXT: v_lshrrev_b64 v[31:32], 24, v[2:3]
-; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v22
+; VI-NEXT: v_lshrrev_b64 v[32:33], 24, v[7:8]
+; VI-NEXT: v_lshrrev_b64 v[33:34], 24, v[2:3]
+; VI-NEXT: v_lshrrev_b32_e32 v3, 24, v24
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v24
; VI-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_lshrrev_b32_e32 v9, 8, v22
-; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v23
-; VI-NEXT: v_lshrrev_b32_e32 v15, 8, v23
-; VI-NEXT: v_lshrrev_b32_e32 v18, 24, v19
-; VI-NEXT: v_lshrrev_b32_e32 v21, 16, v19
-; VI-NEXT: v_lshrrev_b32_e32 v32, 8, v19
-; VI-NEXT: v_lshrrev_b32_e32 v33, 16, v20
-; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v20
-; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v16
-; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v16
-; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v16
-; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v17
-; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v17
-; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v13
-; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v13
-; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v13
-; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v14
-; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v14
-; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v10
-; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v10
-; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v10
-; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v11
-; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v11
-; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v7
-; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v7
-; VI-NEXT: v_lshrrev_b32_e32 v44, 8, v7
-; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v8
-; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v8
-; VI-NEXT: v_lshrrev_b32_e32 v47, 24, v4
-; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v4
-; VI-NEXT: v_lshrrev_b32_e32 v57, 8, v4
-; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v5
-; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v5
-; VI-NEXT: v_lshrrev_b32_e32 v60, 24, v1
-; VI-NEXT: v_lshrrev_b32_e32 v61, 16, v1
+; VI-NEXT: v_lshrrev_b32_e32 v8, 8, v24
+; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v25
+; VI-NEXT: v_lshrrev_b32_e32 v13, 8, v25
+; VI-NEXT: v_lshrrev_b32_e32 v15, 24, v21
+; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v21
+; VI-NEXT: v_lshrrev_b32_e32 v20, 8, v21
+; VI-NEXT: v_lshrrev_b32_e32 v23, 16, v22
+; VI-NEXT: v_lshrrev_b32_e32 v34, 8, v22
+; VI-NEXT: v_lshrrev_b32_e32 v35, 24, v18
+; VI-NEXT: v_lshrrev_b32_e32 v36, 16, v18
+; VI-NEXT: v_lshrrev_b32_e32 v37, 8, v18
+; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v19
+; VI-NEXT: v_lshrrev_b32_e32 v39, 8, v19
+; VI-NEXT: v_lshrrev_b32_e32 v48, 24, v10
+; VI-NEXT: v_lshrrev_b32_e32 v49, 16, v10
+; VI-NEXT: v_lshrrev_b32_e32 v50, 8, v10
+; VI-NEXT: v_lshrrev_b32_e32 v51, 16, v16
+; VI-NEXT: v_lshrrev_b32_e32 v52, 8, v16
+; VI-NEXT: v_lshrrev_b32_e32 v53, 24, v5
+; VI-NEXT: v_lshrrev_b32_e32 v54, 16, v5
+; VI-NEXT: v_lshrrev_b32_e32 v55, 8, v5
+; VI-NEXT: v_lshrrev_b32_e32 v40, 16, v12
+; VI-NEXT: v_lshrrev_b32_e32 v41, 8, v12
+; VI-NEXT: v_lshrrev_b32_e32 v42, 24, v9
+; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v9
+; VI-NEXT: v_lshrrev_b32_e32 v46, 8, v9
+; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v14
+; VI-NEXT: v_lshrrev_b32_e32 v56, 8, v14
+; VI-NEXT: v_lshrrev_b32_e32 v44, 24, v4
+; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v4
+; VI-NEXT: v_lshrrev_b32_e32 v59, 8, v4
+; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v7
+; VI-NEXT: v_lshrrev_b32_e32 v61, 8, v7
+; VI-NEXT: v_lshrrev_b32_e32 v57, 24, v1
+; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v1
; VI-NEXT: v_lshrrev_b32_e32 v62, 8, v1
; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; VI-NEXT: v_lshrrev_b32_e32 v6, 8, v2
@@ -88574,15 +88152,15 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_mov_b32_e32 v1, s65
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT: v_mov_b32_e32 v1, s64
-; VI-NEXT: v_mov_b32_e32 v12, s67
-; VI-NEXT: v_mov_b32_e32 v15, s66
+; VI-NEXT: v_mov_b32_e32 v11, s67
+; VI-NEXT: v_mov_b32_e32 v13, s66
; VI-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
-; VI-NEXT: v_mov_b32_e32 v9, s55
-; VI-NEXT: v_mov_b32_e32 v33, s54
+; VI-NEXT: v_mov_b32_e32 v8, s55
+; VI-NEXT: v_mov_b32_e32 v23, s54
; VI-NEXT: v_mov_b32_e32 v34, s53
-; VI-NEXT: v_mov_b32_e32 v18, s52
-; VI-NEXT: v_mov_b32_e32 v21, s51
-; VI-NEXT: v_mov_b32_e32 v32, s50
+; VI-NEXT: v_mov_b32_e32 v15, s52
+; VI-NEXT: v_mov_b32_e32 v17, s51
+; VI-NEXT: v_mov_b32_e32 v20, s50
; VI-NEXT: v_mov_b32_e32 v38, s49
; VI-NEXT: v_mov_b32_e32 v39, s48
; VI-NEXT: v_mov_b32_e32 v35, s39
@@ -88598,140 +88176,125 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_mov_b32_e32 v53, s89
; VI-NEXT: v_mov_b32_e32 v54, s88
; VI-NEXT: v_mov_b32_e32 v55, s79
-; VI-NEXT: v_mov_b32_e32 v45, s78
-; VI-NEXT: v_mov_b32_e32 v46, s77
+; VI-NEXT: v_mov_b32_e32 v47, s78
+; VI-NEXT: v_mov_b32_e32 v56, s77
; VI-NEXT: v_mov_b32_e32 v42, s76
; VI-NEXT: v_mov_b32_e32 v43, s75
-; VI-NEXT: v_mov_b32_e32 v44, s74
-; VI-NEXT: v_mov_b32_e32 v58, s73
-; VI-NEXT: v_mov_b32_e32 v59, s72
-; VI-NEXT: v_mov_b32_e32 v47, s63
-; VI-NEXT: v_mov_b32_e32 v56, s62
-; VI-NEXT: v_mov_b32_e32 v57, s61
+; VI-NEXT: v_mov_b32_e32 v46, s74
+; VI-NEXT: v_mov_b32_e32 v60, s73
+; VI-NEXT: v_mov_b32_e32 v61, s72
+; VI-NEXT: v_mov_b32_e32 v44, s63
+; VI-NEXT: v_mov_b32_e32 v45, s62
+; VI-NEXT: v_mov_b32_e32 v59, s61
; VI-NEXT: v_mov_b32_e32 v3, s60
; VI-NEXT: v_mov_b32_e32 v6, s59
-; VI-NEXT: v_mov_b32_e32 v60, s58
-; VI-NEXT: v_mov_b32_e32 v61, s57
+; VI-NEXT: v_mov_b32_e32 v57, s58
+; VI-NEXT: v_mov_b32_e32 v58, s57
; VI-NEXT: v_mov_b32_e32 v62, s56
-; VI-NEXT: v_mov_b32_e32 v23, s4
-; VI-NEXT: v_mov_b32_e32 v22, s5
-; VI-NEXT: v_mov_b32_e32 v20, s28
-; VI-NEXT: v_mov_b32_e32 v19, s29
-; VI-NEXT: v_mov_b32_e32 v17, s26
-; VI-NEXT: v_mov_b32_e32 v16, s27
-; VI-NEXT: v_mov_b32_e32 v14, s24
-; VI-NEXT: v_mov_b32_e32 v13, s25
-; VI-NEXT: v_mov_b32_e32 v11, s22
-; VI-NEXT: v_mov_b32_e32 v10, s23
-; VI-NEXT: v_mov_b32_e32 v8, s20
-; VI-NEXT: v_mov_b32_e32 v7, s21
-; VI-NEXT: v_mov_b32_e32 v5, s18
+; VI-NEXT: v_mov_b32_e32 v25, s4
+; VI-NEXT: v_mov_b32_e32 v24, s5
+; VI-NEXT: v_mov_b32_e32 v22, s28
+; VI-NEXT: v_mov_b32_e32 v21, s29
+; VI-NEXT: v_mov_b32_e32 v19, s26
+; VI-NEXT: v_mov_b32_e32 v18, s27
+; VI-NEXT: v_mov_b32_e32 v16, s24
+; VI-NEXT: v_mov_b32_e32 v10, s25
+; VI-NEXT: v_mov_b32_e32 v12, s22
+; VI-NEXT: v_mov_b32_e32 v5, s23
+; VI-NEXT: v_mov_b32_e32 v14, s20
+; VI-NEXT: v_mov_b32_e32 v9, s21
+; VI-NEXT: v_mov_b32_e32 v7, s18
; VI-NEXT: v_mov_b32_e32 v4, s19
; VI-NEXT: v_mov_b32_e32 v2, s16
; VI-NEXT: v_mov_b32_e32 v1, s17
-; VI-NEXT: v_mov_b32_e32 v24, s44
-; VI-NEXT: v_mov_b32_e32 v25, s42
-; VI-NEXT: v_mov_b32_e32 v26, s40
-; VI-NEXT: v_mov_b32_e32 v27, s14
-; VI-NEXT: v_mov_b32_e32 v28, s12
-; VI-NEXT: v_mov_b32_e32 v29, s10
-; VI-NEXT: v_mov_b32_e32 v30, s8
-; VI-NEXT: v_mov_b32_e32 v31, s6
+; VI-NEXT: v_mov_b32_e32 v26, s44
+; VI-NEXT: v_mov_b32_e32 v27, s42
+; VI-NEXT: v_mov_b32_e32 v28, s40
+; VI-NEXT: v_mov_b32_e32 v29, s14
+; VI-NEXT: v_mov_b32_e32 v30, s12
+; VI-NEXT: v_mov_b32_e32 v31, s10
+; VI-NEXT: v_mov_b32_e32 v32, s8
+; VI-NEXT: v_mov_b32_e32 v33, s6
; VI-NEXT: .LBB109_5: ; %end
; VI-NEXT: s_mov_b32 s4, 0xc0c0004
-; VI-NEXT: v_perm_b32 v3, v3, v31, s4
+; VI-NEXT: v_perm_b32 v3, v3, v33, s4
; VI-NEXT: v_perm_b32 v2, v2, v6, s4
; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; VI-NEXT: v_or_b32_e32 v2, v2, v3
; VI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v61, v60, s4
+; VI-NEXT: v_perm_b32 v2, v58, v57, s4
; VI-NEXT: v_perm_b32 v1, v1, v62, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; VI-NEXT: v_perm_b32 v6, v7, v61, s4
+; VI-NEXT: v_perm_b32 v7, v60, v32, s4
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v58, v30, s4
-; VI-NEXT: v_perm_b32 v1, v5, v59, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v56, v47, s4
-; VI-NEXT: v_perm_b32 v1, v4, v57, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v45, v29, s4
-; VI-NEXT: v_perm_b32 v1, v8, v46, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v43, v42, s4
-; VI-NEXT: v_perm_b32 v1, v7, v44, s4
-; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v40, v28, s4
-; VI-NEXT: v_perm_b32 v1, v11, v41, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v7
+; VI-NEXT: v_or_b32_e32 v1, v6, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; VI-NEXT: v_perm_b32 v1, v45, v44, s4
+; VI-NEXT: v_perm_b32 v4, v4, v59, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_perm_b32 v31, v47, v31, s4
+; VI-NEXT: v_or_b32_e32 v1, v4, v1
+; VI-NEXT: v_perm_b32 v14, v14, v56, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:12
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v31
+; VI-NEXT: v_or_b32_e32 v1, v14, v1
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:16
+; VI-NEXT: v_perm_b32 v1, v43, v42, s4
+; VI-NEXT: v_perm_b32 v9, v9, v46, s4
+; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; VI-NEXT: v_or_b32_e32 v1, v9, v1
+; VI-NEXT: v_perm_b32 v2, v40, v30, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:20
+; VI-NEXT: v_perm_b32 v1, v12, v41, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v54, v53, s4
-; VI-NEXT: v_perm_b32 v1, v10, v55, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:24
+; VI-NEXT: v_perm_b32 v1, v5, v55, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v51, v27, s4
-; VI-NEXT: v_perm_b32 v1, v14, v52, s4
+; VI-NEXT: v_perm_b32 v2, v51, v29, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:28
+; VI-NEXT: v_perm_b32 v1, v16, v52, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v49, v48, s4
-; VI-NEXT: v_perm_b32 v1, v13, v50, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:32
+; VI-NEXT: v_perm_b32 v1, v10, v50, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v38, v26, s4
-; VI-NEXT: v_perm_b32 v1, v17, v39, s4
+; VI-NEXT: v_perm_b32 v2, v38, v28, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:36
+; VI-NEXT: v_perm_b32 v1, v19, v39, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
; VI-NEXT: v_perm_b32 v2, v36, v35, s4
-; VI-NEXT: v_perm_b32 v1, v16, v37, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:40
+; VI-NEXT: v_perm_b32 v1, v18, v37, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v33, v25, s4
-; VI-NEXT: v_perm_b32 v1, v20, v34, s4
+; VI-NEXT: v_perm_b32 v2, v23, v27, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:44
+; VI-NEXT: v_perm_b32 v1, v22, v34, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v21, v18, s4
-; VI-NEXT: v_perm_b32 v1, v19, v32, s4
+; VI-NEXT: v_perm_b32 v2, v17, v15, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; VI-NEXT: v_perm_b32 v1, v21, v20, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; VI-NEXT: v_perm_b32 v2, v12, v24, s4
-; VI-NEXT: v_perm_b32 v1, v23, v15, s4
+; VI-NEXT: v_perm_b32 v2, v11, v26, s4
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:52
+; VI-NEXT: v_perm_b32 v1, v25, v13, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; VI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:56
; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
-; VI-NEXT: v_perm_b32 v1, v22, v9, s4
-; VI-NEXT: v_add_u32_e32 v0, vcc, 60, v0
+; VI-NEXT: v_perm_b32 v1, v24, v8, s4
; VI-NEXT: v_readlane_b32 s30, v63, 18
; VI-NEXT: v_readlane_b32 s31, v63, 19
; VI-NEXT: v_readlane_b32 s67, v63, 17
@@ -88756,7 +88319,7 @@ define inreg <64 x i8> @bitcast_v32bf16_to_v64i8_scalar(<32 x bfloat> inreg %a,
; VI-NEXT: v_perm_b32 v2, v3, v2, s4
; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; VI-NEXT: v_or_b32_e32 v1, v1, v2
-; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; VI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:60
; VI-NEXT: buffer_load_dword v62, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v61, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
diff --git a/llvm/test/CodeGen/AMDGPU/bf16.ll b/llvm/test/CodeGen/AMDGPU/bf16.ll
index 15b98bb8acc90..ae993f22660fe 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16.ll
@@ -5145,246 +5145,130 @@ define { <32 x i32>, bfloat } @test_overflow_stack(bfloat %a, <32 x i32> %b) #0
; GCN-LABEL: test_overflow_stack:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:8
-; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x7c, v0
-; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
-; GCN-NEXT: buffer_load_dword v33, off, s[0:3], s32
-; GCN-NEXT: s_waitcnt vmcnt(3)
-; GCN-NEXT: buffer_store_dword v31, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x78, v0
-; GCN-NEXT: s_waitcnt vmcnt(2)
-; GCN-NEXT: buffer_store_dword v32, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x74, v0
-; GCN-NEXT: s_waitcnt vmcnt(2)
-; GCN-NEXT: buffer_store_dword v33, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; GCN-NEXT: s_waitcnt expcnt(2)
-; GCN-NEXT: v_add_i32_e32 v31, vcc, 0x6c, v0
-; GCN-NEXT: buffer_store_dword v30, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 0x64, v0
-; GCN-NEXT: buffer_store_dword v29, v31, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0x60, v0
-; GCN-NEXT: v_add_i32_e32 v31, vcc, 0x5c, v0
-; GCN-NEXT: buffer_store_dword v28, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0x54, v0
-; GCN-NEXT: buffer_store_dword v27, v30, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0x50, v0
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 0x4c, v0
-; GCN-NEXT: buffer_store_dword v26, v29, s[0:3], 0 offen
+; GCN-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:112
+; GCN-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:108
+; GCN-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:104
+; GCN-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:100
+; GCN-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:96
+; GCN-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:92
+; GCN-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:88
+; GCN-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:84
+; GCN-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:80
+; GCN-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:76
+; GCN-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:72
+; GCN-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:68
+; GCN-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:64
+; GCN-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; GCN-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
+; GCN-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:52
+; GCN-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:48
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0x48, v0
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0x44, v0
-; GCN-NEXT: buffer_store_dword v25, v31, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 64, v0
-; GCN-NEXT: v_add_i32_e32 v31, vcc, 60, v0
-; GCN-NEXT: buffer_store_dword v24, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v24, vcc, 52, v0
-; GCN-NEXT: buffer_store_dword v23, v28, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v23, vcc, 48, v0
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 44, v0
-; GCN-NEXT: buffer_store_dword v22, v27, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v22, vcc, 40, v0
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 36, v0
-; GCN-NEXT: buffer_store_dword v21, v30, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v21, vcc, 32, v0
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 28, v0
-; GCN-NEXT: buffer_store_dword v20, v26, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v20, vcc, 24, v0
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 20, v0
-; GCN-NEXT: buffer_store_dword v19, v29, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v19, vcc, 16, v0
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 12, v0
-; GCN-NEXT: buffer_store_dword v18, v25, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v18, vcc, 8, v0
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 4, v0
-; GCN-NEXT: v_add_i32_e32 v0, vcc, 0x80, v0
-; GCN-NEXT: buffer_store_dword v17, v31, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v16, v2, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v15, v24, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v14, v23, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v13, v28, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v12, v22, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v11, v27, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v10, v21, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v9, v30, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v8, v20, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v7, v26, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v6, v19, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v5, v29, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v4, v18, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v3, v25, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen
+; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s32
+; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:4
+; GCN-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:8
+; GCN-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:44
+; GCN-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:40
+; GCN-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:36
+; GCN-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:32
+; GCN-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; GCN-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:24
+; GCN-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GCN-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
+; GCN-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; GCN-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
+; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
+; GCN-NEXT: s_waitcnt vmcnt(12)
+; GCN-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:124
+; GCN-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:120
+; GCN-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:116
+; GCN-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen offset:128
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; GCN-NEXT: s_setpc_b64 s[30:31]
;
; GFX7-LABEL: test_overflow_stack:
; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:112
+; GFX7-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:108
+; GFX7-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:104
+; GFX7-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:100
+; GFX7-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:96
+; GFX7-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:92
+; GFX7-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:8
+; GFX7-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:4
+; GFX7-NEXT: buffer_load_dword v27, off, s[0:3], s32
+; GFX7-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:88
+; GFX7-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:84
+; GFX7-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:80
+; GFX7-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:76
+; GFX7-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:72
+; GFX7-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:68
+; GFX7-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:64
+; GFX7-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; GFX7-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
+; GFX7-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:52
+; GFX7-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:48
+; GFX7-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:44
+; GFX7-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:40
+; GFX7-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:36
+; GFX7-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:32
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:24
+; GFX7-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GFX7-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
+; GFX7-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; GFX7-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
+; GFX7-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
; GFX7-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GFX7-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8
-; GFX7-NEXT: v_add_i32_e32 v31, vcc, 0x7c, v0
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX7-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:4
-; GFX7-NEXT: v_add_i32_e32 v31, vcc, 0x78, v0
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX7-NEXT: buffer_load_dword v2, off, s[0:3], s32
-; GFX7-NEXT: v_add_i32_e32 v31, vcc, 0x74, v0
-; GFX7-NEXT: s_waitcnt vmcnt(0)
-; GFX7-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; GFX7-NEXT: buffer_store_dword v30, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x6c, v0
-; GFX7-NEXT: buffer_store_dword v29, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; GFX7-NEXT: buffer_store_dword v28, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x64, v0
-; GFX7-NEXT: buffer_store_dword v27, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x60, v0
-; GFX7-NEXT: buffer_store_dword v26, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; GFX7-NEXT: buffer_store_dword v25, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x58, v0
-; GFX7-NEXT: buffer_store_dword v24, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x54, v0
-; GFX7-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x50, v0
-; GFX7-NEXT: buffer_store_dword v22, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x4c, v0
-; GFX7-NEXT: buffer_store_dword v21, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x48, v0
-; GFX7-NEXT: buffer_store_dword v20, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x44, v0
-; GFX7-NEXT: buffer_store_dword v19, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; GFX7-NEXT: buffer_store_dword v18, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 60, v0
-; GFX7-NEXT: buffer_store_dword v17, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 56, v0
-; GFX7-NEXT: buffer_store_dword v16, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 52, v0
-; GFX7-NEXT: buffer_store_dword v15, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 48, v0
-; GFX7-NEXT: buffer_store_dword v14, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 44, v0
-; GFX7-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 40, v0
-; GFX7-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 36, v0
-; GFX7-NEXT: buffer_store_dword v11, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 32, v0
-; GFX7-NEXT: buffer_store_dword v10, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 28, v0
-; GFX7-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 24, v0
-; GFX7-NEXT: buffer_store_dword v8, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 20, v0
-; GFX7-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 16, v0
-; GFX7-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 12, v0
-; GFX7-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 8, v0
-; GFX7-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 4, v0
-; GFX7-NEXT: v_add_i32_e32 v0, vcc, 0x80, v0
-; GFX7-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
-; GFX7-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen
+; GFX7-NEXT: s_waitcnt vmcnt(14)
+; GFX7-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:124
+; GFX7-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:120
+; GFX7-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:116
+; GFX7-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen offset:128
; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: test_overflow_stack:
; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX8-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:112
+; GFX8-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:108
+; GFX8-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:104
+; GFX8-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:100
+; GFX8-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:96
+; GFX8-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:92
+; GFX8-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:8
+; GFX8-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:4
+; GFX8-NEXT: buffer_load_dword v27, off, s[0:3], s32
+; GFX8-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:88
+; GFX8-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:84
+; GFX8-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:80
+; GFX8-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:76
+; GFX8-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:72
+; GFX8-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:68
+; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:64
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
+; GFX8-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:52
+; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:48
+; GFX8-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:44
+; GFX8-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:40
+; GFX8-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:36
+; GFX8-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:32
+; GFX8-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; GFX8-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:24
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
-; GFX8-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:8
-; GFX8-NEXT: v_add_u32_e32 v31, vcc, 0x7c, v0
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX8-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:4
-; GFX8-NEXT: v_add_u32_e32 v31, vcc, 0x78, v0
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX8-NEXT: buffer_load_dword v2, off, s[0:3], s32
-; GFX8-NEXT: v_add_u32_e32 v31, vcc, 0x74, v0
-; GFX8-NEXT: s_waitcnt vmcnt(0)
-; GFX8-NEXT: buffer_store_dword v2, v31, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; GFX8-NEXT: buffer_store_dword v30, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x6c, v0
-; GFX8-NEXT: buffer_store_dword v29, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; GFX8-NEXT: buffer_store_dword v28, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x64, v0
-; GFX8-NEXT: buffer_store_dword v27, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x60, v0
-; GFX8-NEXT: buffer_store_dword v26, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; GFX8-NEXT: buffer_store_dword v25, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x58, v0
-; GFX8-NEXT: buffer_store_dword v24, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x54, v0
-; GFX8-NEXT: buffer_store_dword v23, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; GFX8-NEXT: buffer_store_dword v22, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x4c, v0
-; GFX8-NEXT: buffer_store_dword v21, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; GFX8-NEXT: buffer_store_dword v20, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x44, v0
-; GFX8-NEXT: buffer_store_dword v19, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; GFX8-NEXT: buffer_store_dword v18, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 60, v0
-; GFX8-NEXT: buffer_store_dword v17, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 56, v0
-; GFX8-NEXT: buffer_store_dword v16, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 52, v0
-; GFX8-NEXT: buffer_store_dword v15, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 48, v0
-; GFX8-NEXT: buffer_store_dword v14, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 44, v0
-; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 40, v0
-; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 36, v0
-; GFX8-NEXT: buffer_store_dword v11, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 32, v0
-; GFX8-NEXT: buffer_store_dword v10, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 28, v0
-; GFX8-NEXT: buffer_store_dword v9, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 24, v0
-; GFX8-NEXT: buffer_store_dword v8, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 20, v0
-; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 16, v0
-; GFX8-NEXT: buffer_store_dword v6, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 12, v0
-; GFX8-NEXT: buffer_store_dword v5, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 8, v0
-; GFX8-NEXT: buffer_store_dword v4, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 4, v0
-; GFX8-NEXT: v_add_u32_e32 v0, vcc, 0x80, v0
-; GFX8-NEXT: buffer_store_dword v3, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen
+; GFX8-NEXT: s_waitcnt vmcnt(14)
+; GFX8-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:124
+; GFX8-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:120
+; GFX8-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:116
+; GFX8-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen offset:128
; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
@@ -7862,241 +7746,168 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0
; GCN-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:26
; GCN-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:28
; GCN-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:30
-; GCN-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:48
-; GCN-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:50
-; GCN-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64 offset:52
-; GCN-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:54
-; GCN-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:56
-; GCN-NEXT: buffer_load_ushort v28, v[1:2], s[4:7], 0 addr64 offset:58
-; GCN-NEXT: buffer_load_ushort v29, v[1:2], s[4:7], 0 addr64 offset:60
-; GCN-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:62
-; GCN-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:32
-; GCN-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:34
-; GCN-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:36
-; GCN-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:38
+; GCN-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:48
+; GCN-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:50
+; GCN-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:52
+; GCN-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:54
+; GCN-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:56
+; GCN-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:58
+; GCN-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64 offset:60
+; GCN-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:62
+; GCN-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:32
+; GCN-NEXT: buffer_load_ushort v28, v[1:2], s[4:7], 0 addr64 offset:34
+; GCN-NEXT: buffer_load_ushort v29, v[1:2], s[4:7], 0 addr64 offset:36
+; GCN-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:38
; GCN-NEXT: buffer_load_ushort v31, v[1:2], s[4:7], 0 addr64 offset:40
; GCN-NEXT: buffer_load_ushort v32, v[1:2], s[4:7], 0 addr64 offset:42
; GCN-NEXT: buffer_load_ushort v33, v[1:2], s[4:7], 0 addr64 offset:44
; GCN-NEXT: buffer_load_ushort v34, v[1:2], s[4:7], 0 addr64 offset:46
; GCN-NEXT: s_waitcnt vmcnt(8)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v30
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 0xfc, v0
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v30, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xf8, v0
-; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v29
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0xf4, v0
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v29, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0
-; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0xec, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v28
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v29, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0
-; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0xe4, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v27
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v28, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_add_i32_e32 v2, vcc, 0xe0, v0
-; GCN-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0xdc, v0
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0xd8, v0
-; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v26
; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0xd4, v0
-; GCN-NEXT: buffer_store_dword v1, v28, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0xd0, v0
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0xcc, v0
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:252
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:248
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v25
; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v26, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 0xc8, v0
-; GCN-NEXT: buffer_store_dword v1, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0xc4, v0
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0xc0, v0
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:244
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:240
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v24
+; GCN-NEXT: v_lshlrev_b32_e32 v23, 16, v23
+; GCN-NEXT: v_lshlrev_b32_e32 v22, 16, v22
+; GCN-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GCN-NEXT: v_lshlrev_b32_e32 v20, 16, v20
+; GCN-NEXT: v_lshlrev_b32_e32 v19, 16, v19
+; GCN-NEXT: s_waitcnt vmcnt(4)
+; GCN-NEXT: v_lshlrev_b32_e32 v24, 16, v34
+; GCN-NEXT: v_lshlrev_b32_e32 v25, 16, v33
+; GCN-NEXT: v_lshlrev_b32_e32 v26, 16, v32
+; GCN-NEXT: v_lshlrev_b32_e32 v31, 16, v31
+; GCN-NEXT: v_lshlrev_b32_e32 v30, 16, v30
+; GCN-NEXT: v_lshlrev_b32_e32 v29, 16, v29
+; GCN-NEXT: v_lshlrev_b32_e32 v32, 16, v3
+; GCN-NEXT: v_lshlrev_b32_e32 v33, 16, v4
+; GCN-NEXT: v_lshlrev_b32_e32 v34, 16, v5
+; GCN-NEXT: v_lshlrev_b32_e32 v35, 16, v6
+; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v7
+; GCN-NEXT: v_lshlrev_b32_e32 v37, 16, v8
+; GCN-NEXT: v_lshlrev_b32_e32 v38, 16, v9
+; GCN-NEXT: v_lshlrev_b32_e32 v39, 16, v10
+; GCN-NEXT: v_lshlrev_b32_e32 v48, 16, v11
+; GCN-NEXT: v_lshlrev_b32_e32 v49, 16, v12
+; GCN-NEXT: v_lshlrev_b32_e32 v50, 16, v13
+; GCN-NEXT: v_lshlrev_b32_e32 v51, 16, v14
+; GCN-NEXT: v_lshlrev_b32_e32 v52, 16, v15
+; GCN-NEXT: v_lshlrev_b32_e32 v53, 16, v16
+; GCN-NEXT: v_lshlrev_b32_e32 v54, 16, v17
+; GCN-NEXT: v_lshlrev_b32_e32 v17, 16, v18
+; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v27
+; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v28
; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v28, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v24, vcc, 0xbc, v0
-; GCN-NEXT: buffer_store_dword v1, v25, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 0xb8, v0
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0xb4, v0
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:236
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:232
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v23
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v26, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v23, vcc, 0xb0, v0
-; GCN-NEXT: buffer_store_dword v1, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0xac, v0
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0xa8, v0
-; GCN-NEXT: s_waitcnt vmcnt(14) expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v34
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v24, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v24, vcc, 0xa4, v0
-; GCN-NEXT: buffer_store_dword v1, v25, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 0xa0, v0
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0x9c, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v23
+; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v22
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:228
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:224
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v33
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v28, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0x98, v0
-; GCN-NEXT: buffer_store_dword v1, v23, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v23, vcc, 0x94, v0
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 0x90, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v21
+; GCN-NEXT: v_cvt_f64_f32_e32 v[5:6], v20
+; GCN-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:220
+; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:216
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v32
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v26, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0x8c, v0
-; GCN-NEXT: buffer_store_dword v1, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0x88, v0
-; GCN-NEXT: v_add_i32_e32 v32, vcc, 0x84, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v19
+; GCN-NEXT: v_cvt_f64_f32_e32 v[7:8], v24
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:212
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:208
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v31
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v24, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v24, vcc, 0x80, v0
-; GCN-NEXT: buffer_store_dword v1, v25, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 0x7c, v0
-; GCN-NEXT: v_add_i32_e32 v31, vcc, 0x78, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v25
+; GCN-NEXT: v_cvt_f64_f32_e32 v[9:10], v26
+; GCN-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:204
+; GCN-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:200
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v22
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v29, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v22, vcc, 0x74, v0
-; GCN-NEXT: buffer_store_dword v1, v28, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 0x70, v0
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 0x6c, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[5:6], v31
+; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v30
+; GCN-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:196
+; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:192
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v21
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v21, vcc, 0x68, v0
-; GCN-NEXT: buffer_store_dword v1, v30, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v23, vcc, 0x64, v0
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 0x60, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v29
+; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v13
+; GCN-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:188
+; GCN-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:184
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v20
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v26, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v20, vcc, 0x5c, v0
-; GCN-NEXT: buffer_store_dword v1, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 0x58, v0
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 0x54, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[7:8], v32
+; GCN-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:180
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:176
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v19
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v32, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v19, vcc, 0x50, v0
-; GCN-NEXT: buffer_store_dword v1, v24, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v24, vcc, 0x4c, v0
-; GCN-NEXT: v_add_i32_e32 v32, vcc, 0x48, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v33
+; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
+; GCN-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:172
+; GCN-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:168
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v18
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v25, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v18, vcc, 0x44, v0
-; GCN-NEXT: buffer_store_dword v1, v31, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v25, vcc, 64, v0
-; GCN-NEXT: v_add_i32_e32 v31, vcc, 60, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[9:10], v34
+; GCN-NEXT: v_cvt_f64_f32_e32 v[19:20], v54
+; GCN-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:164
+; GCN-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:160
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v17
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v22, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v17, vcc, 56, v0
-; GCN-NEXT: buffer_store_dword v1, v28, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v22, vcc, 52, v0
-; GCN-NEXT: v_add_i32_e32 v28, vcc, 48, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[5:6], v35
+; GCN-NEXT: v_cvt_f64_f32_e32 v[21:22], v53
+; GCN-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:156
+; GCN-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:152
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v16
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v29, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v29, vcc, 44, v0
-; GCN-NEXT: buffer_store_dword v1, v21, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v21, vcc, 40, v0
-; GCN-NEXT: v_add_i32_e32 v33, vcc, 36, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v36
+; GCN-NEXT: v_cvt_f64_f32_e32 v[23:24], v52
+; GCN-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:148
+; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:144
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v15
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v23, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v23, vcc, 32, v0
-; GCN-NEXT: buffer_store_dword v1, v30, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v30, vcc, 28, v0
-; GCN-NEXT: v_add_i32_e32 v34, vcc, 24, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v37
+; GCN-NEXT: v_cvt_f64_f32_e32 v[25:26], v51
+; GCN-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:140
+; GCN-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:136
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v14
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v20, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v20, vcc, 20, v0
-; GCN-NEXT: buffer_store_dword v1, v26, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v26, vcc, 16, v0
-; GCN-NEXT: v_add_i32_e32 v35, vcc, 12, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v38
+; GCN-NEXT: v_cvt_f64_f32_e32 v[27:28], v50
+; GCN-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:132
+; GCN-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:128
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v13
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: buffer_store_dword v2, v27, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v27, vcc, 8, v0
-; GCN-NEXT: buffer_store_dword v1, v19, s[0:3], 0 offen
-; GCN-NEXT: v_add_i32_e32 v19, vcc, 4, v0
+; GCN-NEXT: v_cvt_f64_f32_e32 v[15:16], v39
+; GCN-NEXT: v_cvt_f64_f32_e32 v[29:30], v49
+; GCN-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:124
+; GCN-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:120
; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v12
-; GCN-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GCN-NEXT: v_lshlrev_b32_e32 v10, 16, v10
-; GCN-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GCN-NEXT: v_lshlrev_b32_e32 v12, 16, v3
-; GCN-NEXT: v_lshlrev_b32_e32 v13, 16, v4
-; GCN-NEXT: v_lshlrev_b32_e32 v14, 16, v5
-; GCN-NEXT: v_lshlrev_b32_e32 v15, 16, v6
-; GCN-NEXT: v_lshlrev_b32_e32 v16, 16, v7
-; GCN-NEXT: v_lshlrev_b32_e32 v36, 16, v8
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v11
-; GCN-NEXT: buffer_store_dword v2, v24, s[0:3], 0 offen
-; GCN-NEXT: v_cvt_f64_f32_e32 v[5:6], v10
-; GCN-NEXT: buffer_store_dword v1, v32, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_cvt_f64_f32_e32 v[1:2], v9
-; GCN-NEXT: v_cvt_f64_f32_e32 v[7:8], v12
-; GCN-NEXT: v_cvt_f64_f32_e32 v[9:10], v36
-; GCN-NEXT: buffer_store_dword v4, v18, s[0:3], 0 offen
-; GCN-NEXT: v_cvt_f64_f32_e32 v[11:12], v13
-; GCN-NEXT: buffer_store_dword v3, v25, s[0:3], 0 offen
-; GCN-NEXT: s_waitcnt expcnt(0)
-; GCN-NEXT: v_cvt_f64_f32_e32 v[3:4], v14
-; GCN-NEXT: v_cvt_f64_f32_e32 v[13:14], v15
-; GCN-NEXT: v_cvt_f64_f32_e32 v[15:16], v16
-; GCN-NEXT: buffer_store_dword v6, v31, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v5, v17, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v2, v22, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v1, v28, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v10, v29, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v9, v21, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v16, v33, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v15, v23, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v14, v30, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v13, v34, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v4, v20, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v3, v26, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v12, v35, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v11, v27, s[0:3], 0 offen
-; GCN-NEXT: buffer_store_dword v8, v19, s[0:3], 0 offen
+; GCN-NEXT: v_cvt_f64_f32_e32 v[17:18], v48
+; GCN-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:116
+; GCN-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:112
+; GCN-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:108
+; GCN-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:104
+; GCN-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:100
+; GCN-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:96
+; GCN-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:92
+; GCN-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:88
+; GCN-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:84
+; GCN-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:80
+; GCN-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:76
+; GCN-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:72
+; GCN-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:68
+; GCN-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:64
+; GCN-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:60
+; GCN-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:56
+; GCN-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:52
+; GCN-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:48
+; GCN-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:44
+; GCN-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:40
+; GCN-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:36
+; GCN-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:32
+; GCN-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:28
+; GCN-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:24
+; GCN-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:20
+; GCN-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:16
+; GCN-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:12
+; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
+; GCN-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:4
; GCN-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; GCN-NEXT: s_setpc_b64 s[30:31]
@@ -8108,259 +7919,187 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0
; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s4, s6
; GFX7-NEXT: s_mov_b32 s5, s6
-; GFX7-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:62
-; GFX7-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:60
-; GFX7-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:58
-; GFX7-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:56
-; GFX7-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:54
-; GFX7-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:52
-; GFX7-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:50
-; GFX7-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:48
-; GFX7-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:32
-; GFX7-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64 offset:34
-; GFX7-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:36
-; GFX7-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:38
-; GFX7-NEXT: buffer_load_ushort v28, v[1:2], s[4:7], 0 addr64 offset:40
-; GFX7-NEXT: buffer_load_ushort v29, v[1:2], s[4:7], 0 addr64 offset:42
-; GFX7-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:44
-; GFX7-NEXT: buffer_load_ushort v31, v[1:2], s[4:7], 0 addr64 offset:46
-; GFX7-NEXT: buffer_load_ushort v32, v[1:2], s[4:7], 0 addr64
-; GFX7-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:2
-; GFX7-NEXT: buffer_load_ushort v13, v[1:2], s[4:7], 0 addr64 offset:4
-; GFX7-NEXT: buffer_load_ushort v11, v[1:2], s[4:7], 0 addr64 offset:6
-; GFX7-NEXT: buffer_load_ushort v9, v[1:2], s[4:7], 0 addr64 offset:8
-; GFX7-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:10
-; GFX7-NEXT: buffer_load_ushort v6, v[1:2], s[4:7], 0 addr64 offset:12
-; GFX7-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64 offset:14
+; GFX7-NEXT: buffer_load_ushort v8, v[1:2], s[4:7], 0 addr64 offset:62
+; GFX7-NEXT: buffer_load_ushort v10, v[1:2], s[4:7], 0 addr64 offset:60
+; GFX7-NEXT: buffer_load_ushort v11, v[1:2], s[4:7], 0 addr64 offset:58
+; GFX7-NEXT: buffer_load_ushort v12, v[1:2], s[4:7], 0 addr64 offset:56
+; GFX7-NEXT: buffer_load_ushort v13, v[1:2], s[4:7], 0 addr64 offset:54
+; GFX7-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:52
+; GFX7-NEXT: buffer_load_ushort v15, v[1:2], s[4:7], 0 addr64 offset:50
+; GFX7-NEXT: buffer_load_ushort v16, v[1:2], s[4:7], 0 addr64 offset:48
+; GFX7-NEXT: buffer_load_ushort v17, v[1:2], s[4:7], 0 addr64 offset:46
+; GFX7-NEXT: buffer_load_ushort v18, v[1:2], s[4:7], 0 addr64 offset:44
+; GFX7-NEXT: buffer_load_ushort v19, v[1:2], s[4:7], 0 addr64 offset:42
+; GFX7-NEXT: buffer_load_ushort v20, v[1:2], s[4:7], 0 addr64 offset:40
+; GFX7-NEXT: buffer_load_ushort v21, v[1:2], s[4:7], 0 addr64 offset:38
+; GFX7-NEXT: buffer_load_ushort v22, v[1:2], s[4:7], 0 addr64 offset:36
+; GFX7-NEXT: buffer_load_ushort v23, v[1:2], s[4:7], 0 addr64 offset:34
+; GFX7-NEXT: buffer_load_ushort v24, v[1:2], s[4:7], 0 addr64 offset:32
+; GFX7-NEXT: buffer_load_ushort v25, v[1:2], s[4:7], 0 addr64
+; GFX7-NEXT: buffer_load_ushort v26, v[1:2], s[4:7], 0 addr64 offset:2
; GFX7-NEXT: buffer_load_ushort v3, v[1:2], s[4:7], 0 addr64 offset:16
-; GFX7-NEXT: buffer_load_ushort v5, v[1:2], s[4:7], 0 addr64 offset:18
-; GFX7-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:20
-; GFX7-NEXT: buffer_load_ushort v10, v[1:2], s[4:7], 0 addr64 offset:22
-; GFX7-NEXT: buffer_load_ushort v12, v[1:2], s[4:7], 0 addr64 offset:24
-; GFX7-NEXT: buffer_load_ushort v14, v[1:2], s[4:7], 0 addr64 offset:26
-; GFX7-NEXT: buffer_load_ushort v33, v[1:2], s[4:7], 0 addr64 offset:28
-; GFX7-NEXT: buffer_load_ushort v34, v[1:2], s[4:7], 0 addr64 offset:30
-; GFX7-NEXT: s_waitcnt vmcnt(14)
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v17
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xfc, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xf8, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v18
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xf4, v0
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xd8, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v19
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xec, v0
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0xd4, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v20
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xe4, v0
-; GFX7-NEXT: v_add_i32_e32 v20, vcc, 0xd0, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xe0, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v21
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v17
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xdc, v0
+; GFX7-NEXT: buffer_load_ushort v4, v[1:2], s[4:7], 0 addr64 offset:18
+; GFX7-NEXT: buffer_load_ushort v5, v[1:2], s[4:7], 0 addr64 offset:20
+; GFX7-NEXT: buffer_load_ushort v6, v[1:2], s[4:7], 0 addr64 offset:22
+; GFX7-NEXT: buffer_load_ushort v27, v[1:2], s[4:7], 0 addr64 offset:24
+; GFX7-NEXT: buffer_load_ushort v28, v[1:2], s[4:7], 0 addr64 offset:30
+; GFX7-NEXT: buffer_load_ushort v29, v[1:2], s[4:7], 0 addr64 offset:26
+; GFX7-NEXT: buffer_load_ushort v30, v[1:2], s[4:7], 0 addr64 offset:28
+; GFX7-NEXT: buffer_load_ushort v31, v[1:2], s[4:7], 0 addr64 offset:4
+; GFX7-NEXT: buffer_load_ushort v32, v[1:2], s[4:7], 0 addr64 offset:6
+; GFX7-NEXT: buffer_load_ushort v33, v[1:2], s[4:7], 0 addr64 offset:8
+; GFX7-NEXT: buffer_load_ushort v34, v[1:2], s[4:7], 0 addr64 offset:10
+; GFX7-NEXT: buffer_load_ushort v7, v[1:2], s[4:7], 0 addr64 offset:12
+; GFX7-NEXT: buffer_load_ushort v1, v[1:2], s[4:7], 0 addr64 offset:14
; GFX7-NEXT: s_waitcnt vmcnt(14)
-; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v8
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v10
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:252
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:248
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v11
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:244
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:240
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v12
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:236
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:232
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v10
+; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v13
+; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v14
+; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v15
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[10:11], v11
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:228
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:224
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v12
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[12:13], v13
+; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v18
+; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v20
+; GFX7-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:220
+; GFX7-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:216
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[10:11], v14
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v17
+; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v19
+; GFX7-NEXT: v_lshlrev_b32_e32 v19, 16, v21
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:212
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:208
+; GFX7-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:204
+; GFX7-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:200
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[12:13], v18
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[14:15], v2
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[18:19], v19
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v16
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v22
-; GFX7-NEXT: buffer_store_dword v1, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v2
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v23
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: buffer_store_dword v2, v19, s[0:3], 0 offen
-; GFX7-NEXT: buffer_store_dword v1, v20, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xcc, v0
-; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v24
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xc8, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xc4, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v31
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xc0, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xbc, v0
-; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v30
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xb8, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xb4, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v29
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xb0, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0xac, v0
-; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v28
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0xa8, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0xa4, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v27
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0xa0, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x9c, v0
-; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v26
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x98, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x94, v0
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v25
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x90, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x8c, v0
-; GFX7-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v1, vcc, 0x88, v0
-; GFX7-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v16
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x84, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v32
-; GFX7-NEXT: buffer_store_dword v2, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v2, vcc, 0x80, v0
-; GFX7-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v16
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v17
+; GFX7-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:196
+; GFX7-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:192
+; GFX7-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:188
+; GFX7-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:184
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:180
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:176
+; GFX7-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:172
+; GFX7-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:168
+; GFX7-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:164
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v23
+; GFX7-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:160
+; GFX7-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:156
+; GFX7-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:152
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:148
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[9:10], v2
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:144
+; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v24
+; GFX7-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:140
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:136
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; GFX7-NEXT: s_waitcnt vmcnt(14)
-; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v34
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x7c, v0
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x74, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v17, vcc, 0x78, v0
-; GFX7-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v33
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v17
-; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7
-; GFX7-NEXT: buffer_store_dword v18, v19, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v18, vcc, 0x70, v0
-; GFX7-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[17:18], v13
-; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v14
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[13:14], v13
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x6c, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-NEXT: buffer_store_dword v14, v19, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v14, vcc, 0x68, v0
-; GFX7-NEXT: buffer_store_dword v13, v14, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[13:14], v11
-; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v12
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[11:12], v11
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x64, v0
+; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v28
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:132
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:128
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v12
+; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v30
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:124
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:120
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v14
+; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v29
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:116
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:112
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v16
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v25
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[10:11], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v26
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[12:13], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v31
+; GFX7-NEXT: v_lshlrev_b32_e32 v18, 16, v27
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[14:15], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v32
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:108
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:104
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v18
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[16:17], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v33
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[18:19], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v34
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX7-NEXT: buffer_store_dword v12, v19, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v12, vcc, 0x60, v0
-; GFX7-NEXT: buffer_store_dword v11, v12, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[11:12], v9
-; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v10
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[9:10], v9
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x5c, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX7-NEXT: buffer_store_dword v10, v19, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v10, vcc, 0x58, v0
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[19:20], v7
-; GFX7-NEXT: buffer_store_dword v9, v10, s[0:3], 0 offen
-; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v4
-; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v5
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
-; GFX7-NEXT: v_add_i32_e32 v7, vcc, 0x54, v0
-; GFX7-NEXT: buffer_store_dword v20, v7, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v7, vcc, 0x50, v0
-; GFX7-NEXT: buffer_store_dword v19, v7, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v19, vcc, 0x4c, v0
-; GFX7-NEXT: buffer_store_dword v5, v19, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x48, v0
-; GFX7-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[3:4], v3
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[19:20], v10
-; GFX7-NEXT: v_add_i32_e32 v5, vcc, 0x44, v0
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[6:7], v6
-; GFX7-NEXT: buffer_store_dword v4, v5, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v4, vcc, 64, v0
-; GFX7-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 60, v0
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
-; GFX7-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 56, v0
-; GFX7-NEXT: buffer_store_dword v19, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 52, v0
-; GFX7-NEXT: buffer_store_dword v7, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 48, v0
-; GFX7-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 44, v0
-; GFX7-NEXT: buffer_store_dword v9, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 40, v0
-; GFX7-NEXT: buffer_store_dword v8, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 36, v0
-; GFX7-NEXT: buffer_store_dword v12, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 32, v0
-; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15
-; GFX7-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 28, v0
-; GFX7-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX7-NEXT: buffer_store_dword v14, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 24, v0
-; GFX7-NEXT: buffer_store_dword v13, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 20, v0
-; GFX7-NEXT: buffer_store_dword v18, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 16, v0
-; GFX7-NEXT: buffer_store_dword v17, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 12, v0
-; GFX7-NEXT: buffer_store_dword v16, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 8, v0
-; GFX7-NEXT: buffer_store_dword v15, v3, s[0:3], 0 offen
-; GFX7-NEXT: v_add_i32_e32 v3, vcc, 4, v0
-; GFX7-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; GFX7-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[20:21], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v5
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:100
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:96
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[8:9], v6
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[5:6], v2
+; GFX7-NEXT: v_lshlrev_b32_e32 v22, 16, v7
+; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v1
+; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v4
+; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX7-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:92
+; GFX7-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:88
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
+; GFX7-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:84
+; GFX7-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:80
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[4:5], v7
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
+; GFX7-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:76
+; GFX7-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:72
+; GFX7-NEXT: v_cvt_f64_f32_e32 v[1:2], v22
+; GFX7-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:68
+; GFX7-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:64
+; GFX7-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:60
+; GFX7-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:56
+; GFX7-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:52
+; GFX7-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:48
+; GFX7-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:44
+; GFX7-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:40
+; GFX7-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:36
+; GFX7-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:32
+; GFX7-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:28
+; GFX7-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:24
+; GFX7-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:20
+; GFX7-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:16
+; GFX7-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:12
+; GFX7-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:8
+; GFX7-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:4
+; GFX7-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen
; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-LABEL: global_extload_v32bf16_to_v32f64:
; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
-; GFX8-NEXT: buffer_store_dword v58, off, s[0:3], s32 ; 4-byte Folded Spill
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 2, v1
+; GFX8-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
+; GFX8-NEXT: buffer_store_dword v42, off, s[0:3], s32 ; 4-byte Folded Spill
+; GFX8-NEXT: v_add_u32_e32 v7, vcc, 2, v1
+; GFX8-NEXT: v_addc_u32_e32 v8, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v11, vcc, 4, v1
+; GFX8-NEXT: v_addc_u32_e32 v12, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v3, vcc, 6, v1
; GFX8-NEXT: v_addc_u32_e32 v4, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 4, v1
+; GFX8-NEXT: v_add_u32_e32 v5, vcc, 8, v1
; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v7, vcc, 6, v1
-; GFX8-NEXT: v_addc_u32_e32 v8, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v9, vcc, 8, v1
+; GFX8-NEXT: v_add_u32_e32 v9, vcc, 10, v1
; GFX8-NEXT: v_addc_u32_e32 v10, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 10, v1
-; GFX8-NEXT: v_addc_u32_e32 v12, vcc, 0, v2, vcc
; GFX8-NEXT: v_add_u32_e32 v13, vcc, 12, v1
; GFX8-NEXT: v_addc_u32_e32 v14, vcc, 0, v2, vcc
; GFX8-NEXT: v_add_u32_e32 v15, vcc, 14, v1
@@ -8379,276 +8118,205 @@ define <32 x double> @global_extload_v32bf16_to_v32f64(ptr addrspace(1) %ptr) #0
; GFX8-NEXT: v_addc_u32_e32 v28, vcc, 0, v2, vcc
; GFX8-NEXT: v_add_u32_e32 v29, vcc, 28, v1
; GFX8-NEXT: v_addc_u32_e32 v30, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v31, vcc, 30, v1
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 62, v1
; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v33, vcc, 34, v1
+; GFX8-NEXT: v_add_u32_e32 v33, vcc, 60, v1
+; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v35, vcc, 58, v1
+; GFX8-NEXT: v_addc_u32_e32 v36, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v39, v[1:2]
+; GFX8-NEXT: flat_load_ushort v48, v[31:32]
+; GFX8-NEXT: flat_load_ushort v49, v[33:34]
+; GFX8-NEXT: flat_load_ushort v50, v[35:36]
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 56, v1
+; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v33, vcc, 54, v1
; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v35, vcc, 36, v1
+; GFX8-NEXT: v_add_u32_e32 v35, vcc, 52, v1
; GFX8-NEXT: v_addc_u32_e32 v36, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v37, vcc, 38, v1
-; GFX8-NEXT: flat_load_ushort v44, v[1:2]
+; GFX8-NEXT: v_add_u32_e32 v37, vcc, 50, v1
; GFX8-NEXT: v_addc_u32_e32 v38, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v48, vcc, 40, v1
-; GFX8-NEXT: v_addc_u32_e32 v49, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v50, vcc, 62, v1
-; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v45, v[50:51]
-; GFX8-NEXT: v_add_u32_e32 v50, vcc, 60, v1
-; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v46, v[50:51]
-; GFX8-NEXT: v_add_u32_e32 v50, vcc, 42, v1
-; GFX8-NEXT: v_addc_u32_e32 v51, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v52, vcc, 58, v1
-; GFX8-NEXT: v_addc_u32_e32 v53, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v47, v[52:53]
-; GFX8-NEXT: v_add_u32_e32 v52, vcc, 44, v1
-; GFX8-NEXT: v_addc_u32_e32 v53, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v54, vcc, 56, v1
-; GFX8-NEXT: v_addc_u32_e32 v55, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v56, v[54:55]
-; GFX8-NEXT: v_add_u32_e32 v54, vcc, 46, v1
-; GFX8-NEXT: v_addc_u32_e32 v55, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v39, vcc, 54, v1
-; GFX8-NEXT: v_addc_u32_e32 v40, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v57, v[39:40]
-; GFX8-NEXT: v_add_u32_e32 v39, vcc, 52, v1
-; GFX8-NEXT: v_addc_u32_e32 v40, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v58, v[39:40]
-; GFX8-NEXT: v_add_u32_e32 v40, vcc, 48, v1
-; GFX8-NEXT: v_addc_u32_e32 v41, vcc, 0, v2, vcc
-; GFX8-NEXT: v_add_u32_e32 v42, vcc, 50, v1
-; GFX8-NEXT: v_addc_u32_e32 v43, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v42, v[42:43]
-; GFX8-NEXT: flat_load_ushort v34, v[33:34]
-; GFX8-NEXT: flat_load_ushort v36, v[35:36]
-; GFX8-NEXT: flat_load_ushort v38, v[37:38]
-; GFX8-NEXT: flat_load_ushort v39, v[48:49]
-; GFX8-NEXT: flat_load_ushort v48, v[50:51]
-; GFX8-NEXT: flat_load_ushort v51, v[52:53]
-; GFX8-NEXT: flat_load_ushort v52, v[54:55]
-; GFX8-NEXT: flat_load_ushort v53, v[40:41]
-; GFX8-NEXT: v_add_u32_e32 v49, vcc, 32, v1
-; GFX8-NEXT: v_addc_u32_e32 v50, vcc, 0, v2, vcc
-; GFX8-NEXT: flat_load_ushort v37, v[3:4]
-; GFX8-NEXT: flat_load_ushort v35, v[5:6]
+; GFX8-NEXT: flat_load_ushort v51, v[31:32]
+; GFX8-NEXT: flat_load_ushort v52, v[33:34]
+; GFX8-NEXT: flat_load_ushort v53, v[35:36]
+; GFX8-NEXT: flat_load_ushort v37, v[37:38]
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 48, v1
+; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v38, v[31:32]
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 46, v1
+; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v33, vcc, 44, v1
+; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v35, vcc, 42, v1
+; GFX8-NEXT: v_addc_u32_e32 v36, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v54, v[31:32]
+; GFX8-NEXT: flat_load_ushort v55, v[33:34]
+; GFX8-NEXT: flat_load_ushort v35, v[35:36]
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 40, v1
+; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v33, vcc, 38, v1
+; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v36, v[31:32]
+; GFX8-NEXT: flat_load_ushort v40, v[33:34]
+; GFX8-NEXT: v_add_u32_e32 v31, vcc, 36, v1
+; GFX8-NEXT: v_addc_u32_e32 v32, vcc, 0, v2, vcc
+; GFX8-NEXT: v_add_u32_e32 v33, vcc, 34, v1
+; GFX8-NEXT: v_addc_u32_e32 v34, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v31, v[31:32]
+; GFX8-NEXT: flat_load_ushort v32, v[33:34]
; GFX8-NEXT: flat_load_ushort v33, v[7:8]
-; GFX8-NEXT: flat_load_ushort v8, v[9:10]
-; GFX8-NEXT: flat_load_ushort v6, v[11:12]
-; GFX8-NEXT: flat_load_ushort v4, v[13:14]
-; GFX8-NEXT: flat_load_ushort v2, v[15:16]
+; GFX8-NEXT: v_add_u32_e32 v7, vcc, 32, v1
+; GFX8-NEXT: v_addc_u32_e32 v8, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v11, v[11:12]
+; GFX8-NEXT: flat_load_ushort v8, v[7:8]
+; GFX8-NEXT: v_add_u32_e32 v1, vcc, 30, v1
+; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GFX8-NEXT: flat_load_ushort v12, v[1:2]
+; GFX8-NEXT: flat_load_ushort v34, v[3:4]
+; GFX8-NEXT: flat_load_ushort v41, v[5:6]
+; GFX8-NEXT: flat_load_ushort v42, v[9:10]
+; GFX8-NEXT: flat_load_ushort v14, v[13:14]
+; GFX8-NEXT: flat_load_ushort v16, v[15:16]
; GFX8-NEXT: flat_load_ushort v1, v[19:20]
-; GFX8-NEXT: v_add_u32_e32 v16, vcc, 4, v0
-; GFX8-NEXT: v_add_u32_e32 v19, vcc, 0x7c, v0
+; GFX8-NEXT: flat_load_ushort v10, v[29:30]
+; GFX8-NEXT: flat_load_ushort v18, v[17:18]
+; GFX8-NEXT: flat_load_ushort v17, v[21:22]
+; GFX8-NEXT: flat_load_ushort v19, v[23:24]
+; GFX8-NEXT: flat_load_ushort v15, v[25:26]
+; GFX8-NEXT: flat_load_ushort v13, v[27:28]
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v44
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v3
-; GFX8-NEXT: flat_load_ushort v3, v[17:18]
-; GFX8-NEXT: flat_load_ushort v5, v[21:22]
-; GFX8-NEXT: flat_load_ushort v7, v[23:24]
-; GFX8-NEXT: flat_load_ushort v9, v[25:26]
-; GFX8-NEXT: flat_load_ushort v10, v[27:28]
-; GFX8-NEXT: flat_load_ushort v11, v[29:30]
-; GFX8-NEXT: flat_load_ushort v12, v[31:32]
-; GFX8-NEXT: flat_load_ushort v13, v[49:50]
-; GFX8-NEXT: v_add_u32_e32 v18, vcc, 0x84, v0
-; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xfc, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v45
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v46
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xf8, v0
-; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xf4, v0
-; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v47
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xf0, v0
-; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xec, v0
-; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xe8, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v56
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xe4, v0
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xe0, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v57
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xdc, v0
-; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v58
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xd8, v0
-; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xd4, v0
-; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v42
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xd0, v0
-; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xcc, v0
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v39
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v48
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:4
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:252
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v49
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v50
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[5:6], v5
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:248
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:244
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:240
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:236
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v51
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v52
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:232
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:228
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:224
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:220
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v53
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v37
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:216
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:212
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:208
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:204
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v38
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v54
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[5:6], v5
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:200
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:196
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:192
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:188
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v55
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v35
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:184
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:180
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:176
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:172
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v36
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v40
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:168
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:164
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:160
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:156
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:152
+; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v31
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
+; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v32
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:148
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:144
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v5
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v53
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xc8, v0
-; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xc4, v0
-; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v52
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xc0, v0
-; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xbc, v0
-; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v51
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xb8, v0
-; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xb4, v0
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v48
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xb0, v0
-; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0xac, v0
-; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v39
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xa8, v0
-; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v16, vcc, 0xa4, v0
-; GFX8-NEXT: buffer_store_dword v15, v16, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v38
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[15:16], v15
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0xa0, v0
-; GFX8-NEXT: buffer_store_dword v14, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x9c, v0
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v36
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x98, v0
-; GFX8-NEXT: buffer_store_dword v15, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x94, v0
-; GFX8-NEXT: buffer_store_dword v17, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v14, vcc, 0x90, v0
-; GFX8-NEXT: buffer_store_dword v16, v14, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v34
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x8c, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v37
-; GFX8-NEXT: buffer_store_dword v15, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v15, vcc, 0x88, v0
+; GFX8-NEXT: v_lshlrev_b32_e32 v7, 16, v8
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:140
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:136
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v7
+; GFX8-NEXT: v_lshlrev_b32_e32 v9, 16, v12
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:132
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:128
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v9
+; GFX8-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:124
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:120
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v10
; GFX8-NEXT: v_lshlrev_b32_e32 v13, 16, v13
-; GFX8-NEXT: buffer_store_dword v14, v15, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v16
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v13
-; GFX8-NEXT: v_lshlrev_b32_e32 v13, 16, v35
-; GFX8-NEXT: v_lshlrev_b32_e32 v12, 16, v12
-; GFX8-NEXT: v_lshlrev_b32_e32 v11, 16, v11
-; GFX8-NEXT: buffer_store_dword v17, v18, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v17, vcc, 0x80, v0
-; GFX8-NEXT: buffer_store_dword v16, v17, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v13
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v12
-; GFX8-NEXT: v_lshlrev_b32_e32 v18, 16, v33
-; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v8
-; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v6
-; GFX8-NEXT: buffer_store_dword v13, v19, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v13, vcc, 0x78, v0
-; GFX8-NEXT: buffer_store_dword v12, v13, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v18
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v11
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x74, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v4
-; GFX8-NEXT: buffer_store_dword v19, v11, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0x70, v0
-; GFX8-NEXT: buffer_store_dword v18, v11, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v8
-; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v10
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v8
-; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x6c, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v2
-; GFX8-NEXT: buffer_store_dword v11, v8, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0x68, v0
-; GFX8-NEXT: buffer_store_dword v10, v8, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v6
-; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v9
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v6
-; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x64, v0
-; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v3
-; GFX8-NEXT: buffer_store_dword v9, v6, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x60, v0
-; GFX8-NEXT: buffer_store_dword v8, v6, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v4
-; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v7
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x5c, v0
-; GFX8-NEXT: buffer_store_dword v7, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x58, v0
-; GFX8-NEXT: buffer_store_dword v6, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v1
-; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v5
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v2
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:116
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:112
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v13
+; GFX8-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:108
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:104
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v15
+; GFX8-NEXT: v_lshlrev_b32_e32 v20, 16, v16
+; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v19
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:100
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:96
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[2:3], v16
+; GFX8-NEXT: v_lshlrev_b32_e32 v16, 16, v17
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:92
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:88
+; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v18
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v16
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[18:19], v3
+; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v1
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x54, v0
-; GFX8-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x50, v0
-; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[1:2], v3
-; GFX8-NEXT: v_cvt_f64_f32_e32 v[3:4], v4
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0
-; GFX8-NEXT: buffer_store_dword v2, v5, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x48, v0
-; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x44, v0
-; GFX8-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 64, v0
-; GFX8-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 60, v0
-; GFX8-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0
-; GFX8-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 52, v0
-; GFX8-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 48, v0
-; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 44, v0
-; GFX8-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 40, v0
-; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 36, v0
-; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0
-; GFX8-NEXT: buffer_store_dword v18, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0
-; GFX8-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 24, v0
-; GFX8-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 20, v0
-; GFX8-NEXT: buffer_store_dword v17, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 16, v0
-; GFX8-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 12, v0
-; GFX8-NEXT: v_add_u32_e32 v0, vcc, 8, v0
-; GFX8-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen
-; GFX8-NEXT: buffer_load_dword v58, off, s[0:3], s32 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
-; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
+; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v33
+; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v11
+; GFX8-NEXT: v_lshlrev_b32_e32 v8, 16, v34
+; GFX8-NEXT: v_lshlrev_b32_e32 v11, 16, v41
+; GFX8-NEXT: v_lshlrev_b32_e32 v12, 16, v42
+; GFX8-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[6:7], v6
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[10:11], v11
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[12:13], v12
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[14:15], v14
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:84
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:80
+; GFX8-NEXT: v_cvt_f64_f32_e32 v[16:17], v20
+; GFX8-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:76
+; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:72
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:68
+; GFX8-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:64
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:60
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:56
+; GFX8-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:52
+; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:48
+; GFX8-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:44
+; GFX8-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:40
+; GFX8-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:36
+; GFX8-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:32
+; GFX8-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:28
+; GFX8-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:24
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:20
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:16
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:12
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:8
+; GFX8-NEXT: buffer_load_dword v42, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
+; GFX8-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
diff --git a/llvm/test/CodeGen/AMDGPU/function-returns.ll b/llvm/test/CodeGen/AMDGPU/function-returns.ll
index a7665ee31e608..803f87a25af62 100644
--- a/llvm/test/CodeGen/AMDGPU/function-returns.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-returns.ll
@@ -1268,86 +1268,53 @@ define <33 x i32> @v33i32_func_void() #0 {
; CI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; CI-NEXT: s_mov_b32 s7, 0xf000
; CI-NEXT: s_mov_b32 s6, -1
-; CI-NEXT: v_add_i32_e32 v34, vcc, 0x80, v0
; CI-NEXT: s_waitcnt lgkmcnt(0)
-; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; CI-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112
; CI-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96
; CI-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80
; CI-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64
+; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; CI-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48
; CI-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32
; CI-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16
; CI-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0
; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v33, v34, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v33, vcc, 0x7c, v0
-; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0x78, v0
-; CI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0
-; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x64, v0
+; CI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124
+; CI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120
+; CI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
+; CI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; CI-NEXT: s_waitcnt vmcnt(11)
-; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
-; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x58, v0
-; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0
-; CI-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0
+; CI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:108
+; CI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:104
+; CI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:100
+; CI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
-; CI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v0
-; CI-NEXT: v_add_i32_e32 v7, vcc, 0x44, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 60, v0
-; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 52, v0
-; CI-NEXT: v_add_i32_e32 v8, vcc, 48, v0
-; CI-NEXT: v_add_i32_e32 v9, vcc, 44, v0
-; CI-NEXT: v_add_i32_e32 v10, vcc, 40, v0
-; CI-NEXT: v_add_i32_e32 v11, vcc, 36, v0
+; CI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:92
+; CI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:88
+; CI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:84
+; CI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
-; CI-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
-; CI-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
-; CI-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
-; CI-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
-; CI-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
+; CI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:76
+; CI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:72
+; CI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68
+; CI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64
+; CI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128
+; CI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60
+; CI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56
+; CI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52
+; CI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; CI-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:44
+; CI-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:40
+; CI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:36
+; CI-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:32
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
-; CI-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
-; CI-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
+; CI-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:28
+; CI-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:24
+; CI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:20
+; CI-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:16
+; CI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:12
+; CI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:8
+; CI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:4
; CI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
; CI-NEXT: s_waitcnt vmcnt(0)
; CI-NEXT: s_setpc_b64 s[30:31]
@@ -1358,86 +1325,53 @@ define <33 x i32> @v33i32_func_void() #0 {
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX8-NEXT: s_mov_b32 s7, 0xf000
; GFX8-NEXT: s_mov_b32 s6, -1
-; GFX8-NEXT: v_add_u32_e32 v34, vcc, 0x80, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; GFX8-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112
; GFX8-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96
; GFX8-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80
; GFX8-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64
+; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; GFX8-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48
; GFX8-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32
; GFX8-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16
; GFX8-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0
; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v33, v34, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v33, vcc, 0x7c, v0
-; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x78, v0
-; GFX8-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0
-; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x6c, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
+; GFX8-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; GFX8-NEXT: s_waitcnt vmcnt(11)
-; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x60, v0
-; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0
-; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x54, v0
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x50, v0
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0
+; GFX8-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:108
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:104
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:100
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0
-; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x48, v0
-; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 60, v0
-; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; GFX8-NEXT: v_add_u32_e32 v8, vcc, 48, v0
-; GFX8-NEXT: v_add_u32_e32 v9, vcc, 44, v0
-; GFX8-NEXT: v_add_u32_e32 v10, vcc, 40, v0
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 36, v0
+; GFX8-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:92
+; GFX8-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:88
+; GFX8-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:84
+; GFX8-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0
-; GFX8-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0
-; GFX8-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 24, v0
-; GFX8-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 20, v0
-; GFX8-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 16, v0
-; GFX8-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 12, v0
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:76
+; GFX8-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:72
+; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68
+; GFX8-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64
+; GFX8-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128
+; GFX8-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60
+; GFX8-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56
+; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; GFX8-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:44
+; GFX8-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:40
+; GFX8-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:36
+; GFX8-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:32
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 8, v0
-; GFX8-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 4, v0
-; GFX8-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
+; GFX8-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:28
+; GFX8-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:24
+; GFX8-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:20
+; GFX8-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:16
+; GFX8-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:12
+; GFX8-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:8
+; GFX8-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:4
; GFX8-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_setpc_b64 s[30:31]
@@ -1551,86 +1485,53 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 {
; CI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; CI-NEXT: s_mov_b32 s7, 0xf000
; CI-NEXT: s_mov_b32 s6, -1
-; CI-NEXT: v_add_i32_e32 v34, vcc, 0x80, v0
; CI-NEXT: s_waitcnt lgkmcnt(0)
-; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; CI-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112
; CI-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96
; CI-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80
; CI-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64
+; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; CI-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48
; CI-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32
; CI-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16
; CI-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0
; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v33, v34, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v33, vcc, 0x7c, v0
-; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0x78, v0
-; CI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x74, v0
-; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x70, v0
-; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x6c, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x68, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x64, v0
+; CI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124
+; CI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120
+; CI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
+; CI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; CI-NEXT: s_waitcnt vmcnt(11)
-; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x60, v0
-; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0x5c, v0
-; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0x58, v0
-; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x54, v0
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0x50, v0
-; CI-NEXT: v_add_i32_e32 v5, vcc, 0x4c, v0
+; CI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:108
+; CI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:104
+; CI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:100
+; CI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 56, v0
-; CI-NEXT: v_add_i32_e32 v6, vcc, 0x48, v0
-; CI-NEXT: v_add_i32_e32 v7, vcc, 0x44, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 64, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 60, v0
-; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 52, v0
-; CI-NEXT: v_add_i32_e32 v8, vcc, 48, v0
-; CI-NEXT: v_add_i32_e32 v9, vcc, 44, v0
-; CI-NEXT: v_add_i32_e32 v10, vcc, 40, v0
-; CI-NEXT: v_add_i32_e32 v11, vcc, 36, v0
+; CI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:92
+; CI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:88
+; CI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:84
+; CI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 32, v0
-; CI-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 28, v0
-; CI-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 24, v0
-; CI-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 20, v0
-; CI-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 16, v0
-; CI-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 12, v0
+; CI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:76
+; CI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:72
+; CI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68
+; CI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64
+; CI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128
+; CI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60
+; CI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56
+; CI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52
+; CI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; CI-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:44
+; CI-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:40
+; CI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:36
+; CI-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:32
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 8, v0
-; CI-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 4, v0
-; CI-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
+; CI-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:28
+; CI-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:24
+; CI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:20
+; CI-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:16
+; CI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:12
+; CI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:8
+; CI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:4
; CI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
; CI-NEXT: s_waitcnt vmcnt(0)
; CI-NEXT: s_setpc_b64 s[30:31]
@@ -1641,86 +1542,53 @@ define { <32 x i32>, i32 } @struct_v32i32_i32_func_void() #0 {
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX8-NEXT: s_mov_b32 s7, 0xf000
; GFX8-NEXT: s_mov_b32 s6, -1
-; GFX8-NEXT: v_add_u32_e32 v34, vcc, 0x80, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; GFX8-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:112
; GFX8-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:96
; GFX8-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:80
; GFX8-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:64
+; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0 offset:128
; GFX8-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:48
; GFX8-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:32
; GFX8-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:16
; GFX8-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0
; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v33, v34, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v33, vcc, 0x7c, v0
-; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x78, v0
-; GFX8-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x74, v0
-; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x70, v0
-; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x6c, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x68, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x64, v0
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:124
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:120
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:116
+; GFX8-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:112
; GFX8-NEXT: s_waitcnt vmcnt(11)
-; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x60, v0
-; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0x5c, v0
-; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0x58, v0
-; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x54, v0
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0x50, v0
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0x4c, v0
+; GFX8-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:108
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:104
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:100
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:96
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 56, v0
-; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0x48, v0
-; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0x44, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 64, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 60, v0
-; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 52, v0
-; GFX8-NEXT: v_add_u32_e32 v8, vcc, 48, v0
-; GFX8-NEXT: v_add_u32_e32 v9, vcc, 44, v0
-; GFX8-NEXT: v_add_u32_e32 v10, vcc, 40, v0
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 36, v0
+; GFX8-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:92
+; GFX8-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:88
+; GFX8-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:84
+; GFX8-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:80
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 32, v0
-; GFX8-NEXT: buffer_store_dword v21, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 28, v0
-; GFX8-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 24, v0
-; GFX8-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 20, v0
-; GFX8-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 16, v0
-; GFX8-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 12, v0
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:76
+; GFX8-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:72
+; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:68
+; GFX8-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:64
+; GFX8-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen offset:128
+; GFX8-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:60
+; GFX8-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:56
+; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:52
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:48
+; GFX8-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:44
+; GFX8-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:40
+; GFX8-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:36
+; GFX8-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:32
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 8, v0
-; GFX8-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 4, v0
-; GFX8-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
+; GFX8-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:28
+; GFX8-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:24
+; GFX8-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:20
+; GFX8-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:16
+; GFX8-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:12
+; GFX8-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:8
+; GFX8-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:4
; GFX8-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_setpc_b64 s[30:31]
@@ -1835,86 +1703,53 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 {
; CI-NEXT: s_mov_b32 s7, 0xf000
; CI-NEXT: s_mov_b32 s6, -1
; CI-NEXT: s_waitcnt lgkmcnt(0)
-; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0
; CI-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:240
; CI-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:224
; CI-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:208
; CI-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:192
+; CI-NEXT: buffer_load_dword v33, off, s[4:7], 0
; CI-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:176
; CI-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:160
; CI-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:144
; CI-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0 offset:128
; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v33, vcc, 0xfc, v0
-; CI-NEXT: s_waitcnt vmcnt(8)
-; CI-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0xf8, v0
-; CI-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0xf4, v0
-; CI-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0xf0, v0
-; CI-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0xec, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0xe8, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0xe4, v0
+; CI-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:252
+; CI-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:248
+; CI-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:244
+; CI-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:240
; CI-NEXT: s_waitcnt vmcnt(11)
-; CI-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0xe0, v0
-; CI-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0xdc, v0
-; CI-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0xd8, v0
-; CI-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0xd4, v0
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0xd0, v0
-; CI-NEXT: v_add_i32_e32 v5, vcc, 0xcc, v0
-; CI-NEXT: v_add_i32_e32 v6, vcc, 0xc8, v0
+; CI-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:236
+; CI-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:232
+; CI-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:228
+; CI-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:224
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0xb8, v0
-; CI-NEXT: v_add_i32_e32 v7, vcc, 0xc4, v0
-; CI-NEXT: v_add_i32_e32 v2, vcc, 0xc0, v0
-; CI-NEXT: v_add_i32_e32 v3, vcc, 0xbc, v0
-; CI-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v4, vcc, 0xb4, v0
-; CI-NEXT: v_add_i32_e32 v8, vcc, 0xb0, v0
-; CI-NEXT: v_add_i32_e32 v9, vcc, 0xac, v0
-; CI-NEXT: v_add_i32_e32 v10, vcc, 0xa8, v0
-; CI-NEXT: v_add_i32_e32 v11, vcc, 0xa4, v0
+; CI-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:220
+; CI-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:216
+; CI-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:212
+; CI-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:208
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v5, vcc, 0xa0, v0
-; CI-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v21, v5, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x9c, v0
-; CI-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x98, v0
-; CI-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x94, v0
-; CI-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x90, v0
-; CI-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x8c, v0
+; CI-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:204
+; CI-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:200
+; CI-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:196
+; CI-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:192
+; CI-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
+; CI-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:188
+; CI-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:184
+; CI-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:180
+; CI-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:176
+; CI-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:172
+; CI-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:168
+; CI-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:164
+; CI-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:160
; CI-NEXT: s_waitcnt vmcnt(14)
-; CI-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x88, v0
-; CI-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; CI-NEXT: v_add_i32_e32 v1, vcc, 0x84, v0
-; CI-NEXT: v_add_i32_e32 v0, vcc, 0x80, v0
-; CI-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
-; CI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
+; CI-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:156
+; CI-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:152
+; CI-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:148
+; CI-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:144
+; CI-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:140
+; CI-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:136
+; CI-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:132
+; CI-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:128
; CI-NEXT: s_waitcnt vmcnt(0)
; CI-NEXT: s_setpc_b64 s[30:31]
;
@@ -1925,86 +1760,53 @@ define { i32, <32 x i32> } @struct_i32_v32i32_func_void() #0 {
; GFX8-NEXT: s_mov_b32 s7, 0xf000
; GFX8-NEXT: s_mov_b32 s6, -1
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
-; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0
; GFX8-NEXT: buffer_load_dwordx4 v[1:4], off, s[4:7], 0 offset:240
; GFX8-NEXT: buffer_load_dwordx4 v[5:8], off, s[4:7], 0 offset:224
; GFX8-NEXT: buffer_load_dwordx4 v[9:12], off, s[4:7], 0 offset:208
; GFX8-NEXT: buffer_load_dwordx4 v[13:16], off, s[4:7], 0 offset:192
+; GFX8-NEXT: buffer_load_dword v33, off, s[4:7], 0
; GFX8-NEXT: buffer_load_dwordx4 v[17:20], off, s[4:7], 0 offset:176
; GFX8-NEXT: buffer_load_dwordx4 v[21:24], off, s[4:7], 0 offset:160
; GFX8-NEXT: buffer_load_dwordx4 v[25:28], off, s[4:7], 0 offset:144
; GFX8-NEXT: buffer_load_dwordx4 v[29:32], off, s[4:7], 0 offset:128
; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v33, vcc, 0xfc, v0
-; GFX8-NEXT: s_waitcnt vmcnt(8)
-; GFX8-NEXT: buffer_store_dword v4, v33, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xf8, v0
-; GFX8-NEXT: buffer_store_dword v3, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xf4, v0
-; GFX8-NEXT: buffer_store_dword v2, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xf0, v0
-; GFX8-NEXT: buffer_store_dword v1, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xec, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xe8, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xe4, v0
+; GFX8-NEXT: buffer_store_dword v4, v0, s[0:3], 0 offen offset:252
+; GFX8-NEXT: buffer_store_dword v3, v0, s[0:3], 0 offen offset:248
+; GFX8-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen offset:244
+; GFX8-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:240
; GFX8-NEXT: s_waitcnt vmcnt(11)
-; GFX8-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xe0, v0
-; GFX8-NEXT: buffer_store_dword v7, v2, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xdc, v0
-; GFX8-NEXT: buffer_store_dword v6, v3, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xd8, v0
-; GFX8-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xd4, v0
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xd0, v0
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0xcc, v0
-; GFX8-NEXT: v_add_u32_e32 v6, vcc, 0xc8, v0
+; GFX8-NEXT: buffer_store_dword v8, v0, s[0:3], 0 offen offset:236
+; GFX8-NEXT: buffer_store_dword v7, v0, s[0:3], 0 offen offset:232
+; GFX8-NEXT: buffer_store_dword v6, v0, s[0:3], 0 offen offset:228
+; GFX8-NEXT: buffer_store_dword v5, v0, s[0:3], 0 offen offset:224
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v12, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v11, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0xb8, v0
-; GFX8-NEXT: v_add_u32_e32 v7, vcc, 0xc4, v0
-; GFX8-NEXT: v_add_u32_e32 v2, vcc, 0xc0, v0
-; GFX8-NEXT: v_add_u32_e32 v3, vcc, 0xbc, v0
-; GFX8-NEXT: buffer_store_dword v9, v4, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v4, vcc, 0xb4, v0
-; GFX8-NEXT: v_add_u32_e32 v8, vcc, 0xb0, v0
-; GFX8-NEXT: v_add_u32_e32 v9, vcc, 0xac, v0
-; GFX8-NEXT: v_add_u32_e32 v10, vcc, 0xa8, v0
-; GFX8-NEXT: v_add_u32_e32 v11, vcc, 0xa4, v0
+; GFX8-NEXT: buffer_store_dword v12, v0, s[0:3], 0 offen offset:220
+; GFX8-NEXT: buffer_store_dword v11, v0, s[0:3], 0 offen offset:216
+; GFX8-NEXT: buffer_store_dword v10, v0, s[0:3], 0 offen offset:212
+; GFX8-NEXT: buffer_store_dword v9, v0, s[0:3], 0 offen offset:208
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v16, v5, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v5, vcc, 0xa0, v0
-; GFX8-NEXT: buffer_store_dword v15, v6, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v14, v7, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v13, v2, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v20, v3, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v19, v1, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v18, v4, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v17, v8, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v24, v9, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v23, v10, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v22, v11, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v21, v5, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x9c, v0
-; GFX8-NEXT: buffer_store_dword v28, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x98, v0
-; GFX8-NEXT: buffer_store_dword v27, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x94, v0
-; GFX8-NEXT: buffer_store_dword v26, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x90, v0
-; GFX8-NEXT: buffer_store_dword v25, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x8c, v0
+; GFX8-NEXT: buffer_store_dword v16, v0, s[0:3], 0 offen offset:204
+; GFX8-NEXT: buffer_store_dword v15, v0, s[0:3], 0 offen offset:200
+; GFX8-NEXT: buffer_store_dword v14, v0, s[0:3], 0 offen offset:196
+; GFX8-NEXT: buffer_store_dword v13, v0, s[0:3], 0 offen offset:192
+; GFX8-NEXT: buffer_store_dword v33, v0, s[0:3], 0 offen
+; GFX8-NEXT: buffer_store_dword v20, v0, s[0:3], 0 offen offset:188
+; GFX8-NEXT: buffer_store_dword v19, v0, s[0:3], 0 offen offset:184
+; GFX8-NEXT: buffer_store_dword v18, v0, s[0:3], 0 offen offset:180
+; GFX8-NEXT: buffer_store_dword v17, v0, s[0:3], 0 offen offset:176
+; GFX8-NEXT: buffer_store_dword v24, v0, s[0:3], 0 offen offset:172
+; GFX8-NEXT: buffer_store_dword v23, v0, s[0:3], 0 offen offset:168
+; GFX8-NEXT: buffer_store_dword v22, v0, s[0:3], 0 offen offset:164
+; GFX8-NEXT: buffer_store_dword v21, v0, s[0:3], 0 offen offset:160
; GFX8-NEXT: s_waitcnt vmcnt(14)
-; GFX8-NEXT: buffer_store_dword v32, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x88, v0
-; GFX8-NEXT: buffer_store_dword v31, v1, s[0:3], 0 offen
-; GFX8-NEXT: v_add_u32_e32 v1, vcc, 0x84, v0
-; GFX8-NEXT: v_add_u32_e32 v0, vcc, 0x80, v0
-; GFX8-NEXT: buffer_store_dword v30, v1, s[0:3], 0 offen
-; GFX8-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen
+; GFX8-NEXT: buffer_store_dword v28, v0, s[0:3], 0 offen offset:156
+; GFX8-NEXT: buffer_store_dword v27, v0, s[0:3], 0 offen offset:152
+; GFX8-NEXT: buffer_store_dword v26, v0, s[0:3], 0 offen offset:148
+; GFX8-NEXT: buffer_store_dword v25, v0, s[0:3], 0 offen offset:144
+; GFX8-NEXT: buffer_store_dword v32, v0, s[0:3], 0 offen offset:140
+; GFX8-NEXT: buffer_store_dword v31, v0, s[0:3], 0 offen offset:136
+; GFX8-NEXT: buffer_store_dword v30, v0, s[0:3], 0 offen offset:132
+; GFX8-NEXT: buffer_store_dword v29, v0, s[0:3], 0 offen offset:128
; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
>From 19c6a75729b106e4accd3eaee5fee6dfc5785d74 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 17 Jun 2026 11:14:46 +0530
Subject: [PATCH 02/11] Add Target Specific hook computeKnownBitsForCopyFromReg
to reset implicit sret knownBits.
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 7 +++
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 ++
.../SelectionDAG/SelectionDAGBuilder.cpp | 45 -------------------
.../CodeGen/SelectionDAG/TargetLowering.cpp | 4 ++
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 24 +++++++---
llvm/lib/Target/AMDGPU/SIISelLowering.h | 6 +++
6 files changed, 39 insertions(+), 51 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 82c47cce0f522..19fff1d874004 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4391,6 +4391,13 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
const SelectionDAG &DAG,
unsigned Depth = 0) const;
+ /// Add target-specific known bits for a CopyFromReg node.
+ /// The default implementation preserves the known bits passed into it.
+ virtual void computeKnownBitsForCopyFromReg(
+ const SDValue Op, KnownBits &Known, const APInt &DemandedElts,
+ const SelectionDAG &DAG, const FunctionLoweringInfo *FLI,
+ unsigned Depth = 0) const;
+
/// Determine which of the bits specified in Mask are known to be either zero
/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
/// argument allows us to only collect the known bits that are shared by the
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f91af9befb9ce..bcd083ac96a3d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4519,6 +4519,10 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
TLI->computeKnownBitsForFrameIndex(cast<FrameIndexSDNode>(Op)->getIndex(),
Known, getMachineFunction());
break;
+ case ISD::CopyFromReg:
+ TLI->computeKnownBitsForCopyFromReg(Op, Known, DemandedElts, *this, FLI,
+ Depth);
+ break;
default:
if (Opcode < ISD::BUILTIN_OP_END)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 8c897333587ec..0608a95e09278 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -96,7 +96,6 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/InstructionCost.h"
-#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
@@ -2220,34 +2219,6 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
-
- // The CopyToReg/CopyFromReg pair used to pass the hidden sret pointer to
- // the return is opaque to value tracking, so re-materialize any known-bits
- // assertion recorded for DemoteReg (e.g. a target AssertZext on the high
- // address bits). This mirrors RegsForValue::getCopyFromRegs and lets the
- // return stores fold the pointer into a base+offset addressing mode.
- if (PtrValueVT.isInteger()) {
- if (const FunctionLoweringInfo::LiveOutInfo *LOI =
- FuncInfo.GetLiveOutRegInfo(DemoteReg)) {
- unsigned RegSize = PtrValueVT.getScalarSizeInBits();
- unsigned NumSignBits = LOI->NumSignBits;
- unsigned NumZeroBits = LOI->Known.countMinLeadingZeros();
- EVT FromVT(MVT::Other);
- bool IsSExt = false;
- if (NumZeroBits && NumZeroBits != RegSize) {
- FromVT = EVT::getIntegerVT(*DAG.getContext(), RegSize - NumZeroBits);
- } else if (NumSignBits > 1) {
- FromVT =
- EVT::getIntegerVT(*DAG.getContext(), RegSize - NumSignBits + 1);
- IsSExt = true;
- }
- if (FromVT != MVT::Other)
- RetPtr = DAG.getNode(IsSExt ? ISD::AssertSext : ISD::AssertZext,
- getCurSDLoc(), PtrValueVT, RetPtr,
- DAG.getValueType(FromVT));
- }
- }
-
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
@@ -12185,22 +12156,6 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
SDB->DAG.getCopyToReg(NewRoot, SDB->getCurSDLoc(), SRetReg, ArgValue);
DAG.setRoot(NewRoot);
- // The hidden sret pointer is shuttled to the return through SRetReg via a
- // CopyToReg/CopyFromReg pair, which is opaque to value tracking. That would
- // discard any known-bits assertion the target attached to the incoming
- // sret argument (e.g. AMDGPU's AssertZext marking the high address bits
- // zero so the return stores can fold into a base+offset addressing mode).
- // Record the argument's known bits for SRetReg so visitRet can
- // re-materialize the assertion after reading the register back. This
- // mirrors ComputeLiveOutVRegInfo, which only runs at -O>0, so gate on the
- // opt level to keep -O0 codegen unchanged.
- if (TM.getOptLevel() != CodeGenOptLevel::None &&
- ArgValue.getValueType().isInteger()) {
- unsigned NumSignBits = DAG.ComputeNumSignBits(ArgValue);
- KnownBits Known = DAG.computeKnownBits(ArgValue);
- FuncInfo->AddLiveOutRegInfo(SRetReg, NumSignBits, Known);
- }
-
// i indexes lowered arguments. Bump it past the hidden sret argument.
++i;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index a364186c68b67..da574d19cd9ec 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3936,6 +3936,10 @@ void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Known.resetAll();
}
+void TargetLowering::computeKnownBitsForCopyFromReg(
+ const SDValue, KnownBits &, const APInt &, const SelectionDAG &,
+ const FunctionLoweringInfo *, unsigned) const {}
+
void TargetLowering::computeKnownBitsForTargetInstr(
GISelValueTracking &Analysis, Register R, KnownBits &Known,
const APInt &DemandedElts, const MachineRegisterInfo &MRI,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index fb053edfc7a9e..6b08541343a58 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3708,12 +3708,7 @@ SDValue SITargetLowering::LowerFormalArguments(
if (Arg.Flags.isSRet()) {
// The return object should be reasonably addressable.
-
- // FIXME: This helps when the return is a real sret. If it is a
- // automatically inserted sret (i.e. CanLowerReturn returns false), an
- // extra copy is inserted in SelectionDAGBuilder which obscures this.
- unsigned NumBits =
- 32 - getSubtarget()->getKnownHighZeroBitsForFrameIndex();
+ unsigned NumBits = 32 - getSRetPointerKnownHighZeroBits();
Val = DAG.getNode(
ISD::AssertZext, DL, VT, Val,
DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
@@ -19608,6 +19603,10 @@ void SITargetLowering::finalizeLowering(MachineFunction &MF) const {
TargetLoweringBase::finalizeLowering(MF);
}
+unsigned SITargetLowering::getSRetPointerKnownHighZeroBits() const {
+ return getSubtarget()->getKnownHighZeroBitsForFrameIndex();
+}
+
void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
KnownBits &Known,
const APInt &DemandedElts,
@@ -19639,6 +19638,19 @@ void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Op, Known, DemandedElts, DAG, Depth);
}
+void SITargetLowering::computeKnownBitsForCopyFromReg(
+ const SDValue Op, KnownBits &Known, const APInt &, const SelectionDAG &,
+ const FunctionLoweringInfo *FLI, unsigned) const {
+ if (!FLI || FLI->CanLowerReturn || !Op.getValueType().isInteger())
+ return;
+
+ Register Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
+ if (Reg != FLI->DemoteRegister)
+ return;
+
+ Known.Zero.setHighBits(getSRetPointerKnownHighZeroBits());
+}
+
void SITargetLowering::computeKnownBitsForFrameIndex(
const int FI, KnownBits &Known, const MachineFunction &MF) const {
TargetLowering::computeKnownBitsForFrameIndex(FI, Known, MF);
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 95ff5bba7cfff..921f738749bd8 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -33,6 +33,8 @@ class SITargetLowering final : public AMDGPUTargetLowering {
private:
const GCNSubtarget *Subtarget;
+ unsigned getSRetPointerKnownHighZeroBits() const;
+
public:
MVT getRegisterTypeForCallingConv(LLVMContext &Context,
CallingConv::ID CC,
@@ -542,6 +544,10 @@ class SITargetLowering final : public AMDGPUTargetLowering {
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
+ void computeKnownBitsForCopyFromReg(
+ const SDValue Op, KnownBits &Known, const APInt &DemandedElts,
+ const SelectionDAG &DAG, const FunctionLoweringInfo *FLI,
+ unsigned Depth = 0) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
>From 1f96fae0db9b99e5e6d7b861b5719d9dc88022e1 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 17 Jun 2026 11:49:47 +0530
Subject: [PATCH 03/11] Added comment to function for clarity
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 6b08541343a58..2cef5981a400d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -19648,6 +19648,8 @@ void SITargetLowering::computeKnownBitsForCopyFromReg(
if (Reg != FLI->DemoteRegister)
return;
+ // Implicit sret lowering keeps the hidden return pointer in DemoteRegister.
+ // Preserve the same high-zero address fact used by explicit sret lowering.
Known.Zero.setHighBits(getSRetPointerKnownHighZeroBits());
}
>From b360eb8cae6ba90e249ec8cee28c34369eaaf1d8 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 17 Jun 2026 12:01:36 +0530
Subject: [PATCH 04/11] Formatting
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 10 ++++++----
llvm/lib/Target/AMDGPU/SIISelLowering.h | 9 +++++----
2 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 19fff1d874004..3533a530b3371 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4393,10 +4393,12 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
/// Add target-specific known bits for a CopyFromReg node.
/// The default implementation preserves the known bits passed into it.
- virtual void computeKnownBitsForCopyFromReg(
- const SDValue Op, KnownBits &Known, const APInt &DemandedElts,
- const SelectionDAG &DAG, const FunctionLoweringInfo *FLI,
- unsigned Depth = 0) const;
+ virtual void computeKnownBitsForCopyFromReg(const SDValue Op,
+ KnownBits &Known,
+ const APInt &DemandedElts,
+ const SelectionDAG &DAG,
+ const FunctionLoweringInfo *FLI,
+ unsigned Depth = 0) const;
/// Determine which of the bits specified in Mask are known to be either zero
/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 921f738749bd8..f0f923a13d6ef 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -544,10 +544,11 @@ class SITargetLowering final : public AMDGPUTargetLowering {
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- void computeKnownBitsForCopyFromReg(
- const SDValue Op, KnownBits &Known, const APInt &DemandedElts,
- const SelectionDAG &DAG, const FunctionLoweringInfo *FLI,
- unsigned Depth = 0) const override;
+ void computeKnownBitsForCopyFromReg(const SDValue Op, KnownBits &Known,
+ const APInt &DemandedElts,
+ const SelectionDAG &DAG,
+ const FunctionLoweringInfo *FLI,
+ unsigned Depth = 0) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
>From ed6646618aa6b87c6c4bbf2833086e764b051f26 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 17 Jun 2026 13:53:09 +0530
Subject: [PATCH 05/11] Deleted micro utility helper
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 9 +++------
llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 --
2 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 991f634f59315..f3c8fa44e914a 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3715,7 +3715,8 @@ SDValue SITargetLowering::LowerFormalArguments(
if (Arg.Flags.isSRet()) {
// The return object should be reasonably addressable.
- unsigned NumBits = 32 - getSRetPointerKnownHighZeroBits();
+ unsigned NumBits =
+ 32 - getSubtarget()->getKnownHighZeroBitsForFrameIndex();
Val = DAG.getNode(
ISD::AssertZext, DL, VT, Val,
DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
@@ -19667,10 +19668,6 @@ void SITargetLowering::finalizeLowering(MachineFunction &MF) const {
TargetLoweringBase::finalizeLowering(MF);
}
-unsigned SITargetLowering::getSRetPointerKnownHighZeroBits() const {
- return getSubtarget()->getKnownHighZeroBitsForFrameIndex();
-}
-
void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
KnownBits &Known,
const APInt &DemandedElts,
@@ -19714,7 +19711,7 @@ void SITargetLowering::computeKnownBitsForCopyFromReg(
// Implicit sret lowering keeps the hidden return pointer in DemoteRegister.
// Preserve the same high-zero address fact used by explicit sret lowering.
- Known.Zero.setHighBits(getSRetPointerKnownHighZeroBits());
+ Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
}
void SITargetLowering::computeKnownBitsForFrameIndex(
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index f0f923a13d6ef..864bf3fb2b138 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -33,8 +33,6 @@ class SITargetLowering final : public AMDGPUTargetLowering {
private:
const GCNSubtarget *Subtarget;
- unsigned getSRetPointerKnownHighZeroBits() const;
-
public:
MVT getRegisterTypeForCallingConv(LLVMContext &Context,
CallingConv::ID CC,
>From 4d7827040e63da32dd788bcd7dbac2b530354429 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Wed, 17 Jun 2026 19:03:28 +0530
Subject: [PATCH 06/11] Add a target hook for annotating the demoted return
pointer at its exact return-store use. Keep the default implementation as a
no-op and use the AMDGPU override to reattach the same AssertZext high-zero
fact used by explicit sret lowering.
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 17 ++++++------
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 ----
.../SelectionDAG/SelectionDAGBuilder.cpp | 1 +
.../CodeGen/SelectionDAG/TargetLowering.cpp | 4 ---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 26 +++++++++----------
llvm/lib/Target/AMDGPU/SIISelLowering.h | 8 +++---
6 files changed, 25 insertions(+), 36 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index f1dc2cf7518a7..b5b5ff35bee5b 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4391,15 +4391,6 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
const SelectionDAG &DAG,
unsigned Depth = 0) const;
- /// Add target-specific known bits for a CopyFromReg node.
- /// The default implementation preserves the known bits passed into it.
- virtual void computeKnownBitsForCopyFromReg(const SDValue Op,
- KnownBits &Known,
- const APInt &DemandedElts,
- const SelectionDAG &DAG,
- const FunctionLoweringInfo *FLI,
- unsigned Depth = 0) const;
-
/// Determine which of the bits specified in Mask are known to be either zero
/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
/// argument allows us to only collect the known bits that are shared by the
@@ -5123,6 +5114,14 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
return true;
}
+ /// Target-specific annotation for the hidden return pointer used when
+ /// CanLowerReturn returns false and SelectionDAG performs sret-demotion.
+ virtual SDValue annotateDemotedReturnPointer(SDValue RetPtr,
+ SelectionDAG &DAG,
+ const SDLoc &DL) const {
+ return RetPtr;
+ }
+
/// This hook must be implemented to lower outgoing return values, described
/// by the Outs array, into the specified DAG. The implementation should
/// return the resulting token chain value.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 92b4281a86bd8..53b4744d96f92 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4519,11 +4519,6 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
TLI->computeKnownBitsForFrameIndex(cast<FrameIndexSDNode>(Op)->getIndex(),
Known, getMachineFunction());
break;
- case ISD::CopyFromReg:
- TLI->computeKnownBitsForCopyFromReg(Op, Known, DemandedElts, *this, FLI,
- Depth);
- break;
-
default:
if (Opcode < ISD::BUILTIN_OP_END)
break;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 55e53e100d366..6c9906787d7b2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2219,6 +2219,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
+ RetPtr = TLI.annotateDemotedReturnPointer(RetPtr, DAG, getCurSDLoc());
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 83442a44572b2..524e084b8afa8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3941,10 +3941,6 @@ void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Known.resetAll();
}
-void TargetLowering::computeKnownBitsForCopyFromReg(
- const SDValue, KnownBits &, const APInt &, const SelectionDAG &,
- const FunctionLoweringInfo *, unsigned) const {}
-
void TargetLowering::computeKnownBitsForTargetInstr(
GISelValueTracking &Analysis, Register R, KnownBits &Known,
const APInt &DemandedElts, const MachineRegisterInfo &MRI,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index ef6bb9f9cf07e..f8dc7faf1a4c4 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -19713,19 +19713,19 @@ void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Op, Known, DemandedElts, DAG, Depth);
}
-void SITargetLowering::computeKnownBitsForCopyFromReg(
- const SDValue Op, KnownBits &Known, const APInt &, const SelectionDAG &,
- const FunctionLoweringInfo *FLI, unsigned) const {
- if (!FLI || FLI->CanLowerReturn || !Op.getValueType().isInteger())
- return;
-
- Register Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
- if (Reg != FLI->DemoteRegister)
- return;
-
- // Implicit sret lowering keeps the hidden return pointer in DemoteRegister.
- // Preserve the same high-zero address fact used by explicit sret lowering.
- Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
+SDValue SITargetLowering::annotateDemotedReturnPointer(SDValue RetPtr,
+ SelectionDAG &DAG,
+ const SDLoc &DL) const {
+ EVT PtrVT = RetPtr.getValueType();
+ if (!PtrVT.isInteger())
+ return RetPtr;
+
+ // Implicit sret lowering keeps the hidden return pointer in a virtual
+ // register. Preserve the same high-zero address fact used by explicit sret.
+ unsigned NumBits = 32 - getSubtarget()->getKnownHighZeroBitsForFrameIndex();
+ return DAG.getNode(
+ ISD::AssertZext, DL, PtrVT, RetPtr,
+ DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
}
void SITargetLowering::computeKnownBitsForFrameIndex(
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 864bf3fb2b138..4122affe73a29 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -538,15 +538,13 @@ class SITargetLowering final : public AMDGPUTargetLowering {
void finalizeLowering(MachineFunction &MF) const override;
+ SDValue annotateDemotedReturnPointer(SDValue RetPtr, SelectionDAG &DAG,
+ const SDLoc &DL) const override;
+
void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- void computeKnownBitsForCopyFromReg(const SDValue Op, KnownBits &Known,
- const APInt &DemandedElts,
- const SelectionDAG &DAG,
- const FunctionLoweringInfo *FLI,
- unsigned Depth = 0) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
>From 30d119fdac991c1c6c6eab5da042b50a102523c0 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Thu, 18 Jun 2026 14:48:07 +0530
Subject: [PATCH 07/11] AMDGPU implements the hook using the same high-zero
fact used for frame indices, and frame-index known-bits lowering reuses the
same helper.
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 15 ++++++------
.../SelectionDAG/SelectionDAGBuilder.cpp | 2 +-
.../CodeGen/SelectionDAG/TargetLowering.cpp | 19 +++++++++++++++
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 24 ++++---------------
llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 ++--
5 files changed, 35 insertions(+), 30 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index b5b5ff35bee5b..e19817718ed29 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4424,6 +4424,11 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
KnownBits &Known,
const MachineFunction &MF) const;
+ /// Determine which bits of an sret pointer are known to be 0.
+ /// The default implementation preserves the known bits passed into it.
+ virtual void computeKnownBitsForSRetPointer(KnownBits &Known,
+ const MachineFunction &MF) const;
+
/// This method can be implemented by targets that want to expose additional
/// information about sign bits to the DAG Combiner. The DemandedElts
/// argument allows us to only collect the minimum sign bits that are shared
@@ -5114,13 +5119,9 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
return true;
}
- /// Target-specific annotation for the hidden return pointer used when
- /// CanLowerReturn returns false and SelectionDAG performs sret-demotion.
- virtual SDValue annotateDemotedReturnPointer(SDValue RetPtr,
- SelectionDAG &DAG,
- const SDLoc &DL) const {
- return RetPtr;
- }
+ /// Annotate an sret pointer with known-bits assertions.
+ SDValue annotateSRetPointer(SDValue Ptr, SelectionDAG &DAG,
+ const SDLoc &DL) const;
/// This hook must be implemented to lower outgoing return values, described
/// by the Outs array, into the specified DAG. The implementation should
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 6c9906787d7b2..7710bb718f822 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2219,7 +2219,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
- RetPtr = TLI.annotateDemotedReturnPointer(RetPtr, DAG, getCurSDLoc());
+ RetPtr = TLI.annotateSRetPointer(RetPtr, DAG, getCurSDLoc());
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 524e084b8afa8..33fdd9582d9b3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3961,6 +3961,25 @@ void TargetLowering::computeKnownBitsForFrameIndex(
Known.Zero.setLowBits(Log2(MF.getFrameInfo().getObjectAlign(FrameIdx)));
}
+void TargetLowering::computeKnownBitsForSRetPointer(
+ KnownBits &, const MachineFunction &) const {}
+
+SDValue TargetLowering::annotateSRetPointer(SDValue Ptr, SelectionDAG &DAG,
+ const SDLoc &DL) const {
+ EVT PtrVT = Ptr.getValueType();
+
+ unsigned RegSize = PtrVT.getScalarSizeInBits();
+ KnownBits Known(RegSize);
+ computeKnownBitsForSRetPointer(Known, DAG.getMachineFunction());
+
+ unsigned NumZeroBits = Known.countMinLeadingZeros();
+ if (!NumZeroBits)
+ return Ptr;
+
+ EVT FromVT = EVT::getIntegerVT(*DAG.getContext(), RegSize - NumZeroBits);
+ return DAG.getNode(ISD::AssertZext, DL, PtrVT, Ptr, DAG.getValueType(FromVT));
+}
+
Align TargetLowering::computeKnownAlignForTargetInstr(
GISelValueTracking &Analysis, Register R, const MachineRegisterInfo &MRI,
unsigned Depth) const {
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index f8dc7faf1a4c4..dafb8b4105e64 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3729,11 +3729,7 @@ SDValue SITargetLowering::LowerFormalArguments(
if (Arg.Flags.isSRet()) {
// The return object should be reasonably addressable.
- unsigned NumBits =
- 32 - getSubtarget()->getKnownHighZeroBitsForFrameIndex();
- Val = DAG.getNode(
- ISD::AssertZext, DL, VT, Val,
- DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
+ Val = annotateSRetPointer(Val, DAG, DL);
}
Val = convertABITypeToValueType(DAG, Val, VA, DL);
@@ -19713,19 +19709,9 @@ void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Op, Known, DemandedElts, DAG, Depth);
}
-SDValue SITargetLowering::annotateDemotedReturnPointer(SDValue RetPtr,
- SelectionDAG &DAG,
- const SDLoc &DL) const {
- EVT PtrVT = RetPtr.getValueType();
- if (!PtrVT.isInteger())
- return RetPtr;
-
- // Implicit sret lowering keeps the hidden return pointer in a virtual
- // register. Preserve the same high-zero address fact used by explicit sret.
- unsigned NumBits = 32 - getSubtarget()->getKnownHighZeroBitsForFrameIndex();
- return DAG.getNode(
- ISD::AssertZext, DL, PtrVT, RetPtr,
- DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), NumBits)));
+void SITargetLowering::computeKnownBitsForSRetPointer(
+ KnownBits &Known, const MachineFunction &) const {
+ Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
}
void SITargetLowering::computeKnownBitsForFrameIndex(
@@ -19735,7 +19721,7 @@ void SITargetLowering::computeKnownBitsForFrameIndex(
// Set the high bits to zero based on the maximum allowed scratch size per
// wave. We can't use vaddr in MUBUF instructions if we don't know the address
// calculation won't overflow, so assume the sign bit is never set.
- Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
+ computeKnownBitsForSRetPointer(Known, MF);
}
static void knownBitsForWorkitemID(const GCNSubtarget &ST,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 4122affe73a29..97808715d711d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -538,13 +538,12 @@ class SITargetLowering final : public AMDGPUTargetLowering {
void finalizeLowering(MachineFunction &MF) const override;
- SDValue annotateDemotedReturnPointer(SDValue RetPtr, SelectionDAG &DAG,
- const SDLoc &DL) const override;
-
void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
+ void computeKnownBitsForSRetPointer(KnownBits &Known,
+ const MachineFunction &MF) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
>From 71cd9d66e895f45393de65092a4b5239b0cbf279 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Tue, 23 Jun 2026 13:35:47 +0530
Subject: [PATCH 08/11] [AMDGPU] Preserve stack object pointer facts for
demoted returns
Implicit sret demotion routes the hidden return pointer through SelectionDAGBuilder's DemoteRegister CopyToReg/CopyFromReg path, which loses the AssertZext used by the normal sret argument lowering path.
Add a TargetLowering hook for stack object pointer known bits and use a shared helper to materialize leading zero bits as AssertZext. AMDGPU implements the hook using the same high-zero fact used for frame indices, and both explicit and demoted sret lowering use the helper.
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 13 +++++++------
.../SelectionDAG/SelectionDAGBuilder.cpp | 2 +-
.../CodeGen/SelectionDAG/TargetLowering.cpp | 12 ++++++++----
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 6 +++---
llvm/lib/Target/AMDGPU/SIISelLowering.h | 4 ++--
.../AMDGPU/implicit-sret-demote-assertzext.ll | 19 +++++++++++++++++++
6 files changed, 40 insertions(+), 16 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index e19817718ed29..0ca203784a843 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4424,10 +4424,11 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
KnownBits &Known,
const MachineFunction &MF) const;
- /// Determine which bits of an sret pointer are known to be 0.
+ /// Determine which bits of a stack object pointer are known to be 0.
/// The default implementation preserves the known bits passed into it.
- virtual void computeKnownBitsForSRetPointer(KnownBits &Known,
- const MachineFunction &MF) const;
+ virtual void
+ computeKnownBitsForStackObjectPointer(KnownBits &Known,
+ const MachineFunction &MF) const;
/// This method can be implemented by targets that want to expose additional
/// information about sign bits to the DAG Combiner. The DemandedElts
@@ -5119,9 +5120,9 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
return true;
}
- /// Annotate an sret pointer with known-bits assertions.
- SDValue annotateSRetPointer(SDValue Ptr, SelectionDAG &DAG,
- const SDLoc &DL) const;
+ /// Annotate a stack object pointer with known-bits assertions.
+ SDValue annotateStackObjectPointer(SDValue Ptr, SelectionDAG &DAG,
+ const SDLoc &DL) const;
/// This hook must be implemented to lower outgoing return values, described
/// by the Outs array, into the specified DAG. The implementation should
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 7710bb718f822..7d14d5866778b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2219,7 +2219,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
- RetPtr = TLI.annotateSRetPointer(RetPtr, DAG, getCurSDLoc());
+ RetPtr = TLI.annotateStackObjectPointer(RetPtr, DAG, getCurSDLoc());
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 33fdd9582d9b3..d40b52a2a2b6c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3961,21 +3961,25 @@ void TargetLowering::computeKnownBitsForFrameIndex(
Known.Zero.setLowBits(Log2(MF.getFrameInfo().getObjectAlign(FrameIdx)));
}
-void TargetLowering::computeKnownBitsForSRetPointer(
+void TargetLowering::computeKnownBitsForStackObjectPointer(
KnownBits &, const MachineFunction &) const {}
-SDValue TargetLowering::annotateSRetPointer(SDValue Ptr, SelectionDAG &DAG,
- const SDLoc &DL) const {
+SDValue TargetLowering::annotateStackObjectPointer(SDValue Ptr,
+ SelectionDAG &DAG,
+ const SDLoc &DL) const {
EVT PtrVT = Ptr.getValueType();
unsigned RegSize = PtrVT.getScalarSizeInBits();
KnownBits Known(RegSize);
- computeKnownBitsForSRetPointer(Known, DAG.getMachineFunction());
+ computeKnownBitsForStackObjectPointer(Known, DAG.getMachineFunction());
unsigned NumZeroBits = Known.countMinLeadingZeros();
if (!NumZeroBits)
return Ptr;
+ // TODO: Stack object alignment also gives low zero bits. This helper only
+ // materializes leading zero bits for now; use ISD::AssertAlign if those
+ // low-bit facts need to be represented here.
EVT FromVT = EVT::getIntegerVT(*DAG.getContext(), RegSize - NumZeroBits);
return DAG.getNode(ISD::AssertZext, DL, PtrVT, Ptr, DAG.getValueType(FromVT));
}
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index dafb8b4105e64..750e59f4efeac 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3729,7 +3729,7 @@ SDValue SITargetLowering::LowerFormalArguments(
if (Arg.Flags.isSRet()) {
// The return object should be reasonably addressable.
- Val = annotateSRetPointer(Val, DAG, DL);
+ Val = annotateStackObjectPointer(Val, DAG, DL);
}
Val = convertABITypeToValueType(DAG, Val, VA, DL);
@@ -19709,7 +19709,7 @@ void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
Op, Known, DemandedElts, DAG, Depth);
}
-void SITargetLowering::computeKnownBitsForSRetPointer(
+void SITargetLowering::computeKnownBitsForStackObjectPointer(
KnownBits &Known, const MachineFunction &) const {
Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
}
@@ -19721,7 +19721,7 @@ void SITargetLowering::computeKnownBitsForFrameIndex(
// Set the high bits to zero based on the maximum allowed scratch size per
// wave. We can't use vaddr in MUBUF instructions if we don't know the address
// calculation won't overflow, so assume the sign bit is never set.
- computeKnownBitsForSRetPointer(Known, MF);
+ computeKnownBitsForStackObjectPointer(Known, MF);
}
static void knownBitsForWorkitemID(const GCNSubtarget &ST,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index 97808715d711d..fe1f81997a9fc 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -542,8 +542,8 @@ class SITargetLowering final : public AMDGPUTargetLowering {
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- void computeKnownBitsForSRetPointer(KnownBits &Known,
- const MachineFunction &MF) const override;
+ void computeKnownBitsForStackObjectPointer(
+ KnownBits &Known, const MachineFunction &MF) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
diff --git a/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll b/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
new file mode 100644
index 0000000000000..7aaa1057581d4
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
@@ -0,0 +1,19 @@
+; RUN: llc -mtriple=amdgcn-- -mcpu=hawaii -debug-only=isel-dump -filter-print-funcs=ret_large_implicit_sret -o /dev/null %s 2>&1 | FileCheck %s
+; REQUIRES: asserts
+
+; The demoted return pointer should carry an explicit AssertZext at the
+; return-store use. Do not recover this through a broad CopyFromReg known-bits
+; query, since that cannot prove which CopyFromReg is being inspected.
+
+define [64 x i32] @ret_large_implicit_sret(i32 %x) #0 {
+; CHECK-LABEL: Initial selection DAG: %bb.0 'ret_large_implicit_sret:'
+; CHECK: CopyToReg {{.*}} Register:i32 %[[SRET:[0-9]+]],
+; CHECK: CopyFromReg {{.*}} Register:i32 %[[SRET]]
+; CHECK-NEXT: {{ *}}t{{[0-9]+}}: i32 = AssertZext {{.*}} ValueType:ch:i17
+ %ins = insertvalue [64 x i32] undef, i32 %x, 0
+ %ins2 = insertvalue [64 x i32] %ins, i32 %x, 33
+ %ins3 = insertvalue [64 x i32] %ins2, i32 %x, 63
+ ret [64 x i32] %ins3
+}
+
+attributes #0 = { nounwind }
>From 5a7ff549a47afa0bf4cd3ecc24f9b849d93a2942 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Tue, 23 Jun 2026 13:40:01 +0530
Subject: [PATCH 09/11] Remove typo'd local test
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
.../AMDGPU/implicit-sret-demote-assertzext.ll | 19 -------------------
1 file changed, 19 deletions(-)
delete mode 100644 llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
diff --git a/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll b/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
deleted file mode 100644
index 7aaa1057581d4..0000000000000
--- a/llvm/test/CodeGen/AMDGPU/implicit-sret-demote-assertzext.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc -mtriple=amdgcn-- -mcpu=hawaii -debug-only=isel-dump -filter-print-funcs=ret_large_implicit_sret -o /dev/null %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
-
-; The demoted return pointer should carry an explicit AssertZext at the
-; return-store use. Do not recover this through a broad CopyFromReg known-bits
-; query, since that cannot prove which CopyFromReg is being inspected.
-
-define [64 x i32] @ret_large_implicit_sret(i32 %x) #0 {
-; CHECK-LABEL: Initial selection DAG: %bb.0 'ret_large_implicit_sret:'
-; CHECK: CopyToReg {{.*}} Register:i32 %[[SRET:[0-9]+]],
-; CHECK: CopyFromReg {{.*}} Register:i32 %[[SRET]]
-; CHECK-NEXT: {{ *}}t{{[0-9]+}}: i32 = AssertZext {{.*}} ValueType:ch:i17
- %ins = insertvalue [64 x i32] undef, i32 %x, 0
- %ins2 = insertvalue [64 x i32] %ins, i32 %x, 33
- %ins3 = insertvalue [64 x i32] %ins2, i32 %x, 63
- ret [64 x i32] %ins3
-}
-
-attributes #0 = { nounwind }
>From 02ba8e78891845b3b44a8c3a47ce57f709ccac5e Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Tue, 23 Jun 2026 13:43:05 +0530
Subject: [PATCH 10/11] [NFC] Restore SelectionDAG computeKnownBits spacing
Restore an unrelated blank line removed from SelectionDAG::computeKnownBits.
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 53b4744d96f92..534ba48bd5d1a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4519,6 +4519,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
TLI->computeKnownBitsForFrameIndex(cast<FrameIndexSDNode>(Op)->getIndex(),
Known, getMachineFunction());
break;
+
default:
if (Opcode < ISD::BUILTIN_OP_END)
break;
>From 3afd14ca0a9ad8e62ff807e39481b870ce2b3999 Mon Sep 17 00:00:00 2001
From: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Date: Mon, 29 Jun 2026 19:20:27 +0530
Subject: [PATCH 11/11] [CodeGen] Thread stack object alignment through known
bits
Pass stack object alignment to computeKnownBitsForStackObjectPointer so the generic implementation can model alignment-derived low zero bits. Reuse the helper for frame-index known bits and preserve AMDGPU's high-zero stack pointer facts through the same hook.
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
---
llvm/include/llvm/CodeGen/TargetLowering.h | 10 ++++-----
.../SelectionDAG/SelectionDAGBuilder.cpp | 5 +++--
.../CodeGen/SelectionDAG/TargetLowering.cpp | 21 ++++++++++++-------
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 18 +++++++++-------
llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 +++--
5 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 569dfba95294b..0d7cb232b2993 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4428,10 +4428,10 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
const MachineFunction &MF) const;
/// Determine which bits of a stack object pointer are known to be 0.
- /// The default implementation preserves the known bits passed into it.
- virtual void
- computeKnownBitsForStackObjectPointer(KnownBits &Known,
- const MachineFunction &MF) const;
+ /// The default implementation computes low bits based on alignment.
+ virtual void computeKnownBitsForStackObjectPointer(KnownBits &Known,
+ const MachineFunction &MF,
+ Align Alignment) const;
/// This method can be implemented by targets that want to expose additional
/// information about sign bits to the DAG Combiner. The DemandedElts
@@ -5125,7 +5125,7 @@ class LLVM_ABI TargetLowering : public TargetLoweringBase {
/// Annotate a stack object pointer with known-bits assertions.
SDValue annotateStackObjectPointer(SDValue Ptr, SelectionDAG &DAG,
- const SDLoc &DL) const;
+ const SDLoc &DL, Align Alignment) const;
/// This hook must be implemented to lower outgoing return values, described
/// by the Outs array, into the specified DAG. The implementation should
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 4a35c84aa4401..ee47f30ce4003 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2219,7 +2219,9 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
MVT PtrValueVT = TLI.getPointerTy(DL, DL.getAllocaAddrSpace());
SDValue RetPtr =
DAG.getCopyFromReg(Chain, getCurSDLoc(), DemoteReg, PtrValueVT);
- RetPtr = TLI.annotateStackObjectPointer(RetPtr, DAG, getCurSDLoc());
+ Align BaseAlign = DL.getPrefTypeAlign(I.getOperand(0)->getType());
+ RetPtr =
+ TLI.annotateStackObjectPointer(RetPtr, DAG, getCurSDLoc(), BaseAlign);
SDValue RetOp = getValue(I.getOperand(0));
SmallVector<EVT, 4> ValueVTs, MemVTs;
@@ -2229,7 +2231,6 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
unsigned NumValues = ValueVTs.size();
SmallVector<SDValue, 4> Chains(NumValues);
- Align BaseAlign = DL.getPrefTypeAlign(I.getOperand(0)->getType());
for (unsigned i = 0; i != NumValues; ++i) {
// An aggregate return value cannot wrap around the address space, so
// offsets to its parts don't wrap either.
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 9ef1c36b38b4b..523d34ad06948 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3983,29 +3983,34 @@ void TargetLowering::computeKnownFPClassForTargetInstr(
void TargetLowering::computeKnownBitsForFrameIndex(
const int FrameIdx, KnownBits &Known, const MachineFunction &MF) const {
- // The low bits are known zero if the pointer is aligned.
- Known.Zero.setLowBits(Log2(MF.getFrameInfo().getObjectAlign(FrameIdx)));
+ computeKnownBitsForStackObjectPointer(
+ Known, MF, MF.getFrameInfo().getObjectAlign(FrameIdx));
}
void TargetLowering::computeKnownBitsForStackObjectPointer(
- KnownBits &, const MachineFunction &) const {}
+ KnownBits &Known, const MachineFunction &, Align Alignment) const {
+ // The low bits are known zero if the pointer is aligned.
+ Known.Zero.setLowBits(Log2(Alignment));
+}
SDValue TargetLowering::annotateStackObjectPointer(SDValue Ptr,
SelectionDAG &DAG,
- const SDLoc &DL) const {
+ const SDLoc &DL,
+ Align Alignment) const {
EVT PtrVT = Ptr.getValueType();
unsigned RegSize = PtrVT.getScalarSizeInBits();
KnownBits Known(RegSize);
- computeKnownBitsForStackObjectPointer(Known, DAG.getMachineFunction());
+ computeKnownBitsForStackObjectPointer(Known, DAG.getMachineFunction(),
+ Alignment);
unsigned NumZeroBits = Known.countMinLeadingZeros();
if (!NumZeroBits)
return Ptr;
- // TODO: Stack object alignment also gives low zero bits. This helper only
- // materializes leading zero bits for now; use ISD::AssertAlign if those
- // low-bit facts need to be represented here.
+ // TODO: This helper only materializes leading-zero facts. Use
+ // ISD::AssertAlign if callers need alignment-derived low-zero bits to be
+ // represented in the DAG.
EVT FromVT = EVT::getIntegerVT(*DAG.getContext(), RegSize - NumZeroBits);
return DAG.getNode(ISD::AssertZext, DL, PtrVT, Ptr, DAG.getValueType(FromVT));
}
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index bc45b9e81ede1..766584245ab3f 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3728,7 +3728,8 @@ SDValue SITargetLowering::LowerFormalArguments(
if (Arg.Flags.isSRet()) {
// The return object should be reasonably addressable.
- Val = annotateStackObjectPointer(Val, DAG, DL);
+ Val = annotateStackObjectPointer(Val, DAG, DL,
+ Arg.Flags.getNonZeroMemAlign());
}
Val = convertABITypeToValueType(DAG, Val, VA, DL);
@@ -19709,18 +19710,19 @@ void SITargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
}
void SITargetLowering::computeKnownBitsForStackObjectPointer(
- KnownBits &Known, const MachineFunction &) const {
+ KnownBits &Known, const MachineFunction &MF, Align Alignment) const {
+ TargetLowering::computeKnownBitsForStackObjectPointer(Known, MF, Alignment);
+
+ // Set the high bits to zero based on the maximum allowed scratch size per
+ // wave. We can't use vaddr in MUBUF instructions if we don't know the address
+ // calculation won't overflow, so assume the sign bit is never set.
Known.Zero.setHighBits(getSubtarget()->getKnownHighZeroBitsForFrameIndex());
}
void SITargetLowering::computeKnownBitsForFrameIndex(
const int FI, KnownBits &Known, const MachineFunction &MF) const {
- TargetLowering::computeKnownBitsForFrameIndex(FI, Known, MF);
-
- // Set the high bits to zero based on the maximum allowed scratch size per
- // wave. We can't use vaddr in MUBUF instructions if we don't know the address
- // calculation won't overflow, so assume the sign bit is never set.
- computeKnownBitsForStackObjectPointer(Known, MF);
+ computeKnownBitsForStackObjectPointer(Known, MF,
+ MF.getFrameInfo().getObjectAlign(FI));
}
static void knownBitsForWorkitemID(const GCNSubtarget &ST,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index fe1f81997a9fc..c41d8652be482 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -542,8 +542,9 @@ class SITargetLowering final : public AMDGPUTargetLowering {
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- void computeKnownBitsForStackObjectPointer(
- KnownBits &Known, const MachineFunction &MF) const override;
+ void computeKnownBitsForStackObjectPointer(KnownBits &Known,
+ const MachineFunction &MF,
+ Align Alignment) const override;
void computeKnownBitsForFrameIndex(int FrameIdx,
KnownBits &Known,
const MachineFunction &MF) const override;
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