[llvm] f8132d8 - [X86] Fold broadcast(truncate(extract_vector_elt(x, 0))) -> bitcast(broadcast(x)) (#206461)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2026-06-29T13:14:26+01:00
New Revision: f8132d8a033ee1e0ff9a2d3cf4d2da04cd63e5e8

URL: https://github.com/llvm/llvm-project/commit/f8132d8a033ee1e0ff9a2d3cf4d2da04cd63e5e8
DIFF: https://github.com/llvm/llvm-project/commit/f8132d8a033ee1e0ff9a2d3cf4d2da04cd63e5e8.diff

LOG: [X86] Fold broadcast(truncate(extract_vector_elt(x, 0))) -> bitcast(broadcast(x)) (#206461)

Fixes regressions in #205098

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/combine-reductions.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b95ac78f50049..0628aa6baaa7e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -43288,6 +43288,22 @@ static SDValue combineTargetShuffle(SDValue N, const SDLoc &DL,
         TLI.isTypeLegal(Src.getOperand(0).getValueType()))
       return DAG.getNode(X86ISD::VBROADCAST, DL, VT, Src.getOperand(0));
 
+    // broadcast(truncate(extract_vector_elt(x, 0))) -> bitcast(broadcast(x)).
+    if (Src.getOpcode() == ISD::TRUNCATE &&
+        Src.getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
+        isNullConstant(Src.getOperand(0).getOperand(1))) {
+      SDValue NewSrc = Src.getOperand(0).getOperand(0);
+      if (Src.getOperand(0).getValueType() ==
+              NewSrc.getValueType().getScalarType() &&
+          TLI.isTypeLegal(NewSrc.getValueType())) {
+        MVT VecVT = MVT::getVectorVT(Src.getSimpleValueType(),
+                                     NewSrc.getValueSizeInBits() /
+                                         Src.getValueSizeInBits());
+        return DAG.getNode(X86ISD::VBROADCAST, DL, VT,
+                           DAG.getBitcast(VecVT, NewSrc));
+      }
+    }
+
     // Share broadcast with the longest vector and extract low subvector (free).
     // Ensure the same SDValue from the SDNode use is being used.
     for (SDNode *User : Src->users())

diff  --git a/llvm/test/CodeGen/X86/combine-reductions.ll b/llvm/test/CodeGen/X86/combine-reductions.ll
index 844cd13e71d49..5f59cce91e2a3 100644
--- a/llvm/test/CodeGen/X86/combine-reductions.ll
+++ b/llvm/test/CodeGen/X86/combine-reductions.ll
@@ -33,7 +33,6 @@ define { i16, i16 } @test_reduce_v16i16_with_umin(<16 x i16> %x, <16 x i16> %y)
 ; AVX2-NEXT:    vpminuw %xmm2, %xmm0, %xmm2
 ; AVX2-NEXT:    vphminposuw %xmm2, %xmm2
 ; AVX2-NEXT:    vmovd %xmm2, %eax
-; AVX2-NEXT:    vmovd %eax, %xmm2
 ; AVX2-NEXT:    vpbroadcastw %xmm2, %ymm2
 ; AVX2-NEXT:    vpcmpeqw %ymm2, %ymm0, %ymm0
 ; AVX2-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2