[llvm] [DAGCombiner] Fold smax(X, -1)/smin(X, 0) to bitwise shift forms (PR #206242)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 29 04:33:09 PDT 2026
================
@@ -6321,14 +6321,14 @@ SDValue DAGCombiner::visitIMINMAX(SDNode *N) {
if (TLI.isTypeLegal(VT) &&
!TLI.shouldAvoidTransformToShift(VT, VT.getScalarSizeInBits() - 1)) {
if (Opcode == ISD::SMAX && TLI.isOperationExpand(ISD::SMAX, VT) &&
- N0.getOpcode() != ISD::SMIN && isAllOnesConstant(N1)) {
+ N0.getOpcode() != ISD::SMIN && sd_match(N1, m_AllOnes())) {
SDValue ShiftAmt =
DAG.getShiftAmountConstant(VT.getScalarSizeInBits() - 1, VT, DL);
SDValue Shift = DAG.getNode(ISD::SRA, DL, VT, N0, ShiftAmt);
return DAG.getNode(ISD::OR, DL, VT, N0, Shift);
}
if (Opcode == ISD::SMIN && TLI.isOperationExpand(ISD::SMIN, VT) &&
- N0.getOpcode() != ISD::SMAX && isNullConstant(N1)) {
+ N0.getOpcode() != ISD::SMAX && sd_match(N1, m_Zero())) {
----------------
arsenm wrote:
I meant one sd_match instant on the constant, and then check the requesting const APInt * here and above
https://github.com/llvm/llvm-project/pull/206242
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