[llvm] [CodeGen] Add widening support for ISD::CTTZ_ELTS (PR #205841)

[Luke Lau via llvm-commits]

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@@ -201,4 +201,64 @@ define i16 @ctz_v8i1_i16_ret(<8 x i1> %a) {
   ret i16 %res
 }
 
+define i32 @ctz_v3i32(<3 x i32> %a) {
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lukel97 wrote:

How come that ends up generating get_active_lane_mask? We don't really have lowering for that in RISC-V, the intrinsic just gets expanded. Is it from SelectionDAG::getMaskFromElementCount?

https://github.com/llvm/llvm-project/pull/205841