[llvm] [AArch64] Define GCS operations as SYS and SYSL aliases (PR #203564)

[Jonathan Thackray via llvm-commits]

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@@ -2164,6 +2164,19 @@ class SystemLXtI<bit L, string asm>
   let Inst{7-5}   = op2;
 }
 
+// Codegen-only GCS SYSL operations preserve the incoming Rt value when GCS is
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jthackray wrote:

Thanks. Now uses a new `GCSTiedSystemLXtI` class with `Constraints = "$Rt = $_Rt"` so input/output go to the same physical register.

https://github.com/llvm/llvm-project/pull/203564