[lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)

[Jonathan Thackray via llvm-commits]

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@@ -8691,7 +8648,19 @@ unsigned AArch64AsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
   }
 }
 
-ParseStatus AArch64AsmParser::tryParseGPRSeqPair(OperandVector &Operands) {
+template <bool AllowXZRPair>
+ParseStatus
+AArch64AsmParser::tryParseConsecutiveGPRSeqPair(OperandVector &Operands) {
+  const char *FirstRegExpected =
+      AllowXZRPair ? "expected xzr/xzr or the first even register of a "
+                     "consecutive 64-bit register pair"
+                   : "expected first even register of a consecutive same-size "
+                     "even/odd register pair";
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jthackray wrote:

Thanks, updated to use `llvm::formatv`

https://github.com/llvm/llvm-project/pull/182410