[llvm] 27e3251 - [InstCombine] Create new instructions instead of in-place operand replacement (#115988)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 28 11:35:47 PDT 2026
Author: Yingwei Zheng
Date: 2026-06-29T02:35:42+08:00
New Revision: 27e3251a03e61483bf653b7c2bf90898745952f2
URL: https://github.com/llvm/llvm-project/commit/27e3251a03e61483bf653b7c2bf90898745952f2
DIFF: https://github.com/llvm/llvm-project/commit/27e3251a03e61483bf653b7c2bf90898745952f2.diff
LOG: [InstCombine] Create new instructions instead of in-place operand replacement (#115988)
Fixes https://github.com/llvm/llvm-project/issues/115890.
Currently it doesn't affect final codegen. But we may suffer from this
problem when we utilize these attributes for further optimization (e.g.,
https://github.com/llvm/llvm-project/pull/111284). This test case is
reduced from a csmith-generated C program. And I believe this problem
also exists in real-world programs.
Added:
Modified:
llvm/include/llvm/IR/Attributes.h
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/abs-intrinsic.ll
llvm/test/Transforms/InstCombine/bit_ceil.ll
llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
llvm/test/Transforms/InstCombine/ctpop.ll
llvm/test/Transforms/InstCombine/cttz-abs.ll
llvm/test/Transforms/InstCombine/cttz-negative.ll
llvm/test/Transforms/InstCombine/hyperbolic-functions.ll
llvm/test/Transforms/InstCombine/intrinsics.ll
llvm/test/Transforms/InstCombine/is_fpclass.ll
llvm/test/Transforms/InstCombine/minmax-fold.ll
llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
llvm/test/Transforms/InstCombine/powi.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/IR/Attributes.h b/llvm/include/llvm/IR/Attributes.h
index 833f2a033a067..049f699b2980b 100644
--- a/llvm/include/llvm/IR/Attributes.h
+++ b/llvm/include/llvm/IR/Attributes.h
@@ -579,9 +579,6 @@ class AttributeList {
static AttributeList getImpl(LLVMContext &C, ArrayRef<AttributeSet> AttrSets);
- AttributeList setAttributesAtIndex(LLVMContext &C, unsigned Index,
- AttributeSet Attrs) const;
-
public:
AttributeList() = default;
@@ -604,6 +601,11 @@ class AttributeList {
LLVM_ABI static AttributeList get(LLVMContext &C, unsigned Index,
const AttrBuilder &B);
+ /// Set the attribute set at the given index.
+ /// Returns a new list because attribute lists are immutable.
+ [[nodiscard]] LLVM_ABI AttributeList setAttributesAtIndex(
+ LLVMContext &C, unsigned Index, AttributeSet Attrs) const;
+
// TODO: remove non-AtIndex versions of these methods.
/// Add an attribute to the attribute set at the given index.
/// Returns a new list because attribute lists are immutable.
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index ce9e4b836a56e..0c2d11fab4f43 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -507,21 +507,20 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
// If ctlz/cttz is only used as a shift amount, set is_zero_poison to true.
if (II.hasOneUse() && match(Op1, m_Zero()) &&
- match(II.user_back(), m_Shift(m_Value(), m_Specific(&II)))) {
- II.dropUBImplyingAttrsAndMetadata();
- return IC.replaceOperand(II, 1, IC.Builder.getTrue());
- }
+ match(II.user_back(), m_Shift(m_Value(), m_Specific(&II))))
+ return CallInst::Create(II.getCalledFunction(),
+ {Op0, IC.Builder.getTrue()});
Constant *C;
if (IsTZ) {
// cttz(-x) -> cttz(x)
if (match(Op0, m_Neg(m_Value(X))))
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), {X, Op1});
// cttz(-x & x) -> cttz(x)
if (match(Op0, m_c_And(m_Neg(m_Value(X)), m_Deferred(X))))
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), {X, Op1});
// cttz(sext(x)) -> cttz(zext(x))
if (match(Op0, m_OneUse(m_SExt(m_Value(X))))) {
@@ -545,10 +544,10 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
Value *Y;
SelectPatternFlavor SPF = matchSelectPattern(Op0, X, Y).Flavor;
if (SPF == SPF_ABS || SPF == SPF_NABS)
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), {X, Op1});
if (match(Op0, m_Intrinsic<Intrinsic::abs>(m_Value(X))))
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), {X, Op1});
// cttz(shl(%const, %val), 1) --> add(cttz(%const, 1), %val)
if (match(Op0, m_Shl(m_ImmConstant(C), m_Value(X))) &&
@@ -638,7 +637,8 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
if (!Known.One.isZero() ||
isKnownNonZero(Op0, IC.getSimplifyQuery().getWithInstruction(&II))) {
if (!match(II.getArgOperand(1), m_One()))
- return IC.replaceOperand(II, 1, IC.Builder.getTrue());
+ return CallInst::Create(II.getCalledFunction(),
+ {Op0, IC.Builder.getTrue()});
}
// Add range attribute since known bits can't completely reflect what we know.
@@ -665,13 +665,13 @@ static Instruction *foldCtpop(IntrinsicInst &II, InstCombinerImpl &IC) {
// ctpop(bitreverse(x)) -> ctpop(x)
// ctpop(bswap(x)) -> ctpop(x)
if (match(Op0, m_BitReverse(m_Value(X))) || match(Op0, m_BSwap(m_Value(X))))
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), X);
// ctpop(rot(x)) -> ctpop(x)
if ((match(Op0, m_FShl(m_Value(X), m_Value(Y), m_Value())) ||
match(Op0, m_FShr(m_Value(X), m_Value(Y), m_Value()))) &&
X == Y)
- return IC.replaceOperand(II, 0, X);
+ return CallInst::Create(II.getCalledFunction(), X);
// ctpop(x | -x) -> bitwidth - cttz(x, false)
if (Op0->hasOneUse() &&
@@ -923,6 +923,15 @@ static CallInst *canonicalizeConstantArg0ToArg1(CallInst &Call) {
if (isa<Constant>(Arg0) && !isa<Constant>(Arg1)) {
Call.setArgOperand(0, Arg1);
Call.setArgOperand(1, Arg0);
+ AttributeList CallAttr = Call.getAttributes();
+ AttributeSet LHSAttr = CallAttr.getParamAttrs(0);
+ AttributeSet RHSAttr = CallAttr.getParamAttrs(1);
+ LLVMContext &Ctx = Call.getContext();
+ Call.setAttributes(CallAttr
+ .setAttributesAtIndex(
+ Ctx, AttributeList::FirstArgIndex + 0, RHSAttr)
+ .setAttributesAtIndex(
+ Ctx, AttributeList::FirstArgIndex + 1, LHSAttr));
return &Call;
}
return nullptr;
@@ -1063,18 +1072,17 @@ Instruction *InstCombinerImpl::foldIntrinsicIsFPClass(IntrinsicInst &II) {
II.getFunction()->getAttributes().hasFnAttr(Attribute::StrictFP);
Value *FNegSrc;
- if (match(Src0, m_FNeg(m_Value(FNegSrc)))) {
- // is.fpclass (fneg x), mask -> is.fpclass x, (fneg mask)
-
- II.setArgOperand(1, ConstantInt::get(Src1->getType(), fneg(Mask)));
- return replaceOperand(II, 0, FNegSrc);
- }
+ // is.fpclass (fneg x), mask -> is.fpclass x, (fneg mask)
+ if (match(Src0, m_FNeg(m_Value(FNegSrc))))
+ return CallInst::Create(
+ II.getCalledFunction(),
+ {FNegSrc, ConstantInt::get(Src1->getType(), fneg(Mask))});
Value *FAbsSrc;
- if (match(Src0, m_FAbs(m_Value(FAbsSrc)))) {
- II.setArgOperand(1, ConstantInt::get(Src1->getType(), inverse_fabs(Mask)));
- return replaceOperand(II, 0, FAbsSrc);
- }
+ if (match(Src0, m_FAbs(m_Value(FAbsSrc))))
+ return CallInst::Create(
+ II.getCalledFunction(),
+ {FAbsSrc, ConstantInt::get(Src1->getType(), inverse_fabs(Mask))});
if ((OrderedMask == fcInf || OrderedInvertedMask == fcInf) &&
(IsOrdered || IsUnordered) && !IsStrict) {
@@ -2025,6 +2033,8 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
if (auto Pair = matchSymmetricPair(II->getOperand(0), II->getOperand(1))) {
replaceOperand(*II, 0, Pair->first);
replaceOperand(*II, 1, Pair->second);
+ II->dropPoisonGeneratingAnnotations();
+ II->dropUBImplyingAttrsAndMetadata();
return II;
}
@@ -2059,13 +2069,16 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
// abs(-x) -> abs(x)
Value *X;
- if (match(IIOperand, m_Neg(m_Value(X)))) {
- if (cast<Instruction>(IIOperand)->hasNoSignedWrap() || IntMinIsPoison)
- replaceOperand(*II, 1, Builder.getTrue());
- return replaceOperand(*II, 0, X);
- }
+ if (match(IIOperand, m_Neg(m_Value(X))))
+ return CallInst::Create(
+ II->getCalledFunction(),
+ {X,
+ Builder.getInt1(IntMinIsPoison ||
+ cast<Instruction>(IIOperand)->hasNoSignedWrap())});
+
if (match(IIOperand, m_c_Select(m_Neg(m_Value(X)), m_Deferred(X))))
- return replaceOperand(*II, 0, X);
+ return CallInst::Create(II->getCalledFunction(),
+ {X, II->getArgOperand(1)});
Value *Y;
// abs(a * abs(b)) -> abs(a * b)
@@ -2075,7 +2088,8 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
bool NSW =
cast<Instruction>(IIOperand)->hasNoSignedWrap() && IntMinIsPoison;
auto *XY = NSW ? Builder.CreateNSWMul(X, Y) : Builder.CreateMul(X, Y);
- return replaceOperand(*II, 0, XY);
+ return CallInst::Create(II->getCalledFunction(),
+ {XY, II->getArgOperand(1)});
}
if (std::optional<bool> Known =
@@ -2517,7 +2531,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
match(II->getArgOperand(0), m_FAbs(m_Value(X))) ||
match(II->getArgOperand(0),
m_Intrinsic<Intrinsic::copysign>(m_Value(X), m_Value())))
- return replaceOperand(*II, 0, X);
+ return CallInst::Create(II->getCalledFunction(), {X, Power});
}
}
if (ConstantFP *Base = dyn_cast<ConstantFP>(II->getArgOperand(0))) {
@@ -2560,7 +2574,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
if (!ModuloC)
return nullptr;
if (ModuloC != ShAmtC)
- return replaceOperand(*II, 2, ModuloC);
+ return CallInst::Create(II->getCalledFunction(), {Op0, Op1, ModuloC});
assert(match(ConstantFoldCompareInstOperands(ICmpInst::ICMP_UGT, WidthC,
ShAmtC, DL),
@@ -3091,19 +3105,14 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
Value *Src1 = II->getArgOperand(1);
Value *Src2 = II->getArgOperand(2);
Value *X, *Y;
- if (match(Src0, m_FNeg(m_Value(X))) && match(Src1, m_FNeg(m_Value(Y)))) {
- replaceOperand(*II, 0, X);
- replaceOperand(*II, 1, Y);
- return II;
- }
+ if (match(Src0, m_FNeg(m_Value(X))) && match(Src1, m_FNeg(m_Value(Y))))
+ return replaceInstUsesWith(
+ *II, Builder.CreateIntrinsic(IID, II->getType(), {X, Y, Src2}, II));
// fma fabs(x), fabs(x), z -> fma x, x, z
- if (match(Src0, m_FAbs(m_Value(X))) &&
- match(Src1, m_FAbs(m_Specific(X)))) {
- replaceOperand(*II, 0, X);
- replaceOperand(*II, 1, X);
- return II;
- }
+ if (match(Src0, m_FAbs(m_Value(X))) && match(Src1, m_FAbs(m_Specific(X))))
+ return replaceInstUsesWith(
+ *II, Builder.CreateIntrinsic(IID, II->getType(), {X, X, Src2}, II));
// Try to simplify the underlying FMul. We can only apply simplifications
// that do not require rounding.
@@ -3157,14 +3166,16 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
if (match(Mag, m_APFloat(MagC)) && MagC->isNegative()) {
APFloat PosMagC = *MagC;
PosMagC.clearSign();
- return replaceOperand(*II, 0, ConstantFP::get(Mag->getType(), PosMagC));
+ return replaceInstUsesWith(
+ *II, Builder.CreateCopySign(ConstantFP::get(Mag->getType(), PosMagC),
+ Sign, II));
}
// Peek through changes of magnitude's sign-bit. This call rewrites those:
// copysign (fabs X), Sign --> copysign X, Sign
// copysign (fneg X), Sign --> copysign X, Sign
if (match(Mag, m_FAbs(m_Value(X))) || match(Mag, m_FNeg(m_Value(X))))
- return replaceOperand(*II, 0, X);
+ return replaceInstUsesWith(*II, Builder.CreateCopySign(X, Sign, II));
// copysign(floor(fabs(X)), X) --> copysign(trunc(X), X)
// copysign ignores the sign bit of its magnitude argument (implicit fabs),
@@ -3175,7 +3186,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
if (match(Mag, m_Intrinsic<Intrinsic::floor>(m_FAbs(m_Value(FAbsArg)))) &&
FAbsArg == Sign) {
Value *Trunc = Builder.CreateUnaryIntrinsic(Intrinsic::trunc, Sign, II);
- return replaceOperand(*II, 0, Trunc);
+ return replaceInstUsesWith(*II, Builder.CreateCopySign(Trunc, Sign, II));
}
Type *SignEltTy = Sign->getType()->getScalarType();
@@ -3220,10 +3231,10 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
}
// fabs (select Cond, -FVal, FVal) --> fabs FVal
if (match(TVal, m_FNeg(m_Specific(FVal))))
- return replaceOperand(*II, 0, FVal);
+ return replaceInstUsesWith(*II, Builder.CreateFAbs(FVal, II));
// fabs (select Cond, TVal, -TVal) --> fabs TVal
if (match(FVal, m_FNeg(m_Specific(TVal))))
- return replaceOperand(*II, 0, TVal);
+ return replaceInstUsesWith(*II, Builder.CreateFAbs(TVal, II));
}
Value *Magnitude, *Sign;
@@ -3262,7 +3273,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
// f(fabs(x)) --> f(x)
// f(copysign(x, y)) --> f(x)
// for f in {cos, cosh}
- return replaceOperand(*II, 0, X);
+ return replaceInstUsesWith(*II, Builder.CreateUnaryIntrinsic(IID, X, II));
}
break;
}
@@ -3327,9 +3338,8 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
signBitMustBeTheSame(Exp, InnerExp, SQ.getWithInstruction(II)))) {
Value *NewExp =
Builder.CreateBinaryIntrinsic(Intrinsic::sadd_sat, InnerExp, Exp);
- II->setArgOperand(1, NewExp);
- II->setFastMathFlags(InnerFlags); // Or the inner flags.
- return replaceOperand(*II, 0, InnerSrc);
+ return replaceInstUsesWith(
+ *II, Builder.CreateLdexp(InnerSrc, NewExp, FMF | InnerFlags));
}
}
diff --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 96dfbe4730d0e..f93d0b366ef11 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -227,6 +227,16 @@ define i32 @abs_of_neg(i32 %x) {
ret i32 %b
}
+define i32 @abs_of_neg_range(i32 %x) {
+; CHECK-LABEL: @abs_of_neg_range(
+; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
+; CHECK-NEXT: ret i32 [[B]]
+;
+ %a = sub i32 0, %x
+ %b = call i32 @llvm.abs.i32(i32 range(i32 -10, 0) %a, i1 false)
+ ret i32 %b
+}
+
define <4 x i32> @abs_of_neg_vec(<4 x i32> %x) {
; CHECK-LABEL: @abs_of_neg_vec(
; CHECK-NEXT: [[B:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 true)
diff --git a/llvm/test/Transforms/InstCombine/bit_ceil.ll b/llvm/test/Transforms/InstCombine/bit_ceil.ll
index edf1c176ff12c..4017c41acbdd7 100644
--- a/llvm/test/Transforms/InstCombine/bit_ceil.ll
+++ b/llvm/test/Transforms/InstCombine/bit_ceil.ll
@@ -380,7 +380,7 @@ define i32 @bit_ceil_plus_nuw(i32 %x) {
; CHECK-LABEL: @bit_ceil_plus_nuw(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[SUB2:%.*]] = and i32 [[TMP0]], 31
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB2]]
diff --git a/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll b/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
index 7e4050873dc92..32791fe186c33 100644
--- a/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
@@ -3,7 +3,7 @@
define i32 @ctpop_bitreverse(i32 %x) {
; CHECK-LABEL: @ctpop_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
@@ -13,7 +13,7 @@ define i32 @ctpop_bitreverse(i32 %x) {
define <2 x i64> @ctpop_bitreverse_vec(<2 x i64> %x) {
; CHECK-LABEL: @ctpop_bitreverse_vec(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %x)
@@ -23,7 +23,7 @@ define <2 x i64> @ctpop_bitreverse_vec(<2 x i64> %x) {
define i32 @ctpop_bswap(i32 %x) {
; CHECK-LABEL: @ctpop_bswap(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bswap.i32(i32 %x)
@@ -33,7 +33,7 @@ define i32 @ctpop_bswap(i32 %x) {
define <2 x i64> @ctpop_bswap_vec(<2 x i64> %x) {
; CHECK-LABEL: @ctpop_bswap_vec(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %x)
diff --git a/llvm/test/Transforms/InstCombine/ctpop.ll b/llvm/test/Transforms/InstCombine/ctpop.ll
index 217a3c308a2dd..e3a6a2ad594ee 100644
--- a/llvm/test/Transforms/InstCombine/ctpop.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop.ll
@@ -265,7 +265,7 @@ define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b,
define i8 @ctpop_rotate_left(i8 %a, i8 %amt) {
; CHECK-LABEL: @ctpop_rotate_left(
-; CHECK-NEXT: [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: ret i8 [[RES]]
;
%rotl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 %amt)
@@ -275,7 +275,7 @@ define i8 @ctpop_rotate_left(i8 %a, i8 %amt) {
define i8 @ctpop_rotate_right(i8 %a, i8 %amt) {
; CHECK-LABEL: @ctpop_rotate_right(
-; CHECK-NEXT: [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: ret i8 [[RES]]
;
%rotr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 %amt)
diff --git a/llvm/test/Transforms/InstCombine/cttz-abs.ll b/llvm/test/Transforms/InstCombine/cttz-abs.ll
index 9d3b6168e710b..69dfc5dd0dc19 100644
--- a/llvm/test/Transforms/InstCombine/cttz-abs.ll
+++ b/llvm/test/Transforms/InstCombine/cttz-abs.ll
@@ -3,7 +3,7 @@
define i32 @cttz_abs(i32 %x) {
; CHECK-LABEL: @cttz_abs(
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@@ -29,7 +29,7 @@ define i32 @cttz_abs2(i32 %x) {
; CHECK-LABEL: @cttz_abs2(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: call void @use_cond(i1 [[C]])
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, 0
@@ -44,7 +44,7 @@ define i32 @cttz_abs3(i32 %x) {
; CHECK-LABEL: @cttz_abs3(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: call void @use_cond(i1 [[C]])
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, -1
@@ -57,7 +57,7 @@ define i32 @cttz_abs3(i32 %x) {
define i32 @cttz_abs4(i32 %x) {
; CHECK-LABEL: @cttz_abs4(
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@@ -69,7 +69,7 @@ define i32 @cttz_abs4(i32 %x) {
define i32 @cttz_nabs(i32 %x) {
; CHECK-LABEL: @cttz_nabs(
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@@ -107,7 +107,7 @@ define i32 @cttz_abs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_abs_multiuse(
; CHECK-NEXT: [[D:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: call void @use_abs(i32 [[D]])
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@@ -123,7 +123,7 @@ define i32 @cttz_nabs_multiuse(i32 %x) {
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[D:%.*]] = sub i32 0, [[TMP1]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
-; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
diff --git a/llvm/test/Transforms/InstCombine/cttz-negative.ll b/llvm/test/Transforms/InstCombine/cttz-negative.ll
index 6f812e420935d..5c6cf553dd91f 100644
--- a/llvm/test/Transforms/InstCombine/cttz-negative.ll
+++ b/llvm/test/Transforms/InstCombine/cttz-negative.ll
@@ -26,7 +26,7 @@ define i32 @cttz_neg_value_multiuse(i32 %x) {
define i64 @cttz_neg_value_64(i64 %x) {
; CHECK-LABEL: @cttz_neg_value_64(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 true)
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i64 [[B]]
;
%a = sub i64 0, %x
@@ -36,7 +36,7 @@ define i64 @cttz_neg_value_64(i64 %x) {
define i64 @cttz_neg_value2_64(i64 %x) {
; CHECK-LABEL: @cttz_neg_value2_64(
-; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[B]]
;
%a = sub i64 0, %x
diff --git a/llvm/test/Transforms/InstCombine/hyperbolic-functions.ll b/llvm/test/Transforms/InstCombine/hyperbolic-functions.ll
index 6cf689a982dd0..279d2775af8ea 100644
--- a/llvm/test/Transforms/InstCombine/hyperbolic-functions.ll
+++ b/llvm/test/Transforms/InstCombine/hyperbolic-functions.ll
@@ -4,7 +4,7 @@
define double @fneg_cosh(double noundef %x) {
; CHECK-LABEL: @fneg_cosh(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[RET:%.*]] = tail call nnan double @llvm.cosh.f64(double [[X:%.*]])
+; CHECK-NEXT: [[RET:%.*]] = call nnan double @llvm.cosh.f64(double [[X:%.*]])
; CHECK-NEXT: ret double [[RET]]
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/intrinsics.ll b/llvm/test/Transforms/InstCombine/intrinsics.ll
index 9dceb419215e5..8610912e8127c 100644
--- a/llvm/test/Transforms/InstCombine/intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/intrinsics.ll
@@ -139,7 +139,7 @@ define <vscale x 1 x i1> @cttz_knownbits_scalable_vec(<vscale x 1 x i32> %arg) {
define i32 @cttz_knownbits2(i32 %arg) {
; CHECK-LABEL: @cttz_knownbits2(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4
-; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #[[ATTR3:[0-9]+]]
; CHECK-NEXT: ret i32 [[CNT]]
;
%or = or i32 %arg, 4
@@ -150,7 +150,7 @@ define i32 @cttz_knownbits2(i32 %arg) {
define <2 x i32> @cttz_knownbits2_vec(<2 x i32> %arg) {
; CHECK-LABEL: @cttz_knownbits2_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], splat (i32 4)
-; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) #[[ATTR2]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) #[[ATTR3]]
; CHECK-NEXT: ret <2 x i32> [[CNT]]
;
%or = or <2 x i32> %arg, <i32 4, i32 4>
@@ -256,7 +256,7 @@ define <2 x i1> @ctlz_knownbits_vec(<2 x i8> %arg) {
define i8 @ctlz_knownbits2(i8 %arg) {
; CHECK-LABEL: @ctlz_knownbits2(
; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32
-; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #[[ATTR2]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #[[ATTR3]]
; CHECK-NEXT: ret i8 [[CNT]]
;
%or = or i8 %arg, 32
@@ -267,7 +267,7 @@ define i8 @ctlz_knownbits2(i8 %arg) {
define <2 x i8> @ctlz_knownbits2_vec(<2 x i8> %arg) {
; CHECK-LABEL: @ctlz_knownbits2_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], splat (i8 32)
-; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) #[[ATTR2]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) #[[ATTR3]]
; CHECK-NEXT: ret <2 x i8> [[CNT]]
;
%or = or <2 x i8> %arg, <i8 32, i8 32>
@@ -314,7 +314,7 @@ define <2 x i32> @ctlz_poison_vec(<2 x i32> %Value) {
define i32 @ctlz_no_zero(i32 %a) {
; CHECK-LABEL: @ctlz_no_zero(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 8
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 29) i32 @llvm.ctlz.i32(i32 [[OR]], i1 true)
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 29) i32 @llvm.ctlz.i32(i32 [[OR]], i1 true)
; CHECK-NEXT: ret i32 [[CTLZ]]
;
%or = or i32 %a, 8
@@ -325,7 +325,7 @@ define i32 @ctlz_no_zero(i32 %a) {
define <2 x i32> @ctlz_no_zero_vec(<2 x i32> %a) {
; CHECK-LABEL: @ctlz_no_zero_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], splat (i32 8)
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 29) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true)
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 29) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%or = or <2 x i32> %a, <i32 8, i32 8>
@@ -352,7 +352,7 @@ define <2 x i32> @cttz_poison_vec(<2 x i32> %Value) {
define i32 @cttz_no_zero(i32 %a) {
; CHECK-LABEL: @cttz_no_zero(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 8
-; CHECK-NEXT: [[CTTZ:%.*]] = tail call range(i32 0, 4) i32 @llvm.cttz.i32(i32 [[OR]], i1 true)
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 4) i32 @llvm.cttz.i32(i32 [[OR]], i1 true)
; CHECK-NEXT: ret i32 [[CTTZ]]
;
%or = or i32 %a, 8
@@ -363,7 +363,7 @@ define i32 @cttz_no_zero(i32 %a) {
define <2 x i32> @cttz_no_zero_vec(<2 x i32> %a) {
; CHECK-LABEL: @cttz_no_zero_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], splat (i32 8)
-; CHECK-NEXT: [[CTTZ:%.*]] = tail call range(i32 0, 4) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 4) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
;
%or = or <2 x i32> %a, <i32 8, i32 8>
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index a4f7a43adf1e5..62b456a6e81a2 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -1743,7 +1743,7 @@ define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_nan(float %arg)
; -> ninf|pnormal|negsubnormal|pzero|snan
define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp {
; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp(
-; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR0]]
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fneg = fneg float %arg
@@ -2075,7 +2075,7 @@ define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_nan(float %arg)
; -> pinf|psubnormal|snan
define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp {
; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(
-; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR0]]
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fabs = call float @llvm.fabs.f32(float %arg) strictfp
@@ -2406,7 +2406,7 @@ define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_nan(float
; strictfp doesn't matter
define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp {
; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(
-; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR0]]
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fabs = call float @llvm.fabs.f32(float %arg) strictfp
diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll
index a982225370620..3234ed5055f80 100644
--- a/llvm/test/Transforms/InstCombine/minmax-fold.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll
@@ -1842,3 +1842,14 @@ define i32 @test_umin_or_neg1_nuw(i32 %x, i32 range(i32 1, 0) %w) {
%r = select i1 %cmp, i32 %x, i32 %sub
ret i32 %r
}
+
+; Make sure that poison-generating/UB-implying parameters are swapped.
+
+define i32 @umax_commute_operand_swap_attrs(i32 %x) {
+; CHECK-LABEL: @umax_commute_operand_swap_attrs(
+; CHECK-NEXT: [[RET:%.*]] = call range(i32 -10, 0) i32 @llvm.umax.i32(i32 [[X:%.*]], i32 noundef range(i32 -10, -8) -10)
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %ret = call range(i32 -10, 0) i32 @llvm.umax.i32(i32 noundef range(i32 -10, -8) -10, i32 %x)
+ ret i32 %ret
+}
diff --git a/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll b/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
index e04e3c146924b..56ba1cf5e9e1f 100644
--- a/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
@@ -288,3 +288,31 @@ define i32 @umin_of_umin_umax_wrong_operand2(i32 %x, i32 %y, i32 %z) {
%r = select i1 %cmp3, i32 %min, i32 %max
ret i32 %r
}
+
+; Make sure that the range attribute is dropped.
+
+define i32 @umax_of_umax_umin_drop_range(i32 %x, i32 %y) {
+; CHECK-LABEL: @umax_of_umax_umin_drop_range(
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[MAX]]
+;
+ %cmp1 = icmp ugt i32 %x, %y
+ %min = select i1 %cmp1, i32 %y, i32 %x
+ %cmp2 = icmp ugt i32 %x, %y
+ %max = select i1 %cmp2, i32 %x, i32 %y
+ %r = call i32 @llvm.umax.i32(i32 range(i32 0, 4) %min, i32 range(i32 4, 8) %max)
+ ret i32 %r
+}
+
+; Make sure that the noundef attribute is dropped.
+
+define i32 @umax_of_symmetric_drop_noundef(i1 %cond, i32 %x, i32 %y) {
+; CHECK-LABEL: @umax_of_symmetric_drop_noundef(
+; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.umax.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[MAX]]
+;
+ %sel1 = select i1 %cond, i32 %y, i32 %x
+ %sel2 = select i1 %cond, i32 %x, i32 %y
+ %r = call i32 @llvm.umax.i32(i32 noundef %sel1, i32 %sel2)
+ ret i32 %r
+}
diff --git a/llvm/test/Transforms/InstCombine/powi.ll b/llvm/test/Transforms/InstCombine/powi.ll
index 2059e94e0e371..e106ccad909b9 100644
--- a/llvm/test/Transforms/InstCombine/powi.ll
+++ b/llvm/test/Transforms/InstCombine/powi.ll
@@ -11,7 +11,7 @@ declare void @use(double)
define double @powi_fneg_even_int(double %x) {
; CHECK-LABEL: @powi_fneg_even_int(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[R:%.*]] = tail call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
+; CHECK-NEXT: [[R:%.*]] = call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
; CHECK-NEXT: ret double [[R]]
;
entry:
@@ -23,7 +23,7 @@ entry:
define double @powi_fabs_even_int(double %x) {
; CHECK-LABEL: @powi_fabs_even_int(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[R:%.*]] = tail call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
+; CHECK-NEXT: [[R:%.*]] = call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
; CHECK-NEXT: ret double [[R]]
;
entry:
@@ -35,7 +35,7 @@ entry:
define double @powi_copysign_even_int(double %x, double %y) {
; CHECK-LABEL: @powi_copysign_even_int(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[R:%.*]] = tail call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
+; CHECK-NEXT: [[R:%.*]] = call double @llvm.powi.f64.i32(double [[X:%.*]], i32 4)
; CHECK-NEXT: ret double [[R]]
;
entry:
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