[llvm] Remove ppc64 check from mayUseP9Setb (PR #206282)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-powerpc

Author: AZero13 (AZero13)

<details>
<summary>Changes</summary>

32 bits can use setb too.

---
Full diff: https://github.com/llvm/llvm-project/pull/206282.diff


2 Files Affected:

- (modified) llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (+1-1) 
- (added) llvm/test/CodeGen/PowerPC/p9-setb32.ll (+31) 


``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 016c547821f7a..9e4ac5694fb14 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -5866,7 +5866,7 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
     if (Subtarget->useCRBits() && N->getOperand(0).getValueType() == MVT::i1)
       break;
 
-    if (Subtarget->isISA3_0() && Subtarget->isPPC64()) {
+    if (Subtarget->isISA3_0()) {
       bool NeedSwapOps = false;
       bool IsUnCmp = false;
       if (mayUseP9Setb(N, CC, CurDAG, NeedSwapOps, IsUnCmp)) {
diff --git a/llvm/test/CodeGen/PowerPC/p9-setb32.ll b/llvm/test/CodeGen/PowerPC/p9-setb32.ll
new file mode 100644
index 0000000000000..49ca04f38a972
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/p9-setb32.ll
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc-unknown-unknown \
+; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s
+
+; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
+define i32 @setb1(i32 %a, i32 %b) {
+; CHECK-LABEL: setb1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpw r3, r4
+; CHECK-NEXT:    setb r3, cr0
+; CHECK-NEXT:    blr
+  %cmp = icmp ne i32 %a, %b
+  %zext = zext i1 %cmp to i32
+  %cmp1 = icmp slt i32 %a, %b
+  %res = select i1 %cmp1, i32 -1, i32 %zext
+  ret i32 %res
+}
+
+; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setlt
+define i32 @setb2(i32 %a, i32 %b) {
+; CHECK-LABEL: setb2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpw r4, r3
+; CHECK-NEXT:    setb r3, cr0
+; CHECK-NEXT:    blr
+  %cmp = icmp ne i32 %a, %b
+  %sext = sext i1 %cmp to i32
+  %cmp1 = icmp slt i32 %a, %b
+  %res = select i1 %cmp1, i32 1, i32 %sext
+  ret i32 %res
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/206282