[llvm] [PowerPC] Extend select_cc lhs, 0, 1, 0, cc optimization to PowerPC 64 (PR #206281)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index dfa95fa87..5baa76664 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -5893,9 +5893,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
 
     // Handle the setcc cases here.  select_cc lhs, 0, 1, 0, setne
     // Compute (lhs != 0) as: addic tmp, lhs, -1; subfe res, tmp, lhs
-    if (isNullConstant(N->getOperand(1)) &&
-        isOneConstant(N->getOperand(2)) && isNullConstant(N->getOperand(3)) &&
-        CC == ISD::SETNE &&
+    if (isNullConstant(N->getOperand(1)) && isOneConstant(N->getOperand(2)) &&
+        isNullConstant(N->getOperand(3)) && CC == ISD::SETNE &&
         N->getOperand(0).getValueType() == N->getValueType(0) &&
         (N->getValueType(0) == MVT::i32 ||
          (isPPC64 && N->getValueType(0) == MVT::i64))) {
@@ -5905,11 +5904,10 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
       MVT VT = Is64Bit ? MVT::i64 : MVT::i32;
       SDValue ImmOp = Is64Bit ? getI64Imm(~0ULL, dl) : getI32Imm(~0U, dl);
 
-      SDNode *Tmp =
-          CurDAG->getMachineNode(AddicOpc, dl, VT, MVT::Glue,
-                                 N->getOperand(0), ImmOp);
-      CurDAG->SelectNodeTo(N, SubfeOpc, VT, SDValue(Tmp, 0),
-                           N->getOperand(0), SDValue(Tmp, 1));
+      SDNode *Tmp = CurDAG->getMachineNode(AddicOpc, dl, VT, MVT::Glue,
+                                           N->getOperand(0), ImmOp);
+      CurDAG->SelectNodeTo(N, SubfeOpc, VT, SDValue(Tmp, 0), N->getOperand(0),
+                           SDValue(Tmp, 1));
       return;
     }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/206281