[clang] [llvm] [AArch64] Implement the atomic store with hint intrinsic (PR #198316)

Kerry McLaughlin via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 26 08:16:34 PDT 2026


================
@@ -282,6 +282,53 @@ def : Pat<(relaxed_store<atomic_store_64>
                (am_unscaled64 GPR64sp:$Rn, simm9:$offset), (i64 (bitconvert (f64 FPR64Op:$val)))),
           (STURDi FPR64Op:$val, GPR64sp:$Rn, simm9:$offset)>;
 
+//===----------------------------------
+// Atomic store with hint pseudos
+//===----------------------------------
+
+class BaseStoreHintPseudo<RegisterClass regtype>
+      : Pseudo<(outs), (ins GPR64sp:$addr, regtype:$data,
+                        i32imm:$order, i32imm:$hint), []>, Sched<[WriteAtomic]> {
+  let Size = 8;
+  let isCodeGenOnly = 1;
+  let hasSideEffects = 1;
+  let mayStore = 1;
+}
+
+def ATOMIC_STORE_HINT_B : BaseStoreHintPseudo<GPR32>;
+def ATOMIC_STORE_HINT_H : BaseStoreHintPseudo<GPR32>;
+def ATOMIC_STORE_HINT_S : BaseStoreHintPseudo<GPR32>;
+def ATOMIC_STORE_HINT_D : BaseStoreHintPseudo<GPR64>;
+
+class atomic_hint_store<PatFrag Base, bit Rel, bit SeqCst, code Pred, code GIPred>
+  : PatFrag<(ops node:$ptr, node:$val),
+            (Base node:$val, node:$ptr), Pred> {
+  let IsAtomic = 1;
+  let IsAtomicOrderingReleaseOrStronger = Rel;
----------------
kmclaughlin-arm wrote:

I think we should be setting `IsAtomicOrderingMonotonic` & `IsAtomicOrderingRelease` here instead, yes. I've changed this class to set those flags based on `Order`.

Setting `IsStore` does not seem to be allowed (the error is`IsLoad, IsStore, and IsAtomic are mutually exclusive`). The atomic_store_* patfrags do set `IsAtomic`, but without adding it here too I run into `IsAtomicOrderingReleaseOrStronger requires IsAtomic`.

https://github.com/llvm/llvm-project/pull/198316


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