[llvm] [AMDGPU] Pre-commit tests for folding SGPR->VGPR copies escaping a divergent loop (NFC) (PR #203502)

[Jay Foad via llvm-commits]

================
@@ -54,3 +54,131 @@ body:             |
     %11:vgpr_32 = V_SET_INACTIVE_B32 0, %9, 0, 0, killed %10, implicit $exec
     S_ENDPGM 0
 ...
+
+# An SGPR->VGPR copy with no implicit $exec read, inserted in a divergent loop
+# to latch a per-lane value, is read after the loop. SIFoldOperands currently
+# folds the scalar source into that exit use, dropping the per-lane snapshot;
+# this is wrong because the value escapes the loop. FIXME: should not fold.
+---
+name:            do_not_fold_sgpr_to_vgpr_copy_escaping_loop
+tracksRegLiveness: true
+body:             |
+  ; CHECK-LABEL: name: do_not_fold_sgpr_to_vgpr_copy_escaping_loop
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT:   liveins: $sgpr0, $vgpr0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+  ; CHECK-NEXT:   [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
+  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.2(0x04000000), %bb.1(0x7c000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_]], %bb.0, %5, %bb.1
+  ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:sreg_32 = PHI [[S_MOV_B32_]], %bb.0, %7, %bb.1
+  ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[PHI1]], implicit-def dead $scc
+  ; CHECK-NEXT:   [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[PHI1]], 1, implicit-def dead $scc
+  ; CHECK-NEXT:   [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 [[COPY1]], [[S_ADD_I32_]], implicit $exec
+  ; CHECK-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK [[V_CMP_EQ_U32_e64_]], [[PHI]], implicit-def dead $scc
+  ; CHECK-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+  ; CHECK-NEXT:   S_BRANCH %bb.2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+  ; CHECK-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[S_XOR_B32_]], 1, 0, implicit $exec
+  ; CHECK-NEXT:   $vgpr0 = COPY [[V_ADD_U32_e64_]]
+  ; CHECK-NEXT:   SI_RETURN implicit $vgpr0
+  bb.0:
+    successors: %bb.1
+    liveins: $sgpr0, $vgpr0
+
+    %0:sreg_32 = COPY $sgpr0
+    %1:vgpr_32 = COPY $vgpr0
+    %2:sreg_64 = S_MOV_B64 0
+    %3:sreg_32 = S_MOV_B32 0
+
+  bb.1:
+    successors: %bb.2(0x04000000), %bb.1(0x7c000000)
+
+    %4:sreg_64 = PHI %2, %bb.0, %5, %bb.1
+    %6:sreg_32 = PHI %3, %bb.0, %7, %bb.1
+    %8:sreg_32 = S_XOR_B32 %0, %6, implicit-def dead $scc
+    %9:vgpr_32 = COPY %8
----------------
jayfoad wrote:

Should we insist that COPY to VGPR instructions have an implcit $exec operand? I am not sure how this normally works.

https://github.com/llvm/llvm-project/pull/203502