[llvm] [RISCV] Support floating point registers with -fzero-call-used-regs (PR #204929)

[Sam Elliott via llvm-commits]

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@@ -827,11 +827,13 @@ Register RISCVRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
 bool RISCVRegisterInfo::isArgumentRegister(const MachineFunction &MF,
                                            MCRegister Reg) const {
   auto const &STI = MF.getSubtarget<RISCVSubtarget>();
-  if (!STI.getRegisterInfo()->isGeneralPurposeRegister(MF, Reg))
-    llvm::reportFatalInternalError(
-        "isArgumentRegister is not implemented for non-GPR registers");
+  if (STI.getRegisterInfo()->isGeneralPurposeRegister(MF, Reg))
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lenary wrote:

Probably worth pulling out a `const RISCVRegisterInfo *TRI = STI.getRegisterInfo();` definition.

https://github.com/llvm/llvm-project/pull/204929