[llvm] [X86] phaddsub.ll - update PR39921/PR39936 test case to a vector.reduce.v8i32 call (PR #205310)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 23 03:16:22 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/205310
Matches middle-end IR produced from the tests' C++ source since #199872
>From e0e9f2df276b733d2efbe546867199fe38ed2759 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Tue, 23 Jun 2026 11:12:20 +0100
Subject: [PATCH] [X86] phaddsub.ll - update PR39921/PR39936 test case to a
vector.reduce.v8i32 call
Matches middle-end IR produced from the tests' C++ source since #199872
---
llvm/test/CodeGen/X86/phaddsub.ll | 54 ++++++++++++++-----------------
1 file changed, 25 insertions(+), 29 deletions(-)
diff --git a/llvm/test/CodeGen/X86/phaddsub.ll b/llvm/test/CodeGen/X86/phaddsub.ll
index 12c7a092d6c18..1ec4738220b6c 100644
--- a/llvm/test/CodeGen/X86/phaddsub.ll
+++ b/llvm/test/CodeGen/X86/phaddsub.ll
@@ -615,28 +615,30 @@ define <8 x i16> @phaddw_single_source6(<8 x i16> %x) {
define i32 @PR39936_v8i32(<8 x i32>) {
; SSSE3-SLOW-LABEL: PR39936_v8i32:
; SSSE3-SLOW: # %bb.0:
-; SSSE3-SLOW-NEXT: phaddd %xmm1, %xmm0
-; SSSE3-SLOW-NEXT: phaddd %xmm0, %xmm0
-; SSSE3-SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
+; SSSE3-SLOW-NEXT: paddd %xmm1, %xmm0
+; SSSE3-SLOW-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
; SSSE3-SLOW-NEXT: paddd %xmm0, %xmm1
-; SSSE3-SLOW-NEXT: movd %xmm1, %eax
+; SSSE3-SLOW-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
+; SSSE3-SLOW-NEXT: paddd %xmm1, %xmm0
+; SSSE3-SLOW-NEXT: movd %xmm0, %eax
; SSSE3-SLOW-NEXT: retq
;
; SSSE3-FAST-LABEL: PR39936_v8i32:
; SSSE3-FAST: # %bb.0:
-; SSSE3-FAST-NEXT: phaddd %xmm1, %xmm0
-; SSSE3-FAST-NEXT: phaddd %xmm0, %xmm0
-; SSSE3-FAST-NEXT: phaddd %xmm0, %xmm0
-; SSSE3-FAST-NEXT: movd %xmm0, %eax
+; SSSE3-FAST-NEXT: phaddd %xmm0, %xmm1
+; SSSE3-FAST-NEXT: phaddd %xmm1, %xmm1
+; SSSE3-FAST-NEXT: phaddd %xmm1, %xmm1
+; SSSE3-FAST-NEXT: movd %xmm1, %eax
; SSSE3-FAST-NEXT: retq
;
; AVX1-SLOW-LABEL: PR39936_v8i32:
; AVX1-SLOW: # %bb.0:
; AVX1-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-SLOW-NEXT: vphaddd %xmm1, %xmm0, %xmm0
-; AVX1-SLOW-NEXT: vphaddd %xmm0, %xmm0, %xmm0
+; AVX1-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
+; AVX1-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; AVX1-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX1-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; AVX1-SLOW-NEXT: vpaddd %xmm0, %xmm1, %xmm0
+; AVX1-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX1-SLOW-NEXT: vmovd %xmm0, %eax
; AVX1-SLOW-NEXT: vzeroupper
; AVX1-SLOW-NEXT: retq
@@ -644,7 +646,7 @@ define i32 @PR39936_v8i32(<8 x i32>) {
; AVX1-FAST-LABEL: PR39936_v8i32:
; AVX1-FAST: # %bb.0:
; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-FAST-NEXT: vphaddd %xmm1, %xmm0, %xmm0
+; AVX1-FAST-NEXT: vphaddd %xmm0, %xmm1, %xmm0
; AVX1-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX1-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX1-FAST-NEXT: vmovd %xmm0, %eax
@@ -654,10 +656,11 @@ define i32 @PR39936_v8i32(<8 x i32>) {
; AVX2-SLOW-LABEL: PR39936_v8i32:
; AVX2-SLOW: # %bb.0:
; AVX2-SLOW-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-SLOW-NEXT: vphaddd %xmm1, %xmm0, %xmm0
-; AVX2-SLOW-NEXT: vphaddd %xmm0, %xmm0, %xmm0
+; AVX2-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
+; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; AVX2-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; AVX2-SLOW-NEXT: vpaddd %xmm0, %xmm1, %xmm0
+; AVX2-SLOW-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX2-SLOW-NEXT: vmovd %xmm0, %eax
; AVX2-SLOW-NEXT: vzeroupper
; AVX2-SLOW-NEXT: retq
@@ -665,7 +668,7 @@ define i32 @PR39936_v8i32(<8 x i32>) {
; AVX2-FAST-LABEL: PR39936_v8i32:
; AVX2-FAST: # %bb.0:
; AVX2-FAST-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-FAST-NEXT: vphaddd %xmm1, %xmm0, %xmm0
+; AVX2-FAST-NEXT: vphaddd %xmm0, %xmm1, %xmm0
; AVX2-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX2-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX2-FAST-NEXT: vmovd %xmm0, %eax
@@ -675,22 +678,15 @@ define i32 @PR39936_v8i32(<8 x i32>) {
; AVX2-SHUF-LABEL: PR39936_v8i32:
; AVX2-SHUF: # %bb.0:
; AVX2-SHUF-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-SHUF-NEXT: vphaddd %xmm1, %xmm0, %xmm0
-; AVX2-SHUF-NEXT: vphaddd %xmm0, %xmm0, %xmm0
+; AVX2-SHUF-NEXT: vpaddd %xmm1, %xmm0, %xmm0
+; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; AVX2-SHUF-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX2-SHUF-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
-; AVX2-SHUF-NEXT: vpaddd %xmm0, %xmm1, %xmm0
+; AVX2-SHUF-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX2-SHUF-NEXT: vmovd %xmm0, %eax
; AVX2-SHUF-NEXT: vzeroupper
; AVX2-SHUF-NEXT: retq
- %2 = shufflevector <8 x i32> %0, <8 x i32> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef>
- %3 = shufflevector <8 x i32> %0, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
- %4 = add <8 x i32> %2, %3
- %5 = shufflevector <8 x i32> %4, <8 x i32> undef, <8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
- %6 = shufflevector <8 x i32> %4, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
- %7 = add <8 x i32> %5, %6
- %8 = shufflevector <8 x i32> %7, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
- %9 = add <8 x i32> %8, %7
- %10 = extractelement <8 x i32> %9, i32 0
- ret i32 %10
+ %res = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %0)
+ ret i32 %res
}
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