[llvm] [RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (PR #205027)

[via llvm-commits]

================
@@ -1916,6 +1916,35 @@ let Predicates = [HasVInstructionsI64, IsRV64] in {
 } // Predicates = [HasVInstructionsI64, IsRV64]
 } // ElementsDependOn = EltDepsNone
 
+//===----------------------------------------------------------------------===//
+// TLSDESC V-extension clobber variants
+//===----------------------------------------------------------------------===//
+// When the V extension is enabled, the TLSDESC resolver additionally clobbers
+// all vector registers and vector CSRs (vl, vtype, vxrm, vxsat) per the psABI.
+
+defvar TLSDESCVClobbers = !listconcat(
+    !foreach(i, !range(32), !cast<Register>("V"#i)),
+    [VTYPE, VL, VXSAT, VXRM]);
+
+let Predicates = [HasVInstructions] in {
+let hasSideEffects = 0, mayLoad = 1, mayStore = 0, Size = 32,
+    isCodeGenOnly = 1 in
----------------
LukeZhuang wrote:

Thanks for pointing out! This is my mistake, it should be `isCodeGenOnly = 0`, just the same as the original TLSDESC Pseudos

https://github.com/llvm/llvm-project/pull/205027