[llvm] [LLVM] SDAG and GISel support for folding fabs into fp_round source modifiers (PR #204861)

[Chinmay Deshpande via llvm-commits]

================
@@ -20606,6 +20606,14 @@ SDValue DAGCombiner::visitFABS(SDNode *N) {
   if (SDValue C = DAG.FoldConstantArithmetic(ISD::FABS, DL, VT, {N0}))
     return C;
 
+  // fold (fabs (fpround x)) -> (fpround (fabs x))
+  if (N0.getOpcode() == ISD::FP_ROUND && N0.hasOneUse()) {
----------------
chinmaydd wrote:

I believe it is.

`fabs` clears the sign bit and does not touch the mantissa or the exponent. I'm not an expert on signaling NaNs, but I dont think it "quiets" them either (because it doesn't touch the mantissa).

Inherently, `fp_round` doesn't touch the sign bit at all which is where `fabs` fundamentally operates.

I think this orthogonality is being used for `fneg` already.

Maybe I should add a test accordingly ?

https://github.com/llvm/llvm-project/pull/204861