[llvm] [X86] Select BLSMSK for i8 operands (PR #205093)

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<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: Chirag Patel (ChiragPatel8)

<details>
<summary>Changes</summary>

Adds a tablegen pattern to select BLSMSK i8 for 
```
  %neg = sub i8 %x, 1
  %and = xor i8 %neg, %x

```
Fixes #<!-- -->204984 

---
Full diff: https://github.com/llvm/llvm-project/pull/205093.diff


2 Files Affected:

- (modified) llvm/lib/Target/X86/X86InstrMisc.td (+14) 
- (modified) llvm/test/CodeGen/X86/bmi.ll (+49) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86InstrMisc.td b/llvm/lib/Target/X86/X86InstrMisc.td
index 84d034287de7b..14a2f477450a3 100644
--- a/llvm/lib/Target/X86/X86InstrMisc.td
+++ b/llvm/lib/Target/X86/X86InstrMisc.td
@@ -1295,6 +1295,20 @@ let Predicates = [HasBMI] in
                                        GR8:$src, sub_8bit)),
               sub_8bit)>;
 
+// BLSMSK only has GR32/GR64 forms. For an i8 operand we use INSERT_SUBREG
+// with IMPLICIT_DEF (any-extend) rather than SUBREG_TO_REG (zero-extend).
+// Although BLSMSK computes (src XOR (src-1)), dirty upper bits [31:8] cannot
+// corrupt bits [7:0] of the result: borrow from (src-1) only propagates
+// downward through contiguous zeros, and even when [7:0] is zero the
+// EXTRACT_SUBREG still yields the correct all-ones result. This matches the
+// same approach used for BLSI.
+let Predicates = [HasBMI] in
+  def : Pat<(xor GR8:$src, (add GR8:$src, -1)),
+            (EXTRACT_SUBREG
+              (BLSMSK32rr (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
+                                         GR8:$src, sub_8bit)),
+              sub_8bit)>;
+
 multiclass Bmi4VOp3<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node,
                     X86FoldableSchedWrite sched, string Suffix = ""> {
   let SchedRW = [sched], Form = MRMSrcReg4VOp3 in
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll
index bcf1a3eaeb8c2..9e79e2fe95320 100644
--- a/llvm/test/CodeGen/X86/bmi.ll
+++ b/llvm/test/CodeGen/X86/bmi.ll
@@ -2174,3 +2174,52 @@ define i16 @blsi16_trunc(i32 %x) {
   %and = and i16 %t, %neg
   ret i16 %and
 }
+
+define i8 @blsmsk8(i8 %x) nounwind {
+; X86-LABEL: blsmsk8:
+; X86:       # %bb.0:
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    blsmskl %eax, %eax
+; X86-NEXT:    # kill: def $al killed $al killed $eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: blsmsk8:
+; X64:       # %bb.0:
+; X64-NEXT:    blsmskl %edi, %eax
+; X64-NEXT:    # kill: def $al killed $al killed $eax
+; X64-NEXT:    retq
+;
+; EGPR-LABEL: blsmsk8:
+; EGPR:       # %bb.0:
+; EGPR-NEXT:    blsmskl %edi, %eax # encoding: [0xc4,0xe2,0x78,0xf3,0xd7]
+; EGPR-NEXT:    # kill: def $al killed $al killed $eax
+; EGPR-NEXT:    retq # encoding: [0xc3]
+  %y = add i8 %x, -1
+  %z = xor i8 %x, %y
+  ret i8 %z
+}
+
+define i8 @blsmsk8_trunc(i32 %x) nounwind {
+; X86-LABEL: blsmsk8_trunc:
+; X86:       # %bb.0:
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    blsmskl %eax, %eax
+; X86-NEXT:    # kill: def $al killed $al killed $eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: blsmsk8_trunc:
+; X64:       # %bb.0:
+; X64-NEXT:    blsmskl %edi, %eax
+; X64-NEXT:    # kill: def $al killed $al killed $eax
+; X64-NEXT:    retq
+;
+; EGPR-LABEL: blsmsk8_trunc:
+; EGPR:       # %bb.0:
+; EGPR-NEXT:    blsmskl %edi, %eax # encoding: [0xc4,0xe2,0x78,0xf3,0xd7]
+; EGPR-NEXT:    # kill: def $al killed $al killed $eax
+; EGPR-NEXT:    retq # encoding: [0xc3]
+  %t = trunc i32 %x to i8
+  %y = add i8 %t, -1
+  %z = xor i8 %t, %y
+  ret i8 %z
+}
\ No newline at end of file

``````````

</details>


https://github.com/llvm/llvm-project/pull/205093