[llvm] [IR] Implementation and lowering of bitinsert and bitextract (PR #200605)

[Pedro Vicente via llvm-commits]

pedroMVicente wrote:

> > > Why is the legalization based on rotate rather than shift?
> > 
> > Rotates in bitinsert might make it simpler since we do not need to preserve the state of the base register before we insert the val bits in the target position.
> > 
> > In bitextract it is irrelevant. Do you have a strong preference for shift?
> 
> some architectures have shifts but not rotates, e.g. RISC-V without Zbb

We changed the rotate to shift in bitextract since it is simpler to use shift in this case.

In bitinsert, rotates are actually useful in order to implement the lowering. In the case of RISCV without the zbb extension, SDag creates explicitly the rotate instruction with shifts and an or. So rotate can stay in the lowering of the instruction. We added a test that shows that.

https://github.com/llvm/llvm-project/pull/200605