[llvm] [NFC][LLVM] Improve error message when intrinsic signature verificati… (PR #204478)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 19 15:07:44 PDT 2026
https://github.com/jurahul updated https://github.com/llvm/llvm-project/pull/204478
>From 2c29a461bcf7afb16a8e28925287cd69684cfc82 Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Wed, 17 Jun 2026 13:41:44 -0700
Subject: [PATCH] [NFC][LLVM] Improve error message when intrinsic signature
verification fails
---
llvm/lib/IR/Verifier.cpp | 91 ++--
.../autoupgrade-invalid-mem-intrinsics.ll | 17 +-
llvm/test/Assembler/invalid-vecreduce.ll | 31 +-
.../AArch64/sme2p1-intrinsics-movaz.ll | 4 -
.../CodeGen/AArch64/sve-bad-intrinsics.ll | 13 +-
llvm/test/CodeGen/AArch64/sve-ptest.ll | 5 -
...s-nt-gather-loads-32bit-unscaled-offset.ll | 4 -
...nt-scatter-stores-32bit-unscaled-offset.ll | 7 -
...er-multiple-mem-operands-nontemporal-1.mir | 3 -
llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir | 3 -
llvm/test/CodeGen/NVPTX/shfl-sync.ll | 4 -
.../CodeGen/SPIRV/hlsl-intrinsics/refract.ll | 1 -
.../Transforms/Coroutines/coro-heap-elide.ll | 1 -
.../Transforms/Coroutines/coro-split-eh-00.ll | 1 -
.../Transforms/Coroutines/coro-split-eh-01.ll | 1 -
.../Coroutines/coro-split-final-suspend.ll | 1 -
llvm/test/Transforms/Coroutines/ex0.ll | 1 -
.../Transforms/Coroutines/phi-coro-end.ll | 1 -
.../InstCombine/vector-reductions.ll | 2 -
llvm/test/Verifier/callbr.ll | 13 +-
llvm/test/Verifier/get-active-lane-mask.ll | 22 +-
llvm/test/Verifier/intrinsic-bad-arg-type1.ll | 417 +++---------------
llvm/test/Verifier/masked-load-store.ll | 66 +--
llvm/test/Verifier/matrix-intrinsics.ll | 21 +-
llvm/test/Verifier/reduction-intrinsics.ll | 60 +--
llvm/test/Verifier/scatter_gather.ll | 79 +---
llvm/test/Verifier/stepvector-intrinsic.ll | 23 +-
llvm/unittests/IR/VerifierTest.cpp | 4 +-
28 files changed, 221 insertions(+), 675 deletions(-)
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 48cfec0f55c41..987a18c54c258 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -143,6 +143,10 @@ static cl::opt<bool> VerifyNoAliasScopeDomination(
cl::desc("Ensure that llvm.experimental.noalias.scope.decl for identical "
"scopes are not dominating"));
+static cl::opt<bool>
+ VerifyIntrinsicDecls("verify-intrinsic-decls", cl::Hidden, cl::init(false),
+ cl::desc("Verify intrinsic declarations"));
+
struct llvm::VerifierSupport {
raw_ostream *OS;
const Module &M;
@@ -271,7 +275,7 @@ struct llvm::VerifierSupport {
AL->print(*OS);
}
- void Write(Printable P) { *OS << P << '\n'; }
+ void Write(Printable P) { *OS << P; }
template <typename T> void Write(ArrayRef<T> Vs) {
for (const T &V : Vs)
@@ -392,6 +396,7 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
ConvergenceVerifier ConvergenceVerifyHelper;
SmallVector<IntrinsicInst *, 4> NoAliasScopeDecls;
+ SmallPtrSet<const Function *, 32> IntrinsicDeclsVisited;
void checkAtomicMemAccessSize(Type *Ty, const Instruction *I);
@@ -455,6 +460,7 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
SiblingFuncletInfo.clear();
verifyNoAliasScopeDecl();
NoAliasScopeDecls.clear();
+ IntrinsicDeclsVisited.clear();
return !Broken;
}
@@ -677,6 +683,9 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
/// Verify the llvm.experimental.noalias.scope.decl declarations
void verifyNoAliasScopeDecl();
+
+ /// Verify intrinsic declaration. Returns true if verification failed.
+ bool verifyIntrinsicDecl(const Function *F);
};
} // end anonymous namespace
@@ -3484,8 +3493,12 @@ void Verifier::visitFunction(const Function &F) {
Check(false, "Invalid user of intrinsic instruction!", U);
}
+ Intrinsic::ID IID = F.getIntrinsicID();
+ if (IID && VerifyIntrinsicDecls && verifyIntrinsicDecl(&F))
+ return;
+
// Check intrinsics' signatures.
- switch (F.getIntrinsicID()) {
+ switch (IID) {
case Intrinsic::experimental_gc_get_pointer_base: {
FunctionType *FT = F.getFunctionType();
Check(FT->getNumParams() == 1, "wrong number of parameters", F);
@@ -6128,31 +6141,8 @@ void Verifier::visitInstruction(Instruction &I) {
/// Allow intrinsics to be verified in different ways.
void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) {
Function *IF = Call.getCalledFunction();
- Check(IF->isDeclaration(), "Intrinsic functions should never be defined!",
- IF);
-
- // Verify that the intrinsic prototype lines up with what the .td files
- // describe.
- FunctionType *IFTy = IF->getFunctionType();
-
- // Walk the descriptors to extract overloaded types.
- std::string ErrMsg;
- raw_string_ostream ErrOS(ErrMsg);
- SmallVector<Type *, 4> OverloadTys;
- bool IsValid = Intrinsic::isSignatureValid(ID, IFTy, OverloadTys, ErrOS);
- Check(IsValid, ErrMsg, IF);
-
- // Now that we have the intrinsic ID and the actual argument types (and we
- // know they are legal for the intrinsic!) get the intrinsic name through the
- // usual means. This allows us to verify the mangling of argument types into
- // the name.
- const std::string ExpectedName =
- Intrinsic::getName(ID, OverloadTys, IF->getParent(), IFTy);
- Check(ExpectedName == IF->getName(),
- "Intrinsic name not mangled correctly for type arguments! "
- "Should be: " +
- ExpectedName,
- IF);
+ if (verifyIntrinsicDecl(IF))
+ return;
// If the intrinsic takes MDNode arguments, verify that they are either global
// or are local to *this* function.
@@ -6831,11 +6821,12 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) {
Type *ValTy = Call.getArgOperand(0)->getType();
Type *ResultTy = Call.getType();
Check(ValTy->isVectorTy() == ResultTy->isVectorTy(),
- ExpectedName + ": argument and result disagree on vector use", &Call);
+ IF->getName() + ": argument and result disagree on vector use",
+ &Call);
if (auto *VTy = dyn_cast<VectorType>(ValTy)) {
auto *RTy = dyn_cast<VectorType>(ResultTy);
Check(VTy->getElementCount() == RTy->getElementCount(),
- ExpectedName + ": argument must be same length as result", &Call);
+ IF->getName() + ": argument must be same length as result", &Call);
}
break;
}
@@ -8134,6 +8125,48 @@ void Verifier::verifyNoAliasScopeDecl() {
}
}
+bool Verifier::verifyIntrinsicDecl(const Function *F) {
+ Intrinsic::ID IID = F->getIntrinsicID();
+ if (!IID)
+ return false;
+ auto [_, Inserted] = IntrinsicDeclsVisited.insert(F);
+ if (!Inserted)
+ return false;
+ FunctionType *FT = F->getFunctionType();
+
+ // Verify that the intrinsic prototype lines up with what the .td files
+ // describe.
+
+ // Walk the descriptors to extract overloaded types.
+ std::string ErrMsg;
+ raw_string_ostream ErrOS(ErrMsg);
+ SmallVector<Type *, 4> OverloadTys;
+ bool IsValid = Intrinsic::isSignatureValid(IID, FT, OverloadTys, ErrOS);
+ Printable PrintDecl([F](raw_ostream &OS) { F->print(OS); });
+ if (!IsValid) {
+ [&]() { Check(false, ErrMsg, PrintDecl); }();
+ return true;
+ }
+
+ // Now that we have the intrinsic ID and the actual argument types (and we
+ // know they are legal for the intrinsic!) get the intrinsic name through
+ // the usual means. This allows us to verify the mangling of argument types
+ // into the name.
+ const std::string ExpectedName = Intrinsic::getName(
+ IID, OverloadTys, const_cast<Module *>(F->getParent()), FT);
+ if (ExpectedName != F->getName()) {
+ [&]() {
+ Check(false,
+ "Intrinsic name not mangled correctly for type arguments! "
+ "Should be: " +
+ ExpectedName,
+ PrintDecl);
+ }();
+ return true;
+ }
+ return false;
+}
+
//===----------------------------------------------------------------------===//
// Implement the public interfaces to this file...
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll b/llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
index 0ea683fb44dce..6ae97ea785df5 100644
--- a/llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
+++ b/llvm/test/Assembler/autoupgrade-invalid-mem-intrinsics.ll
@@ -1,13 +1,16 @@
-; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; RUN: not llvm-as < %s 2>&1 | FileCheck %s
-; Check that remangling code doesn't fail on an intrinsic with wrong signature
-; TODO: This should probably produce an error.
-
-; CHECK: declare void @llvm.memset.i64
+; CHECK: intrinsic has incorrect number of args. Expected 4, but got 3
+; CHECK-NEXT: ; {{.*}}
+; CHECK-NEXT: declare void @llvm.memset.i64(ptr captures(none), i8, i64)
declare void @llvm.memset.i64(ptr nocapture, i8, i64) nounwind
-; CHECK: declare void @llvm.memcpy.i64
+; CHECK: intrinsic has incorrect number of args. Expected 4, but got 3
+; CHECK-NEXT: ; {{.*}}
+; CHECK-NEXT: declare void @llvm.memcpy.i64(ptr captures(none), i8, i64)
declare void @llvm.memcpy.i64(ptr nocapture, i8, i64) nounwind
-; CHECK: declare void @llvm.memmove.i64
+; CHECK: intrinsic has incorrect number of args. Expected 4, but got 3
+; CHECK-NEXT: ; {{.*}}
+; CHECK-NEXT: declare void @llvm.memmove.i64(ptr captures(none), i8, i64)
declare void @llvm.memmove.i64(ptr nocapture, i8, i64) nounwind
diff --git a/llvm/test/Assembler/invalid-vecreduce.ll b/llvm/test/Assembler/invalid-vecreduce.ll
index bed9417f554d2..66e500694ef14 100644
--- a/llvm/test/Assembler/invalid-vecreduce.ll
+++ b/llvm/test/Assembler/invalid-vecreduce.ll
@@ -1,34 +1,17 @@
; RUN: not opt -S < %s 2>&1 | FileCheck %s
; CHECK: intrinsic return type (vector element of overload type 0) expected double (overload type 0 is <2 x double>), but got float
-; CHECK-NEXT: ptr @llvm.vector.reduce.fadd.f32.f64.v2f64
-define float @fadd_invalid_scalar_res(double %acc, <2 x double> %in) {
- %res = call float @llvm.vector.reduce.fadd.f32.f64.v2f64(double %acc, <2 x double> %in)
- ret float %res
-}
+; CHECK-NEXT: declare float @llvm.vector.reduce.fadd.f32.f64.v2f64(double, <2 x double>)
+declare float @llvm.vector.reduce.fadd.f32.f64.v2f64(double %acc, <2 x double> %in)
; CHECK: intrinsic argument 0 type (vector element of overload type 0) expected double (overload type 0 is <2 x double>), but got float
-; CHECK-NEXT: ptr @llvm.vector.reduce.fadd.f64.f32.v2f64
-define double @fadd_invalid_scalar_start(float %acc, <2 x double> %in) {
- %res = call double @llvm.vector.reduce.fadd.f64.f32.v2f64(float %acc, <2 x double> %in)
- ret double %res
-}
+; CHECK-NEXT: declare double @llvm.vector.reduce.fadd.f64.f32.v2f64(float, <2 x double>)
+declare double @llvm.vector.reduce.fadd.f64.f32.v2f64(float %acc, <2 x double> %in)
; CHECK: intrinsic return type (vector element of overload type 0) expected double (overload type 0 is <2 x double>), but got <2 x double>
-; CHECK-NEXT: ptr @llvm.vector.reduce.fadd.v2f64.f64.v2f64
-define <2 x double> @fadd_invalid_vector_res(double %acc, <2 x double> %in) {
- %res = call <2 x double> @llvm.vector.reduce.fadd.v2f64.f64.v2f64(double %acc, <2 x double> %in)
- ret <2 x double> %res
-}
+; CHECK-NEXT: declare <2 x double> @llvm.vector.reduce.fadd.v2f64.f64.v2f64(double, <2 x double>)
+declare <2 x double> @llvm.vector.reduce.fadd.v2f64.f64.v2f64(double %acc, <2 x double> %in)
; CHECK: intrinsic argument 0 type (vector element of overload type 0) expected double (overload type 0 is <2 x double>), but got <2 x double>
-; CHECK-NEXT: ptr @llvm.vector.reduce.fadd.f64.v2f64.v2f64
-define double @fadd_invalid_vector_start(<2 x double> %in, <2 x double> %acc) {
- %res = call double @llvm.vector.reduce.fadd.f64.v2f64.v2f64(<2 x double> %acc, <2 x double> %in)
- ret double %res
-}
-
-declare float @llvm.vector.reduce.fadd.f32.f64.v2f64(double %acc, <2 x double> %in)
-declare double @llvm.vector.reduce.fadd.f64.f32.v2f64(float %acc, <2 x double> %in)
+; CHECK-NEXT: declare double @llvm.vector.reduce.fadd.f64.v2f64.v2f64(<2 x double>, <2 x double>)
declare double @llvm.vector.reduce.fadd.f64.v2f64.v2f64(<2 x double> %acc, <2 x double> %in)
-declare <2 x double> @llvm.vector.reduce.fadd.v2f64.f64.v2f64(double %acc, <2 x double> %in)
diff --git a/llvm/test/CodeGen/AArch64/sme2p1-intrinsics-movaz.ll b/llvm/test/CodeGen/AArch64/sme2p1-intrinsics-movaz.ll
index efcb5dc145797..1d54f0419bea0 100644
--- a/llvm/test/CodeGen/AArch64/sme2p1-intrinsics-movaz.ll
+++ b/llvm/test/CodeGen/AArch64/sme2p1-intrinsics-movaz.ll
@@ -423,7 +423,6 @@ define {<vscale x 2 x double>, <vscale x 2 x double>,<vscale x 2 x double>, <vsc
}
-declare {<vscale x 16 x i8>, <vscale x 16 x i8>} @llvm.aarch64.sme.readz.horiz.za8.x2.nxv16i8(i32, i32)
declare {<vscale x 8 x i16>, <vscale x 8 x i16>} @llvm.aarch64.sme.readz.horiz.x2.nxv8i16(i32, i32)
declare {<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.aarch64.sme.readz.horiz.x2.nxv4i32(i32, i32)
declare {<vscale x 2 x i64>, <vscale x 2 x i64>} @llvm.aarch64.sme.readz.horiz.x2.nxv2i64(i32, i32)
@@ -432,7 +431,6 @@ declare {<vscale x 8 x half>, <vscale x 8 x half>} @llvm.aarch64.sme.readz.horiz
declare {<vscale x 4 x float>, <vscale x 4 x float>} @llvm.aarch64.sme.readz.horiz.x2.nxv4f32(i32, i32)
declare {<vscale x 2 x double>, <vscale x 2 x double>} @llvm.aarch64.sme.readz.horiz.x2.nxv2f64(i32, i32)
-declare {<vscale x 16 x i8>, <vscale x 16 x i8>} @llvm.aarch64.sme.readz.vert.za8.x2.nxv16i8(i32, i32)
declare {<vscale x 8 x i16>, <vscale x 8 x i16>} @llvm.aarch64.sme.readz.vert.x2.nxv8i16(i32, i32)
declare {<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.aarch64.sme.readz.vert.x2.nxv4i32(i32, i32)
declare {<vscale x 2 x i64>, <vscale x 2 x i64>} @llvm.aarch64.sme.readz.vert.x2.nxv2i64(i32, i32)
@@ -441,7 +439,6 @@ declare {<vscale x 8 x half>, <vscale x 8 x half>} @llvm.aarch64.sme.readz.vert.
declare {<vscale x 4 x float>, <vscale x 4 x float>} @llvm.aarch64.sme.readz.vert.x2.nxv4f32(i32, i32)
declare {<vscale x 2 x double>, <vscale x 2 x double>} @llvm.aarch64.sme.readz.vert.x2.nxv2f64(i32, i32)
-declare {<vscale x 16 x i8>, <vscale x 16 x i8>,<vscale x 16 x i8>, <vscale x 16 x i8>} @llvm.aarch64.sme.readz.horiz.za8.x4.nxv16i8(i32, i32)
declare {<vscale x 8 x i16>, <vscale x 8 x i16>,<vscale x 8 x i16>, <vscale x 8 x i16>} @llvm.aarch64.sme.readz.horiz.x4.nxv8i16(i32, i32)
declare {<vscale x 4 x i32>, <vscale x 4 x i32>,<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.aarch64.sme.readz.horiz.x4.nxv4i32(i32, i32)
declare {<vscale x 2 x i64>, <vscale x 2 x i64>,<vscale x 2 x i64>, <vscale x 2 x i64>} @llvm.aarch64.sme.readz.horiz.x4.nxv2i64(i32, i32)
@@ -450,7 +447,6 @@ declare {<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale
declare {<vscale x 4 x float>, <vscale x 4 x float>,<vscale x 4 x float>, <vscale x 4 x float>} @llvm.aarch64.sme.readz.horiz.x4.nxv4f32(i32, i32)
declare {<vscale x 2 x double>, <vscale x 2 x double>,<vscale x 2 x double>, <vscale x 2 x double>} @llvm.aarch64.sme.readz.horiz.x4.nxv2f64(i32, i32)
-declare {<vscale x 16 x i8>, <vscale x 16 x i8>,<vscale x 16 x i8>, <vscale x 16 x i8>} @llvm.aarch64.sme.readz.vert.za8.x4.nxv16i8(i32, i32)
declare {<vscale x 8 x i16>, <vscale x 8 x i16>,<vscale x 8 x i16>, <vscale x 8 x i16>} @llvm.aarch64.sme.readz.vert.x4.nxv8i16(i32, i32)
declare {<vscale x 4 x i32>, <vscale x 4 x i32>,<vscale x 4 x i32>, <vscale x 4 x i32>} @llvm.aarch64.sme.readz.vert.x4.nxv4i32(i32, i32)
declare {<vscale x 2 x i64>, <vscale x 2 x i64>,<vscale x 2 x i64>, <vscale x 2 x i64>} @llvm.aarch64.sme.readz.vert.x4.nxv2i64(i32, i32)
diff --git a/llvm/test/CodeGen/AArch64/sve-bad-intrinsics.ll b/llvm/test/CodeGen/AArch64/sve-bad-intrinsics.ll
index 5027d7677e471..ac86f7b428d95 100644
--- a/llvm/test/CodeGen/AArch64/sve-bad-intrinsics.ll
+++ b/llvm/test/CodeGen/AArch64/sve-bad-intrinsics.ll
@@ -1,17 +1,8 @@
; RUN: not llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t
; RUN: FileCheck --check-prefix=CHECK-ERROR %s <%t
+; CHECK-ERROR: intrinsic argument 0 type expected vector with 4 elements, but got <vscale x 4 x i16>
declare <4 x float> @llvm.arm.neon.vcvthf2fp(<vscale x 4 x i16>)
-declare <vscale x 4 x i16> @llvm.arm.neon.vcvtfp2hf(<vscale x 4 x float>)
; CHECK-ERROR: intrinsic return type expected vector with 4 elements, but got <vscale x 4 x i16>
-define <vscale x 4 x i16> @bad1() {
- %r = call <vscale x 4 x i16> @llvm.arm.neon.vcvtfp2hf(<vscale x 4 x float> zeroinitializer)
- ret <vscale x 4 x i16> %r
-}
-
-; CHECK-ERROR: intrinsic argument 0 type expected vector with 4 elements, but got <vscale x 4 x i16>
-define <4 x float> @bad2() {
- %r = call <4 x float> @llvm.arm.neon.vcvthf2fp(<vscale x 4 x i16> zeroinitializer)
- ret <4 x float> %r
-}
+declare <vscale x 4 x i16> @llvm.arm.neon.vcvtfp2hf(<vscale x 4 x float>)
diff --git a/llvm/test/CodeGen/AArch64/sve-ptest.ll b/llvm/test/CodeGen/AArch64/sve-ptest.ll
index ec5148886b39a..fa50810cfed37 100644
--- a/llvm/test/CodeGen/AArch64/sve-ptest.ll
+++ b/llvm/test/CodeGen/AArch64/sve-ptest.ll
@@ -78,8 +78,3 @@ declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpuo.nxv4f32(<vscale x 4 x i1>, <v
declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32)
declare i1 @llvm.aarch64.sve.ptest.any.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)
-
-declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1>)
-declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1>)
-declare <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 4 x i1>)
-declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 4 x i1>)
diff --git a/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll b/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
index 9747a23472ae9..a67f8b0836710 100644
--- a/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
+++ b/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
@@ -89,15 +89,11 @@ define <vscale x 4 x i32> @gldnt1sh_s_uxtw(<vscale x 4 x i1> %pg, ptr %base, <vs
; LDNT1B/LDNT1SB
declare <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
-declare <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.sxtw.nxv4i8(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
; LDNT1H/LDNT1SH
-declare <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.sxtw.nxv4i16(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
; LDNT1W/LDNT1SW
-declare <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.sxtw.nxv4i32(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
-declare <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.sxtw.nxv4f32(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32(<vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
diff --git a/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll b/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
index 08036399c13fb..d967273305582 100644
--- a/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
+++ b/llvm/test/CodeGen/AArch64/sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
@@ -63,20 +63,13 @@ define void @sstnt1w_s_uxtw_float(<vscale x 4 x float> %data, <vscale x 4 x i1>
; STNT1B
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
; STNT1H
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
; STNT1W
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, ptr, <vscale x 2 x i32>)
-declare void @llvm.aarch64.sve.stnt1.scatter.sxtw.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
declare void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, ptr, <vscale x 4 x i32>)
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
index d9a6eb62f7a76..185643dffded2 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
@@ -40,9 +40,6 @@
; Function Attrs: convergent nounwind readnone
declare i64 @llvm.amdgcn.if.break(i1, i64) #2
- ; Function Attrs: convergent nounwind readnone
- declare i64 @llvm.amdgcn.else.break(i64, i64) #2
-
; Function Attrs: convergent nounwind
declare i1 @llvm.amdgcn.loop(i64) #1
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir b/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
index db18d5433da3b..c465d7fc77bed 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
@@ -26,9 +26,6 @@
; Function Attrs: convergent nounwind readnone
declare i64 @llvm.amdgcn.if.break(i1, i64) #2
- ; Function Attrs: convergent nounwind readnone
- declare i64 @llvm.amdgcn.else.break(i64, i64) #2
-
; Function Attrs: convergent nounwind
declare i1 @llvm.amdgcn.loop(i64) #1
diff --git a/llvm/test/CodeGen/NVPTX/shfl-sync.ll b/llvm/test/CodeGen/NVPTX/shfl-sync.ll
index 139c1e6ecbbab..308b4cab1be4f 100644
--- a/llvm/test/CodeGen/NVPTX/shfl-sync.ll
+++ b/llvm/test/CodeGen/NVPTX/shfl-sync.ll
@@ -2,13 +2,9 @@
; RUN: %if ptxas-isa-6.0 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 -mattr=+ptx60 | %ptxas-verify %}
declare i32 @llvm.nvvm.shfl.sync.down.i32(i32, i32, i32, i32)
-declare float @llvm.nvvm.shfl.sync.down.f32(float, i32, i32, i32)
declare i32 @llvm.nvvm.shfl.sync.up.i32(i32, i32, i32, i32)
-declare float @llvm.nvvm.shfl.sync.up.f32(float, i32, i32, i32)
declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32)
-declare float @llvm.nvvm.shfl.sync.bfly.f32(float, i32, i32, i32)
declare i32 @llvm.nvvm.shfl.sync.idx.i32(i32, i32, i32, i32)
-declare float @llvm.nvvm.shfl.sync.idx.f32(float, i32, i32, i32)
; CHECK-LABEL: .func{{.*}}shfl_sync_rrr
define i32 @shfl_sync_rrr(i32 %mask, i32 %a, i32 %b, i32 %c) {
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/refract.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/refract.ll
index b18e929568534..22aa31d68f167 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/refract.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/refract.ll
@@ -33,4 +33,3 @@ entry:
}
declare <4 x half> @llvm.spv.refract.v4f16.f16(<4 x half>, <4 x half>, half)
-declare <4 x float> @llvm.spv.reflect.v4f32.f32(<4 x float>, <4 x float>, float)
diff --git a/llvm/test/Transforms/Coroutines/coro-heap-elide.ll b/llvm/test/Transforms/Coroutines/coro-heap-elide.ll
index 2be1fbaa48454..025b7e61f8888 100644
--- a/llvm/test/Transforms/Coroutines/coro-heap-elide.ll
+++ b/llvm/test/Transforms/Coroutines/coro-heap-elide.ll
@@ -368,7 +368,6 @@ declare token @llvm.coro.id(i32, ptr, ptr, ptr)
declare i1 @llvm.coro.alloc(token)
declare ptr @llvm.coro.free(token, ptr)
declare ptr @llvm.coro.begin(token, ptr)
-declare ptr @llvm.coro.frame(token)
declare ptr @llvm.coro.subfn.addr(ptr, i8)
declare i8 @llvm.coro.suspend(token, i1)
declare token @llvm.coro.save(ptr)
diff --git a/llvm/test/Transforms/Coroutines/coro-split-eh-00.ll b/llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
index 2916e5d880e4a..585df839b492d 100644
--- a/llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
+++ b/llvm/test/Transforms/Coroutines/coro-split-eh-00.ll
@@ -79,7 +79,6 @@ declare void @llvm.coro.resume(ptr)
declare void @llvm.coro.destroy(ptr)
declare token @llvm.coro.id(i32, ptr, ptr, ptr)
-declare ptr @llvm.coro.alloc(token)
declare ptr @llvm.coro.begin(token, ptr)
declare void @llvm.coro.end(ptr, i1, token)
diff --git a/llvm/test/Transforms/Coroutines/coro-split-eh-01.ll b/llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
index 026ffd9d8fec1..5abea79320e11 100644
--- a/llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
+++ b/llvm/test/Transforms/Coroutines/coro-split-eh-01.ll
@@ -72,7 +72,6 @@ declare void @llvm.coro.resume(ptr)
declare void @llvm.coro.destroy(ptr)
declare token @llvm.coro.id(i32, ptr, ptr, ptr)
-declare ptr @llvm.coro.alloc(token)
declare ptr @llvm.coro.begin(token, ptr)
declare void @llvm.coro.end(ptr, i1, token)
diff --git a/llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll b/llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll
index 7cfe621650b71..becbc4418afad 100644
--- a/llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll
+++ b/llvm/test/Transforms/Coroutines/coro-split-final-suspend.ll
@@ -121,7 +121,6 @@ declare void @llvm.coro.resume(ptr)
declare void @llvm.coro.destroy(ptr)
declare token @llvm.coro.id(i32, ptr, ptr, ptr)
-declare ptr @llvm.coro.alloc(token)
declare ptr @llvm.coro.begin(token, ptr)
declare void @llvm.coro.end(ptr, i1, token)
diff --git a/llvm/test/Transforms/Coroutines/ex0.ll b/llvm/test/Transforms/Coroutines/ex0.ll
index b62468f1492f8..34c610241b140 100644
--- a/llvm/test/Transforms/Coroutines/ex0.ll
+++ b/llvm/test/Transforms/Coroutines/ex0.ll
@@ -44,7 +44,6 @@ entry:
}
declare token @llvm.coro.id(i32, ptr, ptr, ptr)
-declare ptr @llvm.coro.alloc(token)
declare ptr @llvm.coro.free(token, ptr)
declare i32 @llvm.coro.size.i32()
declare i8 @llvm.coro.suspend(token, i1)
diff --git a/llvm/test/Transforms/Coroutines/phi-coro-end.ll b/llvm/test/Transforms/Coroutines/phi-coro-end.ll
index adfcba01d6119..c6c72985a5d18 100644
--- a/llvm/test/Transforms/Coroutines/phi-coro-end.ll
+++ b/llvm/test/Transforms/Coroutines/phi-coro-end.ll
@@ -32,7 +32,6 @@ entry:
;CHECK: ret i32 0
}
-declare ptr @llvm.coro.alloc()
declare i32 @llvm.coro.size.i32()
declare ptr @llvm.coro.free(token, ptr)
declare i8 @llvm.coro.suspend(token, i1)
diff --git a/llvm/test/Transforms/InstCombine/vector-reductions.ll b/llvm/test/Transforms/InstCombine/vector-reductions.ll
index a01cceac403f0..e719f40d1d8d3 100644
--- a/llvm/test/Transforms/InstCombine/vector-reductions.ll
+++ b/llvm/test/Transforms/InstCombine/vector-reductions.ll
@@ -4,8 +4,6 @@
declare float @llvm.vector.reduce.fadd.f32.v4f32(float, <4 x float>)
declare float @llvm.vector.reduce.fadd.f32.v8f32(float, <8 x float>)
declare float @llvm.vector.reduce.fmul.f32.nxv4f32(float, <vscale x 4 x float>)
-declare float @llvm.vector.reduce.fmin.f32.v4f32(float, <4 x float>)
-declare float @llvm.vector.reduce.fmax.f32.nxv4f32(float, <vscale x 4 x float>)
declare void @use_f32(float)
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)
diff --git a/llvm/test/Verifier/callbr.ll b/llvm/test/Verifier/callbr.ll
index 164db61d44510..b2afacffccc13 100644
--- a/llvm/test/Verifier/callbr.ll
+++ b/llvm/test/Verifier/callbr.ll
@@ -1,4 +1,4 @@
-; RUN: not opt -S %s -passes=verify 2>&1 | FileCheck %s
+; RUN: not opt -S %s -passes=verify -disable-output -verify-intrinsic-decls 2>&1 | FileCheck %s
; CHECK: Number of label constraints does not match number of callbr dests
; CHECK-NEXT: #too_few_label_constraints
@@ -69,15 +69,10 @@ abnormal:
ret i32 %ret
}
-;; Tests of the callbr.landingpad intrinsic function.
-declare i32 @llvm.callbr.landingpad.i64(i64)
-define void @callbrpad_bad_type() {
-entry:
+;; Tests of the callbr.landingpad intrinsic function with bad type.
; CHECK: intrinsic argument 0 type (matching overload type 0) expected i32, but got i64
-; CHECK-NEXT: ptr @llvm.callbr.landingpad.i64
- %foo = call i32 @llvm.callbr.landingpad.i64(i64 42)
- ret void
-}
+; CHECK-NEXT: declare i32 @llvm.callbr.landingpad.i64(i64)
+declare i32 @llvm.callbr.landingpad.i64(i64)
declare i32 @llvm.callbr.landingpad.i32(i32)
define i32 @callbrpad_multi_preds() {
diff --git a/llvm/test/Verifier/get-active-lane-mask.ll b/llvm/test/Verifier/get-active-lane-mask.ll
index cd0b9b3077a07..a659e4a60cfec 100644
--- a/llvm/test/Verifier/get-active-lane-mask.ll
+++ b/llvm/test/Verifier/get-active-lane-mask.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llvm-as -disable-output -verify-intrinsic-decls < %s -o /dev/null 2>&1 | FileCheck %s
declare <4 x i32> @llvm.get.active.lane.mask.v4i32.i32(i32, i32)
@@ -10,22 +10,10 @@ define <4 x i32> @t1(i32 %IV, i32 %TC) {
ret <4 x i32> %res
}
-declare i32 @llvm.get.active.lane.mask.i32.i32(i32, i32)
-
-define i32 @t2(i32 %IV, i32 %TC) {
; CHECK: intrinsic return type (overload type 0) expected any integer vector, but got i32
-; CHECK-NEXT: ptr @llvm.get.active.lane.mask.i32.i32
-
- %res = call i32 @llvm.get.active.lane.mask.i32.i32(i32 %IV, i32 %TC)
- ret i32 %res
-}
-
-declare <4 x i1> @llvm.get.active.lane.mask.v4i1.v4i32(<4 x i32>, <4 x i32>)
+; CHECK-NEXT: declare i32 @llvm.get.active.lane.mask.i32.i32(i32, i32)
+declare i32 @llvm.get.active.lane.mask.i32.i32(i32, i32)
-define <4 x i1> @t3(<4 x i32> %x) {
; CHECK: intrinsic argument 0 type (overload type 1) expected any integer type, but got <4 x i32>
-; CHECK-NEXT: ptr @llvm.get.active.lane.mask.v4i1.v4i32
-
- %res = call <4 x i1> @llvm.get.active.lane.mask.v4i1.v4i32(<4 x i32> %x, <4 x i32> %x)
- ret <4 x i1> %res
-}
+; CHECK-NEXT: declare <4 x i1> @llvm.get.active.lane.mask.v4i1.v4i32(<4 x i32>, <4 x i32>)
+declare <4 x i1> @llvm.get.active.lane.mask.v4i1.v4i32(<4 x i32>, <4 x i32>)
diff --git a/llvm/test/Verifier/intrinsic-bad-arg-type1.ll b/llvm/test/Verifier/intrinsic-bad-arg-type1.ll
index bb19c2955accf..a14b2a61a3680 100644
--- a/llvm/test/Verifier/intrinsic-bad-arg-type1.ll
+++ b/llvm/test/Verifier/intrinsic-bad-arg-type1.ll
@@ -1,478 +1,191 @@
; RUN: split-file %s %t
;--- test0.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test0.ll | FileCheck %t/test0.ll
-; CHECK: intrinsic return type expected void, but got float
-; CHECK-NEXT: ptr @llvm.set.rounding
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls 2>&1 < %t/test0.ll | FileCheck %t/test0.ll
+; CHECK: intrinsic return type expected void, but got float
+; CHECK-NEXT: declare float @llvm.set.rounding(i32)
declare float @llvm.set.rounding(i32)
-define void @test0() {
-entry:
- %t = call float @llvm.set.rounding(i32 0)
- ret void
-}
-
-;--- test1.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test1.ll | FileCheck %t/test1.ll
; CHECK: intrinsic return type expected x86_mmx (<1 x i64>), but got x86_amx
-; CHECK-NEXT: ptr @llvm.x86.sse.cvtps2pi
-
+; CHECK-NEXT: declare x86_amx @llvm.x86.sse.cvtps2pi(<4 x float>)
declare x86_amx @llvm.x86.sse.cvtps2pi(<4 x float>)
-define void @test1(<4 x float> %a) {
-entry:
- %t = call x86_amx @llvm.x86.sse.cvtps2pi(<4 x float> %a)
- ret void
-}
-
-;--- test2.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test2.ll | FileCheck %t/test2.ll
; CHECK: intrinsic argument 1 type expected x86_mmx (<1 x i64>), but got i32
-; CHECK-NEXT: ptr @llvm.x86.sse.cvtpi2ps
-
+; CHECK-NEXT: declare <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float>, i32)
declare <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float>, i32)
-define void @test1(<4 x float> %a) {
-entry:
- %t = call <4 x float> @llvm.x86.sse.cvtpi2ps(<4 x float> %a, i32 0)
- ret void
-}
-
-;--- test3.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test3.ll | FileCheck %t/test3.ll
; CHECK: intrinsic return type expected x86_amx, but got float
-; CHECK-NEXT: ptr @llvm.x86.tileloadd64.internal
-
+; CHECK-NEXT: declare float @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
declare float @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
-define void @test1(ptr %a) {
-entry:
- %t = call float @llvm.x86.tileloadd64.internal(i16 0, i16 0, ptr %a, i64 0)
- ret void
-}
-
-;--- test4.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test4.ll | FileCheck %t/test4.ll
; CHECK: intrinsic return type expected token, but got i32
-; CHECK-NEXT: ptr @llvm.call.preallocated.setup
-
+; CHECK-NEXT: declare i32 @llvm.call.preallocated.setup(i32)
declare i32 @llvm.call.preallocated.setup(i32)
-define void @test1() {
-entry:
- %t = call i32 @llvm.call.preallocated.setup(i32 0)
- ret void
-}
-
-;--- test5.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test5.ll | FileCheck %t/test5.ll
; CHECK: intrinsic argument 1 type expected metadata, but got i16
-; CHECK-NEXT: ptr @llvm.fptrunc.round.f64.f64
-
+; CHECK-NEXT: declare double @llvm.fptrunc.round.f64.f64(double, i16)
declare double @llvm.fptrunc.round.f64.f64(double, i16)
-define void @test1() {
-entry:
- %t = call double @llvm.fptrunc.round.f64.f64(double 1.0, i16 0)
- ret void
-}
-
-;--- test6.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test6.ll | FileCheck %t/test6.ll
; CHECK: intrinsic argument 0 type expected half, but got i16
-; CHECK-NEXT: ptr @llvm.nvvm.mul.rn.sat.f16
-
+; CHECK-NEXT: declare half @llvm.nvvm.mul.rn.sat.f16(i16, half)
declare half @llvm.nvvm.mul.rn.sat.f16(i16, half)
-define void @test1() {
-entry:
- %t = call half @llvm.nvvm.mul.rn.sat.f16(i16 0, half 1.0)
- ret void
-}
-
-;--- test7.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test7.ll | FileCheck %t/test7.ll
; CHECK: intrinsic return type expected bfloat, but got half
-; CHECK-NEXT: ptr @llvm.arm.neon.vcvtbfp2bf
-
+; CHECK-NEXT: declare half @llvm.arm.neon.vcvtbfp2bf(float)
declare half @llvm.arm.neon.vcvtbfp2bf(float)
-define void @test1() {
-entry:
- %t = call half @llvm.arm.neon.vcvtbfp2bf(float 0.0)
- ret void
-}
-
-;--- test8.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test8.ll | FileCheck %t/test8.ll
; CHECK: intrinsic argument 2 type expected float, but got half
-; CHECK-NEXT: ptr @llvm.x86.avx512.vfmadd.f32
-
+; CHECK-NEXT: declare float @llvm.x86.avx512.vfmadd.f32(float, float, half, i32)
declare float @llvm.x86.avx512.vfmadd.f32(float, float, half, i32)
-define void @test1() {
-entry:
- %t = call float @llvm.x86.avx512.vfmadd.f32(float 0.0, float 0.0, half 0.0, i32 0)
- ret void
-}
-
-;--- test9.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test9.ll | FileCheck %t/test9.ll
; CHECK: intrinsic argument 2 type expected double, but got half
-; CHECK-NEXT: ptr @llvm.expect.with.probability.i32
-
+; CHECK-NEXT: declare i32 @llvm.expect.with.probability.i32(i32, i32, half)
declare i32 @llvm.expect.with.probability.i32(i32, i32, half)
-define void @test1() {
-entry:
- %t = call i32 @llvm.expect.with.probability.i32(i32 0, i32 0, half 0.0)
- ret void
-}
-
-;--- test10.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test10.ll | FileCheck %t/test10.ll
; CHECK: intrinsic argument 0 type expected fp128, but got double
-; CHECK-NEXT: ptr @llvm.ppc.truncf128.round.to.odd
-
+; CHECK-NEXT: declare double @llvm.ppc.truncf128.round.to.odd(double)
declare double @llvm.ppc.truncf128.round.to.odd(double)
-define void @test1() {
-entry:
- %t = call double @llvm.ppc.truncf128.round.to.odd(double 0.0)
- ret void
-}
-
-;--- test11.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test11.ll | FileCheck %t/test11.ll
; CHECK: intrinsic argument 0 type expected ppc_fp128, but got double
-; CHECK-NEXT: ptr @llvm.ppc.unpack.longdouble
-
+; CHECK-NEXT: declare double @llvm.ppc.unpack.longdouble(double, i32)
declare double @llvm.ppc.unpack.longdouble(double, i32)
-define void @test1() {
-entry:
- %t = call double @llvm.ppc.unpack.longdouble(double 0.0, i32 0)
- ret void
-}
-
-;--- test12.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test12.ll | FileCheck %t/test12.ll
; CHECK: intrinsic return type expected i64, but got double
-; CHECK-NEXT: ptr @llvm.readcyclecounter
-
+; CHECK-NEXT: declare double @llvm.readcyclecounter()
declare double @llvm.readcyclecounter()
-define void @test1() {
-entry:
- %t = call double @llvm.readcyclecounter()
- ret void
-}
-
-;--- test13.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test13.ll | FileCheck %t/test13.ll
; CHECK: intrinsic argument 0 type expected aarch64.svcount, but got i32
-; CHECK-NEXT: ptr @llvm.aarch64.sve.pext
-
+; CHECK-NEXT: declare <4 x i32> @llvm.aarch64.sve.pext(i32, i32)
declare <4 x i32> @llvm.aarch64.sve.pext(i32, i32)
-define void @test1() {
-entry:
- %t = call <4 x i32> @llvm.aarch64.sve.pext(i32 0, i32 0)
- ret void
-}
-
-;--- test14.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test14.ll | FileCheck %t/test14.ll
; CHECK: intrinsic return type expected vector with 16 elements, but got i32
-; CHECK-NEXT: ptr @llvm.aarch64.neon.pmull64
+; CHECK-NEXT: declare i32 @llvm.aarch64.neon.pmull64(i64, i64)
; Correct return type is <16 x i8>
declare i32 @llvm.aarch64.neon.pmull64(i64, i64)
-define void @test1() {
-entry:
- %t = call i32 @llvm.aarch64.neon.pmull64(i64 0, i64 0)
- ret void
-}
-
-;--- test15.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test15.ll | FileCheck %t/test15.ll
-; CHECK: intrinsic return vector element type expected i8, but got i32
-; CHECK-NEXT: ptr @llvm.aarch64.neon.pmull64
-
-declare <16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
-
-define void @test1() {
-entry:
- %t = call <16 x i32> @llvm.aarch64.neon.pmull64(i64 0, i64 0)
- ret void
-}
-
-;--- test16.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test16.ll | FileCheck %t/test16.ll
-; CHECK: intrinsic return type expected vector with 16 elements, but got <vscale x 16 x i32>
-; CHECK-NEXT: ptr @llvm.aarch64.neon.pmull64
-
-declare <vscale x 16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
-
-define void @test1() {
-entry:
- %t = call <vscale x 16 x i32> @llvm.aarch64.neon.pmull64(i64 0, i64 0)
- ret void
-}
-
-;--- test17.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test17.ll | FileCheck %t/test17.ll
; CHECK: intrinsic argument 1 type expected ptr, but got i32
-; CHECK-NEXT: ptr @llvm.gcroot
-
+; CHECK-NEXT: declare void @llvm.gcroot(ptr, i32)
declare void @llvm.gcroot(ptr, i32)
-define void @test1() {
-entry:
- call void @llvm.gcroot(ptr null, i32 0)
- ret void
-}
-
-;--- test18.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test18.ll | FileCheck %t/test18.ll
; CHECK: intrinsic argument 0 type expected ptr addrspace(1), but got ptr
-; CHECK-NEXT: ptr @llvm.nvvm.applypriority.global.L2.evict.normal
-
+; CHECK-NEXT: declare void @llvm.nvvm.applypriority.global.L2.evict.normal(ptr, i64)
declare void @llvm.nvvm.applypriority.global.L2.evict.normal(ptr, i64)
-define void @test1() {
-entry:
- call void @llvm.nvvm.applypriority.global.L2.evict.normal(ptr null, i64 0)
- ret void
-}
-
-;--- test19.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test19.ll | FileCheck %t/test19.ll
; CHECK: intrinsic return type expected literal non-packed struct with 2 elements, but got void
-; CHECK-NEXT: ptr @llvm.nvvm.elect.sync
+; CHECK-NEXT: declare void @llvm.nvvm.elect.sync(i32)
; Expected return type is { i32, i1 }.
declare void @llvm.nvvm.elect.sync(i32)
-define void @test1() {
-entry:
- call void @llvm.nvvm.elect.sync(i32 0)
- ret void
-}
-
-;--- test20.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test20.ll | FileCheck %t/test20.ll
-; CHECK: intrinsic return struct element 1 type expected i1, but got i2
-; CHECK-NEXT: ptr @llvm.nvvm.elect.sync
-
-; Expected return type is { i32, i1 }.
-declare { i32, i2 } @llvm.nvvm.elect.sync(i32)
-
-define void @test1() {
-entry:
- call { i32, i2 } @llvm.nvvm.elect.sync(i32 0)
- ret void
-}
-
-;--- test21.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test21.ll | FileCheck %t/test21.ll
-; CHECK: intrinsic return type expected literal non-packed struct with 2 elements, but got { i32, i1, i1 }
-; CHECK-NEXT: ptr @llvm.nvvm.elect.sync
-
-; Expected return type is { i32, i1 }.
-declare { i32, i1, i1 } @llvm.nvvm.elect.sync(i32)
-
-define void @test1() {
-entry:
- call { i32, i1, i1 } @llvm.nvvm.elect.sync(i32 0)
- ret void
-}
-
-;--- test22.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test22.ll | FileCheck %t/test22.ll
; CHECK: intrinsic argument 0 type (extended overload type 0) expected i64 (overload type 0 is i32), but got i32
-; CHECK-NEXT: ptr @llvm.aarch64.neon.sqxtn.i32
+; CHECK-NEXT: declare i32 @llvm.aarch64.neon.sqxtn.i32(i32)
; Type signature = [llvm_anyint_ty], [LLVMExtendedType<0>]
declare i32 @llvm.aarch64.neon.sqxtn.i32(i32)
-define void @test1() {
-entry:
- call i32 @llvm.aarch64.neon.sqxtn.i32(i32 0)
- ret void
-}
-
-;--- test23.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test23.ll | FileCheck %t/test23.ll
; CHECK: intrinsic argument 0 type (extended overload type 0) expected <4 x i64> (overload type 0 is <4 x i32>), but got i64
-; CHECK-NEXT: ptr @llvm.aarch64.neon.sqxtn.v4i32
+; CHECK-NEXT: declare <4 x i32> @llvm.aarch64.neon.sqxtn.v4i32(i64)
; Type signature = [llvm_anyint_ty], [LLVMExtendedType<0>]
declare <4 x i32> @llvm.aarch64.neon.sqxtn.v4i32(i64)
-define void @test1() {
-entry:
- call <4 x i32> @llvm.aarch64.neon.sqxtn.v4i32(i64 0)
- ret void
-}
-
-;--- test24.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test24.ll | FileCheck %t/test24.ll
; CHECK: intrinsic argument 0 is truncated overload type 0, so overload type 0 expected int or vector of int, but got <4 x float>
-; CHECK-NEXT: ptr @llvm.aarch64.neon.smull.v4f32
+; CHECK-NEXT: declare <4 x float> @llvm.aarch64.neon.smull.v4f32(i64, i64)
; Type signature = [llvm_anyvector_ty], [LLVMTruncatedType<0>, LLVMTruncatedType<0>]
declare <4 x float> @llvm.aarch64.neon.smull.v4f32(i64, i64)
-define void @test1() {
-entry:
- call <4 x float> @llvm.aarch64.neon.smull.v4f32(i64 0, i64 0)
- ret void
-}
-
-;--- test25.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test25.ll | FileCheck %t/test25.ll
; CHECK: intrinsic argument 1 type (truncated overload type 0) expected <4 x i32> (overload type 0 is <4 x i64>), but got i64
-; CHECK-NEXT: ptr @llvm.aarch64.neon.smull.v4i64
+; CHECK-NEXT: declare <4 x i64> @llvm.aarch64.neon.smull.v4i64(<4 x i32>, i64)
; Type signature = [llvm_anyvector_ty], [LLVMTruncatedType<0>, LLVMTruncatedType<0>]
declare <4 x i64> @llvm.aarch64.neon.smull.v4i64(<4 x i32>, i64)
-define void @test1() {
-entry:
- call <4 x i64> @llvm.aarch64.neon.smull.v4i64(<4 x i32> poison, i64 0)
- ret void
-}
-
-;--- test26.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test26.ll | FileCheck %t/test26.ll
; CHECK: intrinsic argument 0 is 1/nth (n=3) elements vector of overload type 0, so overload type 0 expected vector with multiple of 3 elements, but got <4 x i64>
-; CHECK-NEXT: ptr @llvm.vector.interleave3.v4i64
+; CHECK-NEXT: declare <4 x i64> @llvm.vector.interleave3.v4i64(i32, i32, i32)
; Type signature = [llvm_anyvector_ty], !listsplat(LLVMOneNthElementsVectorType<0, n>, n)
declare <4 x i64> @llvm.vector.interleave3.v4i64(i32, i32, i32)
-define void @test1() {
-entry:
- call <4 x i64> @llvm.vector.interleave3.v4i64(i32 0, i32 0, i32 0)
- ret void
-}
-
-;--- test27.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test27.ll | FileCheck %t/test27.ll
; CHECK: intrinsic argument 0 type (1/nth (n=3) elements vector of overload type 0) expected <4 x i64> (overload type 0 is <12 x i64>), but got <4 x i32>
-; CHECK-NEXT: ptr @llvm.vector.interleave3.v12i64
+; CHECK-NEXT: declare <12 x i64> @llvm.vector.interleave3.v12i64(<4 x i32>, <4 x i32>, i32)
; Type signature = [llvm_anyvector_ty], !listsplat(LLVMOneNthElementsVectorType<0, n>, n)
declare <12 x i64> @llvm.vector.interleave3.v12i64(<4 x i32>, <4 x i32>, i32)
-define void @test1() {
-entry:
- call <12 x i64> @llvm.vector.interleave3.v12i64(<4 x i32> poison, <4 x i32> poison, i32 0)
- ret void
-}
-
-;--- test28.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test28.ll | FileCheck %t/test28.ll
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector with vscale x 4 elements (overload type 0 is <vscale x 4 x i32>), but got <4 x i1>
-; CHECK-NEXT: ptr @llvm.masked.load.nxv4i32.p0
+; CHECK-NEXT: declare <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr, <4 x i1>, <vscale x 4 x i32>)
declare <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr, <4 x i1>, <vscale x 4 x i32>)
-define void @test1() {
- call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr null, <4 x i1> poison, <vscale x 4 x i32> poison)
- ret void
-}
-
-;--- test29.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test29.ll | FileCheck %t/test29.ll
; CHECK: intrinsic return type (same vector width of overload type 0) expected vector (overload type 0 is <2 x float>), but got i1
-; CHECK-NEXT: ptr @llvm.is.fpclass.v2f32
+; CHECK-NEXT: declare i1 @llvm.is.fpclass.v2f32(<2 x float>, i32)
-; type signature = [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], [llvm_anyfloat_ty, llvm_i32_ty],
+; type signature = [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], [llvm_anyfloat_ty, llvm_i32_ty]
declare i1 @llvm.is.fpclass.v2f32(<2 x float>, i32)
-define void @test1() {
- call i1 @llvm.is.fpclass.v2f32(<2 x float> poison, i32 0)
- ret void
-}
-
-;--- test30.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test30.ll | FileCheck %t/test30.ll
; CHECK: intrinsic return type (same vector width of overload type 0) expected scalar (overload type 0 is float), but got <2 x i1>
-; CHECK-NEXT: ptr @llvm.is.fpclass.f32
+; CHECK-NEXT: declare <2 x i1> @llvm.is.fpclass.f32(float, i32)
-; type signature = [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], [llvm_anyfloat_ty, llvm_i32_ty],
+; type signature = [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], [llvm_anyfloat_ty, llvm_i32_ty]
declare <2 x i1> @llvm.is.fpclass.f32(float, i32)
-define void @test1() {
- call <2 x i1> @llvm.is.fpclass.f32(float 0.0, i32 0)
- ret void
-}
-
-;--- test31.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test31.ll | FileCheck %t/test31.ll
; CHECK: intrinsic return type (same vector width of overload type 0) expected vector with 4 elements (overload type 0 is <4 x float>), but got <2 x i1>
-; CHECK-NEXT: ptr @llvm.is.fpclass.v4f32
+; CHECK-NEXT: declare <2 x i1> @llvm.is.fpclass.v4f32(<4 x float>, i32)
; type signature = [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>], [llvm_anyfloat_ty, llvm_i32_ty],
declare <2 x i1> @llvm.is.fpclass.v4f32(<4 x float>, i32)
-define void @test1() {
- call <2 x i1> @llvm.is.fpclass.v4f32(<4 x float> poison, i32 0)
- ret void
-}
-
-;--- test32.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test32.ll | FileCheck %t/test32.ll
; CHECK: intrinsic argument 0 type (subdivided by 2 vector of overload type 0) expected <8 x i16> (overload type 0 is <4 x i32>), but got <4 x i32>
-; CHECK-NEXT: ptr @llvm.aarch64.sve.sunpkhi
+; CHECK-NEXT: declare <4 x i32> @llvm.aarch64.sve.sunpkhi(<4 x i32>)
; type signature = [llvm_anyvector_ty], [LLVMSubdivide2VectorType<0>]
declare <4 x i32> @llvm.aarch64.sve.sunpkhi(<4 x i32>)
-define void @test1() {
- call <4 x i32> @llvm.aarch64.sve.sunpkhi(<4 x i32> poison)
- ret void
-}
-
-;--- test33.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test33.ll | FileCheck %t/test33.ll
; CHECK: intrinsic argument 2 type (subdivided by 4 vector of overload type 0) expected <16 x i8> (overload type 0 is <4 x i32>), but got <16 x i4>
-; CHECK-NEXT: ptr @llvm.aarch64.sve.sdot.v4i32
+; CHECK-NEXT: declare <4 x i32> @llvm.aarch64.sve.sdot.v4i32(<4 x i32>, <16 x i8>, <16 x i4>)
-; type signature = [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMSubdivide4VectorType<0>, LLVMSubdivide4VectorType<0>],
+; type signature = [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMSubdivide4VectorType<0>, LLVMSubdivide4VectorType<0>]
declare <4 x i32> @llvm.aarch64.sve.sdot.v4i32(<4 x i32>, <16 x i8>, <16 x i4>)
-define void @test1() {
- call <4 x i32> @llvm.aarch64.sve.sdot.v4i32(<4 x i32> poison, <16 x i8> poison, <16 x i4> poison)
- ret void
-}
-
-;--- test34.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test34.ll | FileCheck %t/test34.ll
; CHECK: intrinsic argument 2 type (subdivided by 4 vector of overload type 0) expected <16 x half> (overload type 0 is <4 x double>), but got float
-; CHECK-NEXT: ptr @llvm.aarch64.sve.sdot.v4f64
+; CHECK-NEXT: declare <4 x double> @llvm.aarch64.sve.sdot.v4f64(<4 x double>, <16 x half>, float)
-; type signature = [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMSubdivide4VectorType<0>, LLVMSubdivide4VectorType<0>],
+; type signature = [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMSubdivide4VectorType<0>, LLVMSubdivide4VectorType<0>]
declare <4 x double> @llvm.aarch64.sve.sdot.v4f64(<4 x double>, <16 x half>, float)
-define void @test1() {
- call <4 x double> @llvm.aarch64.sve.sdot.v4f64(<4 x double> poison, <16 x half> poison, float 0.0)
- ret void
-}
-
-;--- test35.ll
-; RUN: not opt -S -passes=verify 2>&1 < %t/test35.ll | FileCheck %t/test35.ll
; CHECK: intrinsic argument 2 type (vector of bitcasts to int of overload type 0) expected <4 x i32> (overload type 0 is <4 x float>), but got i32
-; CHECK-NEXT: ptr @llvm.riscv.vrgather.vv.v4f32.i32
+; CHECK-NEXT: declare <4 x float> @llvm.riscv.vrgather.vv.v4f32.i32(<4 x float>, <4 x float>, i32, i32)
; type signature = [llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMVectorOfBitcastsToInt<0>, llvm_anyint_ty]
declare <4 x float> @llvm.riscv.vrgather.vv.v4f32.i32(<4 x float>, <4 x float>, i32, i32)
-define void @test1() {
- call <4 x float> @llvm.riscv.vrgather.vv.v4f32.i32(<4 x float> poison, <4 x float> poison, i32 0, i32 0)
- ret void
-}
+
+;--- test1.ll
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls 2>&1 < %t/test1.ll | FileCheck %t/test1.ll
+
+; CHECK: intrinsic return vector element type expected i8, but got i32
+; CHECK-NEXT: declare <16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
+declare <16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
+
+; CHECK: intrinsic return struct element 1 type expected i1, but got i2
+; CHECK-NEXT: declare { i32, i2 } @llvm.nvvm.elect.sync(i32)
+
+; Expected return type is { i32, i1 }.
+declare { i32, i2 } @llvm.nvvm.elect.sync(i32)
+
+
+;--- test2.ll
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls 2>&1 < %t/test2.ll | FileCheck %t/test2.ll
+
+; CHECK: intrinsic return type expected vector with 16 elements, but got <vscale x 16 x i32>
+; CHECK-NEXT: declare <vscale x 16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
+declare <vscale x 16 x i32> @llvm.aarch64.neon.pmull64(i64, i64)
+
+; CHECK: intrinsic return type expected literal non-packed struct with 2 elements, but got { i32, i1, i1 }
+; CHECK-NEXT: declare { i32, i1, i1 } @llvm.nvvm.elect.sync(i32)
+
+; Expected return type is { i32, i1 }.
+declare { i32, i1, i1 } @llvm.nvvm.elect.sync(i32)
diff --git a/llvm/test/Verifier/masked-load-store.ll b/llvm/test/Verifier/masked-load-store.ll
index e3a7b005e38b6..016ebacc02a41 100644
--- a/llvm/test/Verifier/masked-load-store.ll
+++ b/llvm/test/Verifier/masked-load-store.ll
@@ -1,65 +1,33 @@
-; RUN: not opt -S -passes=verify 2>&1 < %s | FileCheck %s
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls 2>&1 < %s | FileCheck %s
-declare <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr, <4 x i1>, <vscale x 4 x i32>)
-define <vscale x 4 x i32> @masked_load(ptr %addr, <4 x i1> %mask, <vscale x 4 x i32> %dst) {
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector with vscale x 4 elements (overload type 0 is <vscale x 4 x i32>), but got <4 x i1>
-; CHECK-NEXT: ptr @llvm.masked.load.nxv4i32.p0
- %res = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr %addr, <4 x i1> %mask, <vscale x 4 x i32> %dst)
- ret <vscale x 4 x i32> %res
-}
+; CHECK-NEXT: declare <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr, <4 x i1>, <vscale x 4 x i32>)
+declare <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr, <4 x i1>, <vscale x 4 x i32>)
-declare i32 @llvm.masked.load.i32.p0(ptr, i1, i32)
-define void @t1() {
; CHECK: intrinsic return type (overload type 0) expected any vector type, but got i32
-; CHECK-NEXT: ptr @llvm.masked.load.i32.p0
- call i32 @llvm.masked.load.i32.p0(ptr poison, i1 0, i32 0)
- ret void
-}
+; CHECK-NEXT: declare i32 @llvm.masked.load.i32.p0(ptr, i1, i32)
+declare i32 @llvm.masked.load.i32.p0(ptr, i1, i32)
-declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i1, <4 x i32>)
-define void @t2() {
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector (overload type 0 is <4 x i32>), but got i1
-; CHECK-NEXT: ptr @llvm.masked.load.v4i32.p0
- call <4 x i32> @llvm.masked.load.v4i32.p0(ptr poison, i1 0, <4 x i32> poison)
- ret void
-}
+; CHECK-NEXT: declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i1, <4 x i32>)
+declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i1, <4 x i32>)
-declare <8 x i32> @llvm.masked.load.v8i32.p0(ptr, <5 x i1>, <8 x i32>)
-define void @t3() {
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector with 8 elements (overload type 0 is <8 x i32>), but got <5 x i1>
-; CHECK-NEXT: ptr @llvm.masked.load.v8i32.p0
- call <8 x i32> @llvm.masked.load.v8i32.p0(ptr poison, <5 x i1> poison, <8 x i32> poison)
- ret void
-}
+; CHECK-NEXT: declare <8 x i32> @llvm.masked.load.v8i32.p0(ptr, <5 x i1>, <8 x i32>)
+declare <8 x i32> @llvm.masked.load.v8i32.p0(ptr, <5 x i1>, <8 x i32>)
-declare <7 x i32> @llvm.masked.load.v7i32.p0(ptr, <7 x i1>, <6 x i32>)
-define void @t4() {
; CHECK: intrinsic argument 2 type (matching overload type 0) expected <7 x i32>, but got <6 x i32>
-; CHECK-NEXT: ptr @llvm.masked.load.v7i32.p0
- call <7 x i32> @llvm.masked.load.v7i32.p0(ptr poison, <7 x i1> poison, <6 x i32> poison)
- ret void
-}
+; CHECK-NEXT: declare <7 x i32> @llvm.masked.load.v7i32.p0(ptr, <7 x i1>, <6 x i32>)
+declare <7 x i32> @llvm.masked.load.v7i32.p0(ptr, <7 x i1>, <6 x i32>)
-declare void @llvm.masked.store.i32.p0(i32, ptr, i1)
-define void @t5() {
; CHECK: intrinsic argument 0 type (overload type 0) expected any vector type, but got i32
-; CHECK-NEXT: ptr @llvm.masked.store.i32.p0
- call void @llvm.masked.store.i32.p0(i32 0, ptr poison, i1 0)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.store.i32.p0(i32, ptr, i1)
+declare void @llvm.masked.store.i32.p0(i32, ptr, i1)
-declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i1)
-define void @t6() {
; CHECK: intrinsic argument 2 type (same vector width of overload type 0) expected vector (overload type 0 is <4 x i32>), but got i1
-; CHECK-NEXT: ptr @llvm.masked.store.v4i32.p0
- call void @llvm.masked.store.v4i32.p0(<4 x i32> poison, ptr poison, i1 0)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i1)
+declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i1)
-declare void @llvm.masked.store.v5i32.p0(<5 x i32>, ptr, <4 x i1>)
-define void @t7() {
; CHECK: intrinsic argument 2 type (same vector width of overload type 0) expected vector with 5 elements (overload type 0 is <5 x i32>), but got <4 x i1>
-; CHECK-NEXT: ptr @llvm.masked.store.v5i32.p0
- call void @llvm.masked.store.v5i32.p0(<5 x i32> poison, ptr poison, <4 x i1> poison)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.store.v5i32.p0(<5 x i32>, ptr, <4 x i1>)
+declare void @llvm.masked.store.v5i32.p0(<5 x i32>, ptr, <4 x i1>)
diff --git a/llvm/test/Verifier/matrix-intrinsics.ll b/llvm/test/Verifier/matrix-intrinsics.ll
index 3233aeb360d21..3bc7620720dda 100644
--- a/llvm/test/Verifier/matrix-intrinsics.ll
+++ b/llvm/test/Verifier/matrix-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: not opt -S %s 2>&1 | FileCheck %s
+; RUN: not opt -S -disable-output -verify-intrinsic-decls %s 2>&1 | FileCheck %s
define <4 x float> @transpose(<4 x float> %m, i32 %arg) {
; CHECK: Result of a matrix operation does not fit in the returned vector!
@@ -60,17 +60,14 @@ define void @column.major_store(ptr %m, ptr %n, i64 %arg) {
ret void
}
-define <4 x float> @transpose_mixed_types(<4 x float> %fvec, <4 x i32> %ivec, i32 %arg) {
;
-; CHECK-NEXT: intrinsic argument 0 type (matching overload type 0) expected <4 x float>, but got <4 x i32>
-; CHECK-NEXT: ptr @llvm.matrix.transpose.v4f32.v4i32
-; CHECK-NEXT: intrinsic argument 0 type (matching overload type 0) expected <4 x i32>, but got <4 x float>
-; CHECK-NEXT: ptr @llvm.matrix.transpose.v4i32.v4f32
-;
- %result.0 = call <4 x float> @llvm.matrix.transpose.v4f32.v4i32(<4 x i32> %ivec, i32 0, i32 0)
- %result.1 = call <4 x i32> @llvm.matrix.transpose.v4i32.v4f32(<4 x float> %result.0, i32 3, i32 2)
- ret <4 x float> %result.0
-}
+; CHECK: intrinsic argument 0 type (matching overload type 0) expected <4 x float>, but got <4 x i32>
+; CHECK-NEXT: declare <4 x float> @llvm.matrix.transpose.v4f32.v4i32(<4 x i32>, i32, i32)
+declare <4 x float> @llvm.matrix.transpose.v4f32.v4i32(<4 x i32>, i32, i32)
+
+; CHECK: intrinsic argument 0 type (matching overload type 0) expected <4 x i32>, but got <4 x float>
+; CHECK-NEXT: declare <4 x i32> @llvm.matrix.transpose.v4i32.v4f32(<4 x float>, i32, i32)
+declare <4 x i32> @llvm.matrix.transpose.v4i32.v4f32(<4 x float>, i32, i32)
define <4 x float> @multiply_mixed_types(<4 x i32> %ivec, <4 x float> %fvec, i32 %arg) {
;
@@ -146,9 +143,7 @@ declare void @llvm.matrix.column.major.store.v4p0.i64(<4 x ptr>, ptr, i64, i1, i
declare void @llvm.matrix.column.major.store.v4p0.i8(<4 x ptr>, ptr, i8, i1, i32, i32)
declare void @llvm.matrix.column.major.store.v4p0.i128(<4 x ptr>, ptr, i128, i1, i32, i32)
-declare <4 x i32> @llvm.matrix.transpose.v4i32.v4f32(<4 x float>, i32, i32)
declare <4 x float> @llvm.matrix.transpose.v4f32(<4 x float>, i32, i32)
-declare <4 x float> @llvm.matrix.transpose.v4f32.v4i32(<4 x i32>, i32, i32)
declare <4 x i32> @llvm.matrix.multiply.v4i32.v4f32.v4f32(<4 x float>, <4 x float>, i32, i32, i32)
declare <4 x float> @llvm.matrix.multiply.v4f32.v4i32.v4f32(<4 x i32>, <4 x float>, i32, i32, i32)
diff --git a/llvm/test/Verifier/reduction-intrinsics.ll b/llvm/test/Verifier/reduction-intrinsics.ll
index 7f71a83c41370..6c801dc8a746a 100644
--- a/llvm/test/Verifier/reduction-intrinsics.ll
+++ b/llvm/test/Verifier/reduction-intrinsics.ll
@@ -1,67 +1,39 @@
-; RUN: not opt -S -passes=verify < %s 2>&1 | FileCheck %s
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls < %s 2>&1 | FileCheck %s
; Reject a vector reduction with a non-vector argument.
-define float @reduce_vector_not_vec_arg(float %x) {
; CHECK: intrinsic argument 0 type (overload type 0) expected any fp vector, but got float
- %r0 = call float @llvm.vector.reduce.fmax.f32(float %x)
- ret float %r0
-}
+; CHECK-NEXT: declare float @llvm.vector.reduce.fmax.f32(float)
+declare float @llvm.vector.reduce.fmax.f32(float)
-define i32 @reduce_vector_not_vec_arg2(i32 %x) {
; CHECK: intrinsic argument 0 type (overload type 0) expected any integer vector, but got i32
- %r0 = call i32 @llvm.vector.reduce.smax.i32(i32 %x)
- ret i32 %r0
-}
+; CHECK-NEXT: declare i32 @llvm.vector.reduce.smax.i32(i32)
+declare i32 @llvm.vector.reduce.smax.i32(i32)
; Type mismatch for start value.
-
-define float @fadd_match_arg_types(<4 x float> %x) {
; CHECK: intrinsic argument 0 type (vector element of overload type 0) expected float (overload type 0 is <4 x float>), but got double
- %r = call float @llvm.vector.reduce.fadd.v4f32(double 0.0, <4 x float> %x)
- ret float %r
-}
+; CHECK-NEXT: declare float @llvm.vector.reduce.fadd.v4f32(double, <4 x float>)
+declare float @llvm.vector.reduce.fadd.v4f32(double, <4 x float>)
; Wrong result type.
-
-define i64 @result_too_wide(<4 x i32> %x) {
; CHECK: intrinsic return type (vector element of overload type 0) expected i32 (overload type 0 is <4 x i32>), but got i64
- %r = call i64 @llvm.vector.reduce.add.v4i32(<4 x i32> %x)
- ret i64 %r
-}
+; CHECK-NEXT: declare i64 @llvm.vector.reduce.add.v4i32(<4 x i32>)
+declare i64 @llvm.vector.reduce.add.v4i32(<4 x i32>)
; We should have the appropriate (either int or FP) type of argument
; for any vector reduction.
-
-define float @not_float_reduce(<4 x float> %x) {
; CHECK: intrinsic argument 0 type (overload type 0) expected any integer vector, but got <4 x float>
- %r = call float @llvm.vector.reduce.umin.v4f32(<4 x float> %x)
- ret float %r
-}
+; CHECK-NEXT: declare float @llvm.vector.reduce.umin.v4f32(<4 x float>)
+declare float @llvm.vector.reduce.umin.v4f32(<4 x float>)
-define ptr @not_pointer_reduce(<4 x ptr> %x) {
; CHECK: intrinsic argument 0 type (overload type 0) expected any integer vector, but got <4 x ptr>
- %r = call ptr @llvm.vector.reduce.or.v4p0(<4 x ptr> %x)
- ret ptr %r
-}
+; CHECK-NEXT: declare ptr @llvm.vector.reduce.or.v4p0(<4 x ptr>)
+declare ptr @llvm.vector.reduce.or.v4p0(<4 x ptr>)
-define i32 @not_integer_reduce(<4 x i32> %x) {
; CHECK: intrinsic argument 1 type (overload type 0) expected any fp vector, but got <4 x i32>
- %r = call i32 @llvm.vector.reduce.fadd.v4i32(i32 0, <4 x i32> %x)
- ret i32 %r
-}
+; CHECK-NEXT: declare i32 @llvm.vector.reduce.fadd.v4i32(i32, <4 x i32>)
+declare i32 @llvm.vector.reduce.fadd.v4i32(i32, <4 x i32>)
-define ptr @not_pointer_reduce2(<4 x ptr> %x) {
; CHECK: intrinsic argument 0 type (overload type 0) expected any fp vector, but got <4 x ptr>
- %r = call ptr @llvm.vector.reduce.fmin.v4p0(<4 x ptr> %x)
- ret ptr %r
-}
-
-declare float @llvm.vector.reduce.umin.v4f32(<4 x float>)
-declare ptr @llvm.vector.reduce.or.v4p0(<4 x ptr>)
-declare i32 @llvm.vector.reduce.fadd.v4i32(i32, <4 x i32>)
-declare float @llvm.vector.reduce.fadd.v4f32(double, <4 x float>)
+; CHECK-NEXT: declare ptr @llvm.vector.reduce.fmin.v4p0(<4 x ptr>)
declare ptr @llvm.vector.reduce.fmin.v4p0(<4 x ptr>)
-declare float @llvm.vector.reduce.fmax.f32(float)
-declare i32 @llvm.vector.reduce.smax.i32(i32)
-declare i64 @llvm.vector.reduce.add.v4i32(<4 x i32>)
diff --git a/llvm/test/Verifier/scatter_gather.ll b/llvm/test/Verifier/scatter_gather.ll
index 8d8adb488d3c8..7e759dba2ebf6 100644
--- a/llvm/test/Verifier/scatter_gather.ll
+++ b/llvm/test/Verifier/scatter_gather.ll
@@ -1,118 +1,67 @@
-; RUN: not opt -passes=verify < %s 2>&1 | FileCheck %s
+; RUN: not opt -passes=verify -disable-output -verify-intrinsic-decls < %s 2>&1 | FileCheck %s
; Mask is not a vector
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector (overload type 0 is <16 x float>), but got ptr
-define <16 x float> @gather2(<16 x ptr> %ptrs, ptr %mask, <16 x float> %passthru) {
- %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0(<16 x ptr> %ptrs, ptr %mask, <16 x float> %passthru)
- ret <16 x float> %res
-}
+; CHECK-NEXT: declare <16 x float> @llvm.masked.gather.v16f32.v16p0(<16 x ptr>, ptr, <16 x float>)
declare <16 x float> @llvm.masked.gather.v16f32.v16p0(<16 x ptr>, ptr, <16 x float>)
; Mask length != return length
; CHECK: intrinsic argument 1 type (same vector width of overload type 0) expected vector with 8 elements (overload type 0 is <8 x float>), but got <16 x i1>
-; CHECK-NEXT: ptr @llvm.masked.gather.v8f32.v8p0
-define <8 x float> @gather3(<8 x ptr> %ptrs, <16 x i1> %mask, <8 x float> %passthru) {
- %res = call <8 x float> @llvm.masked.gather.v8f32.v8p0(<8 x ptr> %ptrs, <16 x i1> %mask, <8 x float> %passthru)
- ret <8 x float> %res
-}
+; CHECK-NEXT: declare <8 x float> @llvm.masked.gather.v8f32.v8p0(<8 x ptr>, <16 x i1>, <8 x float>)
declare <8 x float> @llvm.masked.gather.v8f32.v8p0(<8 x ptr>, <16 x i1>, <8 x float>)
; Return type is not a vector
; CHECK: intrinsic return type (overload type 0) expected any vector type, but got ptr
-; CHECK-NEXT: ptr @llvm.masked.gather.p0.v8p0
-define ptr @gather4(<8 x ptr> %ptrs, <8 x i1> %mask, <8 x float> %passthru) {
- %res = call ptr @llvm.masked.gather.p0.v8p0(<8 x ptr> %ptrs, <8 x i1> %mask, <8 x float> %passthru)
- ret ptr %res
-}
+; CHECK-NEXT: declare ptr @llvm.masked.gather.p0.v8p0(<8 x ptr>, <8 x i1>, <8 x float>)
declare ptr @llvm.masked.gather.p0.v8p0(<8 x ptr>, <8 x i1>, <8 x float>)
; Value type is not a vector
; CHECK: intrinsic argument 0 type (vector of pointers to elements of overload type 0) expected vector (overload type 0 is <8 x float>), but got ptr
-; CHECK-NEXT: ptr @llvm.masked.gather.v8f32.p0
-define <8 x float> @gather5(ptr %ptrs, <8 x i1> %mask, <8 x float> %passthru) {
- %res = call <8 x float> @llvm.masked.gather.v8f32.p0(ptr %ptrs, <8 x i1> %mask, <8 x float> %passthru)
- ret <8 x float> %res
-}
+; CHECK-NEXT: declare <8 x float> @llvm.masked.gather.v8f32.p0(ptr, <8 x i1>, <8 x float>)
declare <8 x float> @llvm.masked.gather.v8f32.p0(ptr, <8 x i1>, <8 x float>)
; Value type is not a vector of pointers
; CHECK: intrinsic argument 0 type (vector of pointers to elements of overload type 0) expected vector of pointers with 8 elements (overload type 0 is <8 x float>), but got <8 x float>
-; CHECK-NEXT: ptr @llvm.masked.gather.v8f32.v8f32
-define <8 x float> @gather6(<8 x float> %ptrs, <8 x i1> %mask, <8 x float> %passthru) {
- %res = call <8 x float> @llvm.masked.gather.v8f32.v8f32(<8 x float> %ptrs, <8 x i1> %mask, <8 x float> %passthru)
- ret <8 x float> %res
-}
+; CHECK-NEXT: declare <8 x float> @llvm.masked.gather.v8f32.v8f32(<8 x float>, <8 x i1>, <8 x float>)
declare <8 x float> @llvm.masked.gather.v8f32.v8f32(<8 x float>, <8 x i1>, <8 x float>)
; Value length!= vector of pointers length
; CHECK: intrinsic argument 0 type (vector of pointers to elements of overload type 0) expected vector of pointers with 8 elements (overload type 0 is <8 x float>), but got <16 x ptr>
-; CHECK-NEXT: ptr @llvm.masked.gather.v8f32.v16p0
-define <8 x float> @gather8(<16 x ptr> %ptrs, <8 x i1> %mask, <8 x float> %passthru) {
- %res = call <8 x float> @llvm.masked.gather.v8f32.v16p0(<16 x ptr> %ptrs, <8 x i1> %mask, <8 x float> %passthru)
- ret <8 x float> %res
-}
+; CHECK-NEXT: declare <8 x float> @llvm.masked.gather.v8f32.v16p0(<16 x ptr>, <8 x i1>, <8 x float>)
declare <8 x float> @llvm.masked.gather.v8f32.v16p0(<16 x ptr>, <8 x i1>, <8 x float>)
; Passthru type doesn't match return type
; CHECK: intrinsic argument 2 type (matching overload type 0) expected <16 x i32>, but got <8 x i32>
-; CHECK-NEXT: ptr @llvm.masked.gather.v16i32.v16p0
-define <16 x i32> @gather9(<16 x ptr> %ptrs, <16 x i1> %mask, <8 x i32> %passthru) {
- %res = call <16 x i32> @llvm.masked.gather.v16i32.v16p0(<16 x ptr> %ptrs, <16 x i1> %mask, <8 x i32> %passthru)
- ret <16 x i32> %res
-}
+; CHECK-NEXT: declare <16 x i32> @llvm.masked.gather.v16i32.v16p0(<16 x ptr>, <16 x i1>, <8 x i32>)
declare <16 x i32> @llvm.masked.gather.v16i32.v16p0(<16 x ptr>, <16 x i1>, <8 x i32>)
; Mask is not a vector
; CHECK: intrinsic argument 2 type (same vector width of overload type 0) expected vector (overload type 0 is <16 x float>), but got ptr
-; CHECK-NEXT: ptr @llvm.masked.scatter.v16f32.v16p0
-define void @scatter2(<16 x float> %value, <16 x ptr> %ptrs, ptr %mask) {
- call void @llvm.masked.scatter.v16f32.v16p0(<16 x float> %value, <16 x ptr> %ptrs, ptr %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.v16f32.v16p0(<16 x float>, <16 x ptr>, ptr)
declare void @llvm.masked.scatter.v16f32.v16p0(<16 x float>, <16 x ptr>, ptr)
; Mask length != value length
; CHECK: intrinsic argument 2 type (same vector width of overload type 0) expected vector with 8 elements (overload type 0 is <8 x float>), but got <16 x i1>
-; CHECK-NEXT: ptr @llvm.masked.scatter.v8f32.v8p0
-define void @scatter3(<8 x float> %value, <8 x ptr> %ptrs, <16 x i1> %mask) {
- call void @llvm.masked.scatter.v8f32.v8p0(<8 x float> %value, <8 x ptr> %ptrs, <16 x i1> %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.v8f32.v8p0(<8 x float>, <8 x ptr>, <16 x i1>)
declare void @llvm.masked.scatter.v8f32.v8p0(<8 x float>, <8 x ptr>, <16 x i1>)
; Value type is not a vector
; CHECK: intrinsic argument 0 type (overload type 0) expected any vector type, but got ptr
-; CHECK-NEXT: ptr @llvm.masked.scatter.p0.v8p0
-define void @scatter4(ptr %value, <8 x ptr> %ptrs, <8 x i1> %mask) {
- call void @llvm.masked.scatter.p0.v8p0(ptr %value, <8 x ptr> %ptrs, <8 x i1> %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.p0.v8p0(ptr, <8 x ptr>, <8 x i1>)
declare void @llvm.masked.scatter.p0.v8p0(ptr, <8 x ptr>, <8 x i1>)
; ptrs is not a vector
; CHECK: intrinsic argument 1 type (vector of pointers to elements of overload type 0) expected vector (overload type 0 is <8 x float>), but got ptr
-; CHECK-NEXT: ptr @llvm.masked.scatter.v8f32.p0
-define void @scatter5(<8 x float> %value, ptr %ptrs, <8 x i1> %mask) {
- call void @llvm.masked.scatter.v8f32.p0(<8 x float> %value, ptr %ptrs, <8 x i1> %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.v8f32.p0(<8 x float>, ptr, <8 x i1>)
declare void @llvm.masked.scatter.v8f32.p0(<8 x float>, ptr, <8 x i1>)
; Value type is not a vector of pointers
; CHECK: intrinsic argument 1 type (vector of pointers to elements of overload type 0) expected vector of pointers with 8 elements (overload type 0 is <8 x float>), but got <8 x float>
-; CHECK-NEXT: ptr @llvm.masked.scatter.v8f32.v8f32
-define void @scatter6(<8 x float> %value, <8 x float> %ptrs, <8 x i1> %mask) {
- call void @llvm.masked.scatter.v8f32.v8f32(<8 x float> %value, <8 x float> %ptrs, <8 x i1> %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.v8f32.v8f32(<8 x float>, <8 x float>, <8 x i1>)
declare void @llvm.masked.scatter.v8f32.v8f32(<8 x float>, <8 x float>, <8 x i1>)
; Value length!= vector of pointers length
; CHECK: intrinsic argument 1 type (vector of pointers to elements of overload type 0) expected vector of pointers with 8 elements (overload type 0 is <8 x float>), but got <16 x ptr>
-; CHECK-NEXT: ptr @llvm.masked.scatter.v8f32.v16p0
-define void @scatter8(<8 x float> %value, <16 x ptr> %ptrs, <8 x i1> %mask) {
- call void @llvm.masked.scatter.v8f32.v16p0(<8 x float> %value, <16 x ptr> %ptrs, <8 x i1> %mask)
- ret void
-}
+; CHECK-NEXT: declare void @llvm.masked.scatter.v8f32.v16p0(<8 x float>, <16 x ptr>, <8 x i1>)
declare void @llvm.masked.scatter.v8f32.v16p0(<8 x float>, <16 x ptr>, <8 x i1>)
diff --git a/llvm/test/Verifier/stepvector-intrinsic.ll b/llvm/test/Verifier/stepvector-intrinsic.ll
index 09d545f55a42a..1415bdb646368 100644
--- a/llvm/test/Verifier/stepvector-intrinsic.ll
+++ b/llvm/test/Verifier/stepvector-intrinsic.ll
@@ -1,29 +1,24 @@
-; RUN: not opt -S -passes=verify < %s 2>&1 | FileCheck %s
+; RUN: not opt -S -passes=verify -disable-output -verify-intrinsic-decls < %s 2>&1 | FileCheck %s
; Reject stepvector intrinsics that return a scalar
-
-define i32 @stepvector_i32() {
; CHECK: intrinsic return type (overload type 0) expected any vector type, but got i32
- %1 = call i32 @llvm.stepvector.i32()
- ret i32 %1
-}
+; CHECK-NEXT: declare i32 @llvm.stepvector.i32()
+declare i32 @llvm.stepvector.i32()
; Reject vectors with non-integer elements
-
-define <vscale x 4 x float> @stepvector_float() {
; CHECK: stepvector only supported for vectors of integers with a bitwidth of at least 8
+; CHECK-NEXT: call <vscale x 4 x float> @llvm.stepvector.nxv4f32()
+declare <vscale x 4 x float> @llvm.stepvector.nxv4f32()
+define <vscale x 4 x float> @stepvector_float() {
%1 = call <vscale x 4 x float> @llvm.stepvector.nxv4f32()
ret <vscale x 4 x float> %1
}
; Reject vectors of integers less than 8 bits in width
-
-define <vscale x 16 x i1> @stepvector_i1() {
; CHECK: stepvector only supported for vectors of integers with a bitwidth of at least 8
+; CHECK-NEXT: call <vscale x 16 x i1> @llvm.stepvector.nxv16i1()
+declare <vscale x 16 x i1> @llvm.stepvector.nxv16i1()
+define <vscale x 16 x i1> @stepvector_i1() {
%1 = call <vscale x 16 x i1> @llvm.stepvector.nxv16i1()
ret <vscale x 16 x i1> %1
}
-
-declare i32 @llvm.stepvector.i32()
-declare <vscale x 4 x float> @llvm.stepvector.nxv4f32()
-declare <vscale x 16 x i1> @llvm.stepvector.nxv16i1()
diff --git a/llvm/unittests/IR/VerifierTest.cpp b/llvm/unittests/IR/VerifierTest.cpp
index 8b3b31ea68395..ea7ab9ec15244 100644
--- a/llvm/unittests/IR/VerifierTest.cpp
+++ b/llvm/unittests/IR/VerifierTest.cpp
@@ -569,7 +569,7 @@ TEST(VerifierTest, IntrinsicRetInvalidStruct) {
for (StructType *STy : {NonLiteral, LiteralPacked}) {
Module M("M", Ctx);
FunctionType *IntrFTy = FunctionType::get(STy, I32Ty, /*isVarArg=*/false);
- Function *Intr = Function::Create(IntrFTy, Function::InternalLinkage,
+ Function *Intr = Function::Create(IntrFTy, Function::ExternalLinkage,
"llvm.nvvm.elect.sync", M);
FunctionType *FTy =
@@ -583,7 +583,7 @@ TEST(VerifierTest, IntrinsicRetInvalidStruct) {
std::string Error;
raw_string_ostream ErrorOS(Error);
- EXPECT_TRUE(verifyFunction(*F, &ErrorOS));
+ EXPECT_TRUE(verifyModule(M, &ErrorOS));
EXPECT_TRUE(StringRef(Error).starts_with(
"intrinsic return type expected literal non-packed struct with 2 "
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