[llvm] [CodeGen] Join live range segments after dead def move (PR #204648)

[Yaxun Liu via llvm-commits]

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+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -verify-misched -run-pass=machine-scheduler -misched-only-block=2 -filetype=null -o /dev/null %s
+
+# This used to assert while moving a dead subregister def upward. The moved
+# def retagged a following live-range segment to the same value number as the
+# previous segment, but did not join the adjacent segments. This is a reduced
+# MIR test, but it still needs the surrounding scheduler context to reproduce
+# the problematic move.
+
+--- |
+  target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n32:64-S32-A5-G1-ni:7:8:9"
+  target triple = "amdgcn-unknown-amdhsa"
+  define amdgpu_kernel void @rock_attention(ptr addrspace(1) inreg %0, ptr addrspace(1) inreg %1, ptr addrspace(1) inreg %2, ptr addrspace(1) inreg %3, ptr addrspace(1) inreg %4, ptr addrspace(1) inreg %5) #0 {
+    ret void
+  }
+  attributes #0 = { nounwind "amdgpu-cluster-dims"="1,1,1" "amdgpu-flat-work-group-size"="1,64" "uniform-work-group-size" }
+...
+---
+name:            rock_attention
+alignment:       4
+tracksRegLiveness: true
+noPhis:          true
+isSSA:           false
+noVRegs:         false
+hasFakeUses:     false
+registers:
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yxsamliu wrote:

Done, minimized registers and compacted vreg numbers.

https://github.com/llvm/llvm-project/pull/204648