[llvm] [llc] set canonical triple in module (PR #203725)

Alex MacLean via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 13 13:16:42 PDT 2026


https://github.com/AlexMaclean created https://github.com/llvm/llvm-project/pull/203725

Prior to this change the effective triple for the TargetMachine and the triple in the module were determined by different criteria and diverged in some cases. This can create lots of issues in passes which check the module triple. 

TragetMachine:
1. -march
2. -mtriple
3. target triple in incoming module
4. default target triple

Module:
1. -mtriple
2. target triple in incoming module

Stamp the canonical target triple into the module so that this divergence is no longer possible. 

>From 45e58af1d93b49198ac52688f6ddaaf4f5b17764 Mon Sep 17 00:00:00 2001
From: Alex Maclean <amaclean at nvidia.com>
Date: Sat, 13 Jun 2026 13:00:36 -0700
Subject: [PATCH] [llc] set canonical triple in module

---
 llvm/test/CodeGen/Generic/intrinsics.ll | 3 ---
 llvm/tools/llc/llc.cpp                  | 4 ++--
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/llvm/test/CodeGen/Generic/intrinsics.ll b/llvm/test/CodeGen/Generic/intrinsics.ll
index 82e2b3ec7dee5..e5161c44a1df4 100644
--- a/llvm/test/CodeGen/Generic/intrinsics.ll
+++ b/llvm/test/CodeGen/Generic/intrinsics.ll
@@ -1,9 +1,6 @@
 ; RUN: llc < %s
 ; RUN: llc -O0 < %s
 
-; NVPTX can't select sinf(float)/sin(double)
-; XFAIL: target=nvptx{{.*}}
-
 ;; SQRT
 declare float @llvm.sqrt.f32(float)
 
diff --git a/llvm/tools/llc/llc.cpp b/llvm/tools/llc/llc.cpp
index dcd54c18401d0..ad291c3e6a3ea 100644
--- a/llvm/tools/llc/llc.cpp
+++ b/llvm/tools/llc/llc.cpp
@@ -675,8 +675,8 @@ static int compileModule(char **argv, SmallVectorImpl<PassPlugin> &PluginList,
     Err.print(argv[0], WithColor::error(errs(), argv[0]));
     return 1;
   }
-  if (!TargetTriple.empty())
-    M->setTargetTriple(Triple(Triple::normalize(TargetTriple)));
+
+  M->setTargetTriple(TheTriple);
 
   std::optional<CodeModel::Model> CM_IR = M->getCodeModel();
   if (!CM && CM_IR)



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