[llvm] [SLP] Support memory runtime alias checks (PR #203631)

via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 13 12:35:48 PDT 2026


Andarwinux wrote:

```llvm
define void @test(ptr %0, i32 %1, ptr %2, i64 %3) {
  %5 = alloca [5 x i32], align 16
  br label %6

6:                                                ; preds = %.critedge, %4
  %.011 = phi i32 [ 0, %4 ], [ 1, %.critedge ]
  %7 = icmp slt i32 %.011, %1
  br i1 %7, label %.critedge, label %9

.critedge:                                        ; preds = %6
  %8 = getelementptr [4 x i8], ptr %5, i64 %3
  store i32 0, ptr %8, align 4
  br label %6

9:                                                ; preds = %12, %6
  %.0 = phi i32 [ %21, %12 ], [ 0, %6 ]
  %10 = icmp ult i32 %.0, 5
  br i1 %10, label %12, label %11

11:                                               ; preds = %9
  ret void

12:                                               ; preds = %9
  %13 = zext i32 %.0 to i64
  %14 = getelementptr [4 x i8], ptr %2, i64 %13
  %15 = load i32, ptr %14, align 4
  %16 = getelementptr [4 x i8], ptr %5, i64 %13
  %17 = load i32, ptr %16, align 4
  %18 = or i32 %15, %17
  store i32 %18, ptr %14, align 4
  %19 = load i32, ptr %0, align 4
  %20 = or i32 %19, 1
  store i32 %20, ptr %0, align 4
  %21 = add i32 %.0, 1
  br label %9
}

```
clang -O3 -march=tigerlake -c reduced.ll -o /dev/null -emit-llvm -mllvm -print-on-crash

```
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and dumped files.
Stack dump:
0.	Program arguments: clang -O3 -march=tigerlake -c reduced.ll -o /dev/null -emit-llvm -mllvm -print-on-crash
1.	Optimizer
2.	Running pass "function<eager-inv>(drop-unnecessary-assumes,float2int,lower-constant-intrinsics,chr,loop(loop-rotate<header-duplication;no-prepare-for-lto;check-exit-count>,loop-deletion),loop-distribute,inject-tli-mappings,loop-vectorize<no-interleave-forced-only;no-vectorize-forced-only;>,drop-unnecessary-assumes,infer-alignment,loop-load-elim,instcombine<max-iterations=1;no-verify-fixpoint>,simplifycfg<bonus-inst-threshold=1;forward-switch-cond;switch-range-to-icmp;switch-to-arithmetic;switch-to-lookup;no-keep-loops;hoist-common-insts;no-hoist-loads-stores-with-cond-faulting;sink-common-insts;speculate-blocks;simplify-cond-branch;no-speculate-unpredictables>,slp-vectorizer,vector-combine,instcombine<max-iterations=1;no-verify-fixpoint>,loop-unroll<O3>,transform-warning,sroa<preserve-cfg;aggregate-to-vector>,infer-alignment,instcombine<max-iterations=1;no-verify-fixpoint>,loop-mssa(licm<allowspeculation>),alignment-from-assumptions,loop-sink,instsimplify,div-rem-pairs,mergeicmps,expand-memcmp,tailcallelim,simplifycfg<bonus-inst-threshold=1;no-forward-switch-cond;switch-range-to-icmp;switch-to-arithmetic;no-switch-to-lookup;keep-loops;no-hoist-common-insts;hoist-loads-stores-with-cond-faulting;no-sink-common-insts;speculate-blocks;simplify-cond-branch;speculate-unpredictables>)" on module "reduced.ll"
3.	Running pass "instcombine<max-iterations=1;no-verify-fixpoint>" on function "test"
#0 0x000061c490e68716 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) Signals.cpp:0:0
; *** Dump of IR Before Last Pass InstCombinePass Started ***
; Function Attrs: nofree norecurse nosync nounwind memory(argmem: readwrite)
define void @test(ptr nofree captures(none) %0, i32 %1, ptr nofree captures(none) %2, i64 %3) local_unnamed_addr #0 {
  %5 = ptrtoint ptr %0 to i64
  %6 = ptrtoint ptr %2 to i64
  %7 = alloca [5 x i32], align 16
  %8 = icmp sgt i32 %1, 0
  br i1 %8, label %.critedge.lr.ph, label %.preheader

.critedge.lr.ph:                                  ; preds = %4
  %9 = getelementptr [4 x i8], ptr %7, i64 %3
  store i32 0, ptr %9, align 4
  %.not = icmp eq i32 %1, 1
  br i1 %.not, label %.critedge.lr.ph..preheader_crit_edge, label %.critedge

.critedge.lr.ph..preheader_crit_edge:             ; preds = %.critedge.lr.ph
  %10 = load <4 x i32>, ptr %7, align 16
  %.phi.trans.insert8 = getelementptr inbounds nuw i8, ptr %7, i64 16
  %.pre9 = load i32, ptr %.phi.trans.insert8, align 16
  br label %.preheader

.preheader:                                       ; preds = %.critedge.lr.ph..preheader_crit_edge, %4
  %11 = phi i32 [ %.pre9, %.critedge.lr.ph..preheader_crit_edge ], [ undef, %4 ]
  %12 = phi <4 x i32> [ %10, %.critedge.lr.ph..preheader_crit_edge ], [ undef, %4 ]
  %13 = add i64 %6, 20
  %14 = add i64 %5, 4
  %rt.bound0 = icmp ult i64 %5, %13
  %rt.bound1 = icmp ult i64 %6, %14
  %rt.conflict = and i1 %rt.bound0, %rt.bound1
  %rt.guard = freeze i1 %rt.conflict
  br i1 %rt.guard, label %.preheader.rtscalar, label %.preheader.rtvec

.critedge:                                        ; preds = %.critedge.lr.ph, %.critedge
  br label %.critedge

.preheader.rtvec:                                 ; preds = %.preheader
  %15 = load i32, ptr %0, align 4
  %16 = or i32 %15, 1
  store i32 %16, ptr %0, align 4
  %17 = load i32, ptr %0, align 4
  %18 = or i32 %17, 1
  store i32 %18, ptr %0, align 4
  %19 = load i32, ptr %0, align 4
  %20 = or i32 %19, 1
  store i32 %20, ptr %0, align 4
  %21 = load <4 x i32>, ptr %2, align 4
  %22 = or <4 x i32> %12, %21
  store <4 x i32> %22, ptr %2, align 4
  %23 = load i32, ptr %0, align 4
  %24 = or i32 %23, 1
  store i32 %24, ptr %0, align 4
  %25 = getelementptr i8, ptr %2, i64 16
  %26 = load i32, ptr %25, align 4
  %27 = or i32 %11, %26
  store i32 %27, ptr %25, align 4
  %28 = load i32, ptr %0, align 4
  %29 = or i32 %28, 1
  store i32 %29, ptr %0, align 4
  br label %.preheader.rtcont

.preheader.rtscalar:                              ; preds = %.preheader
  %30 = load i32, ptr %2, align 4
  %31 = or i32 <badref>, %30
  store i32 %31, ptr %2, align 4
  %32 = load i32, ptr %0, align 4
  %33 = or i32 %32, 1
  store i32 %33, ptr %0, align 4
  %34 = getelementptr i8, ptr %2, i64 4
  %35 = load i32, ptr %34, align 4
  %36 = or i32 <badref>, %35
  store i32 %36, ptr %34, align 4
  %37 = load i32, ptr %0, align 4
  %38 = or i32 %37, 1
  store i32 %38, ptr %0, align 4
  %39 = getelementptr i8, ptr %2, i64 8
  %40 = load i32, ptr %39, align 4
  %41 = or i32 <badref>, %40
  store i32 %41, ptr %39, align 4
  %42 = load i32, ptr %0, align 4
  %43 = or i32 %42, 1
  store i32 %43, ptr %0, align 4
  %44 = getelementptr i8, ptr %2, i64 12
  %45 = load i32, ptr %44, align 4
  %46 = or i32 <badref>, %45
  store i32 %46, ptr %44, align 4
  %47 = load i32, ptr %0, align 4
  %48 = or i32 %47, 1
  store i32 %48, ptr %0, align 4
  %49 = getelementptr i8, ptr %2, i64 16
  %50 = load i32, ptr %49, align 4
  %51 = or i32 %11, %50
  store i32 %51, ptr %49, align 4
  %52 = load i32, ptr %0, align 4
  %53 = or i32 %52, 1
  store i32 %53, ptr %0, align 4
  br label %.preheader.rtcont

.preheader.rtcont:                                ; preds = %.preheader.rtscalar, %.preheader.rtvec
  ret void
}
```

https://github.com/llvm/llvm-project/pull/203631


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