[llvm] [GISel][Inlineasm] Don't assert on multi-register inline asm inputs (PR #200612)

[Ilpo Ruotsalainen via llvm-commits]

https://github.com/lonemeow updated https://github.com/llvm/llvm-project/pull/200612

>From c584f675ec8fca1a0017cb80f8b07fa720269660 Mon Sep 17 00:00:00 2001
From: Ilpo Ruotsalainen <lonewolf at iki.fi>
Date: Sat, 30 May 2026 13:58:01 -0700
Subject: [PATCH] [GISel][Inlineasm] Don't assert on multi-register inline asm
 inputs

lowerInlineAsm asserted that the number of registers allocated for an
input operand equals the number of source vregs, then separately bailed
for NumRegs > 1. The assert is wrong: the counts legitimately differ when
a value is passed in a register pair/tuple (e.g. i128 in a RISC-V "R" GPR
pair, or i512 to an AArch64 ld64b operand), crashing assertions-enabled
builds instead of falling back to SelectionDAG.

Replace the assert and the NumRegs > 1 check with a single guard requiring
exactly one source vreg in one register; anything else is rejected so it
falls back instead of asserting. The supported path is unchanged.
---
 llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp   |  6 +-----
 .../RISCV/GlobalISel/inline-asm-multi-reg-input.ll  | 13 +++++++++++++
 2 files changed, 14 insertions(+), 5 deletions(-)
 create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/inline-asm-multi-reg-input.ll

diff --git a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
index 3efa6ecaa9dc0..b5bbcc193b6b7 100644
--- a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
@@ -551,11 +551,7 @@ bool InlineAsmLowering::lowerInlineAsm(
 
       unsigned NumRegs = OpInfo.Regs.size();
       ArrayRef<Register> SourceRegs = GetOrCreateVRegs(*OpInfo.CallOperandVal);
-      assert(NumRegs == SourceRegs.size() &&
-             "Expected the number of input registers to match the number of "
-             "source registers");
-
-      if (NumRegs > 1) {
+      if (NumRegs != 1 || SourceRegs.size() != 1) {
         LLVM_DEBUG(dbgs() << "Input operands with multiple input registers are "
                              "not supported yet\n");
         return false;
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/inline-asm-multi-reg-input.ll b/llvm/test/CodeGen/RISCV/GlobalISel/inline-asm-multi-reg-input.ll
new file mode 100644
index 0000000000000..dbf8b6dfeddaf
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/inline-asm-multi-reg-input.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2>&1 | FileCheck %s
+
+; An inline asm input value that maps to fewer virtual registers than the
+; constraint needs physical registers (here an i128 in a GPR pair via the "R"
+; constraint) isn't supported by GlobalISel yet. Check that it falls back
+; cleanly instead of crashing in InlineAsmLowering.
+
+define i128 @inline_asm_R_i128(i128 %x) nounwind {
+; CHECK: remark: {{.*}} unable to translate instruction: call
+; CHECK-LABEL: warning: Instruction selection used fallback path for inline_asm_R_i128
+  %r = call i128 asm sideeffect "/* $0 $1 */", "=&R,R"(i128 %x)
+  ret i128 %r
+}