[llvm] [AMDGPU] Widen MUBUF/MTBUF source-vgpr WAR hazard on gfx940-family to SGPR soffset (PR #197267)

[Larry Meadows via llvm-commits]

lfmeadow wrote:

Here are two patches (against ROCm/llvm-project but applicable to upstream). First is a code fix, second is a new regression test. 
Blurb: The checkVALUHazardsHelper rewrite accumulated wait-state distance in a
  single counter shared across recursively-visited predecessor blocks, so
   on branchy control flow it over-counts and drops the protective S_NOP;
   the fix restores per-window getWaitStatesSince min-over-paths
  accounting while preserving #197267's sgpr-soffset windows. The new
  test fails without the fix and passes with it on gfx942/gfx950.

[add_regression_test.patch](https://github.com/user-attachments/files/28915074/add_regression_test.patch)
[fix_GCNHazardRecognizer.patch](https://github.com/user-attachments/files/28915075/fix_GCNHazardRecognizer.patch)

The patch fixes the two internal regressions as well as maintaining the Triton fix. The key missing piece of this PR was handling multi-block hazards correctly.

Ideally a new PR would include the functionality of this patch as well as the new multi-block regiression test.

https://github.com/llvm/llvm-project/pull/197267