[llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)

[Ramkumar Ramachandra via llvm-commits]

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@@ -376,6 +376,54 @@ CRCTable HashRecognize::genSarwateTable(const APInt &GenPoly,
   return Table;
 }
 
+// Divide one GF(2) polynomial by another.
+static APInt calculateGF2Quotient(APInt Dividend, const APInt &Divisor) {
+  unsigned DivisorDeg = Divisor.getActiveBits() - 1;
+  APInt Quotient = APInt::getZero(Dividend.getBitWidth());
+  unsigned DividendDeg;
+  while (!Dividend.isZero() &&
+         (DividendDeg = Dividend.getActiveBits() - 1) >= DivisorDeg) {
+    unsigned Shift = DividendDeg - DivisorDeg;
+    Quotient.setBit(Shift);
+    Dividend ^= Divisor.shl(Shift);
+  }
+  return Quotient;
+}
+
+// Generate constants (mu/reciprocal, P/generator) for a Barrett-style
+// reduction. This reduction allows the Sarwate table entry to be computed on
+// the fly, rather than requiring a load from memory (on supporting hardware).
+CRCBarrettConstants HashRecognize::genBarrettConstants(const APInt &GenPoly,
+                                                       bool ByteOrderSwapped) {
+  unsigned BW = GenPoly.getBitWidth();
+  unsigned ClmulBW = BW * 2;
+  unsigned DivBW = ClmulBW + 1;
+  APInt Dividend = APInt::getSignedMinValue(DivBW);
+  CRCBarrettConstants C;
+
+  if (ByteOrderSwapped) {
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artagnon wrote:

APInt AdjustedGenPoly = GenPoly.zext(DivBW).setBit(BW);
 
We set the BW'th bit because a generating polynomial of bitwidth BW drops the BW'th bit implicitly. 

https://github.com/llvm/llvm-project/pull/203405