[llvm] [AMGDPU] Add gfx1251 V_PK_MIN/MAX_NUM_F64 (PR #203596)
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 12 10:56:50 PDT 2026
https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/203596
Also legalizes v2f64 fcanonicalize.
>From 0fe996ae9dcb9c76807021363f5d78ae02e76ced Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Fri, 12 Jun 2026 10:46:18 -0700
Subject: [PATCH] [AMGDPU] Add gfx1251 V_PK_MIN/MAX_NUM_F64
Also legalizes v2f64 fcanonicalize.
---
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 15 +-
llvm/lib/Target/AMDGPU/SIInstructions.td | 6 +
.../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 4 +
llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 7 +
llvm/test/CodeGen/AMDGPU/fcanonicalize.ll | 2991 +++++++++++++++--
llvm/test/CodeGen/AMDGPU/maximumnum.ll | 1357 ++++++++
llvm/test/CodeGen/AMDGPU/minimumnum.ll | 1317 ++++++++
llvm/test/CodeGen/AMDGPU/packed-fp64.ll | 552 +++
llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s | 96 +
llvm/test/MC/AMDGPU/gfx1251_err.s | 78 +
.../AMDGPU/gfx1251_dasm_vop3p.txt | 72 +
11 files changed, 6262 insertions(+), 233 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 30950f8f5d9e5..cf2c55cc360f8 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -905,11 +905,18 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
Custom);
}
if (Subtarget->hasPackedFP64Ops()) {
- setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG},
+ setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG,
+ ISD::FMINNUM_IEEE, ISD::FMAXNUM_IEEE,
+ ISD::FCANONICALIZE},
MVT::v2f64, Legal);
- setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG},
- {MVT::v4f64, MVT::v8f64, MVT::v16f64, MVT::v32f64},
- Custom);
+ setOperationAction(
+ {ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM, ISD::FMAXIMUMNUM},
+ MVT::v2f64, Custom);
+ setOperationAction(
+ {ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG, ISD::FMINNUM_IEEE,
+ ISD::FMAXNUM_IEEE, ISD::FMINNUM, ISD::FMAXNUM, ISD::FMINIMUMNUM,
+ ISD::FMAXIMUMNUM, ISD::FCANONICALIZE},
+ {MVT::v4f64, MVT::v8f64, MVT::v16f64, MVT::v32f64}, Custom);
}
}
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 6b09faba5ddcc..a00f526919b90 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -3801,6 +3801,12 @@ multiclass SelectCanonicalizeAsMax<
// FIXME: Should have VOP3P subtarget predicate
let OtherPredicates = f16_preds;
}
+
+ def : GCNPat<
+ (fcanonicalize (v2f64 (VOP3PMods v2f64:$src, i32:$src_mods))),
+ (V_PK_MAX_NUM_F64 $src_mods, $src, $src_mods, $src)> {
+ let OtherPredicates = !listconcat(f64_preds, [HasPackedFP64Ops]);
+ }
}
// On pre-gfx9 targets, v_max_*/v_min_* did not respect the denormal
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index d134f5020096c..7c515172791e3 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -3849,6 +3849,10 @@ bool isPacked64BitInst(unsigned Opc) {
case AMDGPU::V_PK_MUL_F64_gfx1250:
case AMDGPU::V_PK_FMA_F64:
case AMDGPU::V_PK_FMA_F64_gfx1250:
+ case AMDGPU::V_PK_MAX_NUM_F64:
+ case AMDGPU::V_PK_MAX_NUM_F64_gfx1250:
+ case AMDGPU::V_PK_MIN_NUM_F64:
+ case AMDGPU::V_PK_MIN_NUM_F64_gfx1250:
return true;
default:
return false;
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index d44fab6046ac7..7acd2a08a3886 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -164,6 +164,11 @@ defm V_PK_MIN_U16 : VOP3PInst<"v_pk_min_u16", VOP3P_Profile<VOP_V2I16_V2I16_V2I1
defm V_PK_MAX_I16 : VOP3PInst<"v_pk_max_i16", VOP3P_Profile<VOP_V2I16_V2I16_V2I16>, smax>;
defm V_PK_MAX_U16 : VOP3PInst<"v_pk_max_u16", VOP3P_Profile<VOP_V2I16_V2I16_V2I16>, umax>;
+let SubtargetPredicate = HasPackedFP64Ops, SchedRW = [WriteDouble] in {
+defm V_PK_MAX_NUM_F64 : VOP3PInst<"v_pk_max_num_f64", V_PK_VOP2_F64_Profile, fmaxnum_like>;
+defm V_PK_MIN_NUM_F64 : VOP3PInst<"v_pk_min_num_f64", V_PK_VOP2_F64_Profile, fminnum_like>;
+}
+
let SubtargetPredicate = HasIEEEMinimumMaximumInsts, ReadsModeReg = 0 in {
defm V_PK_MAXIMUM_F16 : VOP3PInst<"v_pk_maximum_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16, VOP3_PACKED>, fmaximum>;
defm V_PK_MINIMUM_F16 : VOP3PInst<"v_pk_minimum_f16", VOP3P_Profile<VOP_V2F16_V2F16_V2F16, VOP3_PACKED>, fminimum>;
@@ -2705,6 +2710,8 @@ let PostEncoderMethod = "postEncodeVOP3<true, true, false>" in {
defm V_PK_FMA_F64 : VOP3P_Real_gfx1250<0x3b>;
defm V_PK_MUL_F64 : VOP3P_Real_gfx1250<0x3c>;
defm V_PK_ADD_F64 : VOP3P_Real_gfx1250<0x4b>;
+defm V_PK_MAX_NUM_F64 : VOP3P_Real_gfx1250<0x4e>;
+defm V_PK_MIN_NUM_F64 : VOP3P_Real_gfx1250<0x4f>;
let AssemblerPredicate = isGFX1250Plus in
def : AMDGPUMnemonicAlias<"v_fma_mix_f32_f16", "v_fma_mix_f32">;
diff --git a/llvm/test/CodeGen/AMDGPU/fcanonicalize.ll b/llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
index 6b7ddd9a49087..fe29690466184 100644
--- a/llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+++ b/llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
@@ -13,6 +13,10 @@
; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-TRUE16,GFX12-GISEL-TRUE16 %s
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-FAKE16,GFX12-SDAG-FAKE16 %s
; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-FAKE16,GFX12-GISEL-FAKE16 %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX1251,GFX12-TRUE16,GFX1251-TRUE16,GFX1251-SDAG-TRUE16 %s
+; RUN: llc -global-isel=1 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX1251,GFX12-TRUE16,GFX1251-TRUE16,GFX1251-GISEL-TRUE16 %s
+; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX1251,GFX12-FAKE16,GFX1251-FAKE16,GFX1251-SDAG-FAKE16 %s
+; RUN: llc -global-isel=1 -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX1251,GFX12-FAKE16,GFX1251-FAKE16,GFX1251-GISEL-FAKE16 %s
declare float @llvm.fabs.f32(float) #0
declare float @llvm.canonicalize.f32(float) #0
@@ -125,6 +129,54 @@ define amdgpu_kernel void @v_test_canonicalize_var_f32(ptr addrspace(1) %out) #1
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s2, s2
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_var_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_var_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, s2, s2
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_var_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_var_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, s2, s2
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load float, ptr addrspace(1) %out
%canonicalized = call float @llvm.canonicalize.f32(float %val)
store float %canonicalized, ptr addrspace(1) %out
@@ -247,6 +299,46 @@ define amdgpu_kernel void @s_test_canonicalize_var_f32(ptr addrspace(1) %out, fl
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s2, s2
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: s_test_canonicalize_var_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: s_test_canonicalize_var_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, s2, s2
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: s_test_canonicalize_var_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, s2, s2
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: s_test_canonicalize_var_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b96 s[0:2], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, s2, s2
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float %val)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -348,6 +440,54 @@ define amdgpu_kernel void @v_test_canonicalize_fabs_var_f32(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, |s2|, |s2|
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fabs_var_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fabs_var_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, |s2|, |s2|
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fabs_var_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fabs_var_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, |s2|, |s2|
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load float, ptr addrspace(1) %out
%val.fabs = call float @llvm.fabs.f32(float %val)
%canonicalized = call float @llvm.canonicalize.f32(float %val.fabs)
@@ -451,6 +591,54 @@ define amdgpu_kernel void @v_test_canonicalize_fneg_fabs_var_f32(ptr addrspace(1
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -|s2|, -|s2|
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fneg_fabs_var_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fneg_fabs_var_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, -|s2|, -|s2|
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fneg_fabs_var_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fneg_fabs_var_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, -|s2|, -|s2|
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load float, ptr addrspace(1) %out
%val.fabs = call float @llvm.fabs.f32(float %val)
%val.fabs.fneg = fneg float %val.fabs
@@ -555,6 +743,54 @@ define amdgpu_kernel void @v_test_canonicalize_fneg_var_f32(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, -s2, -s2
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fneg_var_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fneg_var_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, -s2, -s2
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fneg_var_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, -v1, -v1
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fneg_var_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b32 s2, s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, -s2, -s2
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load float, ptr addrspace(1) %out
%val.fneg = fneg float %val
%canonicalized = call float @llvm.canonicalize.f32(float %val.fneg)
@@ -592,13 +828,37 @@ define amdgpu_kernel void @test_fold_canonicalize_undef_f32(ptr addrspace(1) %ou
; GFX11-NEXT: global_store_b32 v0, v0, s[0:1]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_fold_canonicalize_undef_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX12-NEXT: v_mov_b32_e32 v0, 0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_store_b32 v0, v0, s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_fold_canonicalize_undef_f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_fold_canonicalize_undef_f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_fold_canonicalize_undef_f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_fold_canonicalize_undef_f32:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX1200-NEXT: v_mov_b32_e32 v0, 0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1200-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float undef)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -634,13 +894,37 @@ define amdgpu_kernel void @test_fold_canonicalize_p0_f32(ptr addrspace(1) %out)
; GFX11-NEXT: global_store_b32 v0, v0, s[0:1]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_fold_canonicalize_p0_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX12-NEXT: v_mov_b32_e32 v0, 0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_store_b32 v0, v0, s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_fold_canonicalize_p0_f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_fold_canonicalize_p0_f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_fold_canonicalize_p0_f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_fold_canonicalize_p0_f32:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX1200-NEXT: v_mov_b32_e32 v0, 0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1200-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float 0.0)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -713,6 +997,46 @@ define amdgpu_kernel void @test_fold_canonicalize_n0_f32(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_n0_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_bfrev_b32_e32 v1, 1
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_n0_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_bfrev_b32_e32 v0, 1
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_n0_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_bfrev_b32_e32 v1, 1
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_n0_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_bfrev_b32_e32 v0, 1
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float -0.0)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -781,6 +1105,42 @@ define amdgpu_kernel void @test_fold_canonicalize_p1_f32(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_p1_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1.0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_p1_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_p1_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1.0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_p1_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float 1.0)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -849,6 +1209,42 @@ define amdgpu_kernel void @test_fold_canonicalize_n1_f32(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_n1_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, -1.0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_n1_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, -1.0 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_n1_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, -1.0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_n1_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, -1.0 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float -1.0)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -917,6 +1313,42 @@ define amdgpu_kernel void @test_fold_canonicalize_literal_f32(ptr addrspace(1) %
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_literal_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x41800000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_literal_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, 0x41800000 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_literal_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x41800000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_literal_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, 0x41800000 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float 16.0)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -952,13 +1384,37 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_f32(ptr
; GFX11-NEXT: global_store_b32 v0, v0, s[0:1]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
-; GFX12-NEXT: v_mov_b32_e32 v0, 0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_store_b32 v0, v0, s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b64 s[0:1], s[4:5], 0x0
+; GFX1200-NEXT: v_mov_b32_e32 v0, 0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_store_b32 v0, v0, s[0:1]
+; GFX1200-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1048,6 +1504,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_f32_dyn
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1137,6 +1633,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_f32_dyn
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_out:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_out:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_out:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_out:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1226,6 +1762,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_f32_dyn
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_in:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_in:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_in:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e64 v1, 0x7fffff, 0x7fffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f32_dynamic_in:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0x7fffff, 0x7fffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1294,6 +1870,42 @@ define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal0_f32(ptr ad
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal0_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal0_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, 0x7fffff :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal0_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal0_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, 0x7fffff :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1366,6 +1978,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal1_f32(ptr
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_bfrev_b32_e32 v1, 1
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_bfrev_b32_e32 v0, 1
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v0, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_bfrev_b32_e32 v1, 1
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_bfrev_b32_e32 v0, 1
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2155872255 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1434,6 +2086,42 @@ define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal1_f32(ptr ad
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x807fffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, 0x807fffff :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x807fffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal1_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, 0x807fffff :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2155872255 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1502,6 +2190,42 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_f32(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, 0x7fc00000 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, 0x7fc00000 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float 0x7FF8000000000000)
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1583,6 +2307,42 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg1_f32(ptr addrsp
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, -1 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, -1 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 -1 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1664,6 +2424,42 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg2_f32(ptr addrsp
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_dual_mov_b32 v0, -2 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_dual_mov_b32 v0, -2 :: v_dual_mov_b32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 -2 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1749,6 +2545,44 @@ define amdgpu_kernel void @test_fold_canonicalize_snan0_value_f32(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan0_value_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan0_value_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0x7f800001, 0x7f800001
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan0_value_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan0_value_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0x7f800001, 0x7f800001
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2139095041 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1834,6 +2668,44 @@ define amdgpu_kernel void @test_fold_canonicalize_snan1_value_f32(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan1_value_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan1_value_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0x7fbfffff, 0x7fbfffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan1_value_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan1_value_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0x7fbfffff, 0x7fbfffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2143289343 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -1919,6 +2791,44 @@ define amdgpu_kernel void @test_fold_canonicalize_snan2_value_f32(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan2_value_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan2_value_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0xff800001, 0xff800001
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan2_value_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan2_value_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0xff800001, 0xff800001
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 4286578689 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -2004,6 +2914,44 @@ define amdgpu_kernel void @test_fold_canonicalize_snan3_value_f32(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan3_value_f32:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan3_value_f32:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f32_e64 v0, 0xffbfffff, 0xffbfffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan3_value_f32:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc00000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan3_value_f32:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f32_e64 v0, 0xffbfffff, 0xffbfffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 4290772991 to float))
store float %canonicalized, ptr addrspace(1) %out
ret void
@@ -2105,6 +3053,54 @@ define amdgpu_kernel void @v_test_canonicalize_var_f64(ptr addrspace(1) %out) #1
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_var_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_var_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_var_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_var_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load double, ptr addrspace(1) %out
%canonicalized = call double @llvm.canonicalize.f64(double %val)
store double %canonicalized, ptr addrspace(1) %out
@@ -2169,14 +3165,41 @@ define amdgpu_kernel void @s_test_canonicalize_var_f64(ptr addrspace(1) %out, do
; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: s_test_canonicalize_var_f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_mov_b32_e32 v2, 0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
-; GFX12-NEXT: global_store_b64 v2, v[0:1], s[0:1]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: s_test_canonicalize_var_f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: s_test_canonicalize_var_f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: s_test_canonicalize_var_f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1251-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: s_test_canonicalize_var_f64:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_mov_b32_e32 v2, 0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1200-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1200-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double %val)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2278,6 +3301,54 @@ define amdgpu_kernel void @v_test_canonicalize_fabs_var_f64(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], |s[2:3]|, |s[2:3]|
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fabs_var_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], |v[0:1]|, |v[0:1]|
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fabs_var_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], |s[2:3]|, |s[2:3]|
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fabs_var_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], |v[0:1]|, |v[0:1]|
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fabs_var_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], |s[2:3]|, |s[2:3]|
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load double, ptr addrspace(1) %out
%val.fabs = call double @llvm.fabs.f64(double %val)
%canonicalized = call double @llvm.canonicalize.f64(double %val.fabs)
@@ -2381,6 +3452,54 @@ define amdgpu_kernel void @v_test_canonicalize_fneg_fabs_var_f64(ptr addrspace(1
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -|s[2:3]|, -|s[2:3]|
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fneg_fabs_var_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], -|v[0:1]|, -|v[0:1]|
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fneg_fabs_var_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], -|s[2:3]|, -|s[2:3]|
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fneg_fabs_var_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], -|v[0:1]|, -|v[0:1]|
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fneg_fabs_var_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], -|s[2:3]|, -|s[2:3]|
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load double, ptr addrspace(1) %out
%val.fabs = call double @llvm.fabs.f64(double %val)
%val.fabs.fneg = fneg double %val.fabs
@@ -2485,6 +3604,54 @@ define amdgpu_kernel void @v_test_canonicalize_fneg_var_f64(ptr addrspace(1) %ou
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -s[2:3], -s[2:3]
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_fneg_var_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_fneg_var_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e64 v[0:1], -s[2:3], -s[2:3]
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_fneg_var_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_fneg_var_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[2:3], s[0:1], 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e64 v[0:1], -s[2:3], -s[2:3]
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%val = load double, ptr addrspace(1) %out
%val.fneg = fneg double %val
%canonicalized = call double @llvm.canonicalize.f64(double %val.fneg)
@@ -2577,6 +3744,46 @@ define amdgpu_kernel void @test_fold_canonicalize_p0_f64(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_p0_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_p0_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_p0_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_p0_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double 0.0)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2653,6 +3860,46 @@ define amdgpu_kernel void @test_fold_canonicalize_n0_f64(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_n0_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_n0_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_n0_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_n0_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double -0.0)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2725,6 +3972,46 @@ define amdgpu_kernel void @test_fold_canonicalize_p1_f64(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_p1_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 1.0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_p1_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 1.0
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_p1_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 1.0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_p1_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 1.0
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double 1.0)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2797,6 +4084,46 @@ define amdgpu_kernel void @test_fold_canonicalize_n1_f64(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_n1_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], -1.0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_n1_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], -1.0
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_n1_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], -1.0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_n1_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], -1.0
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double -1.0)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2869,6 +4196,46 @@ define amdgpu_kernel void @test_fold_canonicalize_literal_f64(ptr addrspace(1) %
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_literal_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x4030000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_literal_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x4030000000000000
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_literal_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x4030000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_literal_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x4030000000000000
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double 16.0)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -2959,6 +4326,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_f64(ptr
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 4503599627370495 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3034,6 +4441,46 @@ define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal0_f64(ptr ad
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0xfffffffffffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0xfffffffffffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0xfffffffffffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal0_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0xfffffffffffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 4503599627370495 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3110,6 +4557,46 @@ define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal1_f64(ptr
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_no_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x8000000000000000
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9227875636482146303 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3185,6 +4672,46 @@ define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal1_f64(ptr ad
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x800fffffffffffff
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x800fffffffffffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x800fffffffffffff
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_denormals_fold_canonicalize_denormal1_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x800fffffffffffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9227875636482146303 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3257,6 +4784,46 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_f64(ptr addrspace(1) %out
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double 0x7FF8000000000000)
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3343,6 +4910,46 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg1_f64(ptr addrsp
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], -1
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg1_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], -1
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 -1 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3429,6 +5036,46 @@ define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg2_f64(ptr addrsp
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], -2
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg2_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], -2
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 -2 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3536,6 +5183,50 @@ define amdgpu_kernel void @test_fold_canonicalize_snan0_value_f64(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan0_value_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan0_value_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff0000000000001
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e32 v[0:1], 0x7ff0000000000001, v[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan0_value_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan0_value_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff0000000000001
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e32 v[0:1], 0x7ff0000000000001, v[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9218868437227405313 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3624,6 +5315,46 @@ define amdgpu_kernel void @test_fold_canonicalize_snan1_value_f64(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan1_value_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan1_value_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7fffffffffffffff
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan1_value_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan1_value_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7fffffffffffffff
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9223372036854775807 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3731,6 +5462,50 @@ define amdgpu_kernel void @test_fold_canonicalize_snan2_value_f64(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan2_value_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan2_value_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0xfff0000000000001
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-GISEL-TRUE16-NEXT: v_max_num_f64_e32 v[0:1], 0xfff0000000000001, v[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan2_value_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan2_value_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0xfff0000000000001
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-GISEL-FAKE16-NEXT: v_max_num_f64_e32 v[0:1], 0xfff0000000000001, v[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 18442240474082181121 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3817,6 +5592,46 @@ define amdgpu_kernel void @test_fold_canonicalize_snan3_value_f64(ptr addrspace(
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-SDAG-TRUE16-LABEL: test_fold_canonicalize_snan3_value_f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-TRUE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-TRUE16-LABEL: test_fold_canonicalize_snan3_value_f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b64_e32 v[0:1], -1
+; GFX1251-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-SDAG-FAKE16-LABEL: test_fold_canonicalize_snan3_value_f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-SDAG-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-SDAG-FAKE16-NEXT: v_mov_b64_e32 v[0:1], 0x7ff8000000000000
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-GISEL-FAKE16-LABEL: test_fold_canonicalize_snan3_value_f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-GISEL-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b64_e32 v[0:1], -1
+; GFX1251-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
+; GFX1251-GISEL-FAKE16-NEXT: s_endpgm
%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 18446744073709551615 to double))
store double %canonicalized, ptr addrspace(1) %out
ret void
@@ -3931,18 +5746,55 @@ define amdgpu_kernel void @test_canonicalize_value_f64_flush(ptr addrspace(1) %a
; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_f64_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v2, 3, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[0:1], v2, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_f64_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_f64_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_f64_flush:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v2, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: global_store_b64 v2, v[0:1], s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_f64_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1200-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds double, ptr addrspace(1) %arg, i32 %id
%v = load double, ptr addrspace(1) %gep, align 8
@@ -4061,18 +5913,55 @@ define amdgpu_kernel void @test_canonicalize_value_f32_flush(ptr addrspace(1) %a
; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_f32_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v1, v0, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: global_store_b32 v0, v1, s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_f32_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_f32_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_f32_flush:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b32 v1, v0, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-NEXT: global_store_b32 v0, v1, s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_f32_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1200-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id
%v = load float, ptr addrspace(1) %gep, align 4
@@ -4204,31 +6093,105 @@ define amdgpu_kernel void @test_canonicalize_value_f16_flush(ptr addrspace(1) %a
; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
; GFX11-FAKE16-NEXT: s_endpgm
;
-; GFX12-TRUE16-LABEL: test_canonicalize_value_f16_flush:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
-; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
-; GFX12-TRUE16-NEXT: s_endpgm
-;
-; GFX12-FAKE16-LABEL: test_canonicalize_value_f16_flush:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
-; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
-; GFX12-FAKE16-NEXT: s_endpgm
+; GFX12-SDAG-TRUE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX12-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX12-GISEL-TRUE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX12-GISEL-TRUE16: ; %bb.0:
+; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX12-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX12-SDAG-FAKE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX12-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX12-GISEL-FAKE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX12-GISEL-FAKE16: ; %bb.0:
+; GFX12-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-GISEL-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX12-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-TRUE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: global_load_u16 v0, v1, s[0:1] scale_offset
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3] scale_offset
+; GFX1251-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-FAKE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] scale_offset
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3] scale_offset
+; GFX1251-FAKE16-NEXT: s_endpgm
+; GFX1200-TRUE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX1200-TRUE16: ; %bb.0:
+; GFX1200-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX1200-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1200-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1200-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1200-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX1200-TRUE16-NEXT: s_endpgm
+; GFX1200-FAKE16-LABEL: test_canonicalize_value_f16_flush:
+; GFX1200-FAKE16: ; %bb.0:
+; GFX1200-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX1200-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1200-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX1200-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1200-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1200-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX1200-FAKE16-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id
%v = load half, ptr addrspace(1) %gep, align 2
@@ -4363,18 +6326,55 @@ define amdgpu_kernel void @test_canonicalize_value_v2f16_flush(ptr addrspace(1)
; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_v2f16_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v1, v0, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: global_store_b32 v0, v1, s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_v2f16_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_v2f16_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_v2f16_flush:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b32 v1, v0, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-NEXT: global_store_b32 v0, v1, s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_v2f16_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1200-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %arg, i32 %id
%v = load <2 x half>, ptr addrspace(1) %gep, align 4
@@ -4493,18 +6493,55 @@ define amdgpu_kernel void @test_canonicalize_value_f64_denorm(ptr addrspace(1) %
; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_f64_denorm:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v2, 3, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b64 v[0:1], v2, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_f64_denorm:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_f64_denorm:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_f64_denorm:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v2, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b64 v[0:1], v2, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: global_store_b64 v2, v[0:1], s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_f64_denorm:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v2, 3, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b64 v[0:1], v2, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1200-NEXT: global_store_b64 v2, v[0:1], s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds double, ptr addrspace(1) %arg, i32 %id
%v = load double, ptr addrspace(1) %gep, align 8
@@ -4623,18 +6660,55 @@ define amdgpu_kernel void @test_canonicalize_value_f32_denorm(ptr addrspace(1) %
; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_f32_denorm:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v1, v0, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v1
-; GFX12-NEXT: global_store_b32 v0, v1, s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_f32_denorm:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_f32_denorm:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_f32_denorm:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b32 v1, v0, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1251-NEXT: global_store_b32 v0, v1, s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_f32_denorm:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_max_num_f32_e32 v1, v1, v1
+; GFX1200-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id
%v = load float, ptr addrspace(1) %gep, align 4
@@ -4767,31 +6841,105 @@ define amdgpu_kernel void @test_canonicalize_value_f16_denorm(ptr addrspace(1) %
; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
; GFX11-FAKE16-NEXT: s_endpgm
;
-; GFX12-TRUE16-LABEL: test_canonicalize_value_f16_denorm:
-; GFX12-TRUE16: ; %bb.0:
-; GFX12-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
-; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
-; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
-; GFX12-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
-; GFX12-TRUE16-NEXT: s_endpgm
-;
-; GFX12-FAKE16-LABEL: test_canonicalize_value_f16_denorm:
-; GFX12-FAKE16: ; %bb.0:
-; GFX12-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
-; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
-; GFX12-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
-; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x0
-; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
-; GFX12-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
-; GFX12-FAKE16-NEXT: s_endpgm
+; GFX12-SDAG-TRUE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX12-SDAG-TRUE16: ; %bb.0:
+; GFX12-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-SDAG-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX12-SDAG-TRUE16-NEXT: s_endpgm
+;
+; GFX12-GISEL-TRUE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX12-GISEL-TRUE16: ; %bb.0:
+; GFX12-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX12-GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX12-GISEL-TRUE16-NEXT: s_endpgm
+;
+; GFX12-SDAG-FAKE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX12-SDAG-FAKE16: ; %bb.0:
+; GFX12-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-SDAG-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX12-SDAG-FAKE16-NEXT: s_endpgm
+;
+; GFX12-GISEL-FAKE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX12-GISEL-FAKE16: ; %bb.0:
+; GFX12-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX12-GISEL-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX12-GISEL-FAKE16-NEXT: s_endpgm
+;
+; GFX1251-TRUE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-TRUE16-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: global_load_u16 v0, v1, s[0:1] scale_offset
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3] scale_offset
+; GFX1251-TRUE16-NEXT: s_endpgm
+;
+; GFX1251-FAKE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1] scale_offset
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3] scale_offset
+; GFX1251-FAKE16-NEXT: s_endpgm
+; GFX1200-TRUE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX1200-TRUE16: ; %bb.0:
+; GFX1200-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v0
+; GFX1200-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1200-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[0:1]
+; GFX1200-TRUE16-NEXT: s_wait_loadcnt 0x0
+; GFX1200-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1200-TRUE16-NEXT: global_store_b16 v1, v0, s[2:3]
+; GFX1200-TRUE16-NEXT: s_endpgm
+; GFX1200-FAKE16-LABEL: test_canonicalize_value_f16_denorm:
+; GFX1200-FAKE16: ; %bb.0:
+; GFX1200-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 1, v0
+; GFX1200-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1200-FAKE16-NEXT: global_load_u16 v1, v0, s[0:1]
+; GFX1200-FAKE16-NEXT: s_wait_loadcnt 0x0
+; GFX1200-FAKE16-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1200-FAKE16-NEXT: global_store_b16 v0, v1, s[2:3]
+; GFX1200-FAKE16-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id
%v = load half, ptr addrspace(1) %gep, align 2
@@ -4925,18 +7073,55 @@ define amdgpu_kernel void @test_canonicalize_value_v2f16_denorm(ptr addrspace(1)
; GFX11-NEXT: global_store_b32 v0, v1, s[2:3]
; GFX11-NEXT: s_endpgm
;
-; GFX12-LABEL: test_canonicalize_value_v2f16_denorm:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
-; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: global_load_b32 v1, v0, s[0:1]
-; GFX12-NEXT: s_wait_loadcnt 0x0
-; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v1
-; GFX12-NEXT: global_store_b32 v0, v1, s[2:3]
-; GFX12-NEXT: s_endpgm
+; GFX12-SDAG-LABEL: test_canonicalize_value_v2f16_denorm:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-SDAG-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-SDAG-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-SDAG-NEXT: s_endpgm
+;
+; GFX12-GISEL-LABEL: test_canonicalize_value_v2f16_denorm:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-GISEL-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX12-GISEL-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: test_canonicalize_value_v2f16_denorm:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b128 s[0:3], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b32 v1, v0, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-NEXT: global_store_b32 v0, v1, s[2:3] scale_offset
+; GFX1251-NEXT: s_endpgm
+; GFX1200-LABEL: test_canonicalize_value_v2f16_denorm:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX1200-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1200-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1200-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: global_load_b32 v1, v0, s[0:1]
+; GFX1200-NEXT: s_wait_loadcnt 0x0
+; GFX1200-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1200-NEXT: global_store_b32 v0, v1, s[2:3]
+; GFX1200-NEXT: s_endpgm
%id = tail call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %arg, i32 %id
%v = load <2 x half>, ptr addrspace(1) %gep, align 4
@@ -5110,6 +7295,19 @@ define amdgpu_kernel void @v_test_canonicalize_var_v2f64(ptr addrspace(1) %out)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
; GFX12-GISEL-NEXT: global_store_b128 v4, v[0:3], s[0:1]
; GFX12-GISEL-NEXT: s_endpgm
+;
+; GFX1251-LABEL: v_test_canonicalize_var_v2f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
+; GFX1251-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX1251-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-NEXT: v_mov_b32_e32 v4, 0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: global_load_b128 v[0:3], v0, s[0:1] scale_offset
+; GFX1251-NEXT: s_wait_loadcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX1251-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr <2 x double>, ptr addrspace(1) %out, i32 %tid
%val = load <2 x double>, ptr addrspace(1) %gep
@@ -5140,15 +7338,62 @@ define <2 x float> @v_test_canonicalize_v2f32_flush(<2 x float> %arg) #1 {
; GFX11-NEXT: v_dual_max_f32 v0, v0, v0 :: v_dual_max_f32 v1, v1, v1
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v2f32_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v2f32_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <2 x float> @llvm.canonicalize.v2f32(<2 x float> %arg)
ret <2 x float> %canon
}
@@ -5178,16 +7423,69 @@ define <3 x float> @v_test_canonicalize_v3f32_flush(<3 x float> %arg) #1 {
; GFX11-NEXT: v_max_f32_e32 v2, v2, v2
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v3f32_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v2
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v2
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v2
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f32_e32 v2, v2, v2
+; GFX1251-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f32_e32 v2, v2, v2
+; GFX1251-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v3f32_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1200-NEXT: v_max_num_f32_e32 v2, v2, v2
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <3 x float> @llvm.canonicalize.v3f32(<3 x float> %arg)
ret <3 x float> %canon
}
@@ -5219,16 +7517,69 @@ define <4 x float> @v_test_canonicalize_v4f32_flush(<4 x float> %arg) #1 {
; GFX11-NEXT: v_dual_max_f32 v2, v2, v2 :: v_dual_max_f32 v3, v3, v3
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v4f32_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v4f32_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1200-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <4 x float> @llvm.canonicalize.v4f32(<4 x float> %arg)
ret <4 x float> %canon
}
@@ -5270,18 +7621,83 @@ define <8 x float> @v_test_canonicalize_v8f32_flush(<8 x float> %arg) #1 {
; GFX11-NEXT: v_dual_max_f32 v6, v6, v6 :: v_dual_max_f32 v7, v7, v7
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v8f32_flush:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
-; GFX12-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
-; GFX12-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
-; GFX12-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX12-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-SDAG-TRUE16-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[4:5], 1.0, v[4:5] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_mul_f32 v[6:7], 1.0, v[6:7] op_sel_hi:[0,1]
+; GFX1251-GISEL-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-SDAG-FAKE16-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[0:1], 1.0, v[0:1] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[2:3], 1.0, v[2:3] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[4:5], 1.0, v[4:5] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_mul_f32 v[6:7], 1.0, v[6:7] op_sel_hi:[0,1]
+; GFX1251-GISEL-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v8f32_flush:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1200-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1200-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1200-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <8 x float> @llvm.canonicalize.v8f32(<8 x float> %arg)
ret <8 x float> %canon
}
@@ -5308,16 +7724,44 @@ define <2 x double> @v_test_canonicalize_v2f64(<2 x double> %arg) #1 {
; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v2f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v2f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v2f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_test_canonicalize_v2f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v2f64:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1200-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <2 x double> @llvm.canonicalize.v2f64(<2 x double> %arg)
ret <2 x double> %canon
}
@@ -5347,17 +7791,74 @@ define <3 x double> @v_test_canonicalize_v3f64(<3 x double> %arg) #1 {
; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v3f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v3f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v3f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-TRUE16-LABEL: v_test_canonicalize_v3f64:
+; GFX1251-SDAG-TRUE16: ; %bb.0:
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-TRUE16-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-SDAG-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-TRUE16-LABEL: v_test_canonicalize_v3f64:
+; GFX1251-GISEL-TRUE16: ; %bb.0:
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-TRUE16-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-SDAG-FAKE16-LABEL: v_test_canonicalize_v3f64:
+; GFX1251-SDAG-FAKE16: ; %bb.0:
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-FAKE16-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-SDAG-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-FAKE16-LABEL: v_test_canonicalize_v3f64:
+; GFX1251-GISEL-FAKE16: ; %bb.0:
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-FAKE16-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-FAKE16-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v3f64:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1200-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1200-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <3 x double> @llvm.canonicalize.v3f64(<3 x double> %arg)
ret <3 x double> %canon
}
@@ -5390,18 +7891,51 @@ define <4 x double> @v_test_canonicalize_v4f64(<4 x double> %arg) #1 {
; GFX11-NEXT: v_max_f64 v[6:7], v[6:7], v[6:7]
; GFX11-NEXT: s_setpc_b64 s[30:31]
;
-; GFX12-LABEL: v_test_canonicalize_v4f64:
-; GFX12: ; %bb.0:
-; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT: s_wait_expcnt 0x0
-; GFX12-NEXT: s_wait_samplecnt 0x0
-; GFX12-NEXT: s_wait_bvhcnt 0x0
-; GFX12-NEXT: s_wait_kmcnt 0x0
-; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
-; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
-; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
-; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
-; GFX12-NEXT: s_setpc_b64 s[30:31]
+; GFX12-SDAG-LABEL: v_test_canonicalize_v4f64:
+; GFX12-SDAG: ; %bb.0:
+; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
+; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
+; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX12-GISEL-LABEL: v_test_canonicalize_v4f64:
+; GFX12-GISEL: ; %bb.0:
+; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
+; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
+; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_test_canonicalize_v4f64:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
+; GFX1200-LABEL: v_test_canonicalize_v4f64:
+; GFX1200: ; %bb.0:
+; GFX1200-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1200-NEXT: s_wait_expcnt 0x0
+; GFX1200-NEXT: s_wait_samplecnt 0x0
+; GFX1200-NEXT: s_wait_bvhcnt 0x0
+; GFX1200-NEXT: s_wait_kmcnt 0x0
+; GFX1200-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1200-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1200-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1200-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX1200-NEXT: s_setpc_b64 s[30:31]
%canon = call <4 x double> @llvm.canonicalize.v4f64(<4 x double> %arg)
ret <4 x double> %canon
}
@@ -5419,7 +7953,6 @@ attributes #7 = { nounwind denormal_fpenv(float: ieee|dynamic) }
; GFX11-GISEL-TRUE16: {{.*}}
; GFX11-SDAG-FAKE16: {{.*}}
; GFX11-SDAG-TRUE16: {{.*}}
-; GFX12-GISEL-FAKE16: {{.*}}
-; GFX12-GISEL-TRUE16: {{.*}}
-; GFX12-SDAG-FAKE16: {{.*}}
-; GFX12-SDAG-TRUE16: {{.*}}
+; GFX12: {{.*}}
+; GFX12-FAKE16: {{.*}}
+; GFX12-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/maximumnum.ll b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
index c0f80363e6850..644d3e139b3dd 100644
--- a/llvm/test/CodeGen/AMDGPU/maximumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/maximumnum.ll
@@ -32,6 +32,12 @@
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-SDAG,GFX12-FAKE16-SDAG %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-SDAG,GFX1251-TRUE16-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
+
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-SDAG,GFX1251-FAKE16-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
+
define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX7-SDAG-LABEL: v_maximumnum_f16:
; GFX7-SDAG: ; %bb.0:
@@ -222,6 +228,46 @@ define half @v_maximumnum_f16(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -306,6 +352,20 @@ define half @v_maximumnum_f16_nnan(half %x, half %y) #1 {
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_nnan:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_nnan:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -395,6 +455,24 @@ define half @v_maximumnum_f16_1.0(half %x) #1 {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_1.0:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half 1.0)
ret half %result
}
@@ -519,6 +597,24 @@ define float @v_maximumnum_f32(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -569,6 +665,13 @@ define float @v_maximumnum_f32_nnan(float %x, float %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -699,6 +802,26 @@ define double @v_maximumnum_f64(double %x, double %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -749,6 +872,13 @@ define double @v_maximumnum_f64_nnan(double %x, double %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -809,6 +939,15 @@ define float @v_maximumnum_f32_1.0(float %x) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f32_e32 v0, 1.0, v0
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, 1.0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -873,6 +1012,15 @@ define float @v_maximumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_rhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.maximumnum.f32(float %x, float %canon.y)
ret float %result
@@ -938,6 +1086,15 @@ define float @v_maximumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_lhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.maximumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1003,6 +1160,15 @@ define float @v_maximumnum_f32_both_operands_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_both_operands_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.maximumnum.f32(float %canon.x, float %canon.y)
@@ -1065,6 +1231,15 @@ define double @v_maximumnum_f64_1.0(double %x) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double 1.0)
ret double %result
}
@@ -1275,6 +1450,46 @@ define half @v_maximumnum_f16_s_v(half inreg %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_v:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -1485,6 +1700,46 @@ define half @v_maximumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_v_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -1713,6 +1968,46 @@ define half @v_maximumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_s_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -1859,6 +2154,26 @@ define float @v_maximumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -2005,6 +2320,26 @@ define float @v_maximumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -2160,6 +2495,26 @@ define float @v_maximumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -2267,6 +2622,16 @@ define double @v_maximumnum_f64_s_v(double inreg %x, double %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -2374,6 +2739,16 @@ define double @v_maximumnum_f64_v_s(double %x, double inreg %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -2520,6 +2895,26 @@ define double @v_maximumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -2650,6 +3045,26 @@ define float @v_maximumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.maximumnum.f32(float %x, float %fabs.y)
ret float %result
@@ -2781,6 +3196,26 @@ define float @v_maximumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%fneg.fabs.y = fneg float %fabs.y
%result = call float @llvm.maximumnum.f32(float %x, float %fneg.fabs.y)
@@ -2913,6 +3348,26 @@ define float @v_maximumnum_f32_fabs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fabs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fabs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call float @llvm.fabs.f32(float %x)
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.maximumnum.f32(float %fabs.x, float %fabs.y)
@@ -3045,6 +3500,24 @@ define float @v_maximumnum_f32_fneg(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, -v1, -v1 :: v_dual_max_num_f32 v0, -v0, -v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg float %x
%fneg.y = fneg float %y
%result = call float @llvm.maximumnum.f32(float %fneg.x, float %fneg.y)
@@ -3241,6 +3714,46 @@ define half @v_maximumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.maximumnum.f16(half %x, half %fabs.y)
ret half %result
@@ -3436,6 +3949,46 @@ define half @v_maximumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%fneg.fabs.y = fneg half %fabs.y
%result = call half @llvm.maximumnum.f16(half %x, half %fneg.fabs.y)
@@ -3632,6 +4185,46 @@ define half @v_maximumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fabs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call half @llvm.fabs.f16(half %x)
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.maximumnum.f16(half %fabs.x, half %fabs.y)
@@ -3828,6 +4421,46 @@ define half @v_maximumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_fneg:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg half %x
%fneg.y = fneg half %y
%result = call half @llvm.maximumnum.f16(half %fneg.x, half %fneg.y)
@@ -3960,6 +4593,26 @@ define double @v_maximumnum_f64_fneg(double %x, double %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg double %x
%fneg.y = fneg double %y
%result = call double @llvm.maximumnum.f64(double %fneg.x, double %fneg.y)
@@ -4136,6 +4789,26 @@ define <2 x half> @v_maximumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -4224,6 +4897,13 @@ define <2 x half> @v_maximumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -4436,6 +5116,32 @@ define <3 x half> @v_maximumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -4546,6 +5252,14 @@ define <3 x half> @v_maximumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -4794,6 +5508,32 @@ define <4 x half> @v_maximumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
@@ -4917,6 +5657,14 @@ define <4 x half> @v_maximumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v4f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
@@ -5239,6 +5987,38 @@ define <6 x half> @v_maximumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v6f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v6f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <6 x half> @llvm.maximumnum.v6f16(<6 x half> %x, <6 x half> %y)
ret <6 x half> %result
}
@@ -5635,6 +6415,44 @@ define <8 x half> @v_maximumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v8f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v8f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v6
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %x, <8 x half> %y)
ret <8 x half> %result
}
@@ -6321,6 +7139,66 @@ define <16 x half> @v_maximumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v16f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v16f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v12
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %x, <16 x half> %y)
ret <16 x half> %result
}
@@ -7672,6 +8550,120 @@ define <32 x half> @v_maximumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v32f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v32f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v30
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v16
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <32 x half> @llvm.maximumnum.v32f16(<32 x half> %x, <32 x half> %y)
ret <32 x half> %result
}
@@ -7826,6 +8818,26 @@ define <2 x float> @v_maximumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -7880,6 +8892,13 @@ define <2 x float> @v_maximumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v2 :: v_dual_max_num_f32 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x float> @llvm.maximumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -8070,6 +9089,30 @@ define <3 x float> @v_maximumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.maximumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -8131,6 +9174,14 @@ define <3 x float> @v_maximumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v3 :: v_dual_max_num_f32 v1, v1, v4
+; GFX1251-NEXT: v_max_num_f32_e32 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x float> @llvm.maximumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -8351,6 +9402,32 @@ define <4 x float> @v_maximumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.maximumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -8416,6 +9493,14 @@ define <4 x float> @v_maximumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
; GFX12-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v4f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v4 :: v_dual_max_num_f32 v1, v1, v5
+; GFX1251-NEXT: v_dual_max_num_f32 v2, v2, v6 :: v_dual_max_num_f32 v3, v3, v7
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x float> @llvm.maximumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -8610,6 +9695,27 @@ define <2 x double> @v_maximumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -8667,6 +9773,21 @@ define <2 x double> @v_maximumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -8909,6 +10030,37 @@ define <3 x double> @v_maximumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v3f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v3f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.maximumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -8973,6 +10125,15 @@ define <3 x double> @v_maximumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x double> @llvm.maximumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -9263,6 +10424,35 @@ define <4 x double> @v_maximumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -9334,6 +10524,24 @@ define <4 x double> @v_maximumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
; GFX12-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v4f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v4f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.maximumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -9474,6 +10682,46 @@ define half @v_maximumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_maximumnum_f16_no_ieee:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -9558,6 +10806,20 @@ define half @v_maximumnum_f16_nan_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_maximumnum_f16_nan_no_ieee:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_maximumnum_f16_nan_no_ieee:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan half @llvm.maximumnum.f16(half %x, half %y)
ret half %result
}
@@ -9632,6 +10894,24 @@ define float @v_maximumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f32_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -9682,6 +10962,13 @@ define float @v_maximumnum_f32_nnan_no_ieee(float %x, float %y) #0 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f32_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan float @llvm.maximumnum.f32(float %x, float %y)
ret float %result
}
@@ -9760,6 +11047,26 @@ define double @v_maximumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_f64_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -9810,6 +11117,13 @@ define double @v_maximumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_f64_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan double @llvm.maximumnum.f64(double %x, double %y)
ret double %result
}
@@ -9926,6 +11240,26 @@ define <2 x half> @v_maximumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_maximumnum_v2f16_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -10014,6 +11348,13 @@ define <2 x half> @v_maximumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v2f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -10124,6 +11465,14 @@ define <3 x half> @v_maximumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v3f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.maximumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -10247,6 +11596,14 @@ define <4 x half> @v_maximumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y)
; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_maximumnum_v4f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_max_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_max_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
diff --git a/llvm/test/CodeGen/AMDGPU/minimumnum.ll b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
index 18ea5e2dd0e6c..af48913e04995 100644
--- a/llvm/test/CodeGen/AMDGPU/minimumnum.ll
+++ b/llvm/test/CodeGen/AMDGPU/minimumnum.ll
@@ -32,6 +32,12 @@
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-SDAG,GFX12-FAKE16-SDAG %s
; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16,GFX12-GISEL,GFX12-FAKE16-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-SDAG,GFX1251-TRUE16-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-TRUE16,GFX1251-GISEL,GFX1251-TRUE16-GISEL %s
+
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-SDAG,GFX1251-FAKE16-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX1251,GFX1251-FAKE16,GFX1251-GISEL,GFX1251-FAKE16-GISEL %s
+
define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX7-SDAG-LABEL: v_minimumnum_f16:
; GFX7-SDAG: ; %bb.0:
@@ -222,6 +228,46 @@ define half @v_minimumnum_f16(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -306,6 +352,20 @@ define half @v_minimumnum_f16_nnan(half %x, half %y) #1 {
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_nnan:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_nnan:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -395,6 +455,24 @@ define half @v_minimumnum_f16_1.0(half %x) #1 {
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, 1.0, v0.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_1.0:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, 1.0, v0
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half 1.0)
ret half %result
}
@@ -519,6 +597,24 @@ define float @v_minimumnum_f32(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -569,6 +665,13 @@ define float @v_minimumnum_f32_nnan(float %x, float %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -699,6 +802,26 @@ define double @v_minimumnum_f64(double %x, double %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -749,6 +872,13 @@ define double @v_minimumnum_f64_nnan(double %x, double %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -809,6 +939,15 @@ define float @v_minimumnum_f32_1.0(float %x) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f32_e32 v0, 1.0, v0
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, 1.0, v0
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float 1.0)
ret float %result
}
@@ -873,6 +1012,15 @@ define float @v_minimumnum_f32_rhs_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_rhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %x, float %canon.y)
ret float %result
@@ -938,6 +1086,15 @@ define float @v_minimumnum_f32_lhs_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_lhs_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%result = call float @llvm.minimumnum.f32(float %canon.x, float %y)
ret float %result
@@ -1003,6 +1160,15 @@ define float @v_minimumnum_f32_both_operands_not_snan(float %x, float %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_both_operands_not_snan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%canon.x = call float @llvm.canonicalize.f32(float %x)
%canon.y = call float @llvm.canonicalize.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %canon.x, float %canon.y)
@@ -1065,6 +1231,15 @@ define double @v_minimumnum_f64_1.0(double %x) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_1.0:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], 1.0, v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double 1.0)
ret double %result
}
@@ -1275,6 +1450,46 @@ define half @v_minimumnum_f16_v_s(half %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_v_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -1503,6 +1718,46 @@ define half @v_minimumnum_f16_s_s(half inreg %x, half inreg %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-FAKE16-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, s1, s1
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, s0, s0
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.h, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, s0, s0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, s1, s1
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, s1, s1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, s0, s0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_s_s:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, s0, s0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, s1, s1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -1649,6 +1904,26 @@ define float @v_minimumnum_f32_s_v(float inreg %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_v:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_v:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -1795,6 +2070,26 @@ define float @v_minimumnum_f32_v_s(float %x, float inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_v_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_v_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -1950,6 +2245,26 @@ define float @v_minimumnum_f32_s_s(float inreg %x, float inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, s1, s1
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, s0, s0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, s1, s1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -2057,6 +2372,16 @@ define double @v_minimumnum_f64_s_v(double inreg %x, double %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_s_v:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -2164,6 +2489,16 @@ define double @v_minimumnum_f64_v_s(double %x, double inreg %y) #1 {
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_v_s:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -2310,6 +2645,26 @@ define double @v_minimumnum_f64_s_s(double inreg %x, double inreg %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_s_s:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[0:1], s[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_s_s:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -2440,6 +2795,26 @@ define float @v_minimumnum_f32_fabs_rhs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %x, float %fabs.y)
ret float %result
@@ -2571,6 +2946,26 @@ define float @v_minimumnum_f32_fneg_fabs_rhs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg_fabs_rhs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e32 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, -|v1|, -|v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call float @llvm.fabs.f32(float %y)
%fneg.fabs.y = fneg float %fabs.y
%result = call float @llvm.minimumnum.f32(float %x, float %fneg.fabs.y)
@@ -2703,6 +3098,26 @@ define float @v_minimumnum_f32_fabs(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fabs:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-SDAG-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fabs:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v0, |v0|, |v0|
+; GFX1251-GISEL-NEXT: v_max_num_f32_e64 v1, |v1|, |v1|
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call float @llvm.fabs.f32(float %x)
%fabs.y = call float @llvm.fabs.f32(float %y)
%result = call float @llvm.minimumnum.f32(float %fabs.x, float %fabs.y)
@@ -2835,6 +3250,24 @@ define float @v_minimumnum_f32_fneg(float %x, float %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, -v1, -v1 :: v_dual_max_num_f32 v0, -v0, -v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, -v0, -v0 :: v_dual_max_num_f32 v1, -v1, -v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg float %x
%fneg.y = fneg float %y
%result = call float @llvm.minimumnum.f32(float %fneg.x, float %fneg.y)
@@ -3031,6 +3464,46 @@ define half @v_minimumnum_f16_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.minimumnum.f16(half %x, half %fabs.y)
ret half %result
@@ -3226,6 +3699,46 @@ define half @v_minimumnum_f16_fneg_fabs_rhs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -|v1.l|, -|v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg_fabs_rhs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -|v1|, -|v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.y = call half @llvm.fabs.f16(half %y)
%fneg.fabs.y = fneg half %fabs.y
%result = call half @llvm.minimumnum.f16(half %x, half %fneg.fabs.y)
@@ -3422,6 +3935,46 @@ define half @v_minimumnum_f16_fabs(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, |v0.l|, |v0.l|
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, |v1.l|, |v1.l|
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fabs:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, |v0|, |v0|
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, |v1|, |v1|
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fabs.x = call half @llvm.fabs.f16(half %x)
%fabs.y = call half @llvm.fabs.f16(half %y)
%result = call half @llvm.minimumnum.f16(half %fabs.x, half %fabs.y)
@@ -3618,6 +4171,46 @@ define half @v_minimumnum_f16_fneg(half %x, half %y) #1 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.l, -v0.l, -v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e64 v0.h, -v1.l, -v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_fneg:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v0, -v0, -v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e64 v1, -v1, -v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg half %x
%fneg.y = fneg half %y
%result = call half @llvm.minimumnum.f16(half %fneg.x, half %fneg.y)
@@ -3750,6 +4343,26 @@ define double @v_minimumnum_f64_fneg(double %x, double %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[0:1], -v[0:1], -v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[2:3], -v[2:3], -v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%fneg.x = fneg double %x
%fneg.y = fneg double %y
%result = call double @llvm.minimumnum.f64(double %fneg.x, double %fneg.y)
@@ -3926,6 +4539,26 @@ define <2 x half> @v_minimumnum_v2f16(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -4014,6 +4647,13 @@ define <2 x half> @v_minimumnum_v2f16_nnan(<2 x half> %x, <2 x half> %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -4226,6 +4866,32 @@ define <3 x half> @v_minimumnum_v3f16(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -4336,6 +5002,14 @@ define <3 x half> @v_minimumnum_v3f16_nnan(<3 x half> %x, <3 x half> %y) #1 {
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -4584,6 +5258,32 @@ define <4 x half> @v_minimumnum_v4f16(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
@@ -4707,6 +5407,14 @@ define <4 x half> @v_minimumnum_v4f16_nnan(<4 x half> %x, <4 x half> %y) #1 {
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f16_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
@@ -5029,6 +5737,38 @@ define <6 x half> @v_minimumnum_v6f16(<6 x half> %x, <6 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v6f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v6f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <6 x half> @llvm.minimumnum.v6f16(<6 x half> %x, <6 x half> %y)
ret <6 x half> %result
}
@@ -5425,6 +6165,44 @@ define <8 x half> @v_minimumnum_v8f16(<8 x half> %x, <8 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v8f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v8f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v4
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v6
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %x, <8 x half> %y)
ret <8 x half> %result
}
@@ -6111,6 +6889,66 @@ define <16 x half> @v_minimumnum_v16f16(<16 x half> %x, <16 x half> %y) #1 {
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v16f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v8
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v9
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v10
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v11
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v16f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v8
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v9
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v10
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v11
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v12
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %x, <16 x half> %y)
ret <16 x half> %result
}
@@ -7462,6 +8300,120 @@ define <32 x half> @v_minimumnum_v32f16(<32 x half> %x, <32 x half> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v32f16:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v32f16:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: scratch_load_b32 v31, off, s32
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v16, v16
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v17, v17, v17
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v18, v18, v18
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v19, v19, v19
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v20, v20, v20
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v21, v21, v21
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v6, v6, v6
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v22, v22, v22
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v7, v7, v7
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v23, v23, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v8, v8, v8
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v24, v24, v24
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v9, v9, v9
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v25, v25, v25
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v10, v10, v10
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v26, v26, v26
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v11, v11, v11
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v27, v27, v27
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v12, v12, v12
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v28, v28, v28
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v13, v13, v13
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v29, v29, v29
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v14, v14, v14
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v30, v30, v30
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v15, v15, v15
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v16
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v1, v1, v17
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v2, v2, v18
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v3, v3, v19
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v4, v4, v20
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v5, v5, v21
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v6, v6, v22
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v7, v7, v23
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v8, v8, v24
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v9, v9, v25
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v10, v10, v26
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v11, v11, v27
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v12, v12, v28
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v13, v13, v29
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v14, v14, v30
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v16, v31, v31
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v15, v15, v16
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <32 x half> @llvm.minimumnum.v32f16(<32 x half> %x, <32 x half> %y)
ret <32 x half> %result
}
@@ -7616,6 +8568,26 @@ define <2 x float> @v_minimumnum_v2f32(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -7670,6 +8642,13 @@ define <2 x float> @v_minimumnum_v2f32_nnan(<2 x float> %x, <2 x float> %y) #1 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v2 :: v_dual_min_num_f32 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x float> @llvm.minimumnum.v2f32(<2 x float> %x, <2 x float> %y)
ret <2 x float> %result
}
@@ -7860,6 +8839,30 @@ define <3 x float> @v_minimumnum_v3f32(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x float> @llvm.minimumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -7921,6 +8924,14 @@ define <3 x float> @v_minimumnum_v3f32_nnan(<3 x float> %x, <3 x float> %y) #1 {
; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
+; GFX1251-NEXT: v_min_num_f32_e32 v2, v2, v5
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x float> @llvm.minimumnum.v3f32(<3 x float> %x, <3 x float> %y)
ret <3 x float> %result
}
@@ -8141,6 +9152,32 @@ define <4 x float> @v_minimumnum_v4f32(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
; GFX12-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f32:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-SDAG-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f32:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v5, v5, v5
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v3, v3, v3
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v6, v6, v6 :: v_dual_max_num_f32 v7, v7, v7
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-GISEL-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x float> @llvm.minimumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -8206,6 +9243,14 @@ define <4 x float> @v_minimumnum_v4f32_nnan(<4 x float> %x, <4 x float> %y) #1 {
; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
; GFX12-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f32_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_dual_min_num_f32 v0, v0, v4 :: v_dual_min_num_f32 v1, v1, v5
+; GFX1251-NEXT: v_dual_min_num_f32 v2, v2, v6 :: v_dual_min_num_f32 v3, v3, v7
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x float> @llvm.minimumnum.v4f32(<4 x float> %x, <4 x float> %y)
ret <4 x float> %result
}
@@ -8400,6 +9445,27 @@ define <2 x double> @v_minimumnum_v2f64(<2 x double> %x, <2 x double> %y) #1 {
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -8457,6 +9523,21 @@ define <2 x double> @v_minimumnum_v2f64_nnan(<2 x double> %x, <2 x double> %y) #
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[4:7]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[6:7]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %x, <2 x double> %y)
ret <2 x double> %result
}
@@ -8699,6 +9780,37 @@ define <3 x double> @v_minimumnum_v3f64(<3 x double> %x, <3 x double> %y) #1 {
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v3f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[6:7], v[6:7], v[6:7]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[8:9], v[8:9], v[8:9]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v3f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[6:9], v[6:9], v[6:9]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[10:11], v[10:11], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <3 x double> @llvm.minimumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -8763,6 +9875,15 @@ define <3 x double> @v_minimumnum_v3f64_nnan(<3 x double> %x, <3 x double> %y) #
; GFX12-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f64_nnan:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[6:7]
+; GFX1251-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[8:9]
+; GFX1251-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[10:11]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x double> @llvm.minimumnum.v3f64(<3 x double> %x, <3 x double> %y)
ret <3 x double> %result
}
@@ -9053,6 +10174,35 @@ define <4 x double> @v_minimumnum_v4f64(<4 x double> %x, <4 x double> %y) #1 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f64:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-SDAG-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f64:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -9124,6 +10274,24 @@ define <4 x double> @v_minimumnum_v4f64_nnan(<4 x double> %x, <4 x double> %y) #
; GFX12-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
; GFX12-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v4f64_nnan:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[0:3], v[0:3], v[8:11]
+; GFX1251-SDAG-NEXT: v_pk_min_num_f64 v[4:7], v[4:7], v[12:15]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v4f64_nnan:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[8:9]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[2:3], v[2:3], v[10:11]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[4:5], v[4:5], v[12:13]
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[6:7], v[6:7], v[14:15]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x double> @llvm.minimumnum.v4f64(<4 x double> %x, <4 x double> %y)
ret <4 x double> %result
}
@@ -9264,6 +10432,46 @@ define half @v_minimumnum_f16_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-TRUE16-SDAG: ; %bb.0:
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-SDAG-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-SDAG-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-TRUE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-TRUE16-GISEL: ; %bb.0:
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.l, v0.l, v0.l
+; GFX1251-TRUE16-GISEL-NEXT: v_max_num_f16_e32 v0.h, v1.l, v1.l
+; GFX1251-TRUE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-TRUE16-GISEL-NEXT: v_min_num_f16_e32 v0.l, v0.l, v0.h
+; GFX1251-TRUE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-SDAG-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-FAKE16-SDAG: ; %bb.0:
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-SDAG-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-SDAG-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-GISEL-LABEL: v_minimumnum_f16_no_ieee:
+; GFX1251-FAKE16-GISEL: ; %bb.0:
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v0, v0, v0
+; GFX1251-FAKE16-GISEL-NEXT: v_max_num_f16_e32 v1, v1, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-FAKE16-GISEL-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -9348,6 +10556,20 @@ define half @v_minimumnum_f16_nan_no_ieee(half %x, half %y) #0 {
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
; GFX12-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-TRUE16-LABEL: v_minimumnum_f16_nan_no_ieee:
+; GFX1251-TRUE16: ; %bb.0:
+; GFX1251-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-TRUE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-TRUE16-NEXT: v_min_num_f16_e32 v0.l, v0.l, v1.l
+; GFX1251-TRUE16-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-FAKE16-LABEL: v_minimumnum_f16_nan_no_ieee:
+; GFX1251-FAKE16: ; %bb.0:
+; GFX1251-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-FAKE16-NEXT: s_wait_kmcnt 0x0
+; GFX1251-FAKE16-NEXT: v_min_num_f16_e32 v0, v0, v1
+; GFX1251-FAKE16-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan half @llvm.minimumnum.f16(half %x, half %y)
ret half %result
}
@@ -9422,6 +10644,24 @@ define float @v_minimumnum_f32_no_ieee(float %x, float %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f32_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -9472,6 +10712,13 @@ define float @v_minimumnum_f32_nnan_no_ieee(float %x, float %y) #0 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f32_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f32_e32 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan float @llvm.minimumnum.f32(float %x, float %y)
ret float %result
}
@@ -9550,6 +10797,26 @@ define double @v_minimumnum_f64_no_ieee(double %x, double %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-SDAG-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_f64_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]
+; GFX1251-GISEL-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -9600,6 +10867,13 @@ define double @v_minimumnum_f64_nnan_no_ieee(double %x, double %y) #0 {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_f64_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan double @llvm.minimumnum.f64(double %x, double %y)
ret double %result
}
@@ -9716,6 +10990,26 @@ define <2 x half> @v_minimumnum_v2f16_no_ieee(<2 x half> %x, <2 x half> %y) #0 {
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-SDAG-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-SDAG-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1251-GISEL-LABEL: v_minimumnum_v2f16_no_ieee:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v0, v0, v0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f16 v1, v1, v1
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-GISEL-NEXT: s_set_pc_i64 s[30:31]
%result = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -9804,6 +11098,13 @@ define <2 x half> @v_minimumnum_v2f16_nnan_no_ieee(<2 x half> %x, <2 x half> %y)
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v2f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v1
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %x, <2 x half> %y)
ret <2 x half> %result
}
@@ -9914,6 +11215,14 @@ define <3 x half> @v_minimumnum_v3f16_nnan_no_ieee(<3 x half> %x, <3 x half> %y)
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v3f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <3 x half> @llvm.minimumnum.v3f16(<3 x half> %x, <3 x half> %y)
ret <3 x half> %result
}
@@ -10037,6 +11346,14 @@ define <4 x half> @v_minimumnum_v4f16_nnan_no_ieee(<4 x half> %x, <4 x half> %y)
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v2
; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v3
; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1251-LABEL: v_minimumnum_v4f16_nnan_no_ieee:
+; GFX1251: ; %bb.0:
+; GFX1251-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1251-NEXT: s_wait_kmcnt 0x0
+; GFX1251-NEXT: v_pk_min_num_f16 v0, v0, v2
+; GFX1251-NEXT: v_pk_min_num_f16 v1, v1, v3
+; GFX1251-NEXT: s_set_pc_i64 s[30:31]
%result = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %x, <4 x half> %y)
ret <4 x half> %result
}
diff --git a/llvm/test/CodeGen/AMDGPU/packed-fp64.ll b/llvm/test/CodeGen/AMDGPU/packed-fp64.ll
index fecf30d8d8f63..0c3038f824cfb 100644
--- a/llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+++ b/llvm/test/CodeGen/AMDGPU/packed-fp64.ll
@@ -1820,6 +1820,558 @@ define amdgpu_kernel void @fma_v32_vs(ptr addrspace(1) %a, <32 x double> %x) {
ret void
}
+define amdgpu_kernel void @fma_v2_v_imm(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fma_v2_v_imm:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0x40690000
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v9, 0x40590000 :: v_dual_mov_b32 v6, v4
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v8, v4
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v11, v9
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v12, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[8:11], v[4:7]
+; GFX1251-SDAG-NEXT: global_store_b128 v12, v[0:3], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_v2_v_imm:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[8:9], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[0:1], 0x4059000000000000
+; GFX1251-GISEL-NEXT: s_wait_xcnt 0x0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[4:5], 0x4069000000000000
+; GFX1251-GISEL-NEXT: s_mov_b64 s[2:3], s[0:1]
+; GFX1251-GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[6:7]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[4:5]
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v12, s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[8:11]
+; GFX1251-GISEL-NEXT: global_store_b128 v12, v[0:3], s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %fma = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %load, <2 x double> <double 100.0, double 100.0>, <2 x double> <double 200.0, double 200.0>)
+ store <2 x double> %fma, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fma_v2_v_v_splat(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fma_v2_v_v_splat:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, v0
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v3, v1
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[4:7], v0, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[2:5], v[4:7], v[0:3], v[0:3]
+; GFX1251-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_v2_v_v_splat:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-GISEL-NEXT: v_mov_b32_e32 v1, 0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[2:3], v[0:1]
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[4:7], v0, s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[2:5], v[4:7], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %id.1 = zext i32 %id to i64
+ %fid = bitcast i64 %id.1 to double
+ %tmp1 = insertelement <2 x double> poison, double %fid, i64 0
+ %k = insertelement <2 x double> %tmp1, double %fid, i64 1
+ %fma = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %load, <2 x double> %k, <2 x double> %k)
+ store <2 x double> %fma, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fma_v2_v_lit_splat(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fma_v2_v_lit_splat:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0x3ff00000
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v9, 0x40100000 :: v_dual_mov_b32 v6, v4
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v8, v4
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v10, v4 :: v_dual_mov_b32 v11, v9
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v12, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[8:11], v[4:7]
+; GFX1251-SDAG-NEXT: global_store_b128 v12, v[0:3], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_v2_v_lit_splat:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[8:9], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[0:1], 4.0
+; GFX1251-GISEL-NEXT: s_wait_xcnt 0x0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[4:5], 1.0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[2:3], s[0:1]
+; GFX1251-GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[6:7]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[4:5]
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v12, s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[8:11]
+; GFX1251-GISEL-NEXT: global_store_b128 v12, v[0:3], s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %fma = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %load, <2 x double> <double 4.0, double 4.0>, <2 x double> <double 1.0, double 1.0>)
+ store <2 x double> %fma, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fma_v2_v_unfoldable_lit(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fma_v2_v_unfoldable_lit:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0x3ff00000
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v7, 2.0
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v9, 0x40100000
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v11, 0x40080000 :: v_dual_mov_b32 v10, v4
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v8, v4
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v12, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[8:11], v[4:7]
+; GFX1251-SDAG-NEXT: global_store_b128 v12, v[0:3], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_v2_v_unfoldable_lit:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[8:9], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v12, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[2:3], 0x4008000000000000
+; GFX1251-GISEL-NEXT: s_mov_b64 s[6:7], 2.0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[0:1], 4.0
+; GFX1251-GISEL-NEXT: s_wait_xcnt 0x0
+; GFX1251-GISEL-NEXT: s_mov_b64 s[4:5], 1.0
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[10:11], s[6:7]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[8:9], s[4:5]
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v12, s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[8:11]
+; GFX1251-GISEL-NEXT: global_store_b128 v12, v[0:3], s[8:9] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %fma = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %load, <2 x double> <double 4.0, double 3.0>, <2 x double> <double 1.0, double 2.0>)
+ store <2 x double> %fma, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fma_v2_v_fneg(ptr addrspace(1) %a, double %x) {
+; GFX1251-SDAG-LABEL: fma_v2_v_fneg:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v8, 0x3ff, v0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v8, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_xor_b32 s5, s3, 0x80000000
+; GFX1251-SDAG-NEXT: s_mov_b32 s4, s2
+; GFX1251-SDAG-NEXT: s_mov_b32 s6, s2
+; GFX1251-SDAG-NEXT: s_mov_b32 s7, s5
+; GFX1251-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
+; GFX1251-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[4:7]
+; GFX1251-SDAG-NEXT: global_store_b128 v8, v[0:3], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_v2_v_fneg:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v8, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v8, s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: v_max_num_f64_e64 v[4:5], -s[2:3], -s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[6:7], v[4:5]
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: global_store_b128 v8, v[0:3], s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %fneg = fsub double -0.0, %x
+ %tmp1 = insertelement <2 x double> poison, double %fneg, i64 0
+ %k = insertelement <2 x double> %tmp1, double %fneg, i64 1
+ %fma = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %load, <2 x double> %k, <2 x double> %k)
+ store <2 x double> %fma, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fma_vector_vector_neg_scalar_lo_scalar_hi(ptr addrspace(1) %out, ptr addrspace(3) %lds, ptr addrspace(3) %arg2) {
+; GFX1251-SDAG-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:
+; GFX1251-SDAG: ; %bb.0: ; %bb
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v4, s2 :: v_dual_mov_b32 v10, s3
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[2:3], v4 offset0:2 offset1:3
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[0:1], v4 offset1:1
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[6:7], v4 offset0:6 offset1:7
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[4:5], v4 offset0:4 offset1:5
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[8:9], v10 offset1:1
+; GFX1251-SDAG-NEXT: ds_load_2addr_b32 v[10:11], v10 offset0:4 offset1:5
+; GFX1251-SDAG-NEXT: s_wait_dscnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[8:11] neg_lo:[0,0,1] neg_hi:[0,0,1]
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v4, 0
+; GFX1251-SDAG-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fma_vector_vector_neg_scalar_lo_scalar_hi:
+; GFX1251-GISEL: ; %bb.0: ; %bb
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v10, s3
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[0:1], v6 offset1:1
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[2:3], v6 offset0:2 offset1:3
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[4:5], v6 offset0:4 offset1:5
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[6:7], v6 offset0:6 offset1:7
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[8:9], v10 offset1:1
+; GFX1251-GISEL-NEXT: ds_load_2addr_b32 v[10:11], v10 offset0:4 offset1:5
+; GFX1251-GISEL-NEXT: s_wait_dscnt 0x0
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v9, 0x80000000, v9
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v11, 0x80000000, v11
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_fma_f64 v[0:3], v[0:3], v[4:7], v[8:11]
+; GFX1251-GISEL-NEXT: v_mov_b32_e32 v4, 0
+; GFX1251-GISEL-NEXT: global_store_b128 v4, v[0:3], s[0:1]
+; GFX1251-GISEL-NEXT: s_endpgm
+bb:
+ %lds.gep1 = getelementptr inbounds <2 x double>, ptr addrspace(3) %lds, i32 1
+ %arg2.gep = getelementptr inbounds double, ptr addrspace(3) %arg2, i32 2
+
+ %vec0 = load volatile <2 x double>, ptr addrspace(3) %lds, align 4
+ %vec1 = load volatile <2 x double>, ptr addrspace(3) %lds.gep1, align 4
+
+ %scalar0 = load volatile double, ptr addrspace(3) %arg2, align 4
+ %scalar1 = load volatile double, ptr addrspace(3) %arg2.gep, align 4
+
+ %vec.ins0 = insertelement <2 x double> poison, double %scalar0, i32 0
+ %vec2 = insertelement <2 x double> %vec.ins0, double %scalar1, i32 1
+ %neg.vec2 = fsub <2 x double> <double -0.0, double -0.0>, %vec2
+
+ %result = tail call <2 x double> @llvm.fma.v2f64(<2 x double> %vec0, <2 x double> %vec1, <2 x double> %neg.vec2)
+ store <2 x double> %result, ptr addrspace(1) %out, align 4
+ ret void
+}
+
+define amdgpu_kernel void @fneg_v2f64_vec(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fneg_v2f64_vec:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v4, 0x3ff, v0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v4, s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[0:3], v[0:3], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: global_store_b128 v4, v[0:3], s[0:1] scale_offset
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fneg_v2f64_vec:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v4, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v4, s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v1, 0x80000000, v1
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: global_store_b128 v4, v[0:3], s[0:1] scale_offset
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <2 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <2 x double>, ptr addrspace(1) %gep, align 8
+ %fneg = fsub <2 x double> <double -0.0, double -0.0>, %load
+ store <2 x double> %fneg, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fneg_v2f64_scalar(ptr addrspace(1) %a, <2 x double> %x) {
+; GFX1251-SDAG-LABEL: fneg_v2f64_scalar:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_clause 0x1
+; GFX1251-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
+; GFX1251-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v0, s0
+; GFX1251-SDAG-NEXT: s_xor_b32 s3, s3, 0x80000000
+; GFX1251-SDAG-NEXT: s_xor_b32 s1, s1, 0x80000000
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1251-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1
+; GFX1251-SDAG-NEXT: v_mov_b32_e32 v3, s3
+; GFX1251-SDAG-NEXT: global_store_b128 v4, v[0:3], s[6:7]
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fneg_v2f64_scalar:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_clause 0x1
+; GFX1251-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
+; GFX1251-GISEL-NEXT: s_load_b64 s[6:7], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_mov_b32_e32 v4, 0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: s_xor_b32 s1, s1, 0x80000000
+; GFX1251-GISEL-NEXT: s_xor_b32 s3, s3, 0x80000000
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
+; GFX1251-GISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: global_store_b128 v4, v[0:3], s[6:7]
+; GFX1251-GISEL-NEXT: s_endpgm
+ %fneg = fsub <2 x double> <double -0.0, double -0.0>, %x
+ store <2 x double> %fneg, ptr addrspace(1) %a, align 8
+ ret void
+}
+
+define amdgpu_kernel void @fneg_v32f64_vec(ptr addrspace(1) %a) {
+; GFX1251-SDAG-LABEL: fneg_v32f64_vec:
+; GFX1251-SDAG: ; %bb.0:
+; GFX1251-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-SDAG-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-SDAG-NEXT: v_lshlrev_b32_e32 v56, 8, v0
+; GFX1251-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1251-SDAG-NEXT: s_clause 0xd
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:96
+; GFX1251-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:112
+; GFX1251-SDAG-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:224
+; GFX1251-SDAG-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:240
+; GFX1251-SDAG-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:128
+; GFX1251-SDAG-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:144
+; GFX1251-SDAG-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:160
+; GFX1251-SDAG-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:176
+; GFX1251-SDAG-NEXT: global_load_b128 v[32:35], v56, s[0:1] offset:192
+; GFX1251-SDAG-NEXT: global_load_b128 v[36:39], v56, s[0:1] offset:208
+; GFX1251-SDAG-NEXT: global_load_b128 v[40:43], v56, s[0:1] offset:64
+; GFX1251-SDAG-NEXT: global_load_b128 v[44:47], v56, s[0:1] offset:80
+; GFX1251-SDAG-NEXT: global_load_b128 v[48:51], v56, s[0:1] offset:32
+; GFX1251-SDAG-NEXT: global_load_b128 v[52:55], v56, s[0:1] offset:48
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xd
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[0:3], v[0:3], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xc
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[4:7], v[4:7], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xb
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[8:11], v[8:11], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0xa
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[12:15], v[12:15], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x9
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[16:19], v[16:19], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x8
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[20:23], v[20:23], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_clause 0x3
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:96
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:112
+; GFX1251-SDAG-NEXT: global_load_b128 v[0:3], v56, s[0:1]
+; GFX1251-SDAG-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:16
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x5
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[40:43], v[40:43], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x4
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[44:47], v[44:47], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x3
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[48:51], v[48:51], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x2
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[52:55], v[52:55], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[28:31], v[28:31], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[24:27], v[24:27], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[36:39], v[36:39], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[32:35], v[32:35], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x1
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[0:3], v[0:3], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_wait_loadcnt 0x0
+; GFX1251-SDAG-NEXT: v_pk_add_f64 v[4:7], v[4:7], 0 neg_lo:[1,1] neg_hi:[1,1]
+; GFX1251-SDAG-NEXT: s_clause 0xd
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[40:43], s[0:1] offset:64
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[44:47], s[0:1] offset:80
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[48:51], s[0:1] offset:32
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[52:55], s[0:1] offset:48
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[0:3], s[0:1]
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:16
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:224
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:240
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[32:35], s[0:1] offset:192
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[36:39], s[0:1] offset:208
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:160
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:176
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:128
+; GFX1251-SDAG-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:144
+; GFX1251-SDAG-NEXT: s_endpgm
+;
+; GFX1251-GISEL-LABEL: fneg_v32f64_vec:
+; GFX1251-GISEL: ; %bb.0:
+; GFX1251-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1251-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX1251-GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX1251-GISEL-NEXT: v_lshlrev_b32_e32 v56, 8, v0
+; GFX1251-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1251-GISEL-NEXT: s_clause 0xd
+; GFX1251-GISEL-NEXT: global_load_b128 v[40:43], v56, s[0:1]
+; GFX1251-GISEL-NEXT: global_load_b128 v[36:39], v56, s[0:1] offset:16
+; GFX1251-GISEL-NEXT: global_load_b128 v[0:3], v56, s[0:1] offset:32
+; GFX1251-GISEL-NEXT: global_load_b128 v[4:7], v56, s[0:1] offset:48
+; GFX1251-GISEL-NEXT: global_load_b128 v[8:11], v56, s[0:1] offset:64
+; GFX1251-GISEL-NEXT: global_load_b128 v[12:15], v56, s[0:1] offset:80
+; GFX1251-GISEL-NEXT: global_load_b128 v[16:19], v56, s[0:1] offset:96
+; GFX1251-GISEL-NEXT: global_load_b128 v[20:23], v56, s[0:1] offset:112
+; GFX1251-GISEL-NEXT: global_load_b128 v[24:27], v56, s[0:1] offset:128
+; GFX1251-GISEL-NEXT: global_load_b128 v[28:31], v56, s[0:1] offset:144
+; GFX1251-GISEL-NEXT: global_load_b128 v[32:35], v56, s[0:1] offset:160
+; GFX1251-GISEL-NEXT: global_load_b128 v[44:47], v56, s[0:1] offset:176
+; GFX1251-GISEL-NEXT: global_load_b128 v[48:51], v56, s[0:1] offset:192
+; GFX1251-GISEL-NEXT: global_load_b128 v[52:55], v56, s[0:1] offset:208
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0xd
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v41, 0x80000000, v41
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v43, 0x80000000, v43
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0xc
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v37, 0x80000000, v37
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v39, 0x80000000, v39
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0xb
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v1, 0x80000000, v1
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v3, 0x80000000, v3
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[40:43], v[40:43], v[40:43]
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0xa
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v5, 0x80000000, v5
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[36:39], v[36:39], v[36:39]
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v7, 0x80000000, v7
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x9
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v9, 0x80000000, v9
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v11, 0x80000000, v11
+; GFX1251-GISEL-NEXT: s_clause 0x3
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[40:43], s[0:1]
+; GFX1251-GISEL-NEXT: global_load_b128 v[40:43], v56, s[0:1] offset:224
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[36:39], s[0:1] offset:16
+; GFX1251-GISEL-NEXT: global_load_b128 v[36:39], v56, s[0:1] offset:240
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0xa
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v13, 0x80000000, v13
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v15, 0x80000000, v15
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x9
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v17, 0x80000000, v17
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v19, 0x80000000, v19
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x8
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v21, 0x80000000, v21
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v23, 0x80000000, v23
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[0:3], v[0:3], v[0:3]
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x7
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v25, 0x80000000, v25
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v27, 0x80000000, v27
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x6
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v29, 0x80000000, v29
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v31, 0x80000000, v31
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x5
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v33, 0x80000000, v33
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v35, 0x80000000, v35
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x4
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v45, 0x80000000, v45
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v47, 0x80000000, v47
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x3
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v49, 0x80000000, v49
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v51, 0x80000000, v51
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x2
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v53, 0x80000000, v53
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v55, 0x80000000, v55
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[4:7], v[4:7], v[4:7]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[8:11], v[8:11], v[8:11]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[12:15], v[12:15], v[12:15]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[16:19], v[16:19], v[16:19]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[20:23], v[20:23], v[20:23]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[24:27], v[24:27], v[24:27]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[28:31], v[28:31], v[28:31]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[32:35], v[32:35], v[32:35]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[44:47], v[44:47], v[44:47]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[48:51], v[48:51], v[48:51]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[52:55], v[52:55], v[52:55]
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x1
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v41, 0x80000000, v41
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v43, 0x80000000, v43
+; GFX1251-GISEL-NEXT: s_wait_loadcnt 0x0
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v37, 0x80000000, v37
+; GFX1251-GISEL-NEXT: v_xor_b32_e32 v39, 0x80000000, v39
+; GFX1251-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[40:43], v[40:43], v[40:43]
+; GFX1251-GISEL-NEXT: v_pk_max_num_f64 v[36:39], v[36:39], v[36:39]
+; GFX1251-GISEL-NEXT: s_clause 0xd
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[0:3], s[0:1] offset:32
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[4:7], s[0:1] offset:48
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[8:11], s[0:1] offset:64
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[12:15], s[0:1] offset:80
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[16:19], s[0:1] offset:96
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[20:23], s[0:1] offset:112
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[24:27], s[0:1] offset:128
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[28:31], s[0:1] offset:144
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[32:35], s[0:1] offset:160
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[44:47], s[0:1] offset:176
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[48:51], s[0:1] offset:192
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[52:55], s[0:1] offset:208
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[40:43], s[0:1] offset:224
+; GFX1251-GISEL-NEXT: global_store_b128 v56, v[36:39], s[0:1] offset:240
+; GFX1251-GISEL-NEXT: s_endpgm
+ %id = tail call i32 @llvm.amdgcn.workitem.id.x()
+ %gep = getelementptr inbounds <32 x double>, ptr addrspace(1) %a, i32 %id
+ %load = load <32 x double>, ptr addrspace(1) %gep, align 8
+ %fneg = fsub <32 x double> <double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0, double -0.0>, %load
+ store <32 x double> %fneg, ptr addrspace(1) %gep, align 8
+ ret void
+}
+
define amdgpu_kernel void @fneg_v2f64_pkfma(ptr addrspace(1) %out) {
; GFX1251-SDAG-LABEL: fneg_v2f64_pkfma:
; GFX1251-SDAG: ; %bb.0: ; %entry
diff --git a/llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s b/llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
index 591892a9da918..2ad0ea88d420a 100644
--- a/llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
+++ b/llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
@@ -157,3 +157,99 @@ v_pk_fma_f64 v[4:7], v[8:11], v[12:15], 1.0
v_pk_fma_f64 v[4:7], v[8:11], v[16:19], 101.1
// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
// GFX1251: v_pk_fma_f64 v[4:7], v[8:11], v[16:19], 0x40594666 ; encoding: [0x04,0x40,0x3b,0xcc,0x08,0x21,0xfe,0x1b,0x66,0x46,0x59,0x40]
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x19,0x02,0x1a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0] ; encoding: [0x04,0x41,0x4e,0xcc,0x08,0x19,0x02,0x3a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1] ; encoding: [0x04,0x42,0x4e,0xcc,0x08,0x19,0x02,0x5a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] clamp
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] clamp ; encoding: [0x04,0xc0,0x4e,0xcc,0x08,0x19,0x02,0x1a]
+
+v_pk_max_num_f64 v[4:7], s[8:11], s[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], s[8:11], s[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x18,0x00,0x1a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], s[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], s[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x19,0x00,0x1a]
+
+v_pk_max_num_f64 v[4:7], s[8:11], v[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], s[8:11], v[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x18,0x02,0x1a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], null
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], null ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xf9,0x00,0x1a]
+
+v_pk_max_num_f64 v[4:7], v[8:11], 1.0
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], 1.0 ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xe5,0x01,0x1a]
+
+v_pk_max_num_f64 v[4:7], 1.0, v[8:11]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], 1.0, v[8:11] ; encoding: [0x04,0x40,0x4e,0xcc,0xf2,0x10,0x02,0x1a]
+
+v_pk_max_num_f64 v[4:7], 101.0, v[8:11]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], 0x40594000, v[8:11] ; encoding: [0x04,0x40,0x4e,0xcc,0xff,0x10,0x02,0x1a,0x00,0x40,0x59,0x40]
+
+v_pk_max_num_f64 v[4:7], v[8:11], 101.0
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], 0x40594000 ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xff,0x01,0x1a,0x00,0x40,0x59,0x40]
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x19,0x02,0x1a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0] ; encoding: [0x04,0x41,0x4f,0xcc,0x08,0x19,0x02,0x3a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1] ; encoding: [0x04,0x42,0x4f,0xcc,0x08,0x19,0x02,0x5a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] clamp
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] clamp ; encoding: [0x04,0xc0,0x4f,0xcc,0x08,0x19,0x02,0x1a]
+
+v_pk_min_num_f64 v[4:7], s[8:11], s[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], s[8:11], s[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x18,0x00,0x1a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], s[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], s[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x19,0x00,0x1a]
+
+v_pk_min_num_f64 v[4:7], s[8:11], v[12:15]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], s[8:11], v[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x18,0x02,0x1a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], null
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], null ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xf9,0x00,0x1a]
+
+v_pk_min_num_f64 v[4:7], v[8:11], 1.0
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], 1.0 ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xe5,0x01,0x1a]
+
+v_pk_min_num_f64 v[4:7], 1.0, v[8:11]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], 1.0, v[8:11] ; encoding: [0x04,0x40,0x4f,0xcc,0xf2,0x10,0x02,0x1a]
+
+v_pk_min_num_f64 v[4:7], 101.0, v[8:11]
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], 0x40594000, v[8:11] ; encoding: [0x04,0x40,0x4f,0xcc,0xff,0x10,0x02,0x1a,0x00,0x40,0x59,0x40]
+
+v_pk_min_num_f64 v[4:7], v[8:11], 101.0
+// GFX12-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU
+// GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], 0x40594000 ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xff,0x01,0x1a,0x00,0x40,0x59,0x40]
diff --git a/llvm/test/MC/AMDGPU/gfx1251_err.s b/llvm/test/MC/AMDGPU/gfx1251_err.s
index 8726704e86343..5b5e1448dea9c 100644
--- a/llvm/test/MC/AMDGPU/gfx1251_err.s
+++ b/llvm/test/MC/AMDGPU/gfx1251_err.s
@@ -116,3 +116,81 @@ v_pk_fma_f64 v[4:7], v[8:11], v[12:15], v[16:19] op_sel_hi:[1,0,0]
v_pk_fma_f64 v[4:7], v[16:19], v[5:8], null
// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register class: vgpr tuples must be 64 bit aligned
// GFX1251-ERR: v_pk_fma_f64 v[4:7], v[16:19], v[5:8], null
+
+v_pk_max_num_f64 v[4:7], |v[8:11]|, v[12:15]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], |v[8:11]|, v[12:15]
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] mul:2
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] mul:2
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] row_share:2
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] row_share:2
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], lit64(0x12345678a), v[8:11]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], lit64(0x12345678a), v[8:11]
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[8:11], lit64(0x12345678a)
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[8:11], lit64(0x12345678a)
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] op_sel:[1,0]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] op_sel:[1,0]
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] op_sel_hi:[1,0]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] op_sel_hi:[1,0]
+// GFX1251-ERR: ^
+
+v_pk_max_num_f64 v[4:7], v[5:8], null
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register class: vgpr tuples must be 64 bit aligned
+// GFX1251-ERR: v_pk_max_num_f64 v[4:7], v[5:8], null
+
+v_pk_min_num_f64 v[4:7], |v[8:11]|, v[12:15]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], |v[8:11]|, v[12:15]
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] mul:2
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] mul:2
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] row_share:2
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] row_share:2
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], lit64(0x12345678a), v[8:11]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], lit64(0x12345678a), v[8:11]
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[8:11], lit64(0x12345678a)
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[8:11], lit64(0x12345678a)
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] op_sel:[1,0]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] op_sel:[1,0]
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] op_sel_hi:[1,0]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand.
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] op_sel_hi:[1,0]
+// GFX1251-ERR: ^
+
+v_pk_min_num_f64 v[4:7], v[5:8], null
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid register class: vgpr tuples must be 64 bit aligned
+// GFX1251-ERR: v_pk_min_num_f64 v[4:7], v[5:8], null
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
index a31bd6ee0e83a..3804c0422121c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
@@ -117,3 +117,75 @@
0x04,0x40,0x3b,0xcc,0x08,0x21,0xfe,0x1b,0x66,0x46,0x59,0x40
# GFX1251: v_pk_fma_f64 v[4:7], v[8:11], v[16:19], 0x40594666 ; encoding: [0x04,0x40,0x3b,0xcc,0x08,0x21,0xfe,0x1b,0x66,0x46,0x59,0x40]
+
+0x04,0x40,0x4e,0xcc,0x08,0x19,0x02,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x19,0x02,0x1a]
+
+0x04,0x41,0x4e,0xcc,0x08,0x19,0x02,0x38
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0] ; encoding: [0x04,0x41,0x4e,0xcc,0x08,0x19,0x02,0x3a]
+
+0x04,0x42,0x4e,0xcc,0x08,0x19,0x02,0x58
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1] ; encoding: [0x04,0x42,0x4e,0xcc,0x08,0x19,0x02,0x5a]
+
+0x04,0xc0,0x4e,0xcc,0x08,0x19,0x02,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], v[12:15] clamp ; encoding: [0x04,0xc0,0x4e,0xcc,0x08,0x19,0x02,0x1a]
+
+0x04,0x40,0x4e,0xcc,0x08,0x18,0x00,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], s[8:11], s[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x18,0x00,0x1a]
+
+0x04,0x40,0x4e,0xcc,0x08,0x19,0x00,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], s[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x19,0x00,0x1a]
+
+0x04,0x40,0x4e,0xcc,0x08,0x18,0x02,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], s[8:11], v[12:15] ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0x18,0x02,0x1a]
+
+0x04,0x40,0x4e,0xcc,0x08,0xf9,0x00,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], null ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xf9,0x00,0x1a]
+
+0x04,0x40,0x4e,0xcc,0x08,0xe5,0x01,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], 1.0 ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xe5,0x01,0x1a]
+
+0x04,0x40,0x4e,0xcc,0xf2,0x10,0x02,0x18
+# GFX1251: v_pk_max_num_f64 v[4:7], 1.0, v[8:11] ; encoding: [0x04,0x40,0x4e,0xcc,0xf2,0x10,0x02,0x1a]
+
+0x04,0x40,0x4e,0xcc,0xff,0x10,0x02,0x18,0x00,0x40,0x59,0x40
+# GFX1251: v_pk_max_num_f64 v[4:7], 0x40594000, v[8:11] ; encoding: [0x04,0x40,0x4e,0xcc,0xff,0x10,0x02,0x1a,0x00,0x40,0x59,0x40]
+
+0x04,0x40,0x4e,0xcc,0x08,0xff,0x01,0x18,0x00,0x40,0x59,0x40
+# GFX1251: v_pk_max_num_f64 v[4:7], v[8:11], 0x40594000 ; encoding: [0x04,0x40,0x4e,0xcc,0x08,0xff,0x01,0x1a,0x00,0x40,0x59,0x40]
+
+0x04,0x40,0x4f,0xcc,0x08,0x19,0x02,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x19,0x02,0x1a]
+
+0x04,0x41,0x4f,0xcc,0x08,0x19,0x02,0x38
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[1,0] neg_hi:[1,0] ; encoding: [0x04,0x41,0x4f,0xcc,0x08,0x19,0x02,0x3a]
+
+0x04,0x42,0x4f,0xcc,0x08,0x19,0x02,0x58
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] neg_lo:[0,1] neg_hi:[0,1] ; encoding: [0x04,0x42,0x4f,0xcc,0x08,0x19,0x02,0x5a]
+
+0x04,0xc0,0x4f,0xcc,0x08,0x19,0x02,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], v[12:15] clamp ; encoding: [0x04,0xc0,0x4f,0xcc,0x08,0x19,0x02,0x1a]
+
+0x04,0x40,0x4f,0xcc,0x08,0x18,0x00,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], s[8:11], s[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x18,0x00,0x1a]
+
+0x04,0x40,0x4f,0xcc,0x08,0x19,0x00,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], s[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x19,0x00,0x1a]
+
+0x04,0x40,0x4f,0xcc,0x08,0x18,0x02,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], s[8:11], v[12:15] ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0x18,0x02,0x1a]
+
+0x04,0x40,0x4f,0xcc,0x08,0xf9,0x00,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], null ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xf9,0x00,0x1a]
+
+0x04,0x40,0x4f,0xcc,0x08,0xe5,0x01,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], 1.0 ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xe5,0x01,0x1a]
+
+0x04,0x40,0x4f,0xcc,0xf2,0x10,0x02,0x18
+# GFX1251: v_pk_min_num_f64 v[4:7], 1.0, v[8:11] ; encoding: [0x04,0x40,0x4f,0xcc,0xf2,0x10,0x02,0x1a]
+
+0x04,0x40,0x4f,0xcc,0xff,0x10,0x02,0x18,0x00,0x40,0x59,0x40
+# GFX1251: v_pk_min_num_f64 v[4:7], 0x40594000, v[8:11] ; encoding: [0x04,0x40,0x4f,0xcc,0xff,0x10,0x02,0x1a,0x00,0x40,0x59,0x40]
+
+0x04,0x40,0x4f,0xcc,0x08,0xff,0x01,0x18,0x00,0x40,0x59,0x40
+# GFX1251: v_pk_min_num_f64 v[4:7], v[8:11], 0x40594000 ; encoding: [0x04,0x40,0x4f,0xcc,0x08,0xff,0x01,0x1a,0x00,0x40,0x59,0x40]
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