[llvm] [AMDGPU] Regenerate cluster ID checks (PR #203494)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 12 03:25:23 PDT 2026
https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/203494
None
>From 594815b86df198e7dbe5e77f332676ea424f39b6 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Fri, 12 Jun 2026 11:19:12 +0100
Subject: [PATCH] [AMDGPU] Regenerate cluster ID checks
---
.../CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll | 48 +++++++++----------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
index f60e4131ec887..a0ff118819734 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
@@ -11,8 +11,8 @@ declare i32 @llvm.amdgcn.cluster.id.z() #0
define amdgpu_kernel void @test_cluster_id_x(ptr addrspace(1) %out) {
; CHECK-UNKNOWN-LABEL: test_cluster_id_x:
; CHECK-UNKNOWN: ; %bb.0:
-; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-UNKNOWN-NEXT: v_dual_mov_b32 v0, ttmp9 :: v_dual_mov_b32 v1, 0
; CHECK-UNKNOWN-NEXT: s_wait_kmcnt 0x0
; CHECK-UNKNOWN-NEXT: global_store_b32 v1, v0, s[2:3]
@@ -88,8 +88,8 @@ define amdgpu_kernel void @test_cluster_id_x(ptr addrspace(1) %out) {
; CHECK-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-MESA3D-NEXT: ; %bb.0:
-; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-MESA3D-NEXT: v_dual_mov_b32 v0, ttmp9 :: v_dual_mov_b32 v1, 0
; CHECK-MESA3D-NEXT: s_wait_kmcnt 0x0
; CHECK-MESA3D-NEXT: global_store_b32 v1, v0, s[0:1]
@@ -97,8 +97,8 @@ define amdgpu_kernel void @test_cluster_id_x(ptr addrspace(1) %out) {
;
; CHECK-G-UNKNOWN-LABEL: test_cluster_id_x:
; CHECK-G-UNKNOWN: ; %bb.0:
-; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-G-UNKNOWN-NEXT: v_dual_mov_b32 v0, ttmp9 :: v_dual_mov_b32 v1, 0
; CHECK-G-UNKNOWN-NEXT: s_wait_kmcnt 0x0
; CHECK-G-UNKNOWN-NEXT: global_store_b32 v1, v0, s[2:3]
@@ -174,8 +174,8 @@ define amdgpu_kernel void @test_cluster_id_x(ptr addrspace(1) %out) {
; CHECK-G-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-G-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-G-MESA3D-NEXT: ; %bb.0:
-; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-G-MESA3D-NEXT: v_dual_mov_b32 v0, ttmp9 :: v_dual_mov_b32 v1, 0
; CHECK-G-MESA3D-NEXT: s_wait_kmcnt 0x0
; CHECK-G-MESA3D-NEXT: global_store_b32 v1, v0, s[0:1]
@@ -188,8 +188,8 @@ define amdgpu_kernel void @test_cluster_id_x(ptr addrspace(1) %out) {
define amdgpu_kernel void @test_cluster_id_y(ptr addrspace(1) %out) #1 {
; CHECK-UNKNOWN-LABEL: test_cluster_id_y:
; CHECK-UNKNOWN: ; %bb.0:
-; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-UNKNOWN-NEXT: v_dual_mov_b32 v0, ttmp7 :: v_dual_mov_b32 v1, 0
; CHECK-UNKNOWN-NEXT: s_wait_kmcnt 0x0
; CHECK-UNKNOWN-NEXT: global_store_b32 v1, v0, s[2:3]
@@ -265,8 +265,8 @@ define amdgpu_kernel void @test_cluster_id_y(ptr addrspace(1) %out) #1 {
; CHECK-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-MESA3D-NEXT: ; %bb.0:
-; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-MESA3D-NEXT: v_dual_mov_b32 v0, ttmp7 :: v_dual_mov_b32 v1, 0
; CHECK-MESA3D-NEXT: s_wait_kmcnt 0x0
; CHECK-MESA3D-NEXT: global_store_b32 v1, v0, s[0:1]
@@ -274,8 +274,8 @@ define amdgpu_kernel void @test_cluster_id_y(ptr addrspace(1) %out) #1 {
;
; CHECK-G-UNKNOWN-LABEL: test_cluster_id_y:
; CHECK-G-UNKNOWN: ; %bb.0:
-; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-G-UNKNOWN-NEXT: v_dual_mov_b32 v0, ttmp7 :: v_dual_mov_b32 v1, 0
; CHECK-G-UNKNOWN-NEXT: s_wait_kmcnt 0x0
; CHECK-G-UNKNOWN-NEXT: global_store_b32 v1, v0, s[2:3]
@@ -351,8 +351,8 @@ define amdgpu_kernel void @test_cluster_id_y(ptr addrspace(1) %out) #1 {
; CHECK-G-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-G-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-G-MESA3D-NEXT: ; %bb.0:
-; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-G-MESA3D-NEXT: v_dual_mov_b32 v0, ttmp7 :: v_dual_mov_b32 v1, 0
; CHECK-G-MESA3D-NEXT: s_wait_kmcnt 0x0
; CHECK-G-MESA3D-NEXT: global_store_b32 v1, v0, s[0:1]
@@ -365,8 +365,8 @@ define amdgpu_kernel void @test_cluster_id_y(ptr addrspace(1) %out) #1 {
define amdgpu_kernel void @test_cluster_id_z(ptr addrspace(1) %out) #1 {
; CHECK-UNKNOWN-LABEL: test_cluster_id_z:
; CHECK-UNKNOWN: ; %bb.0:
-; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-UNKNOWN-NEXT: s_wait_xcnt 0x0
; CHECK-UNKNOWN-NEXT: s_lshr_b32 s0, ttmp7, 16
; CHECK-UNKNOWN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -445,8 +445,8 @@ define amdgpu_kernel void @test_cluster_id_z(ptr addrspace(1) %out) #1 {
; CHECK-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-MESA3D-NEXT: ; %bb.0:
-; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-MESA3D-NEXT: s_lshr_b32 s2, ttmp7, 16
; CHECK-MESA3D-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-MESA3D-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
@@ -456,8 +456,8 @@ define amdgpu_kernel void @test_cluster_id_z(ptr addrspace(1) %out) #1 {
;
; CHECK-G-UNKNOWN-LABEL: test_cluster_id_z:
; CHECK-G-UNKNOWN: ; %bb.0:
-; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24
+; CHECK-G-UNKNOWN-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-UNKNOWN-NEXT: s_load_b64 s[2:3], s[0:1], 0x24 nv
; CHECK-G-UNKNOWN-NEXT: s_wait_xcnt 0x0
; CHECK-G-UNKNOWN-NEXT: s_lshr_b32 s0, ttmp7, 16
; CHECK-G-UNKNOWN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
@@ -536,8 +536,8 @@ define amdgpu_kernel void @test_cluster_id_z(ptr addrspace(1) %out) #1 {
; CHECK-G-MESA3D-NEXT: runtime_loader_kernel_symbol = 0
; CHECK-G-MESA3D-NEXT: .end_amd_kernel_code_t
; CHECK-G-MESA3D-NEXT: ; %bb.0:
-; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1
-; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; CHECK-G-MESA3D-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; CHECK-G-MESA3D-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 nv
; CHECK-G-MESA3D-NEXT: s_lshr_b32 s2, ttmp7, 16
; CHECK-G-MESA3D-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-G-MESA3D-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
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