[llvm] [VPlan] Simplify reverse(reverse(x)) -> x (PR #199057)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 12 03:03:10 PDT 2026
================
@@ -3138,11 +3148,22 @@ void VPlanTransforms::optimizeEVLMasks(VPlan &Plan) {
}
}
- // Fold the following splice patterns into vp.reverse for reverse accesses:
+ // Fold the following splice patterns:
+ // splice.right(splice.left(poison, x, evl), poison, evl) -> x
// vector.reverse(splice.left(poison, x, evl)) -> vp.reverse(x, true, evl)
// splice.right(vector.reverse(x), poison, evl) -> vp.reverse(x, true, evl)
for (VPUser *U : collectUsersRecursively(EVL)) {
+ auto *Def = cast<VPRecipeBase>(U);
VPValue *X;
+ if (match(U, m_Intrinsic<Intrinsic::vector_splice_right>(
----------------
lukel97 wrote:
The regression isn't with the cost model but with the codegen. InstCombine currently cancels out the reverses when VPlan doesn't, but if we cancel out the reverses in VPlan but leave behind the splices, InstCombine won't remove them.
E.g. this loop will regress:
```c
void f(int *x, int *y, int n) {
for (int i = n - 1; i >= 0; i--)
x[i] = y[i];
}
```
With splice elimination:
```asm
.LBB0_5: # %vector.body
# =>This Inner Loop Header: Depth=1
vsetvli a7, a5, e8, mf2, ta, ma
not a3, a4
add t1, a3, a2
sh2add t0, t1, a1
sub t2, a6, a7
sh2add a3, t2, t0
vle32.v v8, (a3)
sh2add a3, t1, a0
sh2add a3, t2, a3
sub a5, a5, a7
vse32.v v8, (a3)
add a4, a4, a7
bnez a5, .LBB0_5
```
Without
```asm
vsetvli t0, a4, e8, mf2, ta, ma
not a3, a5
add t2, a3, a2
sh2add t1, t2, a1
sub t3, a6, t0
sh2add a3, t3, t1
vle32.v v8, (a3)
sub t1, a7, t0
vsetvli a3, zero, e32, m2, ta, ma
vslideup.vx v10, v8, t1
vsetvli zero, a4, e32, m2, ta, ma
vslidedown.vx v8, v10, t1
sh2add a3, t2, a0
sh2add a3, t3, a3
sub a4, a4, t0
vse32.v v8, (a3)
add a5, a5, t0
bnez a4, .LBB0_5
```
https://github.com/llvm/llvm-project/pull/199057
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