[llvm] [AMDGPU][X86][DAG] Avoid duplicate BinOp result from narrowing insert-extract sub-vector (PR #201056)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefix=GFX1250 %s
+
+define <4 x i32> @insert_extract_and_inreg_v4i32(ptr addrspace(1) inreg %out_sub, <2 x i32> inreg %a, <2 x i32> inreg %b) {
+; GFX1250-LABEL: insert_extract_and_inreg_v4i32:
+; GFX1250:       ; %bb.0: ; %entry
+; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX1250-NEXT:    s_wait_kmcnt 0x0
+; GFX1250-NEXT:    s_and_b32 s2, s2, s16
+; GFX1250-NEXT:    s_and_b32 s3, s3, s17
+; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-NEXT:    v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
+; GFX1250-NEXT:    v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s3
+; GFX1250-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
+; GFX1250-NEXT:    s_wait_xcnt 0x0
+; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
+; GFX1250-NEXT:    v_mov_b32_e32 v2, s2
+; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
+entry:
+  %v0 = call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> zeroinitializer, <2 x i32> %a, i64 2)
+  %v1 = call <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32> zeroinitializer, <2 x i32> %b, i64 2)
+  %r = and <4 x i32> %v0, %v1
+  %sub = call <2 x i32> @llvm.vector.extract.v2i32.v4i32(<4 x i32> %r, i64 2)
+  store <2 x i32> %sub, ptr addrspace(1) %out_sub, align 8
+  ret <4 x i32> %r
+}
+
+declare <4 x i32> @llvm.vector.insert.v4i32.v2i32(<4 x i32>, <2 x i32>, i64 immarg)
+declare <2 x i32> @llvm.vector.extract.v2i32.v4i32(<4 x i32>, i64 immarg)
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RKSimon wrote:

unnecessary declarations

https://github.com/llvm/llvm-project/pull/201056