[llvm] [AMDGPU][MFI] Implement missing deserialization of dynamicVGPRBlockSize (PR #201939)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 11 21:18:31 PDT 2026
https://github.com/vporpo updated https://github.com/llvm/llvm-project/pull/201939
>From ef15a483c3392f0562ed8b1dbdd8f07bd67981c4 Mon Sep 17 00:00:00 2001
From: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: Fri, 5 Jun 2026 20:59:36 +0000
Subject: [PATCH 1/2] [AMDGPU][MFI] Implement missing deserialization of
dynamicVGPRBlockSize
---
.../Target/AMDGPU/SIMachineFunctionInfo.cpp | 4 +++
.../mir-dynamic-vgpr-block-size-roundtrip.mir | 35 +++++++++++++++++++
2 files changed, 39 insertions(+)
create mode 100644 llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index df3a3903b5bc2..38aa98736b735 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -804,6 +804,10 @@ bool SIMachineFunctionInfo::initializeBaseYamlFields(
ReturnsVoid = YamlMFI.ReturnsVoid;
IsWholeWaveFunction = YamlMFI.IsWholeWaveFunction;
MinNumAGPRs = YamlMFI.MinNumAGPRs;
+ // A non-zero value means that we got this value from the function attribute.
+ // It takes precedence over the MFI value.
+ if (DynamicVGPRBlockSize == 0)
+ DynamicVGPRBlockSize = YamlMFI.DynamicVGPRBlockSize;
UserSGPRInfo.allocKernargPreloadSGPRs(YamlMFI.NumKernargPreloadSGPRs);
diff --git a/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir b/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
new file mode 100644
index 0000000000000..09308e61adcbc
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
@@ -0,0 +1,35 @@
+# RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -run-pass=none -o - %s | FileCheck %s
+
+# Test that dynamicVGPRBlockSize round-trips through MIR serialization.
+
+--- |
+ define amdgpu_ps void @dynvgpr_roundtrip_no_fn_attr() { ret void }
+ define amdgpu_ps void @dynvgpr_roundtrip_with_fn_attr() #0 { ret void }
+ attributes #0 = { "amdgpu-dynamic-vgpr-block-size" = "16" }
+...
+
+# CHECK-LABEL: name: dynvgpr_roundtrip_no_fn_attr
+# CHECK: dynamicVGPRBlockSize: 32
+
+---
+name: dynvgpr_roundtrip_no_fn_attr
+machineFunctionInfo:
+ dynamicVGPRBlockSize: 32
+body: |
+ bb.0:
+ S_ENDPGM 0
+...
+
+# In this test the function attribute is 16 but MFI is set to 32.
+# The attribute takes precedence over MFI, so check for 16.
+
+# CHECK-LABEL: name: dynvgpr_roundtrip_with_fn_attr
+# CHECK: dynamicVGPRBlockSize: 16
+---
+name: dynvgpr_roundtrip_with_fn_attr
+machineFunctionInfo:
+ dynamicVGPRBlockSize: 32
+body: |
+ bb.0:
+ S_ENDPGM 0
+...
>From 35f18856517cd0b345d9b923a1a972378a2f6a86 Mon Sep 17 00:00:00 2001
From: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: Fri, 12 Jun 2026 01:37:22 +0000
Subject: [PATCH 2/2] fixup! [AMDGPU][MFI] Implement missing deserialization of
dynamicVGPRBlockSize
---
.../Target/AMDGPU/SIMachineFunctionInfo.cpp | 8 ++---
.../lib/Target/AMDGPU/SIMachineFunctionInfo.h | 4 +--
.../mir-dynamic-vgpr-block-size-roundtrip.mir | 32 +++++++++++++++++--
.../AMDGPU/machine-function-info-no-ir.mir | 4 +++
4 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 38aa98736b735..4be4ce28e6de5 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -804,10 +804,10 @@ bool SIMachineFunctionInfo::initializeBaseYamlFields(
ReturnsVoid = YamlMFI.ReturnsVoid;
IsWholeWaveFunction = YamlMFI.IsWholeWaveFunction;
MinNumAGPRs = YamlMFI.MinNumAGPRs;
- // A non-zero value means that we got this value from the function attribute.
- // It takes precedence over the MFI value.
- if (DynamicVGPRBlockSize == 0)
- DynamicVGPRBlockSize = YamlMFI.DynamicVGPRBlockSize;
+ // This can also be set by the function attribute, MFI has higher precedence
+ // though.
+ if (YamlMFI.DynamicVGPRBlockSize != std::nullopt)
+ DynamicVGPRBlockSize = *YamlMFI.DynamicVGPRBlockSize;
UserSGPRInfo.allocKernargPreloadSGPRs(YamlMFI.NumKernargPreloadSGPRs);
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 9c3cf1454e28a..1f43505650222 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -303,7 +303,7 @@ struct SIMachineFunctionInfo final : public yaml::MachineFunctionInfo {
bool HasInitWholeWave = false;
bool IsWholeWaveFunction = false;
- unsigned DynamicVGPRBlockSize = 0;
+ std::optional<unsigned> DynamicVGPRBlockSize;
unsigned ScratchReservedForDynamicVGPRs = 0;
unsigned NumKernargPreloadSGPRs = 0;
@@ -362,7 +362,7 @@ template <> struct MappingTraits<SIMachineFunctionInfo> {
YamlIO.mapOptional("longBranchReservedReg", MFI.LongBranchReservedReg,
StringValue());
YamlIO.mapOptional("hasInitWholeWave", MFI.HasInitWholeWave, false);
- YamlIO.mapOptional("dynamicVGPRBlockSize", MFI.DynamicVGPRBlockSize, false);
+ YamlIO.mapOptional("dynamicVGPRBlockSize", MFI.DynamicVGPRBlockSize);
YamlIO.mapOptional("scratchReservedForDynamicVGPRs",
MFI.ScratchReservedForDynamicVGPRs, 0);
YamlIO.mapOptional("numKernargPreloadSGPRs", MFI.NumKernargPreloadSGPRs, 0);
diff --git a/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir b/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
index 09308e61adcbc..497ea122c98db 100644
--- a/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
+++ b/llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
@@ -5,6 +5,8 @@
--- |
define amdgpu_ps void @dynvgpr_roundtrip_no_fn_attr() { ret void }
define amdgpu_ps void @dynvgpr_roundtrip_with_fn_attr() #0 { ret void }
+ define amdgpu_ps void @dynvgpr_roundtrip_with_fn_attr_no_mfi() #0 { ret void }
+ define amdgpu_ps void @dynvgpr_roundtrip_with_fn_attr_mfi_zero() #0 { ret void }
attributes #0 = { "amdgpu-dynamic-vgpr-block-size" = "16" }
...
@@ -21,10 +23,10 @@ body: |
...
# In this test the function attribute is 16 but MFI is set to 32.
-# The attribute takes precedence over MFI, so check for 16.
+# MFI takes precedence over MFI, so check for 32.
# CHECK-LABEL: name: dynvgpr_roundtrip_with_fn_attr
-# CHECK: dynamicVGPRBlockSize: 16
+# CHECK: dynamicVGPRBlockSize: 32
---
name: dynvgpr_roundtrip_with_fn_attr
machineFunctionInfo:
@@ -33,3 +35,29 @@ body: |
bb.0:
S_ENDPGM 0
...
+
+# In this test the function attribute is 16 but MFI is not set.
+# Make sure the MFI dump shows 16.
+
+# CHECK-LABEL: name: dynvgpr_roundtrip_with_fn_attr_no_mfi
+# CHECK: dynamicVGPRBlockSize: 16
+---
+name: dynvgpr_roundtrip_with_fn_attr_no_mfi
+body: |
+ bb.0:
+ S_ENDPGM 0
+...
+
+# In this test the function attribute is 16 but MFI is set to 0.
+# Check that this works and the MFI dump shows 0.
+
+# CHECK-LABEL: name: dynvgpr_roundtrip_with_fn_attr_mfi_zero
+# CHECK: dynamicVGPRBlockSize: 0
+---
+name: dynvgpr_roundtrip_with_fn_attr_mfi_zero
+machineFunctionInfo:
+ dynamicVGPRBlockSize: 0
+body: |
+ bb.0:
+ S_ENDPGM 0
+...
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
index 85c40a964d38e..60a9dd449da71 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
@@ -88,6 +88,7 @@
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
# SIMPLE-NEXT: occupancy: 8
+# SIMPLE-NEXT: dynamicVGPRBlockSize: 0
# SIMPLE-NEXT: body:
name: kernel0
machineFunctionInfo:
@@ -187,6 +188,7 @@ body: |
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
# SIMPLE-NEXT: occupancy: 10
+# SIMPLE-NEXT: dynamicVGPRBlockSize: 0
# SIMPLE-NEXT: body:
name: no_mfi
@@ -269,6 +271,7 @@ body: |
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
# SIMPLE-NEXT: occupancy: 10
+# SIMPLE-NEXT: dynamicVGPRBlockSize: 0
# SIMPLE-NEXT: body:
name: empty_mfi
@@ -353,6 +356,7 @@ body: |
# SIMPLE-NEXT: workItemIDY: { reg: '$vgpr31', mask: 1047552 }
# SIMPLE-NEXT: workItemIDZ: { reg: '$vgpr31', mask: 1072693248 }
# SIMPLE-NEXT: occupancy: 10
+# SIMPLE-NEXT: dynamicVGPRBlockSize: 0
# SIMPLE-NEXT: body:
name: empty_mfi_entry_func
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