[llvm] 5dcdab8 - [AMDGPU] MC support for v_wmma_f64_16x16x4_f64 (#203141)
via llvm-commits
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Thu Jun 11 10:56:59 PDT 2026
Author: Stanislav Mekhanoshin
Date: 2026-06-11T10:56:55-07:00
New Revision: 5dcdab84c451836b4019a5fbfcd50282224f7d3a
URL: https://github.com/llvm/llvm-project/commit/5dcdab84c451836b4019a5fbfcd50282224f7d3a
DIFF: https://github.com/llvm/llvm-project/commit/5dcdab84c451836b4019a5fbfcd50282224f7d3a.diff
LOG: [AMDGPU] MC support for v_wmma_f64_16x16x4_f64 (#203141)
Added:
llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
Modified:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index db375bc8803a1..5961ef8967b67 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -978,6 +978,10 @@ defm FlatAtomicFaddF32Inst : AMDGPUSubtargetFeature<"flat-atomic-fadd-f32-inst",
[FeatureFlatAddressSpace]
>;
+defm GFX1251GEMMInsts : AMDGPUSubtargetFeature<"gfx1251-gemm-insts",
+ "Has additional gfx1251 DGEMM instructions"
+>;
+
defm FlatBufferGlobalAtomicFaddF64Inst : AMDGPUSubtargetFeature<"flat-buffer-global-fadd-f64-inst",
"Has flat, buffer, and global instructions for f64 atomic fadd"
>;
@@ -2214,6 +2218,7 @@ def FeatureISAVersion12_51 : FeatureSet<
[FeatureAddressableLocalMemorySize327680,
FeatureVOP3PX2IncrementsVaVdstTwice,
FeatureDPALU_DPP,
+ FeatureGFX1251GEMMInsts,
FeatureCubeInsts,
FeatureLerpInst,
FeatureSadInsts,
diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
index 5371d7fce8812..add70e1d62222 100644
--- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td
@@ -1904,6 +1904,8 @@ def F32_FP8BF8_SWMMAC_w64 : VOP3PWMMA_Profile<[v4f32, i32, v2i32, v4f32], /*_I
// *** IU4X32_SWMMAC_w64 lanes 0-31 will have 8xi4 remaining lanes are ignored
// for matrix A, index is i16; Matrix B uses all lanes
+def F64_F64X4_WMMA_w32 : VOP3PWMMA_Profile<[v8f64, v2f64, v2f64, v8f64], /*_IsSWMMAC=*/0, /*_IndexType=*/0, /*_IsIU=*/0, /*_IsFP8BF8=*/0,
+ /*_Has_ImodOp=*/1, /*HasMatrixFMT*/0, /*_HasMatrixScale*/0,/*_Scale16*/0, /*_HasMatrixReuse*/1>;
def F32_F32_WMMA_w32 : VOP3PWMMA_Profile<[v8f32, v2f32, v2f32, v8f32], /*_IsSWMMAC=*/0, /*_IndexType=*/0, /*_IsIU=*/0, /*_IsFP8BF8=*/0,
/*_Has_ImodOp=*/1, /*_HasMatrixFMT=*/0, /*_HasMatrixScale=*/0, /*_Scale16=*/0, /*_HasMatrixReuse=*/1, /*_IsF4*/0,
/*_NoABMods*/1>;
@@ -2069,6 +2071,10 @@ let WaveSizePredicate = isWave32 in {
defm V_WMMA_LD_SCALE16_PAIRED_B64 : VOP3PInst<"v_wmma_ld_scale16_paired_b64", VOP_WMMA_LD_SCALE<i64, VCSrc_b64_Lo256>>;
} // End isConvergent = 1
} // End SubtargetPredicate = isGFX125xOnly
+
+ let SubtargetPredicate = HasGFX1251GEMMInsts in {
+ defm V_WMMA_F64_16X16X4_F64_w32 : WMMAInstGFX12<"v_wmma_f64_16x16x4_f64", F64_F64X4_WMMA_w32, "_w32">;
+ } // End SubtargetPredicate = HasGFX1251GEMMInsts
} // End WaveSizePredicate = isWave32
let WaveSizePredicate = isWave32 in {
@@ -2515,6 +2521,7 @@ defm V_SWMMAC_F32_16X16X32_BF8_FP8_w64 : VOP3P_Real_WMMA_gfx1170_gfx12w64 <0x059
defm V_SWMMAC_F32_16X16X32_BF8_BF8_w64 : VOP3P_Real_WMMA_gfx1170_gfx12w64 <0x05a, F32_FP8BF8_SWMMAC_w64>;
} // End OtherPredicates = [HasSWMMACGfx1200Insts]
+defm V_WMMA_F64_16X16X4_F64_w32 : VOP3P_Real_WMMA_gfx1250 <0x05b, F64_F64X4_WMMA_w32>;
defm V_WMMA_F32_16X16X4_F32_w32 : VOP3P_Real_WMMA_gfx1250 <0x05d, F32_F32_WMMA_w32>;
defm V_WMMA_F32_16X16X32_BF16_w32 : VOP3P_Real_WMMA_gfx1250 <0x062, F32_BF16X32_WMMA_w32>;
defm V_WMMA_F32_16X16X32_F16_w32 : VOP3P_Real_WMMA_gfx1250 <0x060, F32_F16X32_WMMA_w32>;
diff --git a/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s b/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
new file mode 100644
index 0000000000000..5e226fbcf350a
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
@@ -0,0 +1,49 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 6
+// RUN: llvm-mc -triple=amdgcn -mcpu=gfx1251 -show-encoding %s | FileCheck --check-prefix=GFX1251 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1251 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck --check-prefix=WAVESIZE-ERR --implicit-check-not=error: --strict-whitespace %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX1250-ERR --implicit-check-not=error: --strict-whitespace %s
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0 ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0xca,0x1b]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0 neg_lo:[0,0,1]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0 neg_lo:[0,0,1] ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0xca,0x9b]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[1,0,0]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[1,0,0] ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0x22,0x3c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[0,1,0]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[0,1,0] ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0x22,0x5c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[0,0,1]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_lo:[0,0,1] ; encoding: [0x08,0x00,0x5b,0xcc,0x00,0x09,0x22,0x9c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_hi:[0,0,1]
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] neg_hi:[0,0,1] ; encoding: [0x08,0x04,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_a_reuse
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_a_reuse ; encoding: [0x08,0x20,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse
+// GFX1250-ERR: :[[@LINE-1]]:1: error: instruction not supported on this GPU (gfx1250): v_wmma_f64_16x16x4_f64
+// GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+// WAVESIZE-ERR: :[[@LINE-3]]:1: error: instruction requires wavesize=32
diff --git a/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s b/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
new file mode 100644
index 0000000000000..70789b6c13b6b
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
@@ -0,0 +1,7 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1251 %s 2>&1 | FileCheck --check-prefix=GFX1251-ERR --implicit-check-not=error: %s
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], s[8:23]
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 3.0
+// GFX1251-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
new file mode 100644
index 0000000000000..3db2d267dbba8
--- /dev/null
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
@@ -0,0 +1,29 @@
+# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 6
+# RUN: llvm-mc -disassemble -triple=amdgcn -mcpu=gfx1251 -show-encoding %s | FileCheck --check-prefix=GFX1251 %s
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0xca,0x1b
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0 matrix_b_reuse ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0xca,0x1b]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0xca,0x9b
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], 1.0 matrix_b_reuse neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0xca,0x9b]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x1c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+
+0x08,0x44,0x5b,0xcc,0x00,0x09,0x22,0x1c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse neg_hi:[0,0,1] ; encoding: [0x08,0x44,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x9c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x9c]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x5c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse neg_lo:[0,1,0] ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x5c]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x3c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse neg_lo:[1,0,0] ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x3c]
+
+0x08,0x20,0x5b,0xcc,0x00,0x09,0x22,0x1c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_a_reuse ; encoding: [0x08,0x20,0x5b,0xcc,0x00,0x09,0x22,0x1c]
+
+0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x1c
+# GFX1251: v_wmma_f64_16x16x4_f64 v[8:23], v[0:3], v[4:7], v[8:23] matrix_b_reuse ; encoding: [0x08,0x40,0x5b,0xcc,0x00,0x09,0x22,0x1c]
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