[llvm] [AMDGPU] Fix SIFoldOperands miscompiling values that leave a divergent loop (PR #203256)

[Jay Foad via llvm-commits]

================
@@ -970,6 +982,22 @@ bool SIFoldOperandsImpl::isUseSafeToFold(const MachineInstr &MI,
   return !TII->isSDWA(MI);
 }
 
+// An SGPR->VGPR copy inside a divergent loop latches each lane value as it
+// exits. Folding its scalar source into a use after the loop would make every
+// lane read the same reconverged value, so do not fold across the loop exit.
+bool SIFoldOperandsImpl::isRegFoldSafeAcrossLoopExit(
+    const FoldableDef &OpToFold, const MachineInstr &UseMI) const {
+  if (!OpToFold.isReg())
+    return true;
+  const MachineInstr *DefMI = OpToFold.DefMI;
+  if (!DefMI || !DefMI->isCopy() ||
+      !TRI->isVGPR(*MRI, DefMI->getOperand(0).getReg()) ||
----------------
jayfoad wrote:

We also have AGPRs on some subtargets which behave like VGPRs. So probably safer to check:
```suggestion
      TRI->isSGPR(*MRI, DefMI->getOperand(0).getReg()) ||
```

https://github.com/llvm/llvm-project/pull/203256