[llvm] [AArch64][SVE] add missing instcombine x+1 -> x (PR #201851)

[Tomas Matheson via llvm-commits]

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@@ -2511,6 +2511,33 @@ instCombineSVEVectorBinOp(InstCombiner &IC, IntrinsicInst &II) {
   return IC.replaceInstUsesWith(II, BinOp);
 }
 
+static std::optional<Instruction *> instCombineSVEVectorMla(InstCombiner &IC,
+                                                            IntrinsicInst &II) {
+  bool InactiveLanesAreUndefined =
+      II.getIntrinsicID() == Intrinsic::aarch64_sve_mla_u;
+  Value *Pred = II.getOperand(0);
+  if (!InactiveLanesAreUndefined && !isAllActivePredicate(Pred))
+    return std::nullopt;
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tommat01 wrote:

Updated it to handle aarch64_sve_mla_u only

https://github.com/llvm/llvm-project/pull/201851