[llvm] [AArch64][SelectionDAG] Fold late FCMP+CSEL patterns to FMAXNM/FMINNM during AArch64 DAG-to-DAG preprocessing. (PR #197429)

[David Green via llvm-commits]

davemgreen wrote:

Hi - I'm not sure if alive can prove this completely, but it does seem that those backward operands should not be producing a fminnm. I will put together a patch to fix it.

https://github.com/llvm/llvm-project/pull/197429