[llvm] [AArch64][SVE] Expose flags result of predicate-as-counter whiles (NFC) (PR #202976)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 10 07:02:47 PDT 2026
MacDue wrote:
Mostly, creating this PR for opinions on this lowering as it's a different approach from the SVE1 whiles, but allows for similar optimizations (but at an earlier stage in the pipeline). The goal is to enable DAG combines like:
```c++
// Fold extract(pext(whilelo_pred_counter, 0), 0) to
// cset(whilelo_pred_counter, first_active).
if (sd_match(N,
m_ExtractElt(m_IntrinsicWOChain<Intrinsic::aarch64_sve_pext>(
m_SpecificOpc(AArch64ISD::WHILELO_PRED_COUNTER),
m_Zero()),
m_Zero()))) {
SDValue WhileLO = N0->getOperand(1);
SDValue Flags = SDValue(WhileLO.getNode(), 1);
return getSETCC(AArch64CC::CondCode::FIRST_ACTIVE, Flags, SDLoc(N), DAG);
}
```
https://github.com/llvm/llvm-project/pull/202976
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