[llvm] [AMDGPU][GISEL] Adding new reg bank select rules for G_DYN_STACKALLOC (PR #200369)

[Abhinav Garg via llvm-commits]

================
@@ -1304,6 +1305,69 @@ bool RegBankLegalizeHelper::lower(MachineInstr &MI,
     }
     return true;
   }
+  case DynStackAlloc: {
+    const auto &TFI = *ST.getFrameLowering();
+    // Guard in case the stack growth direction ever changes with scratch
+    // instructions.
+    assert(TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
+           "Stack grows upwards for AMDGPU");
+
+    Register Dst = MI.getOperand(0).getReg();
+    Register AllocSize = MI.getOperand(1).getReg();
+    Align Alignment = assumeAligned(MI.getOperand(2).getImm());
+
+    // After lowering Dst is used by another instruction, need to erase old MI
+    // to avoid hitting multiple Dst assert since we use CSE builder
----------------
abhigargrepo wrote:

I am keeping a brief comment as it would be useful to understand the code.

https://github.com/llvm/llvm-project/pull/200369