[llvm] e00f23b - [AMDGPU] Reject invalid flags immarg for amdgcn.cs.chain (#202708)

[via llvm-commits]

Author: Arseniy Obolenskiy
Date: 2026-06-10T14:17:57+02:00
New Revision: e00f23b3db8b5f8387c78d58144c50915fe2bbf2

URL: https://github.com/llvm/llvm-project/commit/e00f23b3db8b5f8387c78d58144c50915fe2bbf2
DIFF: https://github.com/llvm/llvm-project/commit/e00f23b3db8b5f8387c78d58144c50915fe2bbf2.diff

LOG: [AMDGPU] Reject invalid flags immarg for amdgcn.cs.chain (#202708)

The flags operand must be 0 or 1

Added: 
    

Modified: 
    llvm/lib/IR/Verifier.cpp
    llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index f0363b6553440..2525e827872ab 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -7152,6 +7152,10 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) {
     Check(!Call.paramHasAttr(3, Attribute::InReg),
           "VGPR arguments must not have the `inreg` attribute", &Call);
 
+    auto *FlagsArg = cast<ConstantInt>(Call.getArgOperand(4));
+    Check(FlagsArg->getValue().ult(2),
+          "flags must be 0 or 1 for llvm.amdgcn.cs.chain", &Call);
+
     auto *Next = Call.getNextNode();
     bool IsAMDUnreachable = Next && isa<IntrinsicInst>(Next) &&
                             cast<IntrinsicInst>(Next)->getIntrinsicID() ==

diff  --git a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll b/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
index 7e22ab21779e4..e012db033f50c 100644
--- a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
+++ b/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
@@ -11,6 +11,13 @@ define amdgpu_cs_chain void @bad_flags(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr
   unreachable
 }
 
+define amdgpu_cs_chain void @bad_flags_value(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } %vgpr) {
+  ; CHECK: flags must be 0 or 1 for llvm.amdgcn.cs.chain
+  ; CHECK-NEXT: @llvm.amdgcn.cs.chain
+  call void(ptr, i32, <4 x i32>, { ptr, <3 x i32> }, i32, ...) @llvm.amdgcn.cs.chain(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } %vgpr, i32 2)
+  unreachable
+}
+
 define amdgpu_cs_chain void @bad_vgpr_args(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } inreg %vgpr) {
   ; CHECK: VGPR arguments must not have the `inreg` attribute
   ; CHECK-NEXT: @llvm.amdgcn.cs.chain