[llvm] [RISCV][CHERIoT] Define ABI_CHERIOT. (PR #192929)

[Jessica Clarke via llvm-commits]

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@@ -72,11 +73,15 @@ ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
     errs() << "64-bit ABIs are not supported for 32-bit targets (ignoring "
               "target-abi)\n";
     TargetABI = ABI_Unknown;
-  } else if (!IsRV64 && IsRVE && TargetABI != ABI_ILP32E &&
+  } else if (!IsRV64 && IsRVE && !IsXCheriot && TargetABI != ABI_ILP32E &&
              TargetABI != ABI_Unknown) {
     // TODO: move this checking to RISCVTargetLowering and RISCVAsmParser
-    errs()
-        << "Only the ilp32e ABI is supported for RV32E (ignoring target-abi)\n";
+    errs() << "Only the ilp32e ABIs are supported for RV32E "
+              "(ignoring target-abi)\n";
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jrtc27 wrote:

This should go back to singular and match the original formatting (unless git clang-format decides this bit should be reformatted, which would seem ok). Then MC/RISCV/target-abi-invalid.s should pass (see the CI results).

https://github.com/llvm/llvm-project/pull/192929