[lld] [llvm] Add initial support for Xtensa to LLD (PR #202926)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- lld/ELF/Arch/Xtensa.cpp lld/ELF/InputFiles.cpp lld/ELF/Target.cpp lld/ELF/Target.h lld/ELF/Writer.cpp --diff_from_common_commit
``````````

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/lld/ELF/Arch/Xtensa.cpp b/lld/ELF/Arch/Xtensa.cpp
index b763ae7bb..bd0c50658 100644
--- a/lld/ELF/Arch/Xtensa.cpp
+++ b/lld/ELF/Arch/Xtensa.cpp
@@ -89,7 +89,7 @@ RelExpr Xtensa::getRelExpr(RelType type, const Symbol &s,
     return R_NONE;
   default:
     Err(ctx) << getErrorLoc(ctx, loc) << "unknown relocation (" << type.v
-          << ") against symbol " << &s;
+             << ") against symbol " << &s;
     return R_NONE;
   }
 }
@@ -161,8 +161,8 @@ void Xtensa::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
     if (opcode == 0b0001) { // RI16 format: l32r
       int64_t val = dest - ((p + 3) & (uint64_t)0xfffffffc);
       if ((val < -262144 || val > -4))
-        reportRangeError(ctx, loc, rel, Twine(static_cast<int64_t>(val)), -262141,
-                         -4);
+        reportRangeError(ctx, loc, rel, Twine(static_cast<int64_t>(val)),
+                         -262141, -4);
       checkAlignment(ctx, loc, static_cast<uint64_t>(val), 4, rel);
       write16le(loc + 1, val >> 2);
     } else if (opcode == 0b0101) { // call0, call4, call8, call12 (CALL format)
@@ -187,19 +187,21 @@ void Xtensa::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
       uint64_t v = val - 4;
       checkUInt(ctx, loc, v, 8, rel);
       loc[2] = v & 0xff;
-    } else if ((loc[0] & 0b1000'1111) == 0b1000'1100) { // RI16 format: beqz.n, bnez.n
+    } else if ((loc[0] & 0b1000'1111) ==
+               0b1000'1100) { // RI16 format: beqz.n, bnez.n
       uint64_t v = val - 4;
       checkUInt(ctx, loc, v, 6, rel);
       loc[0] = (loc[0] & 0xcf) | (v & 0x30);
       loc[1] = (loc[1] & 0x0f) | ((v & 0x0f) << 4);
-    } else if ((loc[0] & 0b0011'1111) == 0b0001'0110) { // BRI12 format: beqz, bgez, bltz, bnez
+    } else if ((loc[0] & 0b0011'1111) ==
+               0b0001'0110) { // BRI12 format: beqz, bgez, bltz, bnez
       uint64_t v = val - 4;
       checkInt(ctx, loc, static_cast<int64_t>(v), 12, rel);
       loc[1] = ((loc[1] & 0x0f)) | ((v & 0x0f) << 4);
       loc[2] = (v >> 4) & 0xff;
     } else {
-      Err(ctx) << getErrorLoc(ctx, loc) <<
-            "unknown opcode for relocation: " << loc[0];
+      Err(ctx) << getErrorLoc(ctx, loc)
+               << "unknown opcode for relocation: " << loc[0];
     }
     break;
   }
@@ -209,4 +211,3 @@ void Xtensa::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
 }
 
 void elf::setXtensaTargetInfo(Ctx &ctx) { ctx.target.reset(new Xtensa(ctx)); }
-
diff --git a/lld/ELF/Writer.cpp b/lld/ELF/Writer.cpp
index 75c8977a6..8d1f48da0 100644
--- a/lld/ELF/Writer.cpp
+++ b/lld/ELF/Writer.cpp
@@ -1217,10 +1217,10 @@ sortISDBySectionOrder(Ctx &ctx, InputSectionDescription *isd,
     isd->sections.push_back(isec);
 }
 
-// Sort Xtensa literal sections in OutputSection. For each literal section we try
-// to find by name text(code) section, which uses these literals. The literal
-// section should always be placed before code section.
-// Also we try to place literal section just before code section.
+// Sort Xtensa literal sections in OutputSection. For each literal section we
+// try to find by name text(code) section, which uses these literals. The
+// literal section should always be placed before code section. Also we try to
+// place literal section just before code section.
 static void sortSectionXtensa(OutputSection &osec) {
   for (SectionCommand *b : osec.commands) {
     if (auto *isd = dyn_cast<InputSectionDescription>(b)) {
@@ -1233,7 +1233,7 @@ static void sortSectionXtensa(OutputSection &osec) {
           orderedSections.push_back({isec, orderedNames[isec->name.str()]});
           continue;
         }
-        //Check if current section contains literals
+        // Check if current section contains literals
         if (isec->name.contains(".literal")) {
           std::string literalName = isec->name.str();
           std::size_t pos = literalName.find(".literal");

``````````

</details>


https://github.com/llvm/llvm-project/pull/202926