[llvm] e95d636 - [LoopInterchange] Add test for legality check missing latch condition (NFC) (#202725)

[via llvm-commits]

Author: Ryotaro Kasuga
Date: 2026-06-09T19:03:15Z
New Revision: e95d6365af4a04f70f7f76743b58197a163a6d52

URL: https://github.com/llvm/llvm-project/commit/e95d6365af4a04f70f7f76743b58197a163a6d52
DIFF: https://github.com/llvm/llvm-project/commit/e95d6365af4a04f70f7f76743b58197a163a6d52.diff

LOG: [LoopInterchange] Add test for legality check missing latch condition (NFC) (#202725)

Add a test case reported in #202220. This is a case where the condition
of the inner loop's latch branch is complex, in particular, it's not a
`cmp` instruction, and thus the legality check fails to properly detect
an unsupported case.

Added: 
    llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll b/llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll
new file mode 100644
index 0000000000000..1527893167db5
--- /dev/null
+++ b/llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll
@@ -0,0 +1,78 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -passes=loop-interchange -loop-interchange-profitabilities=ignore -S | FileCheck %s
+
+; for (i = 0; i < 5; i++)
+;   for (j = 0; (j < i) & (j < 100); j++)
+;     A[j*5 + i] += 1;
+;
+; We currently doesn't support interchanging triangular loops, so the above
+; loops must not be interchanged.
+;
+; FIXME: Currently loop-interchange is applied.
+;
+define void @complex_inner_latch_cond(ptr %A) {
+; CHECK-LABEL: define void @complex_inner_latch_cond(
+; CHECK-SAME: ptr [[A:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    br label %[[FOR_J_PREHEADER:.*]]
+; CHECK:       [[FOR_I_HEADER_PREHEADER:.*]]:
+; CHECK-NEXT:    br label %[[FOR_I_HEADER:.*]]
+; CHECK:       [[FOR_I_HEADER]]:
+; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[I_NEXT:%.*]], %[[FOR_I_LATCH:.*]] ], [ 0, %[[FOR_I_HEADER_PREHEADER]] ]
+; CHECK-NEXT:    br label %[[FOR_J_SPLIT1:.*]]
+; CHECK:       [[FOR_J_PREHEADER]]:
+; CHECK-NEXT:    br label %[[FOR_J:.*]]
+; CHECK:       [[FOR_J]]:
+; CHECK-NEXT:    [[J:%.*]] = phi i64 [ [[TMP0:%.*]], %[[FOR_J_SPLIT:.*]] ], [ 0, %[[FOR_J_PREHEADER]] ]
+; CHECK-NEXT:    br label %[[FOR_I_HEADER_PREHEADER]]
+; CHECK:       [[FOR_J_SPLIT1]]:
+; CHECK-NEXT:    [[GEP:%.*]] = getelementptr [5 x i8], ptr [[A]], i64 [[J]], i64 [[I]]
+; CHECK-NEXT:    [[OLD:%.*]] = load i8, ptr [[GEP]], align 1
+; CHECK-NEXT:    [[NEW:%.*]] = add i8 [[OLD]], 1
+; CHECK-NEXT:    store i8 [[NEW]], ptr [[GEP]], align 1
+; CHECK-NEXT:    [[J_NEXT:%.*]] = add i64 [[J]], 1
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i64 [[J_NEXT]], [[I]]
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i64 [[J_NEXT]], 100
+; CHECK-NEXT:    [[EC_J_NOT:%.*]] = and i1 [[C0]], [[C1]]
+; CHECK-NEXT:    br label %[[FOR_I_LATCH]]
+; CHECK:       [[FOR_J_SPLIT]]:
+; CHECK-NEXT:    [[I_LCSSA:%.*]] = phi i64 [ [[I]], %[[FOR_I_LATCH]] ]
+; CHECK-NEXT:    [[TMP0]] = add i64 [[J]], 1
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i64 [[TMP0]], 100
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i64 [[TMP0]], [[I_LCSSA]]
+; CHECK-NEXT:    [[TMP3:%.*]] = and i1 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    br i1 [[TMP3]], label %[[FOR_J]], label %[[EXIT:.*]]
+; CHECK:       [[FOR_I_LATCH]]:
+; CHECK-NEXT:    [[I_NEXT]] = add i64 [[I]], 1
+; CHECK-NEXT:    [[EC_I:%.*]] = icmp eq i64 [[I_NEXT]], 5
+; CHECK-NEXT:    br i1 [[EC_I]], label %[[FOR_J_SPLIT]], label %[[FOR_I_HEADER]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %for.i.header
+
+for.i.header:
+  %i = phi i64 [ 0, %entry ], [ %i.next, %for.i.latch ]
+  br label %for.j
+
+for.j:
+  %j = phi i64 [ 0, %for.i.header ], [ %j.next, %for.j ]
+  %gep = getelementptr [5 x i8], ptr %A, i64 %j, i64 %i
+  %old = load i8, ptr %gep
+  %new = add i8 %old, 1
+  store i8 %new, ptr %gep
+  %j.next = add i64 %j, 1
+  %c0 = icmp slt i64 %j.next, %i
+  %c1 = icmp slt i64 %j.next, 100
+  %ec.j.not = and i1 %c0, %c1
+  br i1 %ec.j.not, label %for.j, label %for.i.latch
+
+for.i.latch:
+  %i.next = add i64 %i, 1
+  %ec.i = icmp eq i64 %i.next, 5
+  br i1 %ec.i, label %exit, label %for.i.header
+
+exit:
+  ret void
+}