[llvm] [AArch64] Minor aarch64-ldst-opt simplifications (PR #201786)

[Ömer Sinan Ağacan via llvm-commits]

https://github.com/osa1 updated https://github.com/llvm/llvm-project/pull/201786

>From 3d536d89e51b8b914e7002dd427bda02e141244d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=96mer=20Sinan=20A=C4=9Facan?= <omeragacan at gmail.com>
Date: Fri, 5 Jun 2026 09:31:43 +0100
Subject: [PATCH] [AArch64] Minor aarch64-ldst-opt simplifications (NFC)

- Remove redundant `clearRenameReg` calls. Rename register is cleared at
  the beginning of `findMatchingInsn` and when it's set, it means we
  found a matching instruction and we always return from
  `findMatchingInsn`. There's no need to clear it redundantly and it
  makes it look like there are cases where we set it, but then decide
  not to rename, which is not the case.

- Remove the local `MBBIWithRenameReg` by moving an early return at an
  even earlier point.

  When `MBBIWithRenameReg` is set we always return early. By moving the
  early return to `MBBIWithRenameReg` update we get rid of a local
  variable which spans  200+ lines. This also fixes a misleading debug
  print between `MBBIWithRenameReg` update and early return:

  ```
  LLVM_DEBUG(dbgs() << "Unable to combine these instructions due to "
                  << "interference in between, keep looking.\n");
  ```

  This line shouldn't be printed when we set `MBBIWithRenameReg`,
  which is fixed with this change.
---
 llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 290fe824d1625..9903de93cbca4 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -2017,7 +2017,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
                                       bool FindNarrowMerge) {
   MachineBasicBlock::iterator E = I->getParent()->end();
   MachineBasicBlock::iterator MBBI = I;
-  MachineBasicBlock::iterator MBBIWithRenameReg;
   MachineInstr &FirstMI = *I;
   MBBI = next_nodbg(MBBI, E);
 
@@ -2217,8 +2216,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
           }
 
           Flags.setMergeForward(false);
-          if (!SameLoadReg)
-            Flags.clearRenameReg();
           return MBBI;
         }
 
@@ -2237,7 +2234,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
         if (RtNotModified && !mayAlias(FirstMI, MemInsns, AA)) {
           if (ModifiedRegUnits.available(getLdStRegOp(FirstMI).getReg())) {
             Flags.setMergeForward(true);
-            Flags.clearRenameReg();
             return MBBI;
           }
 
@@ -2247,7 +2243,7 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
           if (RenameReg) {
             Flags.setMergeForward(true);
             Flags.setRenameReg(*RenameReg);
-            MBBIWithRenameReg = MBBI;
+            return MBBI;
           }
         }
         LLVM_DEBUG(dbgs() << "Unable to combine these instructions due to "
@@ -2255,9 +2251,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
       }
     }
 
-    if (Flags.getRenameReg())
-      return MBBIWithRenameReg;
-
     // If the instruction wasn't a matching load or store.  Stop searching if we
     // encounter a call instruction that might modify memory.
     if (MI.isCall()) {