[llvm] [SelectionDAG] Encode frequent ISD opcode checks directly (PR #202634)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/include/llvm/CodeGen/SelectionDAGISel.h llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/utils/TableGen/DAGISelMatcherEmitter.cpp --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index a80518250..0020255b3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3053,8 +3053,7 @@ static constexpr uint16_t CompactISDOpcodes[] = {
 
 static_assert(sizeof(CompactISDOpcodes) / sizeof(*CompactISDOpcodes) ==
               SelectionDAGISel::OPC_CheckOpcodeISD_BUILD_VECTOR -
-                      SelectionDAGISel::OPC_CheckOpcodeISD_SRL +
-                  1);
+                  SelectionDAGISel::OPC_CheckOpcodeISD_SRL + 1);
 
 LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
 CheckCompactISDOpcode(unsigned MatcherOpcode, SDNode *N) {
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 564fff8e2..1bc15e898 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -517,20 +517,16 @@ static unsigned emitMVT(MVT VT, raw_ostream &OS) {
 static StringRef getCompactISDOpcode(StringRef Opcode) {
   return StringSwitch<StringRef>(Opcode)
       .Case("ISD::SRL", "OPC_CheckOpcodeISD_SRL")
-      .Case("ISD::SIGN_EXTEND_INREG",
-            "OPC_CheckOpcodeISD_SIGN_EXTEND_INREG")
+      .Case("ISD::SIGN_EXTEND_INREG", "OPC_CheckOpcodeISD_SIGN_EXTEND_INREG")
       .Case("ISD::TargetConstant", "OPC_CheckOpcodeISD_TargetConstant")
       .Case("ISD::LOAD", "OPC_CheckOpcodeISD_LOAD")
       .Case("ISD::Constant", "OPC_CheckOpcodeISD_Constant")
-      .Case("ISD::INTRINSIC_WO_CHAIN",
-            "OPC_CheckOpcodeISD_INTRINSIC_WO_CHAIN")
+      .Case("ISD::INTRINSIC_WO_CHAIN", "OPC_CheckOpcodeISD_INTRINSIC_WO_CHAIN")
       .Case("ISD::SRA", "OPC_CheckOpcodeISD_SRA")
       .Case("ISD::ADD", "OPC_CheckOpcodeISD_ADD")
-      .Case("ISD::EXTRACT_SUBVECTOR",
-            "OPC_CheckOpcodeISD_EXTRACT_SUBVECTOR")
+      .Case("ISD::EXTRACT_SUBVECTOR", "OPC_CheckOpcodeISD_EXTRACT_SUBVECTOR")
       .Case("ISD::SPLAT_VECTOR", "OPC_CheckOpcodeISD_SPLAT_VECTOR")
-      .Case("ISD::EXTRACT_VECTOR_ELT",
-            "OPC_CheckOpcodeISD_EXTRACT_VECTOR_ELT")
+      .Case("ISD::EXTRACT_VECTOR_ELT", "OPC_CheckOpcodeISD_EXTRACT_VECTOR_ELT")
       .Case("ISD::XOR", "OPC_CheckOpcodeISD_XOR")
       .Case("ISD::MUL", "OPC_CheckOpcodeISD_MUL")
       .Case("ISD::AND", "OPC_CheckOpcodeISD_AND")

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https://github.com/llvm/llvm-project/pull/202634