[llvm] [AMDGPU][NFC] Add last use tests for gfx13 (PR #202600)
Mariusz Sikora via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 9 05:58:43 PDT 2026
https://github.com/mariusz-sikora-at-amd created https://github.com/llvm/llvm-project/pull/202600
None
>From 56235f9a1bdae81865085633921a902319628438 Mon Sep 17 00:00:00 2001
From: Mariusz Sikora <mariusz.sikora at amd.com>
Date: Tue, 9 Jun 2026 08:50:20 -0400
Subject: [PATCH] [AMDGPU][NFC] Add last use tests for gfx13
---
.../llvm.amdgcn.buffer.load-last-use.ll | 71 +++++++++++++------
.../AMDGPU/memory-legalizer-flat-lastuse.ll | 68 ++++++++++++++++++
.../AMDGPU/memory-legalizer-global-lastuse.ll | 71 +++++++++++++++++++
.../memory-legalizer-private-lastuse.ll | 68 ++++++++++++++++++
4 files changed, 255 insertions(+), 23 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
index 9ef082d15e1bd..115cf0d7622a2 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
@@ -1,35 +1,60 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-;RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GCN
-;RUN: llc < %s -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GCN
+;RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GFX12
+;RUN: llc < %s -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GFX12
+;RUN: llc < %s -global-isel=0 -mtriple=amdgcn -mcpu=gfx1310 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GFX13
+;RUN: llc < %s -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1310 -amdgpu-enable-delay-alu=0 | FileCheck %s --check-prefix=GFX13
define float @raw_buffer_load(<4 x i32> inreg) {
-; GCN-LABEL: raw_buffer_load:
-; GCN: ; %bb.0: ; %main_body
-; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
-; GCN-NEXT: s_wait_expcnt 0x0
-; GCN-NEXT: s_wait_samplecnt 0x0
-; GCN-NEXT: s_wait_bvhcnt 0x0
-; GCN-NEXT: s_wait_kmcnt 0x0
-; GCN-NEXT: buffer_load_b32 v0, off, s[0:3], null th:TH_LOAD_LU
-; GCN-NEXT: s_wait_loadcnt 0x0
-; GCN-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: raw_buffer_load:
+; GFX12: ; %bb.0: ; %main_body
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: buffer_load_b32 v0, off, s[0:3], null th:TH_LOAD_LU
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX13-LABEL: raw_buffer_load:
+; GFX13: ; %bb.0: ; %main_body
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_expcnt 0x0
+; GFX13-NEXT: s_wait_samplecnt 0x0
+; GFX13-NEXT: s_wait_bvhcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: buffer_load_b32 v0, off, s[0:3], null th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_set_pc_i64 s[30:31]
main_body:
%data = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> %0, i32 0, i32 0, i32 3)
ret float %data
}
define float @struct_buffer_load(<4 x i32> inreg) {
-; GCN-LABEL: struct_buffer_load:
-; GCN: ; %bb.0: ; %main_body
-; GCN-NEXT: s_wait_loadcnt_dscnt 0x0
-; GCN-NEXT: s_wait_expcnt 0x0
-; GCN-NEXT: s_wait_samplecnt 0x0
-; GCN-NEXT: s_wait_bvhcnt 0x0
-; GCN-NEXT: s_wait_kmcnt 0x0
-; GCN-NEXT: v_mov_b32_e32 v0, 0
-; GCN-NEXT: buffer_load_b32 v0, v0, s[0:3], null idxen th:TH_LOAD_LU
-; GCN-NEXT: s_wait_loadcnt 0x0
-; GCN-NEXT: s_setpc_b64 s[30:31]
+; GFX12-LABEL: struct_buffer_load:
+; GFX12: ; %bb.0: ; %main_body
+; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX12-NEXT: s_wait_expcnt 0x0
+; GFX12-NEXT: s_wait_samplecnt 0x0
+; GFX12-NEXT: s_wait_bvhcnt 0x0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v0, 0
+; GFX12-NEXT: buffer_load_b32 v0, v0, s[0:3], null idxen th:TH_LOAD_LU
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX13-LABEL: struct_buffer_load:
+; GFX13: ; %bb.0: ; %main_body
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_expcnt 0x0
+; GFX13-NEXT: s_wait_samplecnt 0x0
+; GFX13-NEXT: s_wait_bvhcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: buffer_load_b32 v0, v0, s[0:3], null idxen th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_set_pc_i64 s[30:31]
main_body:
%data = call float @llvm.amdgcn.struct.buffer.load.f32(<4 x i32> %0, i32 0, i32 0, i32 0, i32 3)
ret float %data
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll b/llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
index 2bf272a74d0c7..d3c288b7cafa8 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
@@ -2,6 +2,8 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 < %s | FileCheck --check-prefix=GFX13 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 -mattr=+cumode < %s | FileCheck --check-prefix=GFX13 %s
define amdgpu_kernel void @flat_last_use_load_0(ptr %in, ptr %out) {
; GFX12-LABEL: flat_last_use_load_0:
@@ -37,6 +39,21 @@ define amdgpu_kernel void @flat_last_use_load_0(ptr %in, ptr %out) {
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: flat_last_use_load_0:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: flat_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load i32, ptr %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr %out
@@ -97,6 +114,24 @@ define amdgpu_kernel void @flat_last_use_load_1(ptr %in, ptr %out) {
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: flat_last_use_load_1:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, v0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_mov_b32 s4, 0x3ff
+; GFX13-NEXT: v_and_b32_e64 v1, v1, s4
+; GFX13-NEXT: flat_load_b32 v1, v1, s[2:3] scale_offset th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: flat_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%val.gep = getelementptr inbounds i32, ptr %in, i32 %tid
@@ -143,6 +178,24 @@ define amdgpu_kernel void @flat_last_use_and_volatile_load(ptr %in, ptr %out) {
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: flat_last_use_and_volatile_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_wait_xcnt 0x0
+; GFX13-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_BYPASS scope:SCOPE_SYS
+; GFX13-NEXT: s_wait_bvhcnt 0x0
+; GFX13-NEXT: s_wait_samplecnt 0x0
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: flat_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load volatile i32, ptr %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr %out
@@ -183,6 +236,21 @@ define amdgpu_kernel void @flat_last_use_and_nontemporal_load(ptr %in, ptr %out)
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: flat_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: flat_last_use_and_nontemporal_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: flat_load_b32 v1, v0, s[2:3] th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: flat_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load i32, ptr %in, align 4, !amdgpu.last.use !{}, !nontemporal !0
store i32 %val, ptr %out
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll b/llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
index 79ac22943abc8..6a81b0655117e 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
@@ -2,6 +2,8 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 < %s | FileCheck --check-prefix=GFX13 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 -mattr=+cumode < %s | FileCheck --check-prefix=GFX13 %s
define amdgpu_kernel void @global_last_use_load_0(ptr addrspace(1) %in, ptr addrspace(1) %out) {
; GFX12-LABEL: global_last_use_load_0:
@@ -34,6 +36,21 @@ define amdgpu_kernel void @global_last_use_load_0(ptr addrspace(1) %in, ptr addr
; GFX1250-NEXT: v_mov_b32_e32 v1, s2
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_last_use_load_0:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_load_b32 s2, s[2:3], 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: v_mov_b32_e32 v1, s2
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load i32, ptr addrspace(1) %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr addrspace(1) %out
@@ -94,6 +111,24 @@ define amdgpu_kernel void @global_last_use_load_1(ptr addrspace(1) %in, ptr addr
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_last_use_load_1:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, v0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_mov_b32 s4, 0x3ff
+; GFX13-NEXT: v_and_b32_e64 v1, v1, s4
+; GFX13-NEXT: global_load_b32 v1, v1, s[2:3] scale_offset th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%val.gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid
@@ -136,6 +171,24 @@ define amdgpu_kernel void @global_last_use_and_volatile_load(ptr addrspace(1) %i
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_last_use_and_volatile_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_wait_xcnt 0x0
+; GFX13-NEXT: global_load_b32 v1, v0, s[2:3] th:TH_LOAD_BYPASS scope:SCOPE_SYS
+; GFX13-NEXT: s_wait_bvhcnt 0x0
+; GFX13-NEXT: s_wait_samplecnt 0x0
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load volatile i32, ptr addrspace(1) %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr addrspace(1) %out
@@ -196,6 +249,24 @@ define amdgpu_kernel void @global_last_use_and_nontemporal_load(ptr addrspace(1)
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: global_last_use_and_nontemporal_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, v0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b64 s[2:3], s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_mov_b32 s4, 0x3ff
+; GFX13-NEXT: v_and_b32_e64 v1, v1, s4
+; GFX13-NEXT: global_load_b32 v1, v1, s[2:3] scale_offset th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%val.gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll b/llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
index 07c5c809f0da2..cc3883c7724e9 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
@@ -2,6 +2,8 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 < %s | FileCheck --check-prefix=GFX13 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O0 -mcpu=gfx1310 -mattr=+cumode < %s | FileCheck --check-prefix=GFX13 %s
define amdgpu_kernel void @private_last_use_load_0(ptr addrspace(5) %in, ptr addrspace(1) %out) {
; GFX12-LABEL: private_last_use_load_0:
@@ -34,6 +36,21 @@ define amdgpu_kernel void @private_last_use_load_0(ptr addrspace(5) %in, ptr add
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: private_last_use_load_0:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b32 s0, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b32 s2, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: scratch_load_b32 v1, off, s2 th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load i32, ptr addrspace(5) %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr addrspace(1) %out
@@ -80,6 +97,24 @@ define amdgpu_kernel void @private_last_use_load_1(ptr addrspace(5) %in, ptr add
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: private_last_use_load_1:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: v_mov_b32_e32 v1, v0
+; GFX13-NEXT: s_load_b32 s0, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b32 s2, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_mov_b32 s3, 0x3ff
+; GFX13-NEXT: v_and_b32_e64 v1, v1, s3
+; GFX13-NEXT: scratch_load_b32 v1, v1, s2 scale_offset th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%val.gep = getelementptr inbounds i32, ptr addrspace(5) %in, i32 %tid
@@ -122,6 +157,24 @@ define amdgpu_kernel void @private_last_use_and_volatile_load(ptr addrspace(5) %
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: private_last_use_and_volatile_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b32 s0, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b32 s2, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_wait_xcnt 0x0
+; GFX13-NEXT: scratch_load_b32 v1, off, s2 th:TH_LOAD_BYPASS scope:SCOPE_SYS
+; GFX13-NEXT: s_wait_bvhcnt 0x0
+; GFX13-NEXT: s_wait_samplecnt 0x0
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load volatile i32, ptr addrspace(5) %in, align 4, !amdgpu.last.use !{}
store i32 %val, ptr addrspace(1) %out
@@ -159,6 +212,21 @@ define amdgpu_kernel void @private_last_use_and_nontemporal_load(ptr addrspace(5
; GFX1250-NEXT: s_wait_kmcnt 0x0
; GFX1250-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT: s_endpgm
+;
+; GFX13-LABEL: private_last_use_and_nontemporal_load:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b32 s0, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: s_load_b32 s2, s[4:5], 0x0 nv
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x8 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: scratch_load_b32 v1, off, s2 th:TH_LOAD_LU
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%val = load i32, ptr addrspace(5) %in, align 4, !amdgpu.last.use !{}, !nontemporal !0
store i32 %val, ptr addrspace(1) %out
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