[llvm] [RISCV][P-ext] Merge paired pli/plui in RISCVMoveMerger (PR #202566)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/RISCV/RISCVMoveMerger.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVMoveMerger.cpp b/llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
index ec20e377e..2a35c1a64 100644
--- a/llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
@@ -47,9 +47,9 @@ struct RISCVMoveMerge : public MachineFunctionPass {
   MachineBasicBlock::iterator
   mergePairedInsns(MachineBasicBlock::iterator I,
                    MachineBasicBlock::iterator Paired, bool MoveFromSToA);
-  MachineBasicBlock::iterator
-  mergePLIPair(MachineBasicBlock::iterator I,
-               MachineBasicBlock::iterator Paired, bool RegPairIsEven);
+  MachineBasicBlock::iterator mergePLIPair(MachineBasicBlock::iterator I,
+                                           MachineBasicBlock::iterator Paired,
+                                           bool RegPairIsEven);
 
   MachineBasicBlock::iterator
   findMatchingInstPair(MachineBasicBlock::iterator &MBBI, bool EvenRegPair,
@@ -60,8 +60,8 @@ struct RISCVMoveMerge : public MachineFunctionPass {
   MachineBasicBlock::iterator
   findMatchingInst(MachineBasicBlock::iterator &MBBI, bool MoveFromSToA,
                    const DestSourcePair &RegPair);
-  MachineBasicBlock::iterator
-  findMatchingPLI(MachineBasicBlock::iterator &MBBI, bool EvenRegPair);
+  MachineBasicBlock::iterator findMatchingPLI(MachineBasicBlock::iterator &MBBI,
+                                              bool EvenRegPair);
   bool mergeMoveSARegPair(MachineBasicBlock &MBB);
   bool runOnMachineFunction(MachineFunction &Fn) override;
 
@@ -163,8 +163,9 @@ bool RISCVMoveMerge::isPLIPairCandidate(const MachineInstr &MI,
   if (!getPairedPLIOpcode(MI.getOpcode()))
     return false;
   unsigned SubIdx = EvenRegPair ? RISCV::sub_gpr_even : RISCV::sub_gpr_odd;
-  return TRI->getMatchingSuperReg(MI.getOperand(0).getReg(), SubIdx,
-                                  &RISCV::GPRPairRegClass)
+  return TRI
+      ->getMatchingSuperReg(MI.getOperand(0).getReg(), SubIdx,
+                            &RISCV::GPRPairRegClass)
       .isValid();
 }
 
@@ -402,8 +403,8 @@ RISCVMoveMerge::findMatchingPLI(MachineBasicBlock::iterator &MBBI,
       !EvenRegPair ? RISCV::sub_gpr_even : RISCV::sub_gpr_odd;
 
   // Get the expected destination register of the matching lane.
-  Register DestGPRPair = TRI->getMatchingSuperReg(
-      FirstDestReg, RegPairIdx, &RISCV::GPRPairRegClass);
+  Register DestGPRPair = TRI->getMatchingSuperReg(FirstDestReg, RegPairIdx,
+                                                  &RISCV::GPRPairRegClass);
   Register ExpectedDestReg = TRI->getSubReg(DestGPRPair, SecondPairIdx);
 
   for (MachineBasicBlock::iterator I = next_nodbg(MBBI, E); I != E;

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https://github.com/llvm/llvm-project/pull/202566