[llvm] InstCombine: reuse shifted/added values in reassociation (PR #202563)

[Tianyi Jiao via llvm-commits]

https://github.com/squirrel1027 created https://github.com/llvm/llvm-project/pull/202563

Add regression test for reassociation. Adds llvm/test/Transforms/InstCombine/reassoc.ll to ensure InstCombine reuses shifted/added values during reassociation.\n\nThis test was validated locally by running 'opt -passes=instcombine' on reduced IR inputs and confirming the expected reassociation and reuse of shifted/added values. Patch: /tmp/0001-InstCombine-reassoc.patch

>From 6de6499043b54aabeb4b0615ca0ad2bbadd9aafe Mon Sep 17 00:00:00 2001
From: squirrel1027 <squirrel1027 at users.noreply.github.com>
Date: Tue, 9 Jun 2026 17:09:06 +0800
Subject: [PATCH] [InstCombine] Add reassociation regression test for reuse of
 shl/add results

Signed-off-by: squirrel1027 <squirrel1027 at users.noreply.github.com>
---
 llvm/test/Transforms/InstCombine/reassoc.ll | 35 +++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 llvm/test/Transforms/InstCombine/reassoc.ll

diff --git a/llvm/test/Transforms/InstCombine/reassoc.ll b/llvm/test/Transforms/InstCombine/reassoc.ll
new file mode 100644
index 0000000000000..8220b1237479c
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/reassoc.ll
@@ -0,0 +1,35 @@
+; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+
+; CHECK-LABEL: define i8 @newDenseMat(
+; CHECK: %3 = shl i8 %1, 1
+; CHECK: %4 = mul i8 %0, %3
+
+define i8 @newDenseMat(i8 %0, i8 %1, i8* %2) {
+entry:
+  %4 = shl i8 %1, 1
+  %5 = shl i8 %0, 1
+  %6 = mul i8 %5, %1
+  store i8 %6, i8* %2, align 8
+  ret i8 %4
+}
+
+; CHECK-LABEL: define i32 @H5HF__sect_indirect_init_rows(
+; CHECK: %3 = add i32 %2, 1
+; CHECK: %4 = sub i32 %3, %1
+
+define noundef i32 @H5HF__sect_indirect_init_rows(i32* %0, i32 %1, i32 %2) {
+entry:
+  %4 = add i32 %2, 1
+  store i32 %4, i32* %0, align 8
+  %reass.sub = sub i32 %2, %1
+  %5 = add i32 %reass.sub, 1
+  ret i32 %5
+}
+
+define noundef i32 @tgt2(i32* %0, i32 %1, i32 %2) {
+entry:
+  %4 = add i32 %2, 1
+  store i32 %4, i32* %0, align 8
+  %5 = sub i32 %4, %1
+  ret i32 %5
+}