[llvm] 239a898 - [AArch64][GlobalISel] Fix post-legalizer observer notifications (#202376)

[via llvm-commits]

Author: Cullen Rhodes
Date: 2026-06-09T09:19:50+01:00
New Revision: 239a898a235ff81e6208be31670ef143435506c8

URL: https://github.com/llvm/llvm-project/commit/239a898a235ff81e6208be31670ef143435506c8
DIFF: https://github.com/llvm/llvm-project/commit/239a898a235ff81e6208be31670ef143435506c8.diff

LOG: [AArch64][GlobalISel] Fix post-legalizer observer notifications (#202376)

Assisted-by: codex

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
    llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
index 3a0c0e7494f41..cd57d4dab9c8d 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
@@ -585,7 +585,7 @@ static void applySubAddMulReassoc(MachineInstr &MI, MachineInstr &Sub,
   MI.getOperand(1).setReg(Tmp);
   MI.getOperand(2).setReg(Mul2);
   Sub.eraseFromParent();
-  Observer.changingInstr(MI);
+  Observer.changedInstr(MI);
 }
 
 class AArch64PostLegalizerCombinerImpl : public Combiner {

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index c22221724f3ec..c129266f016d4 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -1017,7 +1017,7 @@ void applySwapICmpOperands(MachineInstr &MI, GISelChangeObserver &Observer) {
   auto Pred = static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate());
   Register LHS = MI.getOperand(2).getReg();
   Register RHS = MI.getOperand(3).getReg();
-  Observer.changedInstr(MI);
+  Observer.changingInstr(MI);
   MI.getOperand(1).setPredicate(CmpInst::getSwappedPredicate(Pred));
   MI.getOperand(2).setReg(RHS);
   MI.getOperand(3).setReg(LHS);