[llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule fix + TargetParser gfx1200 propagation (PR #202093)

Alexandra Munkes via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 9 00:51:25 PDT 2026


Malexandra-de wrote:

@clearnature Whoops, forgot to submit my comments from yesterday.

I'm just a random asshole on github, who has nothing to do with the LLVM project, and I will be blunt: This whole PR looks AI hallucinated. 

1. Your proposed code changes would break support for quite a few IP blocks, specifically anything gfx117X and gfx125x, though for gfx120x they would only cause the hardware to use unnecessary extra vgprs.
2. You refer to nonexistent files in your own personal repository with the "reverse engineering tool" to justify your absolutely ludicrous performance claims that are **5x higher** than what the hardware is physically capable of outputting.
3. Your claimed execution latencies are all wrong, as you could see if you looked at something like the [Matrix Instruction calculator](https://github.com/ROCm/amd_matrix_instruction_calculator).
4. You refer to nonexistent commits/LOCs in AMDs upstream repository, a clear sign that whatever LLM you used to compose this hallucinated them into existence.

I think that's most of it.

https://github.com/llvm/llvm-project/pull/202093


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